Method for preparing MOS device
By adding Ni sacrificial layer deposition and etching steps during the fabrication of MOS devices to form a nickel silicide layer, the problem of high contact resistance in the source and drain regions is solved, and the conductivity of the device is improved.
WO2026143868A1PCT designated stage Publication Date: 2026-07-09INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD +1
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
- Filing Date
- 2025-03-21
- Publication Date
- 2026-07-09
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Figure CN2025084028_09072026_PF_FP_ABST
Abstract
A method for preparing a MOS device. The method comprises: performing impurity doping treatment on a source / drain region of an initial chip substrate to obtain a first chip substrate; depositing a Ni sacrificial layer on a surface of the first chip substrate to obtain a second chip substrate, wherein a part of the Ni sacrificial layer that is deposited into a through hole diffuses to the source / drain region that has been subjected to impurity doping treatment, and a nickel silicide layer is formed on the top of the source / drain region that has been subjected to impurity doping treatment; performing etching treatment on the Ni sacrificial layer of the second chip substrate to obtain a third chip substrate; depositing a contact metal layer on a surface of the third chip substrate to obtain a fourth chip substrate; and performing thermal treatment on the fourth chip substrate, so that the contact metal layer reacts with a surface layer of the source / drain region to obtain a nickel-containing metal silicide, and thus a MOS device is formed.
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