Substrate processing method and substrate processing apparatus

By forming a metal silicide film in the recess of the substrate and utilizing plasma etching and sidewall treatment processes, the problem of poor metal film formation in the substrate recess was solved, resulting in reduced contact resistance and increased productivity.

CN122373702APending Publication Date: 2026-07-10TOKYO ELECTRON LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
TOKYO ELECTRON LTD
Filing Date
2025-12-30
Publication Date
2026-07-10

AI Technical Summary

Technical Problem

When metal silicides are formed in the recesses of a substrate, poor film formation is prone to occur, especially increased contact resistance between the metal film and the semiconductor layer and uneven growth of the metal film on the sidewalls.

Method used

A metal silicide film is formed by supplying a processing gas containing a first metal to the substrate, and the metal film on the recessed sidewalls is removed by plasma etching and sidewall processing. Subsequently, a film-forming gas containing a second metal is supplied to form a stacked metal film, and the film-forming position and thickness of the metal film are controlled.

Benefits of technology

It effectively suppressed poor metal film formation in the substrate recess, reduced contact resistance, improved productivity, and prevented lateral growth of the metal film on the sidewalls and the formation of voids.

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Abstract

A substrate processing method and a substrate processing apparatus are disclosed. The substrate processing method includes: a metal silicide film formation step, wherein a first processing gas comprising a first metal is supplied to a substrate having a recess having a silicon-containing semiconductor layer exposed on its bottom surface and sidewalls formed by an insulating film, to form a metal silicide film constituting the bottom wall of the recess; a plasma processing step, wherein at least one of a plasma etching step and a sidewall processing step is performed, wherein in the plasma etching step, a plasma-enhanced etching gas is supplied to the substrate to remove the first metal film at the sidewalls of the recess, and in the sidewall processing step, a plasma-enhanced second processing gas is supplied to the substrate to form a metal-containing film on the sidewalls of the recess, which is a mixture of the first metal and elements constituting the insulating film; and a film formation step, wherein a first film-forming gas comprising a second metal is supplied to the substrate after the plasma processing step to form a laminated metal film stacked on the metal silicide film.
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Description

Technical Field

[0001] This disclosure relates to a substrate processing method and a substrate processing apparatus. Background Technology

[0002] In the manufacturing process of semiconductor devices, recesses constituting vias, trenches, etc., are formed on an insulating film formed on a semiconductor wafer (hereinafter referred to as "wafer") that serves as a substrate. Then, a metal film, serving as a wiring material, is embedded within the recess in such a way that it is electrically connected to a silicon-containing semiconductor layer exposed at the bottom surface of the recess. Sometimes, by making the silicon at the bottom surface of the recess a metal silicide before this embedding, the resistance (contact resistance) at the contact between the metal film and the semiconductor layer is reduced.

[0003] Patent Document 1 describes a method where, after forming a TiSi film at the bottom of a recess in a substrate, the Ti film formed on the sidewalls of the recess for forming the titanium silicide film is etched away by supplying unplasmized TiCl4 gas. Patent Document 2 describes a method where, with a SiN film covering the sidewalls of the recess in a substrate using a SiO2 film, a process is performed by plasmaizing gases containing TiCl4 and H2 gas, thereby forming a Ti film at the bottom of the recess and preventing the formation of a Ti film on the sidewalls of the recess.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2002-210713

[0007] Patent Document 2: Japanese Patent Application Publication No. 2024-62790 Summary of the Invention

[0008] The problem the invention aims to solve

[0009] This disclosure provides a technique for suppressing poor film formation when forming a metal film for wiring on a metal silicide in a recess of a substrate.

[0010] Solution for solving the problem

[0011] The substrate processing method disclosed herein includes: a metal silicide film formation step, wherein a first processing gas containing a first metal is supplied to a substrate having a recess having a silicon-containing semiconductor layer exposed on its bottom surface and a sidewall formed by an insulating film, to form a metal silicide film constituting the bottom wall of the recess; a plasma processing step, wherein at least one of a plasma etching step and a sidewall processing step is performed in the plasma processing step, wherein in the plasma etching step, a plasma-enhanced etching gas is supplied to the substrate to remove the first metal film at the sidewall of the recess, and in the sidewall processing step, a plasma-enhanced second processing gas is supplied to the substrate to form a metal-containing film mixed with the first metal and elements constituting the insulating film on the sidewall of the recess; and a film formation step, wherein a first film-forming gas containing a second metal is supplied to the substrate after the plasma processing step to form a stacked metal film stacked on the metal silicide film.

[0012] The effects of the invention

[0013] This disclosure enables the suppression of poor film formation when a metal film for wiring is formed on a metal silicide in a recess of a substrate. Attached Figure Description

[0014] Figure 1 This is a longitudinal sectional side view of the wafer before it undergoes the processing required for the implementation method.

[0015] Figure 2A This is a longitudinal sectional side view of the wafer processed by the first embodiment.

[0016] Figure 2B This is a longitudinal sectional side view of the wafer processed by the first embodiment.

[0017] Figure 3A This is a longitudinal sectional side view of the wafer processed by the first embodiment.

[0018] Figure 3B This is a longitudinal sectional side view of the wafer processed by the first embodiment.

[0019] Figure 4 This is a longitudinal sectional side view of the wafer processed by the second embodiment.

[0020] Figure 5A This is a longitudinal sectional side view of the wafer processed by the second embodiment.

[0021] Figure 5B This is a longitudinal sectional side view of the wafer processed by the second embodiment.

[0022] Figure 6 This is a top view of the substrate processing apparatus that performs the processing of the first and second embodiments.

[0023] Figure 7 This is a longitudinal sectional side view of the processing module disposed in the substrate processing apparatus.

[0024] Figure 8 This is a graph showing the results of the evaluation of test 2.

[0025] Figure 9 This is a graph showing the results of the evaluation test 3.

[0026] Figure 10 This is a graph showing the results of the evaluation experiment 4.

[0027] Figure 11 This is a graph showing the results of the evaluation experiment 4.

[0028] Figure 12 This is a graph showing the results of the evaluation test 5.

[0029] Figure 13 This is a graph showing the results of the evaluation test 5.

[0030] Figure 14 This is a graph showing the results of the evaluation of experiment 6. Detailed Implementation

[0031] [First Implementation]

[0032] exist Figure 1 The image shows a longitudinal sectional side view of a wafer A, which is the object of processing in the first and second embodiments. In the following description of wafer A, the thickness direction of wafer A is taken as the longitudinal direction. Wafer A includes a Si (silicon) layer 11 as a semiconductor layer, and a SiN (silicon nitride) film 12 as an insulating film is stacked on the Si layer 11. A hole is formed longitudinally in the SiN film 12, and the lower end of the hole reaches the Si layer 11. By providing such a SiN film 12 and a hole, a recess 13 constituting a trench or hole is formed on wafer A, and the sidewall of the recess 13 is formed by the SiN film 12 as an insulating film. Moreover, the bottom wall of the recess 13 is formed by the Si layer 11, that is, the semiconductor layer containing silicon, and the Si layer 11 is exposed on the surface of wafer A as the bottom surface of the recess 13.

[0033] The processing of wafer A in the first embodiment will be described. Furthermore, each of the processes described below is performed by supplying gas into a processing container while wafer A is stored inside a processing container with its interior evacuated to a predetermined vacuum pressure. Moreover, each process is not limited to being performed in the same processing container, but may also be performed in different processing containers. Additionally, wafer A is heated to a predetermined temperature within the processing container to advance each process.

[0034] First, to the storage Figure 1The processing container of wafer A shown is supplied with TiCl4 (titanium tetrachloride) gas, H2 (hydrogen) gas, and Ar (argon) gas. Plasma CVD is performed by plasmaizing these gases. Figure 2A (Step S1). TiCl4 gas is the first processing gas used to form the metal silicide film. Additionally, H2 gas is used to react with and remove chlorine, which constitutes TiCl4, and Ar gas is used for plasma formation. By supplying these gases, the portion of the Si layer 11 exposed at the bottom surface of the recess 13 reacts with Ti, the first metal contained in TiCl4, to form a TiSi (titanium silicide) film 14, which is a metal silicide film, on the bottom wall of the recess 13. On the other hand, a Ti (titanium) film 15 is formed on the sidewall of the recess 13.

[0035] Next, TiCl4 gas and Ar gas are supplied into the processing container, and plasma etching is performed by plasmaizing these gases. Figure 2B (Step S2). The Ti film 15 on the sidewall of the recess 13 is etched mainly by the action of chlorine active species such as chlorine and ions generated from TiCl4. The TiCl4 gas and Ar gas used in this step S2 are etching gases for plasma etching. Therefore, the plasma etching gas and the metal silicide formation gas each contain TiCl4 gas.

[0036] Subsequently, WCl5 (tungsten pentachloride) gas, Ar gas, and H2 gas are supplied to the processing container for CVD to form a W (tungsten) film 16 in the recess 13 in a manner that is stacked on the TiSi film 14. Figure 3A (Step S3). WCl5 gas is the first film-forming gas used for film formation, H2 gas is the gas used to react with chlorine constituting WCl5 to remove it, Ar gas is the carrier gas, and W contained in WCl5 is a second metal. As shown in the evaluation test described later, when each gas, including WCl5 gas, is supplied to the substrate in this way, a W film is formed on the Ti film, while the formation of a W film on the SiN film is suppressed. Since the Ti film 15 is etched in step S2 as described above, the formation of a W film 16 on the sidewall of the recess 13, which is the SiN film 12, can be suppressed by the processing in step S3, and the W film 16 is selectively formed at the bottom of the recess 13.

[0037] The supply of WCl5 gas, Ar gas, and H2 gas is stopped before the W film 16, which is a stacked metal film stacked on the TiSi film 14, fills the recess 13 (that is, before the upper surface of the W film 16, whose film thickness increases within the recess 13, reaches the upper end of the recess 13), and step S3 ends. Therefore, the W film 16 is formed as a thin film with a small thickness within the recess 13.

[0038] Then, a gas containing WF6 (tungsten hexafluoride) is supplied into the processing container as a second film-forming gas, such as... Figure 3B As shown, a W film, serving as a metal film, is filled into the recess 13 (step S4). Step S4 is the same as step S3, forming the W film, but the compound constituting the gas used in film formation differs from that in step S3. For clarity, the W film formed by WF6 gas is designated as W film 17 to distinguish it from the W film 16 formed by WCl5 gas. W film 17, together with W film 16, forms the wiring of a semiconductor device manufactured from wafer A. The portion of W film 17 formed above the recess 13 is subsequently removed by CMP.

[0039] The reason for forming the W film 16 in step S3 before forming the W film 17 in step S4 is explained. From the viewpoint of improving film formation efficiency, WF6 gas is preferred over WCl5 gas when filling the recess 13 with the W film 17. Therefore, WF6 gas is used in step S4 for this filling. However, the fluorine constituting WF6 has a relatively high etching effect on the TiSi film 14. Therefore, in step S3, the W film 16 is formed using WCl5 gas to cover the TiSi film 14, and the W film 16 protects the TiSi film 14 from etching during the filling of the W film 17.

[0040] Furthermore, when wafer A is exposed to the atmosphere from the formation of TiSi film 14 until the filling of W film 17 into recess 13, W film 16 also serves to prevent the atmosphere from oxidizing the surface of TiSi film 14, thereby preventing the contact resistance from increasing. As an example of exposing wafer A to the atmosphere, one can exemplify the case where wafer A is moved from the apparatus for forming TiSi film 14 to the apparatus for filling W film 17 via an atmospheric atmosphere.

[0041] As described above, according to the first embodiment, the Ti film 15 on the sidewall of the recess 13 is etched. Therefore, compared to the case where the Ti film 15 is not etched, the volume of the W film 17 embedded in the recess 13 is larger. Ti has a higher resistance than W. Therefore, in the first embodiment, it is possible to suppress the increase in resistance of the wiring formed in the recess 13. Furthermore, by suppressing the etching of the Ti film 15 on the sidewall of the recess 13, it is possible to suppress the formation of the W film 16 on the sidewall of the recess 13 in step S3. By suppressing the formation of the W film 16 on the sidewall in this way, it is thereby prevented that the W film 17 grows laterally from the W film 16 on the sidewall during step S4. If the W film 17 grows laterally, it is possible that the opening of the recess 13 will be blocked before the W film 17 is filled into the recess 13, forming a void in the W film 17. Thus, according to the first embodiment, by suppressing the formation of the W film 16 on the sidewall of the recess 13, poor embedding of the W film 17 within the recess 13 can be prevented. That is, poor film formation of the W films 16 and 17 is suppressed respectively.

[0042] Furthermore, in the first embodiment, the Ti film 15 is etched by plasmaizing TiCl4 gas. As shown in the evaluation test described later, the etching of the Ti film 15 can be completed rapidly compared to etching without plasmaizing TiCl4 gas. Therefore, according to the first embodiment, the productivity of the apparatus and system for performing the process from forming the TiSi film 14 to embedding the W film 17 into the recess 13 can be improved.

[0043] [Second Implementation]

[0044] The treatment of the second embodiment will be explained focusing on the differences from the first embodiment. First, regarding... Figure 1 The wafer A shown undergoes step S1 to form a TiSi film 14 on the bottom wall of the recess 13 and a Ti film 15 on the sidewall. Then, step S2 is performed to etch the Ti film 15 to thin it. Figure 4 (Left side). Then, H2 gas, which serves as the second processing gas, is supplied into the processing container holding wafer A, and the H2 gas is plasmaized ( Figure 4 On the right side, step 2A). By the action of plasma-generated H2 gas, Ti, which is an element constituting Ti film 15, is mixed with Si and N, which are elements constituting the sidewalls of recess 13, so as to form a TiSiN (titanium silicon nitride) film 21 as a metal nitride silicide film on the surface portion of the sidewall of recess 13.

[0045] After performing step S2A, step 2 is performed again, followed by step S2A again. That is, step S2 and step S2A, which follows step S2, are treated as a cycle and repeated. Through repeated cycles, the etching of the Ti film 15 and the formation of the TiSiN layer 21 progress.

[0046] After the cycle has been performed a predetermined number of times, step S3 is performed in the same manner as in the first embodiment. As shown in the evaluation test described later, it is more difficult to form the W film 16 on the TiSiN film 21 compared to the Ti film 15. That is, the process in step S2A can be considered a modification of the sidewalls of the recess 13. Furthermore, by modifying the sidewalls and etching the Ti film 15 in this way, the second embodiment also selectively forms the W film 16 at the bottom of the recess 13, just as in the first embodiment. Figure 5A Next, step S4 is performed to fill the recess 13 with W film 17. Figure 5B ).

[0047] In the second embodiment described above, the formation of the W film 16 at the sidewall of the recess 13 can be suppressed more reliably, and is therefore preferred. Furthermore, regarding this second embodiment, steps S2 and S2A can each be performed only once without repetition. That is, the process can be performed in the order of steps S1, S2, S2A, S3, and S4.

[0048] Additionally, the order of steps S2 and S2A can also be the same as in... Figure 4 The example described is the opposite. That is, the process can also be performed in the order of S1, S2A, S2, S3, S4. In the case where S2A is performed first, S2A and S2A can be treated as a cycle and the cycle can be repeated. That is, after performing step S1, the process can be performed in the order of S2A, S2, S2A, S2… to repeatedly modify the sidewall of the recess 13 and etch the Ti film 15 at the sidewall. However, if the thickness of the Ti film 15 is too large when performing step S2A, the H2 gas plasma may not act sufficiently on the SiN film 12, or the mixing of Ti, Si, and N in the TiSiN film 21 may not be sufficient, thus reducing the modification effect of the sidewall. From the viewpoint of preventing this situation, it is preferable to perform S2 first and then S2A.

[0049] [Example of the structure of a substrate processing apparatus]

[0050] Next, refer to Figure 6The following is a top view illustrating a substrate processing apparatus 3, which is a structural example of a substrate processing apparatus capable of performing steps S1 to S3 of the first and second embodiments described above. The substrate processing apparatus 3 includes a loading module 31, a loading interlock module 35, a first vacuum transfer module 41, a second vacuum transfer module 42, a connection module 43, and processing modules 51 and 52. Processing module 51 performs each of the processes in steps S1, S2, and S2A, and processing module 52 performs the process in step S3. Furthermore, in the following description, the first vacuum transfer module 41 and the second vacuum transfer module 42 are sometimes referred to together as vacuum transfer modules 41 and 42.

[0051] The loading module 31, loading interlock module 35, first vacuum transfer module 41, connecting module 43, and second vacuum transfer module 42 are arranged in a straight line along the transverse direction in the order described. In the following description relating to the substrate processing apparatus 3, the side containing the loading module 31 is referred to as the front side, and the side containing the second vacuum transfer module 42 is referred to as the rear side. The loading interlock module 35 is hereinafter referred to as LLM 35.

[0052] The loading module 31 includes a housing with an internal atmospheric pressure, a wafer A transfer mechanism 32 disposed within the housing, and loading ports 33. In this example, there are four loading ports 33, arranged horizontally on the front side of the housing. Each loading port 33 holds a transfer container 34, called a FOUP (Front Opening Unified Pod), which holds the wafer A. The transfer mechanism 32 is, for example, a multi-jointed arm capable of horizontal movement, and can transfer the wafer A between the transfer container 34 at each loading port 33 and each loading interlock module 35.

[0053] In this example, three LLM 35 modules are arranged side-by-side. Each LLM 35 has a housing that is connected to the loading module 31 and the first vacuum transfer module 41 via gate valves G located on its front and rear sides, respectively. Furthermore, with the gate valves G on the front and rear sides of the housing closed, the pressure inside the housing can be freely varied between atmospheric pressure and vacuum pressure. Additionally, a stage (not shown) for placing the wafer A is provided inside the housing of the LLM 35. This stage is configured to transfer the wafer A to the aforementioned transfer mechanism 32 and the transfer mechanism 44 (described later), which respectively access the LLM 35.

[0054] The first vacuum transfer module 41 and the second vacuum transfer module 42 are identical in configuration, each having a housing 41A and 42A respectively. Exhaust is vented from the interior of housing 41A and housing 42A via an exhaust mechanism (not shown). Additionally, two connecting modules 43 are arranged side-by-side in this example. Each connecting module 43 has a housing 43A, which is connected to the housings 41A and 42A of the vacuum transfer modules 41 and 42 respectively.

[0055] By utilizing the aforementioned exhaust mechanism, the housing 43A of the connecting module 43 is also set to a vacuum atmosphere with the same pressure as that inside housings 41A and 42A. A stage (not shown) is provided inside housing 43A, configured to hold wafer A and transfer it to the transport mechanism 44 described later. Hereinafter, the housings 41A, 42A, and 43A, which are set to a vacuum atmosphere, will be collectively referred to as the vacuum transport path 40. Furthermore, an inactive gas supply mechanism is provided to supply inactive gas to the vacuum transport path 40. By supplying and exhausting this inactive gas, the pressure of the vacuum transport path 40 is adjusted to achieve the desired vacuum pressure.

[0056] Two processing modules are arranged in a front-to-back configuration on the left and right sides of the housing 41A of the first vacuum transfer module 41 and the housing 42A of the second vacuum transfer module 42, respectively. Each processing module is connected to the housing 41A or 42A via a gate valve G1. In this example, processing module 51 is connected to housing 41A, and processing module 52 is connected to housing 42A.

[0057] Conveying mechanisms 44 are respectively provided in housings 41A and 42A. Each conveying mechanism 44 is, for example, composed of a multi-joint arm capable of moving back and forth. The conveying mechanism 44 in housing 41A transfers wafer A between LLM 35, connecting module 43, and each processing module connected to housing 41A via gate valve G1. The conveying mechanism 44 in housing 42A transfers wafer A between connecting module 43 and each processing module connected to housing 42A via gate valve G1. Except where necessary for transferring wafer A between modules, gate valves G and G1 are closed to isolate the atmosphere between modules. Each stage of loading interlock module 35 and connecting module 43 is provided with pins that can protrude and retract from the stage to transfer wafer A with the conveying mechanism.

[0058] The substrate processing apparatus 3 includes a control unit 30, which functions as a computer and contains a program. Commands (steps) are programmed into the program to process wafer A via processing modules 51 and 52 and to transport wafer A via the substrate processing apparatus 3. This program is stored on a storage medium such as an optical disc, hard disk, or DVD and is installed in the control unit 30. The control unit 30 outputs control signals to each part of the substrate processing apparatus 3 via the program to control the operation of each part. Specifically, it controls the operation of processing modules 51 and 52, the opening and closing of gate valves G and G1, the operation of transport mechanisms 32 and 44, the operation of the exhaust mechanism, the operation of the inactive gas supply mechanism, and the switching of pressure within the LLM 35. The aforementioned control of the operations of processing modules 51 and 52 includes temperature control of wafer A on stage 66 by supplying power to heater 67 (described later), switching control between supplying and stopping various gases into processing container 61 by opening and closing valve V, and switching between turning on and off high-frequency power supplies 69 and 75.

[0059] <Structure of Processing Module 51>

[0060] Referring to the longitudinal section side view Figure 7 The processing module 51 will now be described. Processing module 51 is a capacitively coupled plasma processing device, comprising a metal processing container 61, which is grounded. A transfer port 62 for wafer A is provided on the side wall of the processing container 61, and this transfer port 62 is opened and closed by the aforementioned gate valve G1. Heaters 63 for regulating the temperature inside the processing container 61 are embedded in the spray heads 71, which form the side and top walls of the processing container 61 (described later). Furthermore, one end of an exhaust passage 64 has an opening at the bottom of the processing container 61, and the other end of the exhaust passage 64 is connected to an exhaust mechanism 65, which includes a valve and a vacuum pump. Exhaust is performed through the exhaust mechanism 65 to create a vacuum atmosphere with the desired pressure inside the processing container 61.

[0061] A stage 66 is provided inside the processing container 61, on which wafer A is horizontally placed. Above the stage 66 is a processing space 70 supplied with gas from a spray head 71 (described later). A heater 67, serving as a heating mechanism, is embedded in the stage 66, heating the placed wafer A to a preset processing temperature. Furthermore, the stage 66 is configured as a lower electrode, and is connected via a matching device 68 to a high-frequency power supply 69 supplying high-frequency power for bias application (ion attraction of plasma). Additionally, although not shown in the figure, three pins are provided that can protrude and retract from the upper surface of the stage 66 via a lifting mechanism, allowing wafer A to be transferred between the upper surface of the stage 66 and the aforementioned transport mechanism 44.

[0062] Additionally, a spray head 71 is provided to form the top wall of the processing container 61, and the spray head 71 is mounted to the processing container 61 by means of an insulating member 79. The spray head 71 has a gas diffusion space 72 and a large number of nozzles 73 that spray the gas supplied from the diffusion space 72 toward the processing space 70 through downward openings. The spray head 71 is configured as an upper electrode, and the spray head 71 is connected to a high-frequency power supply 75 that supplies high-frequency power for plasma formation via a matching device 74.

[0063] A high-frequency power source 75 supplies high-frequency electricity at a predetermined frequency to the spray head 71, thereby plasmaifying the gas supplied from the spray head 71 to the processing space 70. During the supply of high-frequency electricity from the high-frequency power source 75, high-frequency electricity is also supplied from the high-frequency power source 69 to the stage 66, attracting ions that constitute plasma towards the stage 66. The frequency of the high-frequency electricity supplied from the high-frequency power source 75 to the spray head 71 is higher than the frequency of the high-frequency electricity supplied from the high-frequency power source 75 to the stage 66.

[0064] Furthermore, the diffusion space 72 of the spray head 71 is connected to the downstream end of the gas flow path 76. The upstream side of the gas flow path 76 branches to form gas flow paths 81-83. The upstream end of gas flow path 81 is connected to a TiCl4 gas supply source 81A, the upstream end of gas flow path 82 is connected to an Ar (argon) gas supply source 82A, and the upstream end of gas flow path 83 is connected to an H2 (hydrogen) gas supply source 83A. In each gas flow path 81-83, a valve V and a flow adjustment unit M, consisting of a mass flow controller, are sequentially arranged on the upstream side. By opening and closing the valve V, the supply of each gas from each gas supply source 81A-83A to the processing space 70 via the spray head 71 is switched between supply and stop. The flow adjustment unit M adjusts the flow rate of each gas supplied to the processing space 70 to a preset amount.

[0065] <Structure of other processing modules>

[0066] Processing module 52 has a structure largely the same as processing module 51. Regarding the gas supply source, a WCl5 gas supply source is provided instead of the TiCl4 gas supply source 81A. WCl5 gas is supplied from the WCl5 gas supply source to the processing space 70 via a flow path equipped with valve V and flow adjustment unit M to process wafer A. Furthermore, processing module 52 does not perform plasma processing on wafer A, and therefore differs from processing module 51 in that it does not have high-frequency power supplies 75 and 69.

[0067] The TiCl4 gas supply source 81A in processing module 51, along with the valve V and flow adjustment unit M disposed in gas flow path 81, constitute a first processing gas supply unit for forming the TiSi film 14. Furthermore, the TiCl4 gas supply source 81A, the Ar gas supply source 82A, the valve V and flow adjustment unit M disposed in gas flow paths 81 and 82, and the high-frequency power supply 75 for plasmaizing the gas constitute a plasma etching gas supply unit for supplying the etching gas plasmaized to etch the Ti film 15. Moreover, the H2 gas supply source 83A, the valve V and flow adjustment unit M disposed in gas flow path 83, and the high-frequency power supply 75 constitute a second processing gas supply unit for modifying the sidewalls of the recess 13. Both this second processing gas supply unit and the aforementioned plasma etching gas supply unit are equivalent to plasma processing units. Additionally, the WCl5 gas supply source in processing module 52, along with the valve V and flow adjustment unit M disposed in the WCl5 gas flow path, constitute a first film-forming gas supply unit. Furthermore, the plasma treatment process in step S2 is equivalent to the plasma etching process, and the plasma treatment process in step S2A is equivalent to the sidewall treatment process. The treatment in step S3 is equivalent to the film formation process for forming a stacked metal film.

[0068] Operation of substrate processing apparatus 3

[0069] As an apparatus for processing wafer A according to the second embodiment, the operation of the substrate processing apparatus 3 will be described. Wafer A is removed from the transport container 34 and transported in the order of loading module 31 → LLM 35 → vacuum transport path 40. Then, wafer A is heated to a predetermined processing temperature, for example, 450°C, by the stage 66 placed on the processing module 51. TiCl4 gas, H2 gas, and Ar gas are supplied to the processing space 70 of the processing module 51, and the pressure of the processing space 70 is set to, for example, 5 Torr (6.67 × 10⁻⁶). 2 The state of Pa). On the other hand, by supplying high-frequency power from high-frequency power sources 75 and 69 to the spray head 71 and the stage 66 respectively, plasmaification of each gas and attraction of ions to the wafer A in the plasma are achieved. Thus, for the... Figure 1 The wafer A described in the text is subjected to... Figure 2A The process described in step S1 is used to form a TiSi film 14 on the bottom wall of the recess 13.

[0070] Then, the supply of H2 gas to the processing space 70 is stopped. For example, while maintaining the pressure of the processing space 70 at 5 Torr, the supply of TiCl4 gas and Ar gas, as well as the supply of high-frequency power from the high-frequency power supplies 75 and 69, continues. Step S2 is then performed instead of step S1. That is, the Ti film 15 formed on the sidewall of the recess 13 during the processing in step S1 is etched. Next, the pressure of the processing space 70 becomes, for example, 9 Torr (1.2 × 10⁻⁶). 3 Pa), and the gas supplied to the processing space 70 is changed from TiCl4 gas and Ar gas to H2 gas, thereby performing step S2A to form a TiSiN film 21 on the sidewall of the recess 13.

[0071] Then, by changing the pressure in the processing space 70 and the gas supplied to the processing space 70, the process is repeated. Figure 4 The loop consisting of steps S2 and S2A as described above. Then, when this loop is repeated a predetermined number of times, the supply of each gas to the processing space 70 and the supply of high-frequency power from the high-frequency power supplies 75 and 69 are stopped, and wafer A is transported from processing module 51 to processing module 52 via vacuum transport path 40. The pressure in the processing space 70 of processing module 52 is set, for example, to 50 Torr (6.67 × 10⁻⁶). 3 While the wafer A is heated to, for example, 450°C, WCl5 gas, H2 gas, and Ar gas are supplied to the processing space 70 to perform... Figure 5A The process shown in step S3 forms a W film 16 stacked on the TiSi film 14. Afterwards, the supply of these gases to the processing space 70 is stopped, and wafer A is transported in the order of vacuum transport path 40 → LLM 35 → loading module 31, returning wafer A to the transport container 34.

[0072] The transport container 34 is transported in atmospheric atmosphere by a transport mechanism to a substrate processing apparatus (for convenience, referred to as substrate processing apparatus 3A), which is different from the substrate processing apparatus 3. Step S4 is then performed in this substrate processing apparatus 3A. That is, by supplying WF6 gas, such as... Figure 5B The W film 17 is filled into the recess 13 as shown. Furthermore, the substrate processing apparatus 3A has the same structure as the substrate processing apparatus 3, except that it includes, for example, a processing module for performing step S4 (for convenience, it is called processing module 53). The substrate processing apparatuses 3 and 3A constitute a substrate processing system for processing wafer A. The processing module 53 is configured similarly to the processing modules 51 and 52, except that it includes, for example, a gas supply source capable of supplying WF6 gas to wafer A.

[0073] When processing wafer A in the first embodiment using the substrate processing apparatus 3, the same processing and transporting as described above can be performed, except that only step S2 of steps S2 and S2A is performed in the processing module 51. Furthermore, the structure of the substrate processing apparatus 3 can be appropriately modified. For example, a processing module for removing the natural oxide film formed on the surface of the Si layer 11 before performing step S1 can be provided, replacing a portion of the plurality of processing modules 51 or a portion of the plurality of processing modules 52. Additionally, the plurality of processing modules connected to the vacuum transport path 40 of the substrate processing apparatus 3 can also include the aforementioned processing module 53 for filling the W film 17, and by providing processing module 53 in this way, a series of processes from steps S1 to S4 can be performed within the substrate processing apparatus 3.

[0074] Furthermore, steps S1, S2, and S2A are not limited to being performed using the same processing module 51, but can also be performed using different processing modules. However, since TiCl4 and Ar gases are used together in steps S1 and S2, and H2 gas is used together in steps S2 and S2A, it is preferable to perform steps S1, S2, and S2A using the same processing module 51 from the viewpoint of preventing increased manufacturing costs due to setting up a mechanism for supplying the same type of gas to each processing module. From the viewpoint of reducing the time required for transporting wafer A and obtaining high productivity for the substrate processing apparatus 3, it is also preferable to perform steps S1, S2, and S2A using the same processing module 51 in this way.

[0075] Furthermore, regarding the second embodiment, the method described includes both step S2, which involves etching the Ti film 15, and step S2A, which involves forming the TiSiN film 15. However, it is also possible to perform only step S2A. Therefore, it is not limited to etching the Ti film 15 from the formation of the TiSi film 14 in step S1 until the formation of the W film 16 in step S3. However, as mentioned above, if the thickness of the Ti film 15 is large, the modification effect on the sidewalls of the recess 13 is reduced. Therefore, it is preferable to perform both steps S2 and S2A.

[0076] Furthermore, when the formation of the TiSiN film 21 and the etching of the Ti film 15 in step S2A are performed between steps S1 and S3, the etching of the Ti film 15 is not limited to the plasma treatment shown in the second embodiment. That is, the etching of the Ti film 15 can also be performed by supplying each gas in a manner that does not plasmaify the gases, including the etching gas. Specifically, for example, the etching of the Ti film 15 can also be performed by supplying TiCl4 gas and H2 gas to wafer A in a manner that does not plasmaify the TiCl4 gas and H2 gas.

[0077] If the process of supplying the unplasmified TiCl4 gas and H2 gas is designated as step S2B, then step S2B can replace step S2, instead of the processes described in the second embodiment previously, which involved steps S2 and S2A. That is, either step S2A or S2B can be performed first, or one of steps S2A and S2B can be performed sequentially in a cycle, or steps S2A and S2B can be performed once each instead of being repeated cyclically. However, as described above, from a productivity point of view, performing step S2, which is a plasma process, is preferable to performing step S2B, which is a non-plasma process.

[0078] Furthermore, when performing the modification treatment of the sidewalls of the recess 13 in step S2A, it is not limited to using H2 gas plasma; for example, plasmas of inactive gases such as Ar gas or N2 (nitrogen) gas can also be used. However, when a gas with a relatively large molecular weight, such as Ar gas or N2 gas, is plasma-plasmized and supplied to wafer A, the etching effect on the TiSi film 14 may become relatively large. In addition, due to the large molecular weight, the plasma has difficulty penetrating into the sidewalls of the recess 13, so the modification effect may become relatively small. Therefore, in order to suppress the etching of the TiSi film 14 and obtain a high modification effect, it is preferable to perform step S2A by plasmaizing H2 gas with a relatively small molecular weight.

[0079] Furthermore, in step S2, as described above, the Ti film 15 is etched by the action of chlorine and its active species. Therefore, a metal chloride gas other than TiCl4 gas can also be supplied to wafer A, and the Ti film 15 is etched by plasmaizing this gas. Specifically, for example, gases such as ZrCl4, WCl5, TaCl5, and MoCl5 can also be supplied to wafer A, and the Ti film 15 is etched by plasmaizing these gases. Therefore, the etching gas is not limited to TiCl4 gas. However, from the viewpoint of preventing the device structure from becoming more complex and preventing an increase in the manufacturing cost of the device, it is preferable to use TiCl4 gas, the gas used for forming the TiSi film 14 in step S1, as the etching gas in step S2. In addition, for the same reason, regarding step 2B, which is the aforementioned non-plasma etching process, it is not limited to using TiCl4 gas as the etching gas, but it is preferable to use TiCl4 gas as the etching gas.

[0080] Furthermore, in step S1, steps S2 and S2A are shown when a Ti film 15 is formed entirely on the sidewall of the recess 13. However, the Ti film 15 is not limited to covering the entire sidewall in this way; it can also be distributed on the sidewall. Additionally, the silicon layer 11 on which the TiSi film 14 is formed in step S1 can be the wafer A itself or a film formed on wafer A. Furthermore, the formation of the TiSi film 14 in step S1 is not limited to plasma processing; it can also be performed by heat treatment without plasma. However, from the viewpoint of preventing a decrease in productivity, it is preferable to perform plasma processing when forming a metal silicide film like the TiSi film 14. Moreover, regarding the formation of the W films 16 and 17 in steps S3 and S4, these steps are not limited to non-plasma processing; they can also be performed by plasma processing. Furthermore, the W films 16 and 17 are not limited to CVD formation; they can also be formed by ALD.

[0081] Furthermore, an example of forming a TiSi film 14 as a metal silicide film in step S1 is shown, but the metal silicide film formed in step S1 is not limited to a TiSi film; for example, a ZrSi film can also be formed using plasma-generated ZrCl4 gas. Therefore, the metal to be etched from the sidewall of the recess 13 in step S2 is the metal used when forming the metal silicide, and step S2 is not limited to etching Ti. The formation of the metal silicide in step S2A is also based on the formation of a metal silicide from the metal (first metal) used when forming the metal silicide in step S1, and is not limited to forming a TiSiN film 21.

[0082] Furthermore, in step S3, it is shown that a W film 16 is formed on a metal silicide film by supplying WCl5 gas. However, the multilayer metal film formed on the metal silicide film in this way is not limited to W film 16; for example, a Mo (molybdenum) film could also be used. In the case of forming a Mo film instead of W film 16, in step S3, a gas containing Mo, such as MoCl5 (molybdenum pentachloride), MoO2Cl2, or MoOCl4, can be supplied to wafer A instead of WCl5 gas for film formation. Then, in step S4, a process is performed in which a gas such as MoF6 (molybdenum hexafluoride), used for forming the Mo film, is supplied to wafer A to fill the recess 13 with the Mo film.

[0083] MoCl5 has the same molecular structure as WCl5, except that Mo is replaced by W as a constituent element. Therefore, when MoCl5 gas is supplied to wafer A, the same phenomenon occurs as when WCl5 gas is supplied to wafer A. That is, when a Ti film 15 has already been formed on the sidewall of the recess 13 when MoCl5 gas is supplied to wafer A, a Mo film may form on the Ti film 15, resulting in defects in subsequent processing. However, even when MoCl5 gas is supplied to the SiN film 12 and the TiSiN layer 21, the formation of a Mo film on these SiN films 12 and TiSiN layers 21 can be suppressed.

[0084] Therefore, when MoCl5 gas is supplied to wafer A in step S3 instead of WCl5 gas, steps S2 and S2A are performed before step S3. This suppresses the formation of the Mo film on the sidewall of the recess 13 and prevents poor embedding of the Mo film within the recess 13 during step S4. Therefore, this technique is particularly effective not only for forming W films 16 and 17 within the recess 13 but also for forming a Mo film within the recess 13. Furthermore, the gas used to form W film 16 or W film 17 is not limited to those described; for example, WCl6 gas, WOCl4 gas, WO2Cl2 gas, etc., can also be used.

[0085] The embodiments disclosed herein should be considered illustrative in all respects and not restrictive. The above embodiments may also be omitted, substituted, modified, and / or combined in various ways without departing from the appended claims and their spirit.

[0086] <Evaluation Experiment>

[0087] The following describes the evaluation test associated with this technology. Furthermore, in this evaluation test, regarding the processing of the second embodiment, the order of steps S2 and S2A in a loop is as follows: Figure 4 The order of the instructions is different; S2A is performed first, followed by S2.

[0088] Evaluation Experiment 1

[0089] As an evaluation experiment 1-1, for Figure 1 The wafer A shown is subjected to steps S1, S3, and S4 to obtain a SEM image of the processed wafer A, and the state of the bottom and side surfaces of the recess 13 is observed. As evaluation experiments 1-2, in addition to... Figure 1 Except for the processing in step S2, wafer A was processed in the same way as in evaluation test 1-1 to obtain SEM images and observe the state of the bottom and side surfaces of the recess 13. Therefore, in this evaluation test 1-2, wafer A was processed according to the first embodiment (i.e., the processing in steps S1 to S4). As for evaluation test 1-3, in addition to the processing in step S2, wafer A was processed according to the first embodiment (i.e., the processing in steps S1 to S4). Figure 1 Except for the processing in steps S2 and S2A, wafer A was processed in the same way as in evaluation test 1-1 to obtain SEM images and observe the state of the bottom and side surfaces of the recess 13. Therefore, in this evaluation test 1-3, wafer A was processed according to the second embodiment.

[0090] In evaluation experiments 1-2, the etching time in step S2 (the time wafer A is exposed to a plasma of TiCl4 and Ar gases) was set to 300 seconds. In evaluation experiments 1-3, the execution time of one cycle (the total execution time of one step S2A and one step S2) was set to 50 seconds. Furthermore, the number of cycles was set to three. Therefore, steps S2A and S2 were performed alternately three times each.

[0091] The observation results show that, in evaluation test 1-1, the thickness of the W film 16 formed at the bottom of the recess 13 is 3.3 nm, and the thickness of the W film formed on the sidewall of the recess 13 is 2.6 nm. In evaluation test 1-2, the thickness of the W film 16 formed at the bottom of the recess 13 is 3.9 nm, and the thickness of the W film formed on the sidewall of the recess 13 is 1.2 nm. In evaluation test 1-3, the thickness of the W film 16 formed at the bottom of the recess 13 is 7.2 nm, and the thickness of the W film formed on the sidewall of the recess 13 is 1.6 nm. As described above, regarding the ratio of the thickness of the W film 16 at the bottom of the recess 13 to the thickness of the W film on the sidewall of the recess 13, evaluation test 1-3 > 1-2 > 1-1. Therefore, in evaluation tests 1-2 and 1-3, the formation of a W film on the sidewall of the recess 13 was suppressed, and a W film 16 was formed at the bottom of the recess 13, confirming the effectiveness of the technology. Comparing the results of evaluation tests 1-2 and 1-3, it can be seen that the treatment in step S2A suppressed the formation of a W film on the sidewall of the recess 13.

[0092] Evaluation Experiment 2

[0093] As evaluation test 2-1, multiple substrates with flat Si films formed on their surfaces were prepared, and each substrate was treated in the same way as in step S1, thereby forming a Ti film on the Si film. Then, each substrate was etched in the same way as in step S2. That is, the Ti film was etched using plasma-enhanced TiCl4 and Ar gas. Different etching times were set for each substrate to etch the Ti film, and after etching, the etching amount of the Ti film was measured by X-ray fluorescence (XRF) analysis. Furthermore, as evaluation test 2-2, the same test as evaluation test 2-1 was performed, except that a substrate with a flat SiN film formed on its surface was used. Therefore, in this evaluation test 2-2, the Ti film formed on the SiN film was etched.

[0094] Figure 8 This is a graph showing the results of evaluation test 2. As shown in the graph, it was confirmed that the Ti film could be etched in both evaluation tests 2-1 and 2-2 by using plasma-based TiCl4 and Ar gas. Furthermore, in evaluation test 2-1, the etching amount increased with increasing etching time. In contrast, in evaluation test 2-2, the etching amount increased with increasing etching time within a relatively short etching time range, but remained constant within a relatively long etching time range. This is because the thickness of the Ti film formed on the SiN film is smaller than that formed on the Si film. For the substrate with a relatively long etching time in evaluation test 2-2, the entire Ti film was etched. Based on the results of evaluation test 2, it can be confirmed that by implementing step S2 as described in embodiments 1 and 2, the Ti film 15 formed on the sidewall of the recess 13 formed by the SiN film 12 can be etched.

[0095] Evaluation Experiment 3

[0096] As evaluation test 3, multiple substrates with flat SiN films formed on their surfaces were prepared, and Ti films were formed on top of these SiN films using the same method as step S1 in the embodiment. Then, a portion of the multiple substrates were processed using the same method as step 2A in the embodiment, namely, exposure to H2 gas plasma. The exposure time of the substrates to the H2 gas plasma was set differently. Then, each substrate was analyzed using X-ray photoelectron spectroscopy (XPS). In the above evaluation test 3, the test in which the substrates were not exposed to H2 gas plasma was designated as evaluation test 3-1, and the tests in which the H2 plasma treatment time was set to 90 seconds, 180 seconds, and 270 seconds were designated as evaluation tests 3-2, 3-3, and 3-4, respectively.

[0097] Figure 9This is a graph showing the results of Evaluation Test 3, with the horizontal axis representing binding energy (unit: eV) and the vertical axis representing intensity (unitless). The intensity of the spectrum from 460 eV to 459 eV represents the amount of TiOx, and regarding this intensity, Evaluation Test 3-1 > 3-2 > 3-3 > 3-4. This TiOx is TiOx generated from Ti and TiSi due to the substrate being exposed to the atmosphere during XPS-based measurements; therefore, regarding the amount of Ti and TiSi before XPS-based measurements, the estimated order is Evaluation Test 3-1 > 3-2 > 3-3 > 3-4. Furthermore, the intensity of the spectrum at 456 eV represents the amount of TiN and TiSiN, and regarding this intensity, Evaluation Tests 3-2, 3-3, and 3-4 are greater than Evaluation Test 3-1. The intensity differences between Evaluation Tests 3-2, 3-3, and 3-4 are small, but Evaluation Test 3-4 has the highest intensity, and Evaluation Test 3-3 has the second highest intensity.

[0098] According to the results of the evaluation test 3, by exposing the substrate to a plasma of H2 gas, Ti, an element constituting the Ti film, and Si and N, elements constituting the SiN film, were mixed. Therefore, it was confirmed that by performing the process of step S2A of the second embodiment, a TiSiN film 21 can be formed from the SiN constituting the sidewall of the recess 13 and the Ti film 15 on the sidewall.

[0099] Evaluation Experiment 4

[0100] As evaluation test 4-1, multiple substrates with flat SiN films formed on their surfaces were prepared. Ti films were formed on top of these SiN films using the same method as step S1 in the embodiment. Then, the Ti films were etched using the same method as step S2 in the embodiment, and W films were formed on the substrates using the same method as step S3 in the embodiment. The W film formation time (the supply time of WCl5 gas to the substrate) was varied for each substrate. The thicknesses of the W films and Ti films formed on each substrate were then measured using XRF. As evaluation test 4-2, the same tests as evaluation test 4-1 were performed, except that the Ti film etching was not performed.

[0101] Figure 10 , Figure 11 The chart shows the results of this evaluation test 4. Figure 10 In the chart, the horizontal axis is set to the film formation time of the W film (unit: seconds), and the vertical axis is set to the measured film thickness of the W film (unit: nm). Figure 11 In the chart, the horizontal axis is set to the film formation time of the W film (unit: seconds), and the vertical axis is set to the measured film thickness of the Ti film (unit: nm). According to Figure 11As shown in the chart, for each substrate in evaluation experiment 4-2, a W film was formed on the Ti film by depositing a W film while a Ti film was already formed. Furthermore, from... Figure 10 As shown in the graph, in evaluation experiment 4-2, the result was that the film thickness of W film increased with increasing film formation time. On the other hand, according to Figure 11 As shown in the charts, for each substrate in evaluation test 4-1, W film formation was performed on the substrates where no Ti film was formed or almost no Ti film was formed. Furthermore, according to... Figure 10 As shown in the chart, in evaluation test 4-1, the thickness of the W film was 0 regardless of the film formation time. In other words, no W film was formed on any of the substrates in evaluation test 4-1.

[0102] According to the results of the evaluation test 4, when a Ti film is formed on the SiN film, a W film is formed on the SiN film; conversely, when no Ti film is formed on the SiN film, no W film is formed on the SiN film. Therefore, it is confirmed that etching the Ti film 15 at the sidewall of the recess 13 by performing step S2 as described in the first and second embodiments is effective in preventing the formation of a W film on the sidewall of the recess 13 when performing step S3.

[0103] Evaluation Experiment 5

[0104] As evaluation test 5-1, the Ti film on each of the multiple substrates to which the Ti film is formed was etched using the same method as step S2 in the embodiment. Specifically, in evaluation test 5-1, TiCl4 gas and Ar gas were supplied to the substrate, and these gases were plasma-enhanced to etch the Ti film. The etching time (the time the substrate was exposed to the plasma of TiCl4 gas and Ar gas) was varied for each substrate. After etching, the amount of Ti film etched on each substrate was measured.

[0105] Furthermore, as evaluation test 5-2, for each of the multiple substrates with Ti films formed, the Ti film was etched using the same method as step S2B in the embodiment. That is, in evaluation test 5-2, TiCl4 gas and Ar gas were supplied, but these gases were not plasmaized, and the Ti film was etched by heat treatment. The etching time (the supply time of TiCl4 gas and Ar gas to the substrate) was varied for each substrate. Except that gas plasmaization was not performed, and the etching time of some substrates differed from that of the substrates in evaluation test 5-1, the substrates were treated under the same processing conditions as in evaluation test 5-1 in evaluation test 5-2.

[0106] Furthermore, as evaluation test 5-3, Ar gas was supplied to each of the multiple substrates with Ti films, and the Ar gas was plasmaized to etch the Ti films. In this evaluation test 5-3, different etching times (the time the substrate was exposed to the Ar gas plasma) were set for each substrate. Except that Ar gas plasmaization was not performed and the etching times of some substrates differed from those of the substrates in evaluation test 5-1, the substrates in evaluation test 5-3 were treated under the same conditions as in evaluation test 5-1.

[0107] Figure 12 This is a chart showing the results of evaluation experiments 5-1 and 5-2. Figure 13 These are graphs showing the results of evaluation experiments 5-2 and 5-3. In these graphs, the horizontal axis is set to etching time (in seconds), and the vertical axis is set to the etching amount of the Ti film (in nm). Figure 12 As shown in the graph, at each etching time, the etching amount of the Ti film in evaluation test 5-1 was greater than that in evaluation test 5-2. Therefore, it was confirmed that etching the Ti film 15 of the recess 13 using the plasma treatment in step S2 as described in the embodiment can improve the productivity of the apparatus compared to etching the Ti film 15 without performing the plasma treatment described in step S2B.

[0108] In addition, such as Figure 13 As shown in the chart, at each etching time, the etching amount of the Ti film in evaluation test 5-1 was greater than that of the Ti film in evaluation test 5-3. According to... Figure 12 and Figure 13 Comparing the results of evaluation experiments 5-2 and 5-3, under the same etching time, there was no significant difference in the etching amount between the two experiments. Based on these results, it can be concluded that the plasma-enhanced TiCl4 gas has a greater effect on the etching of the Ti film. When TiCl4 gas is plasma-enhanced, unlike the case without plasma-enhancing, chlorine and chlorine-active species are generated as described in the embodiment. Simulations have also confirmed this generation of chlorine and chlorine-active species.

[0109] Therefore, based on the results of evaluation experiments 5-1 to 5-3, it is estimated that chlorine and its active species contribute significantly to the etching of the Ti film. Furthermore, simulations confirmed that chlorine gas and its active species react with Ti within a temperature range of 0°C to 1000°C. As described above, evaluation experiment 5 shows that, in the embodiment, when etching the Ti film 15 on the sidewall of the recess 13, plasma treatment with a metal chloride gas such as TiCl4 is effective in improving the etching rate of the Ti film.

[0110] Evaluation Test 6

[0111] As evaluation test 6-1, a TiSi film was formed by stacking a Ti film on a substrate with a Si film. The same treatment as step S3 of the embodiment (i.e., supplying WCl5 gas) was performed, and the thickness of the W film formed on the TiSi film was measured. As evaluation test 6-2, a TiSiN film was formed by nitriding the TiSi film formed in the same manner as in evaluation test 6-1. Then, the same treatment as step S3 of the embodiment was performed, and the thickness of the W film formed on the TiSiN film was measured. In both evaluation tests 6-1 and 6-2, the deposition time of the W film was varied for each substrate.

[0112] Figure 14 This is a graph showing the results of evaluation test 6, with the horizontal axis set as the film formation time of the W film (in seconds) and the vertical axis set as the film thickness of the W film (in nm). As shown in the graph, in evaluation test 6-1, the film thickness of the W film increases with the increase of the film formation time. On the other hand, in evaluation test 6-2, the film thickness of the W film is 0 nm at any film formation time, that is, no W film is formed. Therefore, based on the results of evaluation test 6 and the above-mentioned evaluation test 3, it can be seen that by performing step S2A as described in the embodiment, by forming the TiSiN film 21 on the sidewall of the recess 13, it is possible to prevent the formation of the W film on the sidewall during the subsequent implementation of step S3.

[0113] Explanation of reference numerals in the attached figures

[0114] A: Wafer; 11: Silicon layer; 12: Silicon nitride film (SiN film); 13: Recess; 14: Titanium silicide film (TiSi film); 16: W film; 21: Titanium silicon nitride film (TiSiN film).

Claims

1. A substrate processing method, comprising: In the metal silicide film formation process, a first processing gas containing a first metal is supplied to a substrate having a recess with a silicon-containing semiconductor layer exposed on the bottom surface and an insulating film forming the sidewalls, to form a metal silicide film constituting the bottom wall of the recess. The plasma processing step includes at least one of a plasma etching step and a sidewall processing step. In the plasma etching step, a plasma-enhanced etching gas is supplied to the substrate to remove the film of the first metal at the sidewall of the recess. In the sidewall processing step, a plasma-enhanced second processing gas is supplied to the substrate to form a metal-containing film mixed with the first metal and elements constituting the insulating film on the sidewall of the recess. as well as In the film formation process, a first film-forming gas containing a second metal is supplied to the substrate after the plasma treatment process to form a stacked metal film on the metal silicide film.

2. The substrate processing method according to claim 1, wherein, The film-forming process is stopped before the stacked metal film fills the recess. The substrate processing method further includes a filling step, in which a second film-forming gas composed of a compound different from the first film-forming gas is supplied to the substrate after the film-forming step to fill the recess with a metal film.

3. The substrate processing method according to claim 1, wherein, The plasma treatment process includes the plasma etching process, and the etching gas is a metal chloride gas.

4. The substrate processing method according to claim 3, wherein, The first metal is titanium. The metal silicide film is a titanium silicide film. The first processing gas and the etching gas contain titanium tetrachloride.

5. The substrate processing method according to claim 1, wherein, The plasma treatment process includes the sidewall treatment process. The insulating film is a silicon nitride film. The metal-containing film is a metal nitride silicon film.

6. The substrate processing method according to claim 5, wherein, The second processing gas is hydrogen.

7. The substrate processing method according to claim 5, wherein, The process includes an etching step in which, after the metal silicide film is formed and before the stacked metal film is formed, an undiluted etching gas is supplied to the substrate to remove the first metal film at the sidewall of the recess.

8. The substrate processing method according to claim 7, wherein, The first metal is titanium. The metal silicide film is a titanium silicide film. The first processing gas and the etching gas that has not been plasma-treated are titanium tetrachloride gas.

9. The substrate processing method according to claim 1, wherein, The plasma treatment process includes the plasma etching process and the metal film formation process.

10. The substrate processing method according to claim 9, wherein, The plasma etching process is performed first, followed by the metal film formation process.

11. The substrate processing method according to claim 9, wherein, The plasma etching process and the metal film formation process are repeated in sequence, one cycle following the other.

12. The substrate processing method according to claim 1, wherein, The first metal is tungsten and the stacked metal film is a tungsten film, or the second metal is molybdenum and the stacked metal film is a molybdenum film.

13. A substrate processing apparatus comprising: A processing container that holds the substrate; A first processing gas supply unit supplies a first processing gas containing a first metal into the processing container to form a metal silicide film constituting the bottom wall of the recess for the substrate having a recess on the bottom surface that exposes a semiconductor layer containing silicon and whose sidewalls are formed by an insulating film. A plasma processing unit includes at least one of a plasma etching gas supply unit and a second processing gas supply unit, wherein the plasma etching gas supply unit supplies plasma-enhanced etching gas into the processing container to remove the film of the first metal at the sidewall of the recess, and the second processing gas supply unit supplies plasma-enhanced second processing gas into the processing container to form a metal-containing film mixed with the first metal and elements constituting the insulating film on the sidewall of the recess. as well as A film-forming gas supply unit supplies a first film-forming gas containing a second metal into the processing container to form a laminated metal film on the metal silicide film of the substrate after being processed by the plasma processing unit.