Semiconductor/Solid-State Device Manufacturing TRIZ Cases
- Circular Contact Hole Formation via Polymer Hardmask Inversion
Polymer hardmask inversion creates circular contact holes, eliminating astroid shapes and overlay errors in semiconductor devices.
- Sample Holder Gel Sealing for Junction Durability
Composite gel and solid sealing absorbs thermal stress to prevent moisture damage at conducting member junctions.
- Single Robot Controller for Substrate Transfer Coordination
Consolidating control of transfer, elevator, and open-close device motors under one robot controller reduces communication time between separate controllers.
- Alternating Stress Epitaxy for Semiconductor Layer Integrity
Alternating tensile and compressive epitaxial layers manage residual stress, reducing cracks and dislocations in nitride-based devices.
- Semiconductor Substrate Diffusion via Thin Silanol Coating
A thin silanol coating enables uniform impurity diffusion into semiconductor substrates, preventing point defects near the surface.
- Semiconductor Contact Plug Alignment via Sacrificial Layer
Patterned sacrificial layers define contact holes to prevent gate-source misalignment, enhancing manufacturing precision and device reliability.
- Infrared Heating Susceptor for Large-Surface Substrates
A susceptor plate transfers infrared energy to large substrates via thermal conduction and radiation.
- Metal Gate Structure with Protective Capping Layer
A semiconductor metal gate structure incorporates a protective capping layer deposited over underlying metal layers.
- Resist Mask Formation with Treatment Agent Infiltration
A resist mask formation method uses a treatment agent to infiltrate the lower portion of a photosensitive organic film.
- Co-doped Semiconductor Devices for Charge Compensation
Diffusing p-type dopants into intrinsic trenches stabilizes charge compensation, reducing on-state resistance while increasing breakdown voltage.
- Double Recess FET Stabilization via Depleted Ohmic Layer
A field effect transistor with a double recess structure uses completely depleted ohmic contact layers to form high-concentration space charges.
- Silylated Photoresist Mask for Semiconductor Pattern Distortion
Ion implantation forms a protective silylated layer on the photoresist, preventing distortion and silicon byproduct formation during substrate etching.
- SiO2 Film Surface Roughness Control via Hydrophilization
Hydrophilizing silicon oxide layers before halogen etching suppresses surface roughness deterioration and improves leak characteristics.
- SiC Device Z1/2 Centers Suppress Stacking Faults
Electron beam irradiation creates vacancy traps that suppress stacking fault growth without high temperature heat treatments.
- Nitride Semiconductor Wafer Buffer Lattice Mismatch Crack Control
Segmented buffer layers with graded aluminum composition manage thermal expansion differences to suppress wafer cracks and reduce threading dislocation density.
- Semiconductor Electrode Equipotential Design for Breakdown Prevention
A semiconductor electrode connects to the source terminal to eliminate potential differences across insulating layers.
- High Throughput Chemical Treatment System for Substrates
Segmented processing zones enable parallel substrate handling to resolve throughput consistency trade-offs in semiconductor manufacturing.
- Nitrogen-Injected Barrier Layer Adhesion in FinFET Contact Plugs
Plasma treatment injects nitrogen into contact holes to form a barrier layer with improved adhesion for semiconductor devices.