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pcie controller and loopback data path using pcie controller

A controller and loopback technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problem of no data path

Active Publication Date: 2020-09-08
CHENGDU STARBLAZE TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But there is no such way to establish an internal data path

Method used

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  • pcie controller and loopback data path using pcie controller
  • pcie controller and loopback data path using pcie controller
  • pcie controller and loopback data path using pcie controller

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Embodiment Construction

[0102] The technical solutions in the embodiments of the present invention are clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts belong to the protection scope of the present invention.

[0103] figure 1 A block diagram of the electrical system of the PCIe controller is shown. Such as figure 1As shown, a host (host) is coupled to the device through a PCIe PHY module 110 . The PCIe controller includes a PCIe PHY module 110 , a data link layer module 120 , a transport layer module 130 , a memory 140 and a CPU subsystem 160 . CPU subsystem 160 includes one or more CPUs. The PCIe PHY module 110 is used to process PCIe underlying protocols (such as t...

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PUM

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Abstract

The application discloses a PCIe controller and a loopback path using the PCIe controller, relates to the field of storage controllers, and realizes a method for establishing a data path inside the controller. The controller of the present application includes: a transport layer sending module, a transport layer receiving module, a memory access module and a memory; the transport layer sending module includes a first loopback control module, and the transport layer receiving module includes a second loopback control module, the first The loopback control module is coupled to the second loopback control module; the memory access module is coupled to the transport layer sending module and the transport layer receiving module, and the memory access module is also coupled to the memory.

Description

technical field [0001] This application relates to electronic devices, and more particularly to the use of PCIe controllers to provide an internal loopback data path. Background technique [0002] The PCIe protocol defines the communication mechanism between devices. The NVMe protocol (see also Chapter 3 of "NVM Express Revision 1.2" (hereinafter referred to as the NVMe protocol), November 3, 2014) defines a mechanism for accessing non-volatile storage devices. PCIe devices provide memory space (Memory Space). A host coupled to a PCIe device can access the memory space of the PCIe device. The PCIe specification defines a loopback (Loopback) state. In the loopback state, the slave device (Slave) sends the data received from the master device (Master) back to the master device. [0003] In the loopback defined by the PCIe protocol, data is sent to the PCIe physical link and returned from the link. However, in some cases, it is only necessary to use the loopback function t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/16G06F13/28G06F13/42
CPCG06F13/4221G06F13/282G06F13/1668
Inventor 黄好城沈飞王祎磊伍德斌兰彤
Owner CHENGDU STARBLAZE TECH CO LTD