A fast full-channel power detection circuit structure for adaptive channel selection

Abstract

According to the fast full-channel power detection circuit structure for adaptive channel selection described in the present invention, a quadrature demodulation chip containing a fast-jumping local oscillator (a phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO)) is used to directly orthogonally demodulate the RF signal to the baseband, and one of the output signals is used for baseband power detection. The circuit structure of the present invention uses a coupler to couple a portion of the signal processed by the RF front end to form a relatively independent channel detection link for fast channel scanning, which can avoid the error and cost increase caused by the independent detection link and make the design of the fast channel detection link very flexible.

Description

Technical Field

[0001] The invention discloses a communication method based on cognitive radio technology, in particular to a fast full-channel power detection circuit structure for adaptive channel selection. Background Art

[0002] In wireless communications, channel selection and communication link establishment are key issues in ensuring communication quality. A variety of fast channel power detection technologies have been developed to quickly establish links and avoid interference. The transceivers of both communicating parties perform communication link establishment and channel selection based on the detection results.

[0003] Traditional channel power detection requires scanning all channels in turn, which not only takes time to scan channels, but also cannot track channel changes in real time after link establishment unless the current communication is stopped and the channel is scanned again. In order to overcome this shortcoming, in some cost-insensitive occasions, a dedicated fast full-channel channel power detection channel can be introduced to achieve real-time channel power monitoring. However, this solution usually causes an exponential increase in hardware costs, so it is rarely used.

[0004] In recent years, with the use of high-speed radio frequency sampling analog-to-digital converters (RF-ADCs), the broadband sampling characteristics of RF-ADCs can be used to digitize the signals of the entire channel at one time, and then the power information of each channel can be calculated at one time in the digital domain through parallel signal processing technology for use by the channel selection / communication link establishment module. This broadband digitization solution greatly shortens the channel scanning time. It is helpful to overcome the shortcomings of traditional power detection solutions.

[0005] The solution of setting up a dedicated channel power detection link is rarely used in practice due to its high cost.

[0006] For broadband digitization solutions, since the dynamic range of RF-ADC is limited after all, and the broadband digitization circuit lacks narrowband analog filtering circuits for interference suppression, this circuit is susceptible to blocking interference. Summary of the invention

[0007] The present invention provides a fast full-channel power detection circuit structure for adaptive channel selection.

[0008] According to one aspect of an embodiment of the present invention, a fast full-channel power detection circuit structure for adaptive channel selection is provided.

[0009] The structure includes a radio frequency front end, a coupler, a main receiving link, a channel detection link and a baseband processing unit, and is characterized in that:

[0010] The RF front end includes a low noise amplifier (LNA), a RF attenuator, and a broadband bandpass filter with a passband bandwidth of W. The RF front end filters out useless signals outside the bandwidth W and performs gain adjustment on the received signal;

[0011] The coupler or power splitter couples a portion of the signal from the main receiving link for processing by the channel detection link; the coupler may also use a power splitter to achieve the same function;

[0012] The main receiving link, the coupler receives a signal with a bandwidth of B on the ith channel, and the main receiving link adopts a radio frequency direct sampling structure, an orthogonal demodulation structure, or a heterodyne structure;

[0013] The channel detection link includes a mixer, a fast-hopping local oscillator, a narrowband receiving module and a power detection unit; a baseband processing unit is used to perform channel selection and fast link establishment according to the power of each channel.

[0014] The fast-beat local oscillator is realized by a direct digital frequency synthesizer (DDS) or a digital-to-analog converter (DAC) with a sampling rate of Fs;

[0015] The detection circuit structure scans the entire channel for a period of time

[0016] T=N / M·(Td+Ts), where the bandwidth Bw of the channel detection link is Bw=M·Bi, M=1,2…N; where Td is the power detection time and Ts is the theoretical frequency switching time.

[0017] According to the fast full-channel power detection circuit structure for adaptive channel selection described in the present invention, a quadrature demodulation chip containing a fast-hopping local oscillator (a phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO)) is used to directly orthogonally demodulate the radio frequency signal to the baseband, and one of the output signals is used for baseband power detection.

[0018] The circuit structure of the present invention utilizes a coupler to couple out a portion of the signal processed by the RF front end to form a relatively independent channel detection link for fast channel scanning, which can avoid the errors and cost increases caused by the independent detection link and make the design of the fast channel detection link more flexible.

[0019] With reference to the following description and accompanying drawings, specific embodiments of the present invention are disclosed in detail, indicating the manner in which the principles of the present invention can be adopted. It should be understood that the embodiments of the present invention are not limited in scope. Within the spirit and scope of the appended claims, the embodiments of the present invention include many changes, modifications and equivalents.

[0020] Features described and / or illustrated with respect to one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.

[0021] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, integers, steps or components, but does not exclude the presence or addition of one or more other features, integers, steps or components. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 Schematic diagram of the structure of a fast full-channel power detection circuit for adaptive channel selection of the present invention;

[0023] Figure 2 A fast full-channel power detection circuit structure for adaptive channel selection according to an embodiment of the present invention;

[0024] Figure 3 A fast full-channel power detection circuit structure for adaptive channel selection with low cost according to an embodiment of the present disclosure DETAILED DESCRIPTION

[0025] The following is a detailed description of a fast full-channel power detection circuit structure for adaptive channel selection according to the present invention.

[0026] Figure 1 The figure illustrates an exemplary application in which the technical solution according to the embodiment of the present disclosure can be implemented. Figure 1 As shown, the application includes a radio frequency front end, a coupler, a main receiving link, a channel detection link and a baseband processing unit. Let each channel bandwidth be B, there are N channels to choose from, and the available communication bandwidth is W=N·B; we mark the i-th channel as Bi, i=1,2…N.

[0027] The RF front end may include modules such as a low noise amplifier (LNA), a RF attenuator, and a broadband bandpass filter with a passband bandwidth of W. Its function is to filter out useless signals outside the bandwidth W and perform gain adjustment on the received signal.

[0028] The coupler is used to couple a portion of the signal from the main receiving link for processing by the channel detection link. Since the coupling coefficient of the coupler is a positive value, the power of the input signal of the detection link can be reduced to prevent saturation.

[0029] In a specific embodiment, the coupler can be replaced by a power splitter to achieve the same function, coupling a portion of the signal from the main receiving link for processing by the channel detection link;

[0030] The main receiving link aims to receive the signal of the bandwidth B of the ith channel. Its implementation structure can adopt a radio frequency direct sampling structure, a heterodyne structure or an orthogonal demodulation structure.

[0031] The channel detection link includes frequency mixing, fast-hopping local oscillator, narrowband receiving module and power detection unit. The implementation of the frequency mixing, fast-hopping local oscillator and narrowband receiving module is not limited to a specific method. It can be composed of high-performance discrete components or a single-chip integrated solution with high integration and low price. The power detection module can use ADC to convert the signal of the channel detection link into a digital signal for digital detection, or it can be implemented using an analog detection chip. It is precisely because of the relative independence of the channel detection link and the main receiving link that this part of the circuit can be flexibly implemented according to needs.

[0032] The baseband processing unit is used to perform channel selection and fast link establishment according to the power of each channel to determine which channel to use for communication.

[0033] Figure 2 The diagram illustrates a fast full-channel power detection circuit structure for adaptive channel selection according to an embodiment of the present disclosure.

[0034] The fast-jumping local oscillator is realized by a direct digital frequency synthesizer (DDS) or a digital-to-analog converter (DAC) with a sampling rate of Fs. The theoretical frequency switching time is Ts=1 / Fs. The bandwidth Bw of the channel detection link can be designed as Bw=M·Bi, M=1,2…N, and the power detection time is Td. Then the time T for scanning the entire channel, a total of N channels, is:

[0035] T=N / M·=(Td+Ts) (1)

[0036] Since Fs can reach several GHz for DDS or DAC, Td can reach several ns. The detection time of analog power detection chip is in the order of tens of ns. In other words, the present structure can complete the detection of 10 RF channels in 1us without affecting the operation of the main receiving link. If coarse-grained detection is performed, that is, M>1, the detection time can be further shortened.

[0037] Figure 3The diagram shows a fast full-channel power detection circuit structure for adaptive channel selection according to an embodiment of the present disclosure, which has a low cost. In this embodiment, a quadrature demodulation chip with an integrated voltage-controlled oscillator (VCO) is used to directly orthogonally demodulate the RF signal to the baseband, and one of the output signals is used for baseband power detection. The entire circuit has almost no additional cost except for a low-priced quadrature demodulation chip, and the inherent orthogonal imbalance of the orthogonal demodulation chip will not affect the detection result.

[0038] The input signal of the channel detection link is:

[0039]

[0040] Among them, Pi is the power of each channel, N is the number of channels, fi is the carrier frequency of each channel, It can be understood as the complex baseband signal corresponding to the i-th channel, Ii(t) and Qi(t) are the amplitudes of the real and imaginary parts of the signal, and θQi(t) and θIi(t) are the corresponding phases. Pi is the power information of each channel that we want to extract quickly. This information will guide the transceiver to quickly establish a link and avoid interference.

[0041] Let the coupling coefficient of the coupler be D, then:

[0042]

[0043] Let the carrier when detecting the i-th channel be fC, and the amplitude and phase deflections of the output complex baseband signal caused by the orthogonal demodulation chip due to orthogonal imbalance be AI, AQ, φIi and φQi respectively, then we have

[0044]

[0045] Without loss of generality, we take the real part for power detection. When detecting the i-th channel, the output F(t) of the low-pass filter with a bandwidth of B / 2 is:

[0046]

[0047] The output O(t) of the detector chip is:

[0048]

[0049] It can be seen that when considering the relative sizes of the elements of the set {Pi}, the deviation introduced by the structure of this embodiment is consistent for each Pi. In other words, the output of the channel detection link is proportional to each Pi with the same coefficient, so it will not affect the result of the channel power estimation.

[0050] Furthermore, this structure has no requirements on the IQ offset performance of the orthogonal demodulation chip, which can further reduce the hardware cost.

[0051] The circuit structure of the present invention utilizes a coupler to couple out a portion of the signal processed by the RF front end to form a relatively independent channel detection link for fast channel scanning, which can avoid the errors and cost increases caused by the independent detection link and make the design of the fast channel detection link more flexible.

[0052] The above devices and methods of the present invention can be implemented by hardware, or by hardware combined with software. The present invention relates to such a computer-readable program, which, when executed by a logic component, enables the logic component to implement the above-mentioned devices or components, or enables the logic component to implement the above-mentioned various methods or steps. The present invention also relates to a storage medium for storing the above-mentioned program, such as a hard disk, a magnetic disk, an optical disk, a DVD, a flash memory, etc.

[0053] The present invention has been described above in conjunction with specific embodiments, but it should be clear to those skilled in the art that these descriptions are exemplary and are not intended to limit the scope of protection of the present invention. Those skilled in the art may make various modifications and variations to the present invention based on the spirit and principles of the present invention, and these modifications and variations are also within the scope of the present invention.

Claims

1. A fast full-channel power detection circuit structure for adaptive channel selection, the structure comprising a radio frequency front end, a coupler or a power divider, a main receiving link, a channel detection link and a baseband processing unit, characterized in that: The RF front end includes a low noise amplifier LNA, a RF attenuator, and a broadband bandpass filter with a passband bandwidth of W. The RF front end filters out useless signals outside the bandwidth W and performs gain adjustment on the received signal; The coupler or power splitter couples a portion of the signal from the main receiving link for processing by the channel detection link; The main receiving link, the coupler receives a signal with a bandwidth of B on the ith channel, and the main receiving link adopts a radio frequency direct sampling structure or a heterodyne structure; The channel detection link includes a mixer, a fast-jumping local oscillator, a narrowband receiving module and a power detection unit; Baseband processing unit, used for channel selection and fast link establishment according to the power of each channel; The fast-jump local oscillator is realized by a direct digital frequency synthesizer DDS or a digital-to-analog converter DAC with a sampling rate of Fs. The bandwidth Bw of the channel detection link is Bw=M·Bi, M=1,2…N, and the time T for scanning the entire channel, a total of N channels, is T=N / M·(Td+Ts), where Td is the power detection time, Ts is the theoretical frequency switching time, and Ts=1 / Fs.

2. A fast full-channel power detection circuit structure for adaptive channel selection as claimed in claim 1, characterized in that: A quadrature demodulation chip with a fast-hopping local oscillator is used to directly orthogonally demodulate the RF signal to the baseband, and one of the output signals is used for baseband power detection.

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