ANPC three-level converter control system and modulation method thereof

Abstract

The present invention discloses an ANPC three-level converter control system and modulation method thereof. By decoding two output signals from a controller, the ANPC three-level drive signal is obtained, eliminating the need for the controller to directly output six control signals. This significantly saves hardware resources and reduces controller costs. The modulation method provided by the present invention implements short commutation path switching during switch state changes, reducing switch turn-off voltage spikes and diode reverse recovery spikes, and preventing overvoltage damage to the switches. It also ensures that the voltage across each switch is effectively clamped in different switch states, preventing overvoltage damage caused by voltage fluctuations, ensuring safe operation of the ANPC three-level converter, and extending the service life of the switches.

Description

Technical Field

[0001] The present invention relates to an ANPC three-level converter control system and a modulation method thereof, and belongs to the technical field of power electronics. Background Art

[0002] In order to achieve the "dual carbon goals" and accelerate the adjustment of energy structure, the country has vigorously promoted the construction of new energy power generation, and converters have been widely used as key equipment for new energy power generation.

[0003] The converter in the wind, solar and storage system usually uses a three-level topology. The active-power-clamped (ANPC) three-level topology has more flexible control due to its redundant switching state. The ANPC topology consists of six switches T1 to T6 and their anti-parallel diodes D1 to D6. The six switches require six control signals. In the ANPC three-level converter, each switch withstands 1 / 2 of the DC bus voltage (1 / 2V dc ), but when the switch tube is turned off, an additional voltage will be generated on this basis, which is called the turn-off spike voltage. The turn-off spike voltage is related to the stray parameters of the hardware circuit. The larger the stray inductance, the higher the turn-off spike voltage. If the superimposed turn-off spike voltage is greater than the withstand voltage value of the switch tube, it will cause the switch tube to explode.

[0004] In order to avoid the risk of shoot-through in the switch tube, it is necessary to increase the dead zone during the switching process of the switch tube. This will cause the voltage across the switch tube to be unable to be effectively clamped to 1 / 2V when the positive and negative half-cycles of the ANPC converter are switched. dc If the voltage across the switch tube is greater than 1 / 2V dc , after the turn-off voltage spike is superimposed, it may also be greater than the withstand voltage of the switch tube, causing the switch tube to explode.

[0005] To prevent electromagnetic interference, current controller output signals are mostly optical. Optical signals can only transmit information such as on / off and on / off timing. Typically, each switch requires a separate optical signal. Controllers used in NPC and TNPC topologies typically only have four drive signals to save costs, while ANPC topologies require two additional drive signals. Therefore, controllers are not universally compatible and redevelopment is expensive.

[0006] Therefore, in order to solve the above technical problems, it is urgent to design a new ANPC three-level converter control system. Summary of the Invention

[0007] Objective: To overcome the deficiencies in the prior art, the present invention provides an ANPC three-level converter control system and a modulation method thereof, which can reduce the cost of the converter controller, improve the versatility of the controller, reduce the peak voltage borne by the switch tube when it is turned off, and effectively clamp the voltage across the switch tube at any time.

[0008] Technical solution: To solve the above technical problems, the technical solution adopted by the present invention is:

[0009] In a first aspect, an ANPC three-level converter control system includes a controller, an optoelectronic decoder, and a driver board. The controller calculates two control signals TX1 and TX2 based on the operating conditions of the three-level converter. In a three-phase converter, X represents any phase A, B, or C of the three-phase alternating current. The first control signal TX1 is a switching frequency-operated signal used to describe the duty cycle of the phase modulation voltage of the three-level converter, and the second control signal TX2 is a power frequency-operated signal used to describe the positive and negative polarity of the modulation voltage of the three-level converter. The two control signals TX1 and TX2 are connected to an optoelectronic converter board via optical fibers and then to the optoelectronic decoder. The optoelectronic decoder converts the two optical signals TX1 and TX2 into six electrical signals G1 to G6, which are then connected to the driver board. The driver board directly drives the on / off states of switches T1 to T6 on the three-level converter based on the six electrical signals G1 to G6.

[0010] As an optional solution, when TX2 is positive, negative, rising edge or falling edge, TX1 determines the switching logic timing of the three-level converter switch state.

[0011] As an optional solution, the three-level converter adopts an ANPC structure.

[0012] As an optional solution, the three-level converter switching state includes: switching states P, O+, O, O- and N. The five switching states are shown in Table 1:

[0013] Switch status T1 T2 T3 T4 T5 T6 Output voltage P conduction conduction Shutdown Shutdown Shutdown conduction <![CDATA[+V dc / 2]]> O+ Shutdown conduction Shutdown Shutdown conduction Shutdown 0 O Shutdown conduction conduction Shutdown conduction conduction 0 O- Shutdown Shutdown conduction Shutdown Shutdown conduction 0 N Shutdown Shutdown conduction conduction conduction Shutdown <![CDATA[-V dc / 2]]>

[0014] In a second aspect, a modulation method for an ANPC three-level converter control system includes the following steps:

[0015] TX2=1, TX1 switches the switch state between P and O+.

[0016] TX2=0, TX1 switches the switch state between N and O-.

[0017] TX2 changes from 1 to 0, and TX1 is high, causing the switch state to switch from P to O-.

[0018] TX2 changes from 1 to 0, and TX1 is low, causing the switch state to switch from O+ to N.

[0019] TX2 changes from 1 to 0, and TX1 changes from low level to high level, causing the switch state to switch from O+ to O-.

[0020] TX2 changes from 1 to 0, and TX1 changes from high level to low level, causing the switch state to switch from P to N.

[0021] TX2 changes from 0 to 1, and TX1 is high, causing the switch state to switch from O- to P.

[0022] TX2 changes from 0 to 1, and TX1 is low, causing the switch state to switch from N to O+.

[0023] TX2 changes from 0 to 1, and TX1 changes from high level to low level, so that the switch state O- switches to O+.

[0024] TX2 changes from 0 to 1, and TX1 changes from low level to high level, causing the switch state to switch from N to P.

[0025] As an optional solution, TX2 = 1, TX1 switches the switch state between P and O+, including:

[0026] At time t1, the switch state begins to switch from P to O+. Switches T1 and T6 are first turned off simultaneously, while T2 remains on. At time t2, switch T5 begins to turn on, completing the switch state switch from P to O+. At time t3, the switch state begins to switch from O+ to P. Switch T5 is first turned off, while T2 remains on. At time t4, switches T1 and T6 are simultaneously turned on, completing the switch state switch from O+ to P. Here, t1 is the start time of the switch state switch from P to O+, t2 is the end time of the switch state switch from P to O+, t3 is the start time of the switch state switch from O+ to P, and t4 is the end time of the switch state switch from O+ to P. t1-t2 and t3-t4 are the dead time.

[0027] As an optional solution, TX2 = 0, TX1 switches the switch state between N and O-, including:

[0028] At time t5, the switch state begins to switch from N to O-. Switches T4 and T5 are first turned off simultaneously, while T3 remains on. At time t6, switch T6 begins to turn on, completing the switch state switch from N to O-. At time t7, the switch state begins to switch from O- to N. Switch T6 is first turned off, while T3 remains on. At time t8, switches T4 and T5 are simultaneously turned on, completing the switch state switch from O- to N. Here, t5 is the start time of the switch state switch from N to O-, t6 is the end time of the switch state switch from N to O-, t7 is the start time of the switch state switch from O- to N, and t8 is the end time of the switch state switch from O- to N. The time intervals t5-t6 and t7-t8 are the dead time intervals.

[0029] As an optional solution, TX2 changes from 1 to 0 and TX1 is high, so that the switch state changes from P to O-, including:

[0030] At time t9, switches T1 and T6 are simultaneously turned off, while T2 remains on. At time t10, switch T5 is turned on. At time t11, switches T2 and T5 remain on, while T3 and T6 are also turned on. At time t12, switches T2 and T5 are turned off, completing the P to O- switching process. Here, t9 is the starting time for the switch state P to O-, t10 is the starting time for the intermediate state O+, t11 is the starting time for the intermediate state O, and t12 is the ending time for the switch state P to O-. The dead time is t9-t10, and the 1 / 2 minimum pulse width is t10-t11 and t11-t12. The minimum pulse width is the minimum pulse duration required for the switch to complete the turn-on and turn-off processes.

[0031] TX2 changes from 1 to 0, TX1 is low, and the switch state changes from O+ to N, including:

[0032] At time t13, switches T2 and T5 remain on, and T3 and T6 are also on. At time t14, switches T2 and T5 are turned off. At time t15, switch T6 is turned off first, while T3 remains on. At time t16, switches T4 and T5 are turned on simultaneously, completing the O+ to N switching process. Among them, t13 is the starting time of the switch state O+ to N switching, t14 is the ending time of the intermediate state O, t15 is the ending time of the intermediate state O-, and t16 is the ending time of the switch state O+ to N switching. t13-t14 and t14-t15 are 1 / 2 of the minimum pulse width, and t15-t16 is the dead time.

[0033] TX2 changes from 1 to 0, and TX1 changes from low level to high level, so that the switch state switches from O+ to O-, including:

[0034] At time t17, switches T2 and T5 remain on, and T3 and T6 are also on. At time t18, switches T2 and T5 are turned off, completing the O+ to O- switching process. Here, t17 is the start time of the O+ to O- switching process, and t18 is the end time of the O+ to O- switching process. The interval t17 to t18 is half the minimum pulse width.

[0035] TX2 changes from 1 to 0, and TX1 changes from high level to low level, so that the switch state switches from P to N, including:

[0036] At time t19, switches T1 and T6 are simultaneously turned off, while T2 remains on. At time t20, switch T5 is turned on. At time t21, switches T2 and T5 remain on, and T3 and T6 are also turned on. At time t22, switches T2 and T5 are turned off. At time t23, switch T6 is turned off, while T3 remains on. At time t24, switches T4 and T5 are simultaneously turned on, completing the P to N switching process. Here, t19 is the start time of the switch state P to N switching, t20 is the start time of the intermediate state O+, t21 is the start time of the intermediate state O, t22 is the start time of the intermediate state O-, t23 is the end time of the intermediate state O-, and t24 is the end time of the switch state P to N switching.

[0037] As an optional solution, TX2 changes from 0 to 1 and TX1 is high, so that the switch state changes from O- to P, including:

[0038] At time t9', switches T3 and T6 remain on, and T2 and T5 are also on. At time t10', switches T3 and T6 are turned off. At time t11', switch T5 is turned off first, while T2 remains on. At time t12', switches T1 and T6 are turned on simultaneously, completing the O- to P switching process. Here, t9' is the starting time for the switch state O- to P switching, t10' is the ending time of the intermediate state O, t11' is the ending time of the intermediate state O+, and t12' is the ending time of the switch state O- to P switching. t11' to t12' is the dead time, and t9' to t10' and t10' to t11' are 1 / 2 of the minimum pulse width. The minimum pulse width is the minimum pulse action time required for the switch to complete the turn-on and turn-off processes.

[0039] TX2 changes from 0 to 1, TX1 is low, and the switch state changes from N to O+, including:

[0040] At t13', switches T4 and T5 are simultaneously turned off, while T3 remains on. At t14', switch T6 is turned on. At t15', switches T3 and T6 remain on, while T2 and T5 are also turned on. At t16', switches T3 and T6 are turned off, completing the N to O+ switching process. Here, t13' is the start time of the N to O+ switch transition, t14' is the start time of the intermediate state O-, t15' is the start time of the intermediate state O, and t16' is the end time of the N to O+ switch transition. t13' to t14' is the dead time, while t14' to t15' and t15' to t16' are half the minimum pulse width.

[0041] TX2 changes from 0 to 1, and TX1 changes from high level to low level, switching the switch state from O- to O+, including:

[0042] At time t17', switches T3 and T6 remain on, and T2 and T5 are also on. At time t18', switches T3 and T6 are turned off, completing the O- to O+ switching process. Here, t17' is the start time of the O- to O+ switch transition, and t18' is the end time of the O- to O+ transition. The interval t17' to t18' is half the minimum pulse width.

[0043] TX2 changes from 0 to 1, and TX1 changes from low level to high level, so that the switch state changes from N to P, including:

[0044] At time t19', switch tubes T4 and T5 are turned off at the same time, and T3 remains on; at time t20', switch tube T6 is turned on; at time t21', switch tubes T3 and T6 remain on, and T2 and T5 are also turned on. At time t22', switch tubes T3 and T6 are turned off; at time t23', switch tube T5 is turned off first, and T2 remains on. At time t24', switch tubes T1 and T6 are turned on at the same time, completing the N-to-P switching process. Among them, t19' is the starting time of switching from switch state N to P, t20' is the starting time of intermediate state O-, t21' is the starting time of intermediate state O, t22' is the starting time of intermediate state O+, t23' is the ending time of intermediate state O+, t24' is the ending time of switching from switch state N to P, t19'~t20' and t23'~t24' are dead time, t21'~t22', t22'~t23', and t23'~t24' are 1 / 2 minimum pulse width time.

[0045] As an optional solution, the three-level converter switching state includes: switching states P, O+, O, O- and N. The five switching states are shown in Table 1:

[0046] Switch status T1 T2 T3 T4 T5 T6 Output voltage P conduction conduction Shutdown Shutdown Shutdown conduction <![CDATA[+V dc / 2]]> O+ Shutdown conduction Shutdown Shutdown conduction Shutdown 0 O Shutdown conduction conduction Shutdown conduction conduction 0 O- Shutdown Shutdown conduction Shutdown Shutdown conduction 0 N Shutdown Shutdown conduction conduction conduction Shutdown <![CDATA[-V dc / 2]]>

[0047] As an optional solution, the three-level converter adopts an ANPC structure.

[0048] Beneficial effects: The present invention provides an ANPC three-level converter control system and a modulation method thereof. The control system provided by the present invention decodes the two output signals of the controller to obtain the ANPC three-level drive signal. The controller does not need to directly output 6 control signals, which greatly saves hardware resources and reduces the cost of the controller.

[0049] The modulation method provided by the present invention realizes short commutation path switching when the switch state changes, reduces the switch tube turn-off voltage spike and the diode reverse recovery spike, and prevents the switch tube from being damaged by overvoltage; and ensures that the voltage across each switch tube can be effectively clamped in different switch states, preventing overvoltage damage caused by voltage fluctuation, ensuring the safe operation of the ANPC three-level converter, and improving the service life of the switch tube. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 This is a structural diagram of the ANPC three-level converter control system provided by the present invention.

[0051] Figure 2 This is the main circuit topology diagram of the ANPC three-level converter.

[0052] Figure 3 The output current I>0 is the commutation path corresponding to the five switching states used in the present invention.

[0053] Figure 4 The output current I<0 is the commutation path corresponding to the five switching states used in the present invention.

[0054] Figure 5 This is a schematic diagram of the photoelectric decoder classification based on the four states of the input signal TX2.

[0055] Figure 6 Schematic diagram of the switching process of each switch tube in state 1.

[0056] Figure 7 Schematic diagram of the switching process of each switch tube in state two.

[0057] Figure 8 Schematic diagram of the switching process of each switch tube in the third working condition.

[0058] Figure 9 Schematic diagram of the switching process of each switch tube in state three working condition two.

[0059] Figure 10 Schematic diagram of the switching process of the switch tubes in the three working conditions of state three.

[0060] Figure 11 This is a schematic diagram of the switching process of the switch states of each switch tube in state three working condition four.

[0061] Figure 12 Schematic diagram of the switching process of each switch tube in the fourth working condition.

[0062] Figure 13 Schematic diagram of the switching process of the switch states of each switch tube in state four working condition two.

[0063] Figure 14 Schematic diagram of the switching process of the switch tubes in state four working condition three.

[0064] Figure 15 This is a schematic diagram of the switching process of the four switch tubes in the four working conditions. DETAILED DESCRIPTION

[0065] The present invention will be further described below with reference to specific embodiments.

[0066] like Figure 1 As shown in the figure, a first embodiment of an ANPC three-level converter control system includes a controller, an optoelectronic decoder, and a driver board. The controller calculates two control signals TX1 and TX2 based on the converter's operating conditions. In a three-phase converter, X represents any phase A, B, or C of the three-phase AC power. The first control signal TX1 is a switching frequency-operated signal that describes the duty cycle of the three-level converter's phase modulation voltage. The second control signal TX2 is a power frequency-operated signal that describes the positive and negative polarity of the three-level converter's modulation voltage. Specifically, when TX2 is in one of four different states: high, low, or switching between high and low, TX1 determines the switching state switching logic sequence. The two control signals TX1 and TX2 are connected to the optoelectronic converter board via optical fiber and then to the optoelectronic decoder. The optoelectronic decoder converts the TX1 and TX2 optical signals into six electrical signals G1 through G6, which are then connected to the driver board. The driver board directly drives the switching states of the switches T1 through T6 on the three-level converter based on the six electrical signals G1 through G6.

[0067] like Figure 2 As shown, the three-level converter adopts an ANPC structure, including: switching tubes T1, T2, T3, T4, T5, and T6, and diodes D1, D2, D3, D4, D5, and D6. The switching tubes T1, T2, T3, and T4 are connected in series between the positive and negative electrodes of the power supply, and the switching tubes T5 and T6 are connected in parallel between the switching tubes T2 and T3. A first capacitor and a second capacitor are also connected in series between the positive and negative electrodes of the power supply, and a common point between the first and second capacitors is connected to a common point between the switching tubes T5 and T6. The switching tubes T1, T2, T3, T4, T5, and T6 are respectively connected in anti-parallel with the diodes D1, D2, D3, D4, D5, and D6.

[0068] A second embodiment provides a modulation method for an ANPC three-level converter control system, wherein an optoelectronic decoder decodes TX1 and TX2 to obtain drive signals G1 to G6 for the ANPC three-level converter switch tubes. When the drive signal Gn=1, the switch tube Tn is turned on; when the drive signal Gn=0, the switch tube Tn is turned off, where n is a natural number from 1 to 6. It can be seen that when the output current direction of the ANPC three-level converter is different, the commutation path is also different. It is stipulated that the direction of the ANPC three-level converter output current flowing out of the DC capacitor is positive I>0, and the direction of the output current flowing into the DC capacitor is negative I<0. The commutation paths corresponding to the five switching states used in the present invention are as follows: Figure 3 、 Figure 4 The five switching states corresponding to T1-T6 are shown in Table 1:

[0069] Switch status T1 T2 T3 T4 T5 T6 Output voltage P conduction conduction Shutdown Shutdown Shutdown conduction <![CDATA[+V dc / 2]]> O+ Shutdown conduction Shutdown Shutdown conduction Shutdown 0 O Shutdown conduction conduction Shutdown conduction conduction 0 O- Shutdown Shutdown conduction Shutdown Shutdown conduction 0 N Shutdown Shutdown conduction conduction conduction Shutdown <![CDATA[-V dc / 2]]>

[0070] When I>0:

[0071] When the switch state is P, the current path I1 is from the positive pole of the power supply, through T1 and T2, and output from the converter output port O, and T6 is turned on to act as a clamp.

[0072] When the switch state is O+, the current path I2 is from the DC input port 0, through D5 and T2, and output from the converter output port O, and T5 is turned on to play a freewheeling role.

[0073] When the switch state is 0, the current path I3 is from the DC input port 0, through D5, T2 and T6, D3 respectively, and output from the converter output port O. T5 and T3 are turned on to play a freewheeling role.

[0074] When the switch state is O-, the current path I4 is from the DC input port 0, through T6 and D3, and output from the converter output port O, and T3 is turned on to play a freewheeling role.

[0075] When the switch state is N, the current path I5 is from the negative electrode of the power supply, through D4 and D3, and output from the converter output port O. T5 is turned on to act as a clamp, and T3 and T4 are turned on to act as a freewheeling current.

[0076] When I<0:

[0077] When the switch state is P, the current path I6 is from the converter output port O, through D2 and D1, and output from the positive pole of the power supply. T6 is turned on to act as a clamp, and T1 and T2 are turned on to act as a freewheeling current.

[0078] When the switch state is O+, the current path I7 is from the converter output port O, through D2 and T5, and output from the DC input port 0, and T2 is turned on to play a freewheeling role.

[0079] When the switch state is 0, the current path I8 is from the converter output port O, through D2, T5 and T3, D6 respectively, and output from the DC input port 0. T2 and T6 are turned on to play a freewheeling role.

[0080] When the switch state is O-, the current path I9 is ​​from the converter output port O, through T3 and D6, and output from the DC input port 0, and T6 is turned on to play a freewheeling role.

[0081] When the switch state is N, the current path I10 is from the converter output port O, through T3 and T4, and output from the negative pole of the power supply. T5 is turned on to act as a clamp.

[0082] According to the level status of TX2, it can be divided into four different working states, such as Figure 5As shown in the figure: When the level signal of TX2 is high, TX2 is in state 1. When the level signal of TX2 is at a falling edge of high, TX2 is in state 2. When the level signal of TX2 is low, TX2 is in state 3. When the level signal of TX2 is at a rising edge of low, TX2 is in state 4.

[0083] State 1: TX2 = 1, the modulation voltage of the ANPC three-level converter is in the positive half cycle, and TX1 is used to switch the switch state between P and O+, such as Figure 6 As shown in the figure. At time t1, the switch state begins to switch from P to O+. Switches T1 and T6 are first turned off simultaneously, while T2 remains on. At time t2, switch T5 begins to turn on, completing the switch state switch from P to O+. At time t3, the switch state begins to switch from O+ to P. Switch T5 is first turned off, while T2 remains on. At time t4, switches T1 and T6 are simultaneously turned on, completing the switch state switch from O+ to P. Among them, t1 is the starting time of the switch state switch from P to O+, t2 is the ending time of the switch state switch from P to O+, t3 is the starting time of the switch state switch from O+ to P, and t4 is the ending time of the switch state switch from O+ to P. t1-t2 and t3-t4 are the dead time. This switching process ensures normal commutation of the ANPC three-level converter during the positive half-axis of the modulation voltage. All switching occurs via a short commutation path, resulting in low stray inductance. This reduces the turn-off voltage spike of the switch tube, ensuring that the voltage across each switch tube can be clamped. Dead time is set to prevent damage to switching devices caused by shoot-through, thereby improving the service life and safety of the converter.

[0084] State 2: TX2 = 0, the modulation voltage of the ANPC three-level converter is in the negative half cycle, and TX1 is used to switch the switch state between N and O-, such as Figure 7 As shown in the figure. At t5, the switch state begins to switch from N to O-. Switches T4 and T5 are first turned off simultaneously, while T3 remains on. At t6, switch T6 begins to turn on, completing the switch state switch from N to O-. At t7, the switch state begins to switch from O- to N. Switch T6 is first turned off, while T3 remains on. At t8, switches T4 and T5 are simultaneously turned on, completing the switch state switch from O- to N. Among them, t5 is the start time of the switch state switch from N to O-, t6 is the end time of the switch state switch from N to O-, t7 is the start time of the switch state switch from O- to N, and t8 is the end time of the switch state switch from O- to N. t5-t6 and t7-t8 are the dead time. This process ensures normal commutation of the ANPC three-level converter when modulating the negative half-axis of the voltage. All switching is done via a short commutation path, resulting in low stray inductance. This reduces the turn-off voltage spike of the switch tube, ensures that the voltage across each switch tube can be clamped, and sets a dead time to prevent damage to the switching devices caused by shoot-through, thereby improving the service life and safety of the converter.

[0085] State 3: TX2 changes from 1 to 0, and the modulation voltage of the ANPC three-level converter switches from the positive half-cycle to the negative half-cycle. The switching state switching process can be divided into the following four cases:

[0086] (1) When TX2 changes, TX1 is high, which will cause the switch state to switch from P to O-, such as Figure 8 As shown in the figure, the switching process is P→O+→O→O-, with the intermediate states O+ and O added. The duration of each intermediate state should be no less than 1 / 2 of the minimum pulse width. The minimum pulse width represents the minimum pulse duration required for the switch to complete the turn-on and turn-off processes. At time t9, switches T1 and T6 are simultaneously turned off, while T2 remains on. At time t10, switch T5 is turned on. At time t11, switches T2 and T5 remain on, and T3 and T6 are also turned on. At time t12, switches T2 and T5 are turned off, completing the switching process from P to O-. Among them, t9 is the starting time of the switch state P to O-, t10 is the starting time of the intermediate state O+, t11 is the starting time of the intermediate state O, and t12 is the ending time of the switch state P to O-. t9-t10 is the dead time, and t10-t11 and t11-t12 are 1 / 2 of the minimum pulse width. During this process, since the intermediate state O has two commutation loops, short commutation path switching is achieved during the commutation process, the stray inductance is low, the turn-off voltage spike of the switch tube is reduced, and the voltage at both ends of each switch tube can be clamped. The intermediate state duration is reasonably designed to ensure that each switch tube can operate effectively, and the dead time is set to improve the reliability and safety of the converter.

[0087] (2) When TX2 changes, TX1 is at a low level, which will cause the switch state to switch from O+ to N, such as Figure 9As shown. The switching process is O+→O→O-→N, with the addition of intermediate states O and O-. The duration of each intermediate state should be no less than 1 / 2 of the minimum pulse width. At t13, switches T2 and T5 are kept on, and T3 and T6 are also on. At t14, switches T2 and T5 are turned off. At t15, switch T6 is turned off first, and T3 remains on. At t16, switches T4 and T5 are turned on simultaneously, completing the switching process from O+ to N. Among them, t13 is the starting time of the switch state O+ to N, t14 is the end time of the intermediate state O, t15 is the end time of the intermediate state O-, and t16 is the end time of the switch state O+ to N. t13~t14 and t14~t15 are 1 / 2 of the minimum pulse width, and t15~t16 is the dead time. During this process, since the intermediate state O has two commutation loops, short commutation path switching is achieved during the commutation process, the stray inductance is low, the turn-off voltage spike of the switch tube is reduced, and the voltage at both ends of each switch tube can be clamped. The intermediate state duration is reasonably designed to ensure that each switch tube can operate effectively, and the dead time is set to improve the reliability and safety of the converter.

[0088] (3) When TX2 changes, TX1 changes from low level to high level, which will cause the switch state to switch from O+ to O-, such as Figure 10 As shown in the figure. The switching process is O+→O→O-, with the addition of the intermediate state O. The duration of each intermediate state should be no less than 1 / 2 of the minimum pulse width. At time t17, switches T2 and T5 remain on, and T3 and T6 are also on. At time t18, switches T2 and T5 are turned off, completing the switching process from O+ to O-. Here, t17 is the starting time for the switch state O+ to O-, t18 is the ending time for the switch state O+ to O-, and t17-t18 is 1 / 2 of the minimum pulse width. During this process, since the intermediate state O has two commutation loops, short commutation paths are used throughout the commutation process. This reduces stray inductance, reduces the turn-off voltage spike of the switch, and ensures that the voltage across each switch is clamped. Reasonable design of the intermediate state duration ensures that each switch can operate effectively, improving the reliability and safety of the converter.

[0089] (4) When TX2 changes, TX1 changes from high level to low level, which will cause the switch state to switch from P to N, such as Figure 11As shown in Figure 2. The switching process is P→O+→O→O-→N, with the intermediate states O+, O, and O- added. The duration of each intermediate state should be no less than 1 / 2 of the minimum pulse width. At t19, switches T1 and T6 are turned off simultaneously, while T2 remains on. At t20, switch T5 is turned on. At t21, switches T2 and T5 remain on, and T3 and T6 are also turned on. At t22, switches T2 and T5 are turned off. At t23, switch T6 is turned off first, while T3 remains on. At t24, switches T4 and T5 are turned on simultaneously, completing the switching process from P to N. Among them, t19 is the starting time of the switch state P to N, t20 is the starting time of the intermediate state O+, t21 is the starting time of the intermediate state O, t22 is the starting time of the intermediate state O-, t23 is the ending time of the intermediate state O-, and t24 is the ending time of the switch state P to N. During this process, since there are two commutation circuits in the intermediate state O, short commutation path switching is achieved during the commutation process, the stray inductance is low, the turn-off voltage spike of the switch tube is reduced, and the voltage at both ends of each switch tube can be clamped. The intermediate state duration is reasonably designed to ensure that each switch tube can operate effectively, and the dead time is set to improve the reliability and safety of the converter.

[0090] State 4: TX2 changes from 0 to 1, and the modulation voltage of the ANPC three-level converter switches from the negative half-cycle to the positive half-cycle. The switching state switching process can be divided into the following four cases:

[0091] (1) When TX2 changes, TX1 is high, which will cause the switch state to switch from O- to P, such as Figure 12 As shown, the switching process is O-→O→O+→P, with the addition of intermediate states O and O+. The duration of each intermediate state should be no less than 1 / 2 of the minimum pulse width. At time t9', switches T3 and T6 remain on, and T2 and T5 are also on. At time t10', switches T3 and T6 are turned off. At time t11', switch T5 is turned off first, while T2 remains on. At time t12', switches T1 and T6 are turned on simultaneously, completing the switching process from O- to P. Among them, t9' is the starting time of the switch state O- to P, t10' is the end time of the intermediate state O, t11' is the end time of the intermediate state O+, and t12' is the end time of the switch state O- to P. t11'-t12' is the dead time, and t9'-t10' and t10'-t11' are 1 / 2 of the minimum pulse width. During this process, since the intermediate state O has two commutation loops, short commutation path switching is achieved during the commutation process, the stray inductance is low, the turn-off voltage spike of the switch tube is reduced, and the voltage at both ends of each switch tube can be clamped. The intermediate state duration is reasonably designed to ensure that each switch tube can operate effectively, and the dead time is set to improve the reliability and safety of the converter.

[0092] (2) When TX2 changes, TX1 is at a low level, which will cause the switch state to switch from N to O+, such as Figure 13 As shown, the switching process is N→O-→O→O+, with the addition of intermediate states O- and O. The duration of each intermediate state should be no less than 1 / 2 of the minimum pulse width. At t13', switches T4 and T5 are first turned off simultaneously, while T3 remains on. At t14', switch T6 is turned on. At t15', switches T3 and T6 remain on, and T2 and T5 are also turned on. At t16', switches T3 and T6 are turned off, completing the switching process from N to O+. Among them, t13' is the starting time of the switch state N to O+, t14' is the starting time of the intermediate state O-, t15' is the starting time of the intermediate state O, and t16' is the ending time of the switch state N to O+. t13'-t14' is the dead time, and t14'-t15' and t15'-t16' are 1 / 2 of the minimum pulse width. During this process, since there are two commutation circuits in the intermediate state O, short commutation path switching is achieved during the commutation process, the stray inductance is low, the turn-off voltage spike of the switch tube is reduced, and the voltage at both ends of each switch tube can be clamped. The intermediate state duration is reasonably designed to ensure that each switch tube can operate effectively, and the dead time is set to improve the reliability and safety of the converter.

[0093] (3) When TX2 changes, TX1 changes from high level to low level, which will cause the switch state O- to switch to O+, such as Figure 14 As shown. The switching process is O-→O→O+, with an intermediate state O added. The duration of each intermediate state should be no less than 1 / 2 of the minimum pulse width time. At t17', keep the switch tubes T3 and T6 turned on, and T2 and T5 are also turned on. At t18', the switch tubes T3 and T6 are turned off, completing the switching process from O- to O+. Among them, t17' is the starting time of switching from the switch state O- to O+, t18' is the end time of switching from the switch state O- to O+, and t17'~t18' is 1 / 2 of the minimum pulse width time. In this process, since the intermediate state O has two commutation loops, short commutation path switching is achieved during the commutation process, the stray inductance is low, the turn-off voltage spike of the switch tube is reduced, and the voltage across each switch tube can be clamped. The reasonable design of the intermediate state duration ensures that each switch tube can operate effectively, thereby improving the reliability and safety of the converter.

[0094] (4) When TX2 changes, TX1 changes from low level to high level, which will cause the switch state to switch from N to P, such as Figure 15As shown, the switching process is N→O-→O→O+→P, with the intermediate states O-, O, and O+ added. The duration of each intermediate state should be no less than half the minimum pulse width. At t19', switches T4 and T5 are simultaneously turned off, while T3 remains on. At t20', switch T6 is turned on. At t21', switches T3 and T6 remain on, and T2 and T5 are also turned on. At t22', switches T3 and T6 are turned off. At t23', switch T5 is turned off first, while T2 remains on. At t24', switches T1 and T6 are simultaneously turned on, completing the N-to-P switching process. Among them, t19' is the starting time of the switch state N to P, t20' is the starting time of the intermediate state O-, t21' is the starting time of the intermediate state O, t22' is the starting time of the intermediate state O+, t23' is the ending time of the intermediate state O+, and t24' is the ending time of the switch state N to P. t19'-t20' and t23'-t24' are the dead time, and t21'-t22', t22'-t23', and t23'-t24' are 1 / 2 of the minimum pulse width. In this process, because there are two commutation loops in the intermediate state O, the commutation process is achieved by switching on a short commutation path. This reduces stray inductance, reduces the turn-off voltage spike of the switch tube, and ensures that the voltage across each switch tube can be clamped. The reasonable design of the intermediate state duration ensures that each switch tube can effectively operate. The dead time is set to improve the reliability and safety of the converter.

[0095] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. An ANPC three-level converter control system, characterized by: include: Controller, photoelectric decoder, and driver board; the controller calculates two control signals TX1 and TX2 based on the operating conditions of the three-level converter. In the three-phase converter, X represents any phase A, B, or C in the three-phase alternating current. The first control signal TX1 is a switching frequency-operated signal used to describe the duty cycle of the phase modulation voltage of the three-level converter. The second control signal TX2 is a power frequency-operated signal used to describe the positive and negative modulation voltage of the three-level converter. The two control signals TX1 and TX2 are connected to the photoelectric converter board via optical fibers and then connected to the photoelectric decoder. The photoelectric decoder converts the two optical signals TX1 and TX2 into six electrical signals G1 to G6 that are connected to the driver board. The driver board directly drives the on / off states of the switches T1 to T6 on the three-level converter according to the six electrical signals G1 to G6. When TX2 is positive, negative, rising or falling, TX1 determines the switching logic timing of the three-level converter switch state; The three-level converter switching state includes: switching states P, O+, O, O- and N; There are five switch states, as shown in the following table: 。 2. The ANPC three-level converter control system according to claim 1, characterized in that: The three-level converter adopts an ANPC structure.

3. The modulation method of an ANPC three-level converter control system according to claim 1, characterized in that: The steps include: TX2=1, TX1 switches the switch state between P and O+; TX2=0, TX1 switches the switch state between N and O-; TX2 changes from 1 to 0, TX1 is high, so the switch state switches from P to O-; TX2 changes from 1 to 0, TX1 is low, so the switch state switches from O+ to N; TX2 changes from 1 to 0, and TX1 changes from low level to high level, so that the switch state switches from O+ to O-; TX2 changes from 1 to 0, and TX1 changes from high level to low level, so that the switch state switches from P to N; TX2 changes from 0 to 1, TX1 is high, and the switch state changes from O- to P; TX2 changes from 0 to 1, TX1 is low, so the switch state changes from N to O+; TX2 changes from 0 to 1, and TX1 changes from high level to low level, so that the switch state O- switches to O+; TX2 changes from 0 to 1, and TX1 changes from low level to high level, causing the switch state to switch from N to P.

4. The modulation method according to claim 3, wherein: When TX2=1, TX1 switches the switch state between P and O+, including: At time t1, the switch state starts to switch from P to O+. Switches T1 and T6 are turned off at the same time, while T2 remains on. At time t2, switch T5 starts to turn on, completing the switch state switching from P to O+. At time t3, the switch state starts to switch from O+ to P. Switch T5 is turned off at the same time, while T2 remains on. At time t4, switches T1 and T6 are turned on at the same time, completing the switch state switching from O+ to P. Among them, t1 is the starting time of the switch state switching from P to O+, t2 is the ending time of the switch state switching from P to O+, t3 is the starting time of the switch state switching from O+ to P, and t4 is the ending time of the switch state switching from O+ to P. t1~t2 and t3~t4 are the dead time.

5. The modulation method according to claim 3, wherein: When TX2=0, TX1 switches the switch state between N and O-, including: At time t5, the switch state starts to switch from N to O-. Switches T4 and T5 are turned off at the same time, while T3 remains on. At time t6, switch T6 starts to turn on, completing the switch state switching from N to O-. At time t7, the switch state starts to switch from O- to N. Switch T6 is turned off at the same time, while T3 remains on. At time t8, switches T4 and T5 are turned on at the same time, completing the switch state switching from O- to N. Among them, t5 is the starting time of the switch state switching from N to O-, t6 is the ending time of the switch state switching from N to O-, t7 is the starting time of the switch state switching from O- to N, and t8 is the ending time of the switch state switching from O- to N. t5~t6 and t7~t8 are the dead time.

6. The modulation method according to claim 3, wherein: The TX2 changes from 1 to 0, and TX1 is high, so that the switch state is switched from P to O-, including: At time t9, switch tubes T1 and T6 are turned off at the same time, and T2 remains on. At time t10, switch tube T5 is turned on. At time t11, switch tubes T2 and T5 are kept on, and T3 and T6 are also turned on. At time t12, switch tubes T2 and T5 are turned off, completing the switching process from P to O-. Among them, t9 is the starting time of switching from switch state P to O-, t10 is the starting time of intermediate state O+, t11 is the starting time of intermediate state O, and t12 is the ending time of switching from switch state P to O-. t9~t10 is the dead time, t10~t11 and t11~t12 are 1 / 2 minimum pulse width time, and the minimum pulse width time is the minimum pulse action time for the switch tube to complete the turning-on process and the turning-off process. The TX2 changes from 1 to 0, and TX1 is at a low level, so that the switch state switches from O+ to N, including: At time t13, switch tubes T2 and T5 are kept on, and T3 and T6 are also turned on. At time t14, switch tubes T2 and T5 are turned off. At time t15, switch tube T6 is turned off first, and T3 remains on. At time t16, switch tubes T4 and T5 are turned on at the same time, completing the switching process from O+ to N. Among them, t13 is the starting time of switching from switch state O+ to N, t14 is the ending time of intermediate state O, t15 is the ending time of intermediate state O-, and t16 is the ending time of switching from switch state O+ to N. t13~t14 and t14~t15 are 1 / 2 minimum pulse width time, and t15~t16 is dead time. The TX2 changes from 1 to 0, and the TX1 changes from low level to high level, so that the switch state is switched from O+ to O-, including: At time t17, switches T2 and T5 are kept on, and T3 and T6 are also turned on. At time t18, switches T2 and T5 are turned off, completing the switching process from O+ to O-. t17 is the starting time of the switch state O+ to O-, t18 is the ending time of the switch state O+ to O-, and t17 to t18 is 1 / 2 of the minimum pulse width. The TX2 changes from 1 to 0 and the TX1 changes from high level to low level, so that the switch state switches from P to N, including: At time t19, switch tubes T1 and T6 are turned off at the same time, and T2 remains on; at time t20, switch tube T5 is turned on; at time t21, switch tubes T2 and T5 are kept on, and T3 and T6 are also turned on. At time t22, switch tubes T2 and T5 are turned off; at time t23, switch tube T6 is turned off first, and T3 remains on. At time t24, switch tubes T4 and T5 are turned on at the same time, completing the switching process from P to N. Among them, t19 is the starting time of switching from switch state P to N, t20 is the starting time of intermediate state O+, t21 is the starting time of intermediate state O, t22 is the starting time of intermediate state O-, t23 is the end time of intermediate state O-, and t24 is the end time of switching from switch state P to N.

7. The modulation method according to claim 3, wherein: The TX2 changes from 0 to 1, and TX1 is high, so that the switch state is switched from O- to P, including: At time t9', switch tubes T3 and T6 are kept turned on, and T2 and T5 are also turned on. At time t10', switch tubes T3 and T6 are turned off. At time t11', switch tube T5 is turned off first, and T2 remains turned on. At time t12', switch tubes T1 and T6 are turned on at the same time, completing the switching process from O- to P. Among them, t9' is the starting time of switching from switch state O- to P, t10' is the end time of intermediate state O, t11' is the end time of intermediate state O+, and t12' is the end time of switching from switch state O- to P. t11'~t12' is the dead time, t9'~t10' and t10'~t11' are 1 / 2 of the minimum pulse width time. The minimum pulse width time is the minimum pulse action time for the switch tube to complete the turning-on process and the turning-off process. The TX2 changes from 0 to 1, and TX1 is at a low level, so that the switch state switches from N to O+, including: At time t13', switch tubes T4 and T5 are turned off simultaneously, and T3 remains on. At time t14', switch tube T6 is turned on. At time t15', switch tubes T3 and T6 remain on, and T2 and T5 are also turned on. At time t16', switch tubes T3 and T6 are turned off, completing the switching process from N to O+. Among them, t13' is the starting time of switching from switch state N to O+, t14' is the starting time of intermediate state O-, t15' is the starting time of intermediate state O, and t16' is the ending time of switching from switch state N to O+. t13'~t14' is the dead time, and t14'~t15' and t15'~t16' are 1 / 2 minimum pulse width time. The TX2 changes from 0 to 1, and the TX1 changes from high level to low level, so that the switch state O- is switched to O+, including: At time t17', switch tubes T3 and T6 are kept on, and T2 and T5 are also turned on. At time t18', switch tubes T3 and T6 are turned off, completing the switching process from O- to O+. Among them, t17' is the starting time of switching from switch state O- to O+, t18' is the ending time of switching from switch state O- to O+, and t17' to t18' is 1 / 2 of the minimum pulse width time. The TX2 changes from 0 to 1, and the TX1 changes from low level to high level, so that the switch state switches from N to P, including: At t19', switch tubes T4 and T5 are turned off at the same time, and T3 remains on; at t20', switch tube T6 is turned on; at t21', switch tubes T3 and T6 are kept on, and T2 and T5 are also turned on. At t22', switch tubes T3 and T6 are turned off; at t23', switch tube T5 is turned off first, and T2 remains on. At t24', switch tubes T1 and T6 are turned on at the same time, completing the switching process from N to P. Among them, t19' is the switch state N The starting time of switching to P, t20' is the starting time of the intermediate state O-, t21' is the starting time of the intermediate state O, t22' is the starting time of the intermediate state O+, t23' is the end time of the intermediate state O+, t24' is the end time of switching from switch state N to P, t19'~t20', t23'~t24' are the dead time, t21'~t22', t22'~t23', t23'~t24' are 1 / 2 minimum pulse width time.

Images