Semiconductor device and method of manufacturing the same, memory

Abstract

The embodiments of the present disclosure disclose a semiconductor device and a manufacturing method thereof, and a memory. The semiconductor device comprises: a plurality of active pillars; a first gate structure located between two adjacent active pillars and covering at least part of a channel of one of the two adjacent active pillars; a second gate structure located between the first gate structure and the other of the two adjacent active pillars and covering at least part of a channel of the other of the two adjacent active pillars; a first isolation structure located between the first gate structure and the second gate structure; a second isolation structure comprising a first part located between the first gate structure and the first isolation structure and a second part located between the second gate structure and the first isolation structure; wherein the first part and the second part are connected below the first isolation structure; a third isolation structure located above the first isolation structure; wherein the dielectric constant of the first isolation structure is less than the dielectric constant of the second isolation structure or the third isolation structure.

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