Method and apparatus for cpu scheduling in a symmetric multiprocessor system

Abstract

The application discloses a symmetric multiprocessor CPU scheduling method and device, and the method comprises the following steps: listening to whether a cache coherence event occurs in a symmetric multiprocessor system; when the cache coherence event is listened to in the symmetric multiprocessor, obtaining the process number of each CPU in all CPUs; and determining the scheduling group corresponding to the process number of each CPU according to the process number of each CPU; determining one or more thread groups of each scheduling group; for each thread group, performing a matched scheduling operation on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group. It can be seen that the application can reduce the cache coherence running overhead introduced when multithreading concurrently reads and writes shared data, can improve the running efficiency of the symmetric multiprocessor system, and thus improves the CPU performance of the symmetric multiprocessor system.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, in particular to a CPU scheduling method and device of symmetric multi-processor system. BACKGROUND

[0002] In a symmetric multi-processing (SMP) system, data is usually shared between each CPU. However, concurrent read and write of shared data by multi-threading will introduce huge cache coherence running overhead, which reduces the CPU performance.

[0003] Currently, based on the MESI protocol, improved inter-core communication protocols such as MEOSI, MESIF and the like are proposed, which can partially optimize the memory write-back event introduced by read operation, but there is no effective improvement means for the performance decline introduced by concurrent write operation. Therefore, it is particularly important to provide a new CPU scheduling method to improve the CPU performance. SUMMARY

[0004] The technical problem to be solved by the present application is to provide a method and device for intelligently controlling the circulation of recyclable containers, which can reduce the cache coherence running overhead introduced by concurrent read and write of shared data by multi-threading, improve the running efficiency of the symmetric multi-processor system, and thus improve the CPU performance of the symmetric multi-processor system.

[0005] To solve the above technical problem, the present application discloses a CPU scheduling method of a symmetric multi-processor system, which comprises:

[0006] listening to whether a cache coherence event occurs in the symmetric multi-processor system; the cache coherence event includes an event that at least one CPU of the symmetric multi-processor system modifies shared data of the symmetric multi-processor system at least once;

[0007] when the cache coherence event of the symmetric multi-processor is detected, obtaining a process number of each CPU in all the CPUs; and determining a scheduling group corresponding to each process number according to the process number of each CPU; the same process number corresponds to the same scheduling group;

[0008] determining one or more thread groups of each scheduling group; each thread group includes a running thread of at least one CPU, and each thread group has a corresponding scheduling CPU, and all running threads in each thread group have a corresponding binding time with the corresponding scheduling CPU;

[0009] For each of the thread groups, a corresponding scheduling operation is performed on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group.

[0010] As an optional implementation, in the first aspect of the present application, the scheduling operation performed on the scheduling CPU corresponding to each of the thread groups according to the binding time corresponding to the thread group comprises:

[0011] a first scheduling operation is performed on the scheduling CPU corresponding to each of the thread groups according to the total running time of the thread group and the binding time corresponding to the thread group;

[0012] a second scheduling operation is performed on the scheduling CPU corresponding to each of the thread groups according to the binding time corresponding to the thread group and a preset time threshold corresponding to the thread group.

[0013] As an optional implementation, in the first aspect of the present application, the first scheduling operation performed on the scheduling CPU corresponding to each of the thread groups according to the total running time of the thread group and the binding time corresponding to the thread group comprises:

[0014] For each of the thread groups, the running time of each of the running threads of the thread group is estimated, and the sum of the running time of all the running threads of the thread group is calculated to obtain the total running time of the thread group;

[0015] For each of the thread groups, it is determined whether the total running time of the thread group is less than the corresponding binding time; if it is determined that the total running time of the thread group is less than the corresponding binding time, all the running threads of the thread group are controlled to be scheduled to the scheduling CPU corresponding to the thread group;

[0016] The second scheduling operation performed on the scheduling CPU corresponding to each of the thread groups according to the binding time corresponding to the thread group and a preset time threshold corresponding to the thread group comprises:

[0017] If it is detected that there is at least one target thread group in which the corresponding residual binding time is reduced to the preset time threshold among all the thread groups, for each of the target thread groups, an unbinding operation is performed on all the running threads in the target thread group and the corresponding scheduling CPU, and after the unbinding operation is performed, all the running threads of the target thread group are returned to the original scheduling of the symmetric multiprocessor system;

[0018] In addition, the method further comprises:

[0019] After the unbinding operation is performed on all the target thread groups, it is detected whether all running threads of all the target thread groups return to the original scheduling of the symmetric multiprocessor system, and when the detection result is yes, the operation of detecting whether a cache coherence event occurs in the symmetric multiprocessor system is triggered.

[0020] As an optional implementation, in the first aspect of the present application, the determining of the one or more thread groups of each of the scheduling groups comprises:

[0021] For each of the CPUs of each of the scheduling groups, a remote write number set of the CPU is obtained; the remote write number set of the CPU comprises remote write numbers obtained by each of the remaining CPUs except the CPU from performing remote write operations on the CPU;

[0022] For each of the scheduling groups, a directed weighted graph of the scheduling group is established according to the remote write number set of each of the CPUs in the scheduling group;

[0023] For each of the scheduling groups, one or more thread groups of the scheduling group are determined according to the directed weighted graph of the scheduling group.

[0024] As an optional implementation, in the first aspect of the present application, the establishing of the directed weighted graph of each of the scheduling groups according to the remote write number set of each of the CPUs in the scheduling group comprises:

[0025] For each of the CPUs of each of the scheduling groups, a physical number of the CPU is obtained, and the physical number of the CPU is determined as a vertex of the CPU;

[0026] For each of the CPUs of each of the scheduling groups, an edge between a vertex of each of the remaining CPUs except the CPU in the scheduling group and the vertex of the CPU and a weight between the vertex of each of the remaining CPUs and the vertex of the CPU are determined according to the remote write number set of the CPU;

[0027] For each of the CPUs of each of the scheduling groups, a directed weighted graph of the scheduling group corresponding to the CPU is established according to the vertex of the CPU, the edge between the vertex of each of the remaining CPUs and the vertex of the CPU and the weight between the vertex of each of the remaining CPUs and the vertex of the CPU.

[0028] As an optional implementation, in the first aspect of the present application, for each of the scheduling groups, the directed weighted graph of the scheduling group comprises a first vertex set, an edge between each of the first vertices in the first vertex set and each of the remaining first vertices except the first vertex and a weight;

[0029] For each of the scheduling groups, the first vertex set of the directed weighted graph of the scheduling group comprises vertices of each CPU of the scheduling group;

[0030] The determining, for each of the scheduling groups, one or more thread groups of the scheduling group according to the directed weighted graph of the scheduling group comprises:

[0031] For each of the first vertices of each of the directed weighted graphs, the cache hit times of the CPU corresponding to the first vertex are obtained;

[0032] For each of the directed weighted graphs, all the second vertices of the directed weighted graph are obtained by screening all the vertices of the directed weighted graph according to the cache hit times of the CPUs corresponding to all the first vertices of the directed weighted graph, the screening being performed according to a preset vertex retention condition;

[0033] For each of the directed weighted graphs, all the target weights of the directed weighted graph are obtained by screening all the weights of the directed weighted graph according to all the second vertices of the directed weighted graph and the cache hit times of the CPUs corresponding to all the second vertices of the directed weighted graph, the screening being performed according to a preset weight retention condition;

[0034] For each of the directed weighted graphs, one or more connected subgraphs of the directed weighted graph are established according to all the second vertices of the directed weighted graph and all the target weights of the directed weighted graph;

[0035] For each of the connected subgraphs of each of the directed weighted graphs, the thread group corresponding to the connected subgraph is determined according to the running thread corresponding to the connected subgraph;

[0036] For each of the scheduling groups, one or more thread groups of the scheduling group are determined according to the thread groups corresponding to all the connected subgraphs of the directed weighted graph of the scheduling group.

[0037] As an optional implementation form, in the first aspect, the obtaining, for each of the directed weighted graphs, all the second vertices of the directed weighted graph by screening all the vertices of the directed weighted graph according to the cache hit times of the CPUs corresponding to all the first vertices of the directed weighted graph, the screening being performed according to a preset vertex retention condition, comprises:

[0038] For each of the first vertices of each of the directed weighted graphs, the degree of the first vertex is calculated; the degree of each of the first vertices comprises the in-degree of the first vertex and the out-degree of the first vertex;

[0039] For each first vertex of each directed weighted graph, a ratio between a degree of the first vertex and a cache hit number of a CPU corresponding to the first vertex is calculated to obtain a first ratio corresponding to the first vertex;

[0040] For each directed weighted graph, all vertices with a first ratio greater than a first preset ratio are selected from all first vertices of the directed weighted graph as all second vertices of the directed weighted graph;

[0041] In addition, for each directed weighted graph, all target weights satisfying a preset weight retention condition are selected from all weights of the directed weighted graph according to all second vertices of the directed weighted graph and cache hit numbers of CPUs corresponding to all second vertices in the directed weighted graph to obtain all target weights of the directed weighted graph, including:

[0042] For each directed weighted graph, a starting vertex of each weight in the directed weighted graph is determined according to all second vertices of the directed weighted graph;

[0043] For each weight of each directed weighted graph, a ratio between the weight and a cache hit number of a CPU corresponding to a starting vertex of the weight is calculated to obtain a second ratio corresponding to the weight;

[0044] For each directed weighted graph, all weights with a second ratio greater than a second preset ratio are selected from all weights of the directed weighted graph as all target weights of the directed weighted graph.

[0045] The second aspect of the present application discloses a CPU scheduling device of a symmetric multiprocessor system, the device comprising:

[0046] A listening module is configured to listen to whether a cache coherence event occurs in the symmetric multiprocessor system; the cache coherence event includes an event that at least one CPU of the symmetric multiprocessor system modifies shared data of the symmetric multiprocessor system at least once;

[0047] A obtaining module is configured to obtain a process number of each CPU in all CPUs when the cache coherence event of the symmetric multiprocessor is listened to; and determine a scheduling group corresponding to a corresponding process number according to the process number of each CPU; the same process number corresponds to the same scheduling group;

[0048] A determining module is configured to determine one or more thread groups of each scheduling group; each thread group includes a running thread of at least one CPU, and each thread group has a corresponding scheduling CPU, and all running threads in each thread group have a corresponding binding time with the corresponding scheduling CPU;

[0049] a scheduling module, configured to, for each of the thread groups, perform a matched scheduling operation on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group.

[0050] As an optional implementation, in the second aspect of the present application, the manner in which the scheduling module performs a matched scheduling operation on the scheduling CPU corresponding to each of the thread groups according to the binding time corresponding to the thread group specifically includes:

[0051] performing a matched first scheduling operation on the scheduling CPU corresponding to each of the thread groups according to the total running time of the thread group and the binding time corresponding to the thread group;

[0052] performing a matched second scheduling operation on the scheduling CPU corresponding to each of the thread groups according to the binding time corresponding to the thread group and a preset time threshold corresponding to the thread group.

[0053] As an optional implementation, in the second aspect of the present application, the manner in which the scheduling module performs a matched first scheduling operation on the scheduling CPU corresponding to each of the thread groups according to the total running time of the thread group and the binding time corresponding to the thread group specifically includes:

[0054] estimating the running time of each of the running threads of each of the thread groups and calculating the sum of the running time of all the running threads of the thread group to obtain the total running time of the thread group;

[0055] judging whether the total running time of each of the thread groups is less than the binding time corresponding to the thread group; if it is judged that the total running time of the thread group is less than the binding time corresponding to the thread group, then controlling all the running threads of the thread group to be scheduled to the scheduling CPU corresponding to the thread group;

[0056] The manner in which the scheduling module performs a matched second scheduling operation on the scheduling CPU corresponding to each of the thread groups according to the binding time corresponding to the thread group and a preset time threshold corresponding to the thread group specifically includes:

[0057] if it is detected that there is at least one target thread group in which the corresponding residual binding time is reduced to the preset time threshold among all the thread groups, then performing an unbinding operation on all the running threads in each of the target thread groups and the corresponding scheduling CPU, and returning all the running threads of the target thread group to the original scheduling of the symmetric multiprocessor system after performing the unbinding operation;

[0058] and the apparatus further includes:

[0059] detecting whether all running threads of all the target thread groups return to the original scheduling of the symmetric multiprocessor system after the scheduling module finishes performing the unbinding operation on all the target thread groups, and triggering the listening module to perform the operation of listening whether the cache coherence event occurs in the symmetric multiprocessor system when the detection result is yes.

[0060] As an optional implementation, in the second aspect of the present application, the manner in which the determining module determines one or more thread groups of each of the scheduling groups specifically comprises:

[0061] For each of the CPUs of each of the scheduling groups, a remote write number set of the CPU is obtained; the remote write number set of the CPU comprises remote write numbers obtained by each of the remaining CPUs except the CPU from all the CPUs performing remote write operation on the CPU;

[0062] For each of the scheduling groups, a directed weighted graph of the scheduling group is established according to the remote write number set of each of the CPUs in the scheduling group;

[0063] For each of the scheduling groups, one or more thread groups of the scheduling group are determined according to the directed weighted graph of the scheduling group.

[0064] As an optional implementation, in the second aspect of the present application, the manner in which the determining module establishes the directed weighted graph of each of the scheduling groups specifically comprises:

[0065] For each of the CPUs of each of the scheduling groups, a physical number of the CPU is obtained, and the physical number of the CPU is determined as a vertex of the CPU;

[0066] For each of the CPUs of each of the scheduling groups, an edge between a vertex of each of the remaining CPUs except the CPU in the scheduling group and the vertex of the CPU and a weight between the vertex of each of the remaining CPUs and the vertex of the CPU are determined according to the remote write number set of the CPU;

[0067] For each of the CPUs of each of the scheduling groups, a directed weighted graph of the scheduling group corresponding to the CPU is established according to the vertex of the CPU, the edge between the vertex of each of the remaining CPUs and the vertex of the CPU and the weight between the vertex of each of the remaining CPUs and the vertex of the CPU.

[0068] As an optional implementation, in the second aspect of the present application, for each of the scheduling groups, the directed weighted graph of the scheduling group comprises a first vertex set, edges between each of the first vertices in the first vertex set and each of the remaining first vertices except the first vertex, and weights;

[0069] For each of the scheduling groups, the first vertex set comprised in the directed weighted graph of the scheduling group comprises a vertex of each CPU of the scheduling group;

[0070] The determining module determines, for each of the scheduling groups, one or more thread groups of the scheduling group according to the directed weighted graph of the scheduling group, and the manner specifically comprises:

[0071] For each of the first vertices of each of the directed weighted graphs, the cache hit times of the CPU corresponding to the first vertex are obtained;

[0072] For each of the directed weighted graphs, all the second vertices of the directed weighted graph are obtained by screening all the vertices of the directed weighted graph according to the cache hit times of the CPUs corresponding to all the first vertices of the directed weighted graph and the preset vertex retention condition;

[0073] For each of the directed weighted graphs, all the target weights of the directed weighted graph are obtained by screening all the weights of the directed weighted graph according to all the second vertices of the directed weighted graph, the cache hit times of the CPUs corresponding to all the second vertices of the directed weighted graph, and the preset weight retention condition;

[0074] For each of the directed weighted graphs, one or more connected subgraphs of the directed weighted graph are established according to all the second vertices of the directed weighted graph and all the target weights of the directed weighted graph;

[0075] For each of the connected subgraphs of each of the directed weighted graphs, the thread group corresponding to the connected subgraph is determined according to the running thread corresponding to the connected subgraph;

[0076] For each of the scheduling groups, one or more thread groups of the scheduling group are determined according to the thread groups corresponding to all the connected subgraphs of the directed weighted graph of the scheduling group.

[0077] As an optional implementation, in the second aspect of the present application, the determining module, for each of the directed weighted graphs, screens all the second vertices of the directed weighted graph from all the first vertices of the directed weighted graph according to the cache hit times of the CPUs corresponding to all the first vertices of the directed weighted graph and the preset vertex retention condition, and the manner specifically comprises:

[0078] For each first vertex of each of the directed weighted graphs, a degree of the first vertex is calculated; the degree of each first vertex comprises an in-degree of the first vertex and an out-degree of the first vertex;

[0079] For each first vertex of each of the directed weighted graphs, a ratio between the degree of the first vertex and a cache hit number of the CPU corresponding to the first vertex is calculated, to obtain a first ratio corresponding to the first vertex;

[0080] For each of the directed weighted graphs, all vertices corresponding to a first ratio greater than a first preset ratio are selected from all first vertices of the directed weighted graph as all second vertices of the directed weighted graph;

[0081] And the determination module, for each of the directed weighted graphs, in a manner comprising:

[0082] For each of the directed weighted graphs, a starting vertex of each weight in the directed weighted graph is determined according to all second vertices of the directed weighted graph;

[0083] For each weight of each of the directed weighted graphs, a ratio between the weight and a cache hit number of the CPU corresponding to the starting vertex of the weight is calculated, to obtain a second ratio corresponding to the weight;

[0084] For each of the directed weighted graphs, all weights corresponding to a second ratio greater than a second preset ratio are selected from all weights of the directed weighted graph as all target weights of the directed weighted graph.

[0085] The third aspect of the present application discloses another CPU scheduling device of a symmetric multiprocessor system, the device comprising:

[0086] a memory storing executable program codes;

[0087] a processor coupled with the memory;

[0088] The processor invokes the executable program codes stored in the memory to execute the CPU scheduling method of the symmetric multiprocessor system disclosed in the first aspect of the present application.

[0089] The fourth aspect of the present application discloses a computer storage medium, the computer storage medium storing computer instructions, the computer instructions being invoked to execute the CPU scheduling method of the symmetric multiprocessor system disclosed in the first aspect of the present application.

[0090] Compared with the prior art, the embodiment of the present application has the following beneficial effects:

[0091] In the embodiment of the present application, whether a cache coherence event occurs in a symmetric multiprocessor system is listened to; the cache coherence event includes an event that at least one CPU of the symmetric multiprocessor system modifies shared data of the symmetric multiprocessor system at least once; when the cache coherence event of the symmetric multiprocessor is listened to, the process number of each CPU in all CPUs is obtained; and the scheduling group corresponding to each process number is determined according to the process number of each CPU; the same scheduling group corresponds to the same process number; one or more thread groups of each scheduling group are determined; each thread group includes a running thread of at least one CPU, and each thread group has a corresponding scheduling CPU, and all running threads in each thread group have a corresponding binding time with the corresponding scheduling CPU; for each thread group, a matching scheduling operation is performed on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group. It can be seen that, by implementing the present application, when the cache coherence event of the symmetric multiprocessor system is listened to, at least one thread group of the scheduling group corresponding to each CPU process number (the same scheduling group corresponds to the same process number) is determined, and by performing a matching scheduling operation on the scheduling CPU of each scheduling group within the corresponding binding time of the scheduling group, the cache coherence running overhead introduced when multiple threads concurrently read and write shared data can be reduced, the running efficiency of the symmetric multiprocessor system can be improved, and thus the CPU performance of the symmetric multiprocessor system is improved. BRIEF DESCRIPTION OF DRAWINGS

[0092] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort.

[0093] Figure 1 is a flowchart of a CPU scheduling method of a symmetric multiprocessor system disclosed by the embodiment of the present application;

[0094] Figure 2 is a flowchart of another CPU scheduling method of a symmetric multiprocessor system disclosed by the embodiment of the present application;

[0095] Figure 3 is a scheduling group diagram of a CPU scheduling method of a symmetric multiprocessor system disclosed by the embodiment of the present application;

[0096] Figure 4 is a directed weighted graph of a CPU scheduling method of a symmetric multiprocessor system disclosed by the embodiment of the present application;

[0097] Figure 5 is a directed weighted graph of another CPU scheduling method of a symmetric multiprocessor system disclosed by the embodiment of the present application;

[0098] Figure 6 is a connected subgraph of a CPU scheduling method of a symmetric multiprocessor system and a thread group graph corresponding to the connected subgraph disclosed by the embodiment of the present application;

[0099] Figure 7 is a connected subgraph of another CPU scheduling method of a symmetric multiprocessor system and a thread group graph corresponding to the connected subgraph disclosed by the embodiment of the present application;

[0100] Figure 8 is a structural schematic diagram of a CPU scheduling device of a symmetric multiprocessor system disclosed by the embodiment of the present application;

[0101] Figure 9 is a structural schematic diagram of another CPU scheduling device of a symmetric multiprocessor system disclosed by the embodiment of the present application;

[0102] Figure 10 is a structural schematic diagram of still another CPU scheduling device of a symmetric multiprocessor system disclosed by the embodiment of the present application. DETAILED DESCRIPTION

[0103] In order to make the personnel in the art better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by the personnel in the art without creative labor fall within the scope of protection of the present application.

[0104] The terms "first", "second", and the like in the specification and claims of the present application and the above-mentioned drawings are used to distinguish different objects, but are not used to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, device, product, or end including a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed or can optionally include other steps or units inherent to the process, method, product, or end.

[0105] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase "in an embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily mutually exclusive of one another. It is expressly understood that any of the embodiments described herein can be combined with any of the other embodiments unless specifically noted otherwise.

[0106] The application discloses a CPU scheduling method and device of a symmetric multiprocessor system, which can determine at least one thread group of a scheduling group corresponding to the process number of each CPU (the same scheduling group corresponding to the same process number) when a cache coherence event of the symmetric multiprocessor system is detected, and perform a matching scheduling operation on the scheduling CPU of the scheduling group within the binding time corresponding to each scheduling group, so as to reduce the cache coherence running overhead introduced when multiple threads perform concurrent read and write on shared data, improve the running efficiency of the symmetric multiprocessor system, and improve the CPU performance of the symmetric multiprocessor system. The following will be described in detail.

[0107] Embodiment one

[0108] Please refer to Figure 1 , Figure 1 is a flowchart of a CPU scheduling method of a symmetric multiprocessor system disclosed by the embodiment of the application. Wherein, Figure 1 The CPU scheduling method of the symmetric multiprocessor system described above can be applied to a CPU scheduling device of the symmetric multiprocessor system, wherein the device can include a scheduling device or a scheduling server, and the scheduling server can include a cloud server or a local server, which is not limited by the embodiment of the application. As shown in Figure 1 The CPU scheduling method of the symmetric multiprocessor system can include the following operations:

[0109] 101, detecting whether a cache coherence event of the symmetric multiprocessor system occurs.

[0110] Wherein, the cache coherence event includes an event that at least one CPU of the symmetric multiprocessor system modifies the shared data of the symmetric multiprocessor system at least once.

[0111] 102, when the cache coherence event of the symmetric multiprocessor is detected, obtaining the process number of each CPU in all CPUs.

[0112] 103, determining the scheduling group corresponding to the corresponding process number according to the process number of each CPU.

[0113] Wherein, the same process number corresponds to the same scheduling group.

[0114] AsFigure 3 As shown, for example, if there are 8 CPUs, CPU0, CPU1, CPU2, CPU3, CPU4, CPU5, CPU6 and CPU7 in a symmetric multiprocessor system, and CPU0, CPU1, CPU2 and CPU3 all correspond to process number PID0, and CPU4, CPU5 and CPU6 all correspond to process number PID1, and CPU7 corresponds to process number PID2, all the CPUs in process number PID0 are divided into a group of scheduling groups, all the CPUs in process number PID1 are divided into another group of scheduling groups, and all the CPUs in process number PID2 are divided into another group of scheduling groups.

[0115] 104. Determine one or more thread groups for each scheduling group.

[0116] Each thread group includes at least one running thread of a CPU, and each thread group has a corresponding scheduling CPU, and all running threads in each thread group have a corresponding binding time with the corresponding scheduling CPU.

[0117] It should be noted that the binding times corresponding to all thread groups can be the same or not, and the embodiments of the present application are not limited.

[0118] 105. For each thread group, perform a matching scheduling operation on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group.

[0119] It can be seen that the CPU scheduling method of the symmetric multiprocessor system described in the embodiments of the present application can determine at least one thread group for each scheduling group according to the process number corresponding to each CPU (the same process number corresponds to the same scheduling group) when a cache coherence event of the symmetric multiprocessor system is detected, and by performing a matching scheduling operation on the scheduling CPU of the scheduling group within the binding time corresponding to the scheduling group, the cache coherence running overhead introduced when multiple threads concurrently read and write shared data can be reduced, the running efficiency of the symmetric multiprocessor system can be improved, and the CPU performance of the symmetric multiprocessor system is improved.

[0120] Embodiment two

[0121] Please refer to Figure 2 , Figure 2 is a flowchart of a CPU scheduling method of a symmetric multiprocessor system according to an embodiment of the present application. In the method, Figure 2 The CPU scheduling method of the symmetric multiprocessor system described in the embodiments of the present application can be applied to a CPU scheduling method device of a symmetric multiprocessor system, wherein the device can include a scheduling device or a scheduling server, wherein the scheduling server can include a cloud server or a local server, and the embodiments of the present application are not limited. As shown in FIG. 8, the CPU scheduling method device of the symmetric multiprocessor system can include a CPU scheduling module 801, a CPU scheduling group determination module 802, a thread group determination module 803, a CPU scheduling operation module 804 and a CPU scheduling group binding time determination module 805.Figure 2 The CPU scheduling method of the symmetric multiprocessor system can include the following operations:

[0122] 201. Listen to whether a cache coherence event occurs in the symmetric multiprocessor system.

[0123] 202. When the cache coherence event is detected in the symmetric multiprocessor, obtain the process number of each CPU in all CPUs.

[0124] 203. Determine the scheduling group corresponding to the process number according to the process number of each CPU.

[0125] 204. Determine one or more thread groups of each scheduling group.

[0126] 205. For each thread group, perform the matching scheduling operation on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group.

[0127] In the embodiment of the present application, for other detailed descriptions of steps 201-205, please refer to the detailed description of steps 101-105 in Embodiment 1, and the embodiment of the present application will not be described again.

[0128] 206. Detect whether all running threads of all target thread groups return to the original scheduling of the symmetric multiprocessor system.

[0129] It should be noted that step 206 is executed after the corresponding scheduling operation in step 205 is executed.

[0130] When the detection result of step 206 is yes, step 207 is triggered; when the detection result of step 206 is no, step 206 can be continued.

[0131] 207. Trigger the operation of listening to whether a cache coherence event occurs in the symmetric multiprocessor system executed in step 201.

[0132] It can be seen that the CPU scheduling method of the symmetric multiprocessor system described in the embodiments of the present application can determine at least one thread group of each scheduling group according to the process number corresponding to each CPU when a cache coherence event of the symmetric multiprocessor system is detected (the same scheduling group corresponds to the same process number), and perform a matching scheduling operation on the scheduling CPU of the scheduling group within the binding time corresponding to the scheduling group, so as to reduce the cache coherence running overhead introduced when multiple threads concurrently read and write shared data, reduce the internal consumption of the symmetric multiprocessor system, and thus improve the CPU performance of the symmetric multiprocessor system. In addition, when it is detected that all running threads of all determined target thread groups return to the original scheduling of the symmetric multiprocessor, the process described in the embodiments of the present application can be restarted, and the cycle accuracy of the symmetric multiprocessor system is improved.

[0133] In an optional embodiment, the step 205 described above, for each thread group, performing a matching scheduling operation on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group, can include:

[0134] performing a matching first scheduling operation on the scheduling CPU corresponding to each thread group according to the total running time of the thread group and the binding time corresponding to the thread group;

[0135] performing a matching second scheduling operation on the scheduling CPU corresponding to each thread group according to the binding time corresponding to the thread group and the preset time threshold corresponding to the thread group.

[0136] It can be seen that the optional embodiment can intelligently analyze the binding time corresponding to each thread group, the total running time of the thread group, and the preset time threshold corresponding to the thread group, obtain an analysis result, and perform a matching scheduling operation on the scheduling CPU corresponding to the thread group according to the analysis result, thereby improving the scheduling intelligence and rationality of each thread group of each scheduling group in the symmetric multiprocessor system.

[0137] In the optional embodiment, as an optional implementation, performing a matching first scheduling operation on the scheduling CPU corresponding to each thread group according to the total running time of the thread group and the binding time corresponding to the thread group can include:

[0138] for each thread group, estimating the running time of each running thread of the thread group, and calculating the sum of the running time of all running threads of the thread group to obtain the total running time of the thread group;

[0139] For each thread group, it is judged whether the total running time of the thread group is less than the corresponding binding time; if it is judged that the total running time of the thread group is less than the corresponding binding time, then all running threads of the thread group are controlled to be scheduled to the scheduling CPU corresponding to the thread group.

[0140] It can be seen that the optional embodiment can control all running threads of the thread group to be scheduled to the scheduling CPU corresponding to the thread group when the total running time of the thread group is less than the corresponding binding time, thereby improving the scheduling accuracy of all running threads of each thread group.

[0141] In the optional embodiment, as an optional implementation, performing the matching second scheduling operation on the scheduling CPU corresponding to each thread group according to the binding time corresponding to the thread group and the preset time threshold corresponding to the thread group can include:

[0142] If it is detected that there is at least one target thread group in which the corresponding residual binding time is reduced to the preset time threshold in all thread groups, then for each target thread group, the unbinding operation is performed on all running threads in the target thread group and the corresponding scheduling CPU, and after the unbinding operation is performed, all running threads of the target thread group are returned to the original scheduling of the symmetric multiprocessor system.

[0143] Optionally, the target thread group can be at least one thread group in which the corresponding residual binding time is reduced to zero (i.e., the preset time threshold is zero) in all thread groups, or at least one thread group in which the corresponding residual binding time is reduced to a set other value in all thread groups, and the embodiment of the present application is not limited.

[0144] It can be seen that the optional embodiment can screen out each target thread group in which the corresponding residual binding time is reduced to the preset time threshold from all thread groups, and perform the corresponding scheduling operation on all running threads in each target thread group and the corresponding scheduling CPU, thereby improving the scheduling accuracy of all running threads of each target thread group.

[0145] In an optional embodiment, the step 204 of determining one or more thread groups of each scheduling group can include:

[0146] For each CPU of each scheduling group, a remote write number set of the CPU is obtained; the remote write number set of the CPU includes a remote write number obtained by performing a remote write operation on the CPU by each remaining CPU in all CPUs except the CPU;

[0147] For each scheduling group, a directed weighted graph of the scheduling group is established according to the remote write number set of each CPU in the scheduling group;

[0148] For each scheduling group, one or more thread groups for that scheduling group are determined based on the directed weighted graph of that scheduling group.

[0149] It should be noted that for each scheduling group, a directed weighted graph is only required if there are at least two CPUs; for a scheduling group with only one CPU, all running threads in the scheduling group are scheduled within the CPU of that scheduling group.

[0150] As can be seen, this optional embodiment can establish a directed weighted graph of the scheduling group based on the number of remote writes of each CPU in each scheduling group, and determine one or more thread groups of the scheduling group based on the directed weighted graph of each scheduling group, thereby improving the accuracy of the determined thread groups.

[0151] In this optional embodiment, as an optional implementation, for each scheduling group, establishing a directed weighted graph of the scheduling group based on the set of remote write counts for each CPU in the scheduling group may include:

[0152] For each CPU in each scheduling group, obtain the physical number of the CPU and determine the physical number of the CPU as the vertex of the CPU;

[0153] For each CPU in each scheduling group, based on the set of remote write counts for that CPU, determine the edges between the vertices of each remaining CPU in the scheduling group and the vertices of that CPU, as well as the weights between the vertices of each remaining CPU and the vertices of that CPU.

[0154] For each CPU in each scheduling group, a directed weighted graph of the scheduling group corresponding to that CPU is constructed based on the vertices of that CPU, the edges between the vertices of each remaining CPU and the vertices of that CPU, and the weights between the vertices of each remaining CPU and the vertices of that CPU.

[0155] For example, for Figure 3 The scheduling groups corresponding to process ID PID0 and process ID PID1 are shown. The physical IDs of all CPUs in each scheduling group are used as vertices of each CPU (e.g., for the scheduling group corresponding to process ID PID0, the physical IDs of all CPUs in that group are CPU0, CPU1, CPU2, and CPU3). The number of remote writes between any two CPUs in that scheduling group is used as the weight of the corresponding edge. A directed weighted graph is then constructed for that scheduling group, as shown below. Figure 4 The diagram shows a directed weighted graph of the scheduling group corresponding to process ID PID0, as follows: Figure 5 The diagram shows a directed weighted graph of the scheduling group corresponding to process ID PID1; for Figure 3The scheduling group corresponding to the process number PID2 shown does not need to have a directed weighted graph drawn because it only has one CPU. The number of remote writes from CPU1 to CPU0 in the scheduling group corresponding to PID0 is the weight of the edge from CPU1 to CPU0, which is denoted as cpu1_rw_cpu0_cnt. The number of remote writes from CPU0 to CPU1 is the weight of the edge from CPU0 to CPU1, which is denoted as cpu0_rw_cpu1_cnt. Similarly, the number of remote writes from CPU2 to CPU0 is the weight of the edge from CPU2 to CPU0, which is denoted as cpu2_rw_cpu0_cnt.

[0156] It can be seen that the optional embodiment can establish a directed weighted graph of each scheduling group according to the vertices of all CPUs in the scheduling group, the edges between each two CPUs in the scheduling group, and the weights, thereby improving the accuracy of the established directed weighted graph.

[0157] In the optional embodiment, as an optional implementation, for each scheduling group, the directed weighted graph of the scheduling group includes a first vertex set, an edge and a weight between each first vertex in the first vertex set and each remaining first vertex except the first vertex;

[0158] For each scheduling group, the first vertex set included in the directed weighted graph of the scheduling group includes a vertex of each CPU in the scheduling group;

[0159] For each scheduling group, determining one or more thread groups of the scheduling group according to the directed weighted graph of the scheduling group can include:

[0160] For each first vertex of each directed weighted graph, obtaining the cache hit number of the CPU corresponding to the first vertex;

[0161] For each directed weighted graph, according to the cache hit numbers of the CPUs corresponding to all first vertices of the directed weighted graph, filtering all vertices that satisfy a preset vertex retention condition from all first vertices of the directed weighted graph to obtain all second vertices of the directed weighted graph;

[0162] For each directed weighted graph, according to all second vertices of the directed weighted graph and the cache hit numbers of the CPUs corresponding to all second vertices in the directed weighted graph, filtering all weights that satisfy a preset weight retention condition from all weights of the directed weighted graph to obtain all target weights of the directed weighted graph;

[0163] For each directed weighted graph, according to all second vertices of the directed weighted graph and all target weights of the directed weighted graph, establishing one or more connected subgraphs of the directed weighted graph;

[0164] For each connected subgraph of each directed weighted graph, determine the thread group corresponding to the connected subgraph according to the running thread of the connected subgraph.

[0165] For each scheduling group, determine one or more thread groups of the scheduling group according to the thread groups corresponding to all connected subgraphs of the directed weighted graph of the scheduling group.

[0166] For example, Figure 6 is all connected subgraphs in the directed weighted graph corresponding to the directed weighted graph of Figure 4 , wherein the connected subgraph composed of CPU0 and CPU1 corresponds to the same thread group TGID0, the connected subgraph composed of CPU2 and CPU3 corresponds to the same thread group TGID1, and the connected subgraph composed of CPU4 and CPU5 corresponds to the same thread group TGID2, wherein each thread group contains the running thread of the CPU corresponding to each vertex in the connected subgraph corresponding to the thread group. For example, TGID0 contains all running threads including the running thread of CPU0 (such as Figure 6 cpu0_cur_tid) and the running thread of CPU1 (such as Figure 6 cup1_cur_tid).

[0167] It should be noted that if the running thread of a CPU is already a member of a thread group, the running thread of each remaining CPU in the connected subgraph to which the CPU belongs is added to the thread group, and the remaining binding time of the thread group is reinitialized to the initial value of the binding time corresponding to the thread group. As shown in Figure 7 , if the running thread tid0 of CPU0 is already a member of the thread group TGIDx, the running thread tid1 of CPU1 (CPU1 is all remaining CPUs of the connected subgraph to which CPU0 belongs) is added to the thread group TGIDx.

[0168] It can be seen that the optional embodiment can filter all second vertices from all first vertices of the directed weighted graph of each scheduling group and filter all target weights from all weights, and determine at least one connected subgraph of the directed weighted graph according to all second vertices and all target weights of the directed weighted graph, thereby improving the accuracy of determining the connected subgraph, and determining at least one thread group of the scheduling group according to the running thread corresponding to the accurate connected subgraph, thereby improving the accuracy of the determined thread group.

[0169] In the optional embodiment, optionally, for each directed weighted graph, all the second vertices of the directed weighted graph are selected from all the first vertices of the directed weighted graph according to the cache hit times of the CPUs corresponding to all the first vertices of the directed weighted graph, and the all the second vertices of the directed weighted graph are obtained, which can include:

[0170] For each first vertex of each directed weighted graph, the degree of the first vertex is calculated; the degree of each first vertex includes the in-degree of the first vertex and the out-degree of the first vertex;

[0171] For each first vertex of each directed weighted graph, the ratio between the degree of the first vertex and the cache hit time of the CPU corresponding to the first vertex is calculated to obtain the first ratio corresponding to the first vertex;

[0172] For each directed weighted graph, all the vertices corresponding to the first ratio greater than the first preset ratio are selected from all the first vertices of the directed weighted graph as all the second vertices of the directed weighted graph.

[0173] It should be noted that for each directed weighted graph, the in-degree of each first vertex includes the sum of the weights of all edges with the first vertex as the terminal vertex (for example, the in-degree of the first vertex corresponding to CPU0 in Table 1 is the sum of cpu1_rw_cpu0_cnt, cpu2_rw_cup0_cnt and cpu3_rw_cpu0_cnt), the out-degree of each first vertex includes the sum of the weights of all edges with the first vertex as the starting vertex (for example, the out-degree of the first vertex corresponding to CPU0 in Table 1 is the sum of cpu0_rw_cpu1_cnt, cpu0_rw_cpu2_cnt and cpu0_rw_cpu3_cnt), and the degree of each first vertex includes the sum of the in-degree of the first vertex and the out-degree of the first vertex. Figure 4 Figure 4

[0174] Optionally, the first preset ratio can be ten percent, thirty percent, or other values set. Optionally, for each directed weighted graph, the first ratio of each first vertex of the directed weighted graph can be the ratio obtained by dividing the degree of the first vertex by the cache hit time of the CPU corresponding to the first vertex, or the ratio obtained by dividing the in-degree of the first vertex by the cache hit time of the CPU corresponding to the first vertex, or the ratio obtained by dividing the out-degree of the first vertex by the cache hit time of the CPU corresponding to the first vertex, which is not limited by the embodiments of the present application.

[0175] ​​For example, for each directed weighted graph, when the first ratio of each first vertex of the directed weighted graph is the ratio of the degree of the first vertex to the cache hit count of the CPU corresponding to the first vertex, the calculation formula of the first ratio corresponding to the degree of each first vertex can be as follows:

[0176] W i = degree of CPUi / cpui_cache_hit_cnt

[0177] wherein, W i is the first ratio corresponding to the degree of CPUi, and cpui_cache_hit_cnt is the cache hit count of CPUi.

[0178] For each directed weighted graph, when the first ratio of each first vertex of the directed weighted graph is the ratio of the out-degree of the first vertex to the cache hit count of the CPU corresponding to the first vertex, the calculation formula of the first ratio corresponding to the out-degree of each first vertex can be as follows:

[0179] W i ' = out-degree of CPUi / cpui_cache_hit_cnt

[0180] wherein, W i ' is the first ratio corresponding to the out-degree of CPUi, and cpui_cache_hit_cnt is the cache hit count of CPUi.

[0181] It can be seen that the optional implementation can further calculate the ratio between the degree of each first vertex of each directed weighted graph and the cache hit count of the CPU corresponding to the first vertex, obtain the first ratio of the first vertex, and select all second vertices corresponding to the first ratio greater than the first preset ratio from all first vertices of each directed weighted graph, thereby improving the accuracy of the selected second vertices and the accuracy of the determined thread group.

[0182] In the optional implementation, optionally, for each directed weighted graph, all weights satisfying the preset weight retention condition can be selected from all weights of the directed weighted graph according to all second vertices of the directed weighted graph and the cache hit counts of the CPUs corresponding to all second vertices in the directed weighted graph, to obtain all target weights of the directed weighted graph, which can include:

[0183] For each directed weighted graph, the starting vertex of each weight in the directed weighted graph is determined according to all second vertices of the directed weighted graph;

[0184] For each weight of each directed weighted graph, a ratio between the weight and a cache hit number of a CPU corresponding to a starting vertex of the weight is calculated to obtain a second ratio corresponding to the weight;

[0185] For each directed weighted graph, all weights with a second ratio greater than a second preset ratio are filtered from all weights of the directed weighted graph as all target weights of the directed weighted graph.

[0186] Optionally, the second preset ratio can be ten percent, thirty percent or other values set by the user, and the embodiments of the present application are not limited thereto.

[0187] For example, for the weight cpui_rw_cpuj_cnt, the starting vertex of the weight is CPUi, and the calculation formula of the second ratio corresponding to the weight is as follows:

[0188] Y i = cpui_rw_cpuj_cnt / CPUi_cache_hit_cnt

[0189] wherein Y i is the second ratio corresponding to CPUi, and cpui_cache_hit_cht is the cache hit number of the starting vertex CPUi corresponding to the weight cpui_rw_cpuj_cnt.

[0190] It can be seen that the optional embodiment can further calculate the ratio between each weight of each directed weighted graph and the cache hit number of the CPU corresponding to the starting vertex of the weight to obtain the second ratio corresponding to the weight, and filter all target weights with the second ratio greater than the second preset ratio from all weights of each directed weighted graph, thereby improving the accuracy of the filtered target weights and the accuracy of the determined thread group.

[0191] Embodiment three

[0192] Please refer to Figure 8 , Figure 8 is a structural schematic diagram of a CPU scheduling device of a symmetric multiprocessor system disclosed by the embodiments of the present application. Wherein, Figure 8 The CPU scheduling device of the symmetric multiprocessor system described can include a scheduling device or a scheduling server, wherein the scheduling server can include a cloud server or a local server, and the embodiments of the present application are not limited thereto. As Figure 8 indicated, the CPU scheduling device of the symmetric multiprocessor system can include:

[0193] The listening module 301 is configured to listen to whether a cache coherence event occurs in the symmetric multiprocessor system.

[0194] wherein the cache coherence event comprises an event of at least one CPU of the symmetric multiprocessor system modifying shared data of the symmetric multiprocessor system at least once.

[0195] The obtaining module 302 is configured to obtain a process number of each CPU in all CPUs when a cache coherence event of the symmetric multiprocessor is detected.

[0196] The determining module 303 is configured to determine a scheduling group corresponding to the process number of each CPU according to the process number of each CPU.

[0197] wherein the same process number corresponds to the same scheduling group.

[0198] The determining module 303 is further configured to determine one or more thread groups of each scheduling group.

[0199] wherein each thread group comprises running threads of at least one CPU, and each thread group has a corresponding scheduling CPU, and all running threads in each thread group have a corresponding binding time with the corresponding scheduling CPU.

[0200] The scheduling module 304 is configured to, for each thread group, perform a matching scheduling operation on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group.

[0201] It can be seen that the CPU scheduling device of the symmetric multiprocessor system described in the embodiments of the present application can, when a cache coherence event of the symmetric multiprocessor system is detected, determine at least one thread group of a scheduling group corresponding to each CPU according to the process number of each CPU (the same process number corresponds to the same scheduling group), and perform a matching scheduling operation on the scheduling CPU of the scheduling group within the binding time corresponding to the scheduling group, so as to reduce the cache coherence running overhead introduced when multiple threads concurrently read and write shared data, reduce the internal consumption of the symmetric multiprocessor system, and thus improve the CPU performance of the symmetric multiprocessor system.

[0202] In an optional embodiment, the scheduling module 304, for each thread group, performs a matching scheduling operation on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group in the following manner:

[0203] performing a matching first scheduling operation on the scheduling CPU corresponding to the thread group according to the total running time of each thread group and the binding time corresponding to the thread group;

[0204] performing a matching second scheduling operation on the scheduling CPU corresponding to the thread group according to the binding time corresponding to each thread group and a preset time threshold corresponding to the thread group.

[0205] It can be seen that the optional embodiment can intelligently analyze the binding time corresponding to each thread group, the total running time of the thread group, and the preset time threshold corresponding to the thread group, obtain an analysis result, and perform a matching scheduling operation on the scheduling CPU corresponding to the thread group according to the analysis result, thereby improving the scheduling intelligence and rationality of each thread group of each scheduling group in the symmetric multi-processor system.

[0206] In the optional embodiment, as an optional implementation, the manner in which the scheduling module 304 performs a matching first scheduling operation on the scheduling CPU corresponding to each thread group according to the determined total running time of each thread group and the binding time corresponding to the thread group can specifically include:

[0207] For each thread group, estimate the running time of each running thread of the thread group, and calculate the sum of the running time of all running threads of the thread group to obtain the total running time of the thread group;

[0208] For each thread group, determine whether the total running time of the thread group is less than the corresponding binding time; if it is determined that the total running time of the thread group is less than the corresponding binding time, control all running threads of the thread group to be scheduled to the scheduling CPU corresponding to the thread group.

[0209] It can be seen that the optional implementation can control all running threads of the thread group to be scheduled to the scheduling CPU corresponding to the thread group when the total running time of the thread group is less than the corresponding binding time, thereby improving the scheduling accuracy of all running threads of each thread group.

[0210] In the optional embodiment, as an optional implementation, the manner in which the scheduling module 304 performs a matching second scheduling operation on the scheduling CPU corresponding to each thread group according to the binding time corresponding to the thread group and the preset time threshold corresponding to the thread group can specifically include:

[0211] If it is detected that there is at least one target thread group in which the corresponding remaining binding time is reduced to the preset time threshold among all thread groups, for each target thread group, perform an unbinding operation on all running threads in the target thread group and the corresponding scheduling CPU, and after performing the unbinding operation, return all running threads of the target thread group to the original scheduling of the symmetric multi-processor system.

[0212] It can be seen that the optional implementation can screen out each target thread group in which the corresponding remaining binding time is reduced to the preset time threshold from all thread groups, perform a corresponding scheduling operation on all running threads in each target thread group and the corresponding scheduling CPU, and improve the scheduling accuracy of all running threads of each target thread group.

[0213] In the optional embodiment, as an optional implementation, as shown in Figure 9 The apparatus can further include:

[0214] The detection module 305 is configured to detect whether all running threads of all target thread groups return to the original scheduling of the symmetric multi-processor system after the scheduling module 304 performs the unbinding operation on all target thread groups, and trigger the listening module 301 to perform the operation of listening whether the cache coherence event occurs in the symmetric multi-processor system when the detection result is yes.

[0215] It can be seen that the optional implementation can restart the process described in the embodiments of the application when it is detected that all running threads of all determined target thread groups return to the original scheduling of the symmetric multi-processor, thereby improving the cycle accuracy of the symmetric multi-processor system.

[0216] In an optional embodiment, the manner in which the determination module 303 determines one or more thread groups of each scheduling group can specifically include:

[0217] For each CPU of each scheduling group, a remote write number set of the CPU is obtained; the remote write number set of the CPU includes remote write numbers obtained by each remaining CPU of all CPUs performing remote write operations on the CPU;

[0218] For each scheduling group, a directed weighted graph of the scheduling group is established according to the remote write number set of each CPU in the scheduling group;

[0219] For each scheduling group, one or more thread groups of the scheduling group are determined according to the directed weighted graph of the scheduling group.

[0220] It can be seen that the optional embodiment can establish the directed weighted graph of each scheduling group according to the obtained remote write number of each CPU in the scheduling group, and determine one or more thread groups of each scheduling group according to the directed weighted graph of each scheduling group, thereby improving the accuracy of the determined thread groups.

[0221] In the optional embodiment, as an optional implementation, the manner in which the determination module 303 establishes the directed weighted graph of each scheduling group according to the remote write number set of each CPU in the scheduling group can specifically include:

[0222] For each CPU of each scheduling group, the physical number of the CPU is obtained, and the physical number of the CPU is determined as the vertex of the CPU;

[0223] For each CPU of each scheduling group, according to the remote write number set of the CPU, an edge between the vertex of each remaining CPU in the scheduling group and the vertex of the CPU and a weight between the vertex of each remaining CPU and the vertex of the CPU are determined;

[0224] For each CPU of each scheduling group, according to the vertex of the CPU, the edge between the vertex of each remaining CPU and the vertex of the CPU and the weight between the vertex of each remaining CPU and the vertex of the CPU, a directed weighted graph of the scheduling group corresponding to the CPU is established.

[0225] It can be seen that the optional embodiment can establish a directed weighted graph of each scheduling group according to the vertex of each CPU of the scheduling group, the edge between each two CPUs in the scheduling group and the weight, and the accuracy of the established directed weighted graph is improved.

[0226] In the optional embodiment, as an optional implementation, the determining module 303, for each scheduling group, the directed weighted graph of the scheduling group includes a first vertex set, an edge and a weight between each first vertex in the first vertex set and each remaining first vertex except the first vertex;

[0227] For each scheduling group, the first vertex set included in the directed weighted graph of the scheduling group includes the vertex of each CPU of the scheduling group;

[0228] For each scheduling group, the way of determining one or more thread groups of the scheduling group according to the directed weighted graph of the scheduling group can specifically include:

[0229] For each first vertex of each directed weighted graph, the cache hit number of the CPU corresponding to the first vertex is obtained;

[0230] For each directed weighted graph, according to the cache hit number of the CPU corresponding to each first vertex of the directed weighted graph, all vertices satisfying a preset vertex retention condition are filtered out from all first vertices of the directed weighted graph, to obtain all second vertices of the directed weighted graph;

[0231] For each directed weighted graph, according to all second vertices of the directed weighted graph and the cache hit number of the CPU corresponding to each second vertex in the directed weighted graph, all weights satisfying a preset weight retention condition are filtered out from all weights of the directed weighted graph, to obtain all target weights of the directed weighted graph;

[0232] For each directed weighted graph, according to all second vertices of the directed weighted graph and all target weights of the directed weighted graph, one or more connected subgraphs of the directed weighted graph are established;

[0233] For each connected subgraph of each directed weighted graph, determine a thread group corresponding to the connected subgraph according to a running thread corresponding to the connected subgraph.

[0234] For each scheduling group, determine one or more thread groups of the scheduling group according to thread groups corresponding to all connected subgraphs of the directed weighted graph of the scheduling group.

[0235] It can be seen that the optional implementation can filter all second vertices and all target weights from all first vertices of the directed weighted graph of each scheduling group, and determine at least one connected subgraph of the directed weighted graph according to all second vertices and all target weights of the directed weighted graph, thereby improving the accuracy of determining the connected subgraph, and determining at least one thread group of the scheduling group according to a running thread corresponding to the accurate connected subgraph, thereby improving the accuracy of the determined thread group.

[0236] In the optional implementation, optionally, the manner in which the determining module 303 filters all second vertices from all first vertices of each directed weighted graph according to cache hit times of CPUs corresponding to the all first vertices of the directed weighted graph to obtain all second vertices of the directed weighted graph can include the following steps.

[0237] For each first vertex of each directed weighted graph, calculate a degree of the first vertex; the degree of each first vertex includes an in-degree of the first vertex and an out-degree of the first vertex.

[0238] For each first vertex of each directed weighted graph, calculate a ratio between the degree of the first vertex and the cache hit time of the CPU corresponding to the first vertex to obtain a first ratio corresponding to the first vertex.

[0239] For each directed weighted graph, filter all vertices corresponding to a first ratio greater than a first preset ratio from all first vertices of the directed weighted graph as all second vertices of the directed weighted graph.

[0240] It can be seen that the optional implementation can further calculate a ratio between the degree of each first vertex of each directed weighted graph and the cache hit time of the CPU corresponding to the first vertex to obtain a first ratio of the first vertex, and filter all second vertices corresponding to a first ratio greater than a first preset ratio from all first vertices of each directed weighted graph, thereby improving the accuracy of the filtered second vertices, and thereby improving the accuracy of the determined thread group.

[0241] In the optional embodiment, optionally, the determining module 303 can determine, for each directed weighted graph, the starting vertex of each weight in the directed weighted graph according to all the second vertices of the directed weighted graph.

[0242] For each directed weighted graph, the starting vertex of each weight in the directed weighted graph is determined according to all the second vertices of the directed weighted graph.

[0243] For each weight of each directed weighted graph, a second ratio corresponding to the weight is obtained by calculating the ratio between the weight and the cache hit number of the CPU corresponding to the starting vertex of the weight.

[0244] For each directed weighted graph, all the weights corresponding to the second ratio greater than the second preset ratio are selected from all the weights of the directed weighted graph as all the target weights of the directed weighted graph.

[0245] It can be seen that the optional embodiment can further calculate the second ratio corresponding to each weight of each directed weighted graph by calculating the ratio between the weight and the cache hit number of the CPU corresponding to the starting vertex of the weight, and select all the target weights corresponding to the second ratio greater than the second preset ratio from all the weights of each directed weighted graph, thereby improving the accuracy of the selected target weights and the accuracy of the determined thread group.

[0246] Embodiment Four

[0247] Please refer to Figure 10 , Figure 10 is another structure diagram of the CPU scheduling device of the symmetric multiprocessor system disclosed by the embodiment of the present application. As shown in Figure 10 , the CPU scheduling device of the symmetric multiprocessor system can include:

[0248] a memory 401 storing executable program codes;

[0249] a processor 402 coupled with the memory 401;

[0250] The processor 402 invokes the executable program codes stored in the memory 401 to execute the steps of the CPU scheduling method of the symmetric multiprocessor system described in the embodiment one or the embodiment two of the present application.

[0251] Embodiment Five

[0252] The embodiment of the present application discloses a computer storage medium, which stores computer instructions, and the computer instructions are used to execute the steps of the CPU scheduling method of the symmetric multiprocessor system described in the embodiment one or the embodiment two when being invoked.

[0253] Embodiment six

[0254] The embodiment of the present application discloses a computer program product, which comprises a non-transitory computer readable storage medium storing a computer program, and the computer program is operable to make a computer execute the steps of the CPU scheduling method of the symmetric multiprocessor system described in the embodiment one or the embodiment two.

[0255] The above-described apparatus embodiments are only illustrative, wherein the modules described as separate components can or can not be physically separated, and the components displayed as modules can or can not be physical modules, that is, can be located in one place, or can be distributed on multiple network modules. Part or all of the modules can be selected to achieve the purpose of the embodiment scheme according to actual needs. Those skilled in the art can understand and implement it without creative labor.

[0256] Through the specific description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be realized by means of software and necessary general hardware platform, and of course can also be realized by hardware. Based on such understanding, the above technical solutions can be embodied in the form of software products, and the computer software product can be stored in a computer readable storage medium, and the storage medium includes a read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a programmable read-only memory (Programmable Read-only Memory, PROM), an erasable programmable read-only memory (Erasable Programmable Read Only Memory, EEPROM), a one-time programmable read-only memory (One-time Programmable Read-Only Memory, OTPROM), an electrically erasable programmable read-only memory (Electrically-Erasable Programmable Read-Only Memory, EEPROM), a compact disc read-only memory (Compact Disc Read-Only Memory, CD-ROM) or other optical disk storage, a magnetic disk storage, a magnetic tape storage, or any other computer readable medium capable of carrying or storing data.

[0257] Finally, it should be noted that the CPU scheduling method and device of the symmetric multiprocessor system disclosed in the embodiments of the present application are only the preferred embodiments of the present application, and are used to illustrate the technical solutions of the present application, but not to limit them. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced by equivalents, and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A CPU scheduling method for a symmetric multiprocessor system, characterized by, The method comprises: listening to whether a cache coherence event occurs in a symmetric multiprocessor system; the cache coherence event comprises an event that at least one CPU of the symmetric multiprocessor system modifies shared data of the symmetric multiprocessor system at least once; when the cache coherence event of the symmetric multiprocessor is listened to, obtaining a process number of each of all the CPUs; and determining a scheduling group corresponding to the process number according to the process number of each of the CPUs; the same scheduling group corresponds to the same process number; determining one or more thread groups of each of the scheduling groups; each of the thread groups comprises a running thread of at least one CPU, and each of the thread groups has a corresponding scheduling CPU, and all running threads in each of the thread groups have a corresponding binding time with the corresponding scheduling CPU; for each of the thread groups, performing a matching scheduling operation on the scheduling CPU corresponding to the thread group according to the binding time corresponding to the thread group; wherein the determination of one or more thread groups of each of the scheduling groups comprises: for each of the CPUs of each of the scheduling groups, obtaining a remote write number set of the CPU; the remote write number set of the CPU comprises a remote write number obtained by each of the remaining CPUs except the CPU performing a remote write operation on the CPU; for each of the scheduling groups, establishing a directed weighted graph of the scheduling group according to the remote write number set of each of the CPUs in the scheduling group; for each of the scheduling groups, determining one or more thread groups of the scheduling group according to the directed weighted graph of the scheduling group; and the establishment of the directed weighted graph of each of the scheduling groups according to the remote write number set of each of the CPUs in the scheduling group comprises: for each of the CPUs of each of the scheduling groups, obtaining a physical number of the CPU and determining the physical number of the CPU as a vertex of the CPU; for each of the CPUs of each of the scheduling groups, determining an edge between a vertex of each of the remaining CPUs except the CPU in the scheduling group and a vertex of the CPU and a weight between the vertex of each of the remaining CPUs and the vertex of the CPU according to the remote write number set of the CPU; for each of the CPUs of each of the scheduling groups, establishing a directed weighted graph of the scheduling group corresponding to the CPU according to the vertex of the CPU, the edge between the vertex of each of the remaining CPUs and the vertex of the CPU, and the weight between the vertex of each of the remaining CPUs and the vertex of the CPU.

2. The CPU scheduling method of a symmetric multiprocessor system according to claim 1, wherein, the performing of a matching scheduling operation on the scheduling CPU corresponding to each of the thread groups according to the binding time corresponding to the thread group comprises: performing a matching first scheduling operation on the scheduling CPU corresponding to each of the thread groups according to the total running time of the determined thread group and the binding time corresponding to the thread group; performing a matching second scheduling operation on the scheduling CPU corresponding to each of the thread groups according to the binding time corresponding to the thread group and a preset time threshold value corresponding to the thread group.

3. The CPU scheduling method of a symmetric multiprocessor system according to claim 2, wherein, The step of performing a matching first scheduling operation on the scheduling CPU corresponding to each thread group based on the determined total running time of each thread group and the binding time corresponding to that thread group includes: For each thread group, estimate the running time of each running thread in the thread group, and calculate the sum of the running times of all running threads in the thread group to obtain the total running time of the thread group; For each thread group, determine whether the total running time of the thread group is less than the corresponding binding time; if it is determined that the total running time of the thread group is less than the corresponding binding time, then control all running threads of the thread group to be scheduled to the scheduling CPU corresponding to the thread group. The step of performing a matching second scheduling operation on the scheduling CPU corresponding to each thread group based on the binding time and the preset time threshold corresponding to that thread group includes: If it is detected that there is at least one target thread group among all the thread groups whose remaining binding time has been reduced to a preset time threshold, then for each target thread group, an unbinding operation is performed on all running threads in the target thread group and the corresponding scheduling CPU, and after the unbinding operation is performed, all running threads in the target thread group are returned to the original scheduling of the symmetric multiprocessor system. Furthermore, the method further includes: After the unbinding operation is completed for all target thread groups, it is checked whether all running threads of all target thread groups have returned to the original scheduling of the symmetric multiprocessor system. When the detection result is yes, the operation of listening for cache consistency events in the symmetric multiprocessor system is triggered.

4. The CPU scheduling method of a symmetric multiprocessor system according to any one of claims 1 to 3, characterized by, For each of the scheduling groups, the directed weighted graph of the scheduling group includes a first set of vertices, an edge between each first vertex in the first set and each of the remaining first vertices except for that first vertex, and a weight; For each of the scheduling groups, the first set of vertices in the directed weighted graph of the scheduling group includes the vertices of each CPU in the scheduling group; For each scheduling group, one or more thread groups for that scheduling group are determined based on the directed weighted graph of that scheduling group, including: For each first vertex in each of the directed weighted graphs, obtain the number of cache hits of the CPU corresponding to that first vertex; For each directed weighted graph, based on the number of CPU cache hits corresponding to all first vertices of the directed weighted graph, all vertices that satisfy the preset vertex retention conditions are selected from all first vertices of the directed weighted graph to obtain all second vertices of the directed weighted graph. For each directed weighted graph, based on all the second vertices of the directed weighted graph and the number of cache hits of the CPU corresponding to all the second vertices of the directed weighted graph, all weights that meet the preset weight retention conditions are selected from all the weights of the directed weighted graph to obtain all the target weights of the directed weighted graph. For each of the directed weighted graphs, one or more connected subgraphs of the directed weighted graph are constructed based on all the second vertices of the directed weighted graph and all the target weights of the directed weighted graph. For each of the connected subgraphs of each of the directed weighted graphs, determine a thread group corresponding to the connected subgraph according to a running thread corresponding to the connected subgraph; For each of the scheduling groups, determine one or more thread groups of the scheduling group according to thread groups corresponding to all connected subgraphs of the directed weighted graph of the scheduling group.

5. The CPU scheduling method of a symmetric multiprocessor system according to claim 4, wherein, The filtering, for each of the directed weighted graphs, all vertices from all first vertices of the directed weighted graph that satisfy a preset vertex reservation condition according to cache hit times of CPUs corresponding to all first vertices of the directed weighted graph, to obtain all second vertices of the directed weighted graph, includes: For each of the first vertices of each of the directed weighted graphs, calculate a degree of the first vertex; the degree of each of the first vertices includes an in-degree of the first vertex and an out-degree of the first vertex; For each of the first vertices of each of the directed weighted graphs, calculate a ratio between the degree of the first vertex and a cache hit time of a CPU corresponding to the first vertex, to obtain a first ratio corresponding to the first vertex; For each of the directed weighted graphs, filter all vertices from all first vertices of the directed weighted graph that have a first ratio greater than a first preset ratio, as all second vertices of the directed weighted graph; And the filtering, for each of the directed weighted graphs, all weights from all weights of the directed weighted graph that satisfy a preset weight reservation condition according to all second vertices of the directed weighted graph and cache hit times of CPUs corresponding to all second vertices of the directed weighted graph, to obtain all target weights of the directed weighted graph, includes: For each of the directed weighted graphs, determine a starting vertex of each of the weights in the directed weighted graph according to all second vertices of the directed weighted graph; For each of the weights of each of the directed weighted graphs, calculate a ratio between the weight and a cache hit time of a CPU corresponding to the starting vertex of the weight, to obtain a second ratio corresponding to the weight; For each of the directed weighted graphs, filter all weights from all weights of the directed weighted graph that have a second ratio greater than a second preset ratio, as all target weights of the directed weighted graph.

6. A CPU scheduling apparatus for a symmetric multiprocessor system, characterized by comprising: The device is used to perform the CPU scheduling method of the symmetric multiprocessor system according to any one of claims 1-5; and the device includes: A listening module is configured to listen to whether a cache coherence event occurs in the symmetric multiprocessor system; the cache coherence event includes an event that at least one CPU of the symmetric multiprocessor system modifies shared data of the symmetric multiprocessor system at least once; A obtaining module is configured to obtain a process number of each of the CPUs when the cache coherence event of the symmetric multiprocessor is listened to; A determining module is configured to determine a scheduling group corresponding to a corresponding process number according to the process number of each of the CPUs; the same process number corresponds to the same scheduling group. The determining module is further configured to determine one or more thread groups for each of the scheduling groups; each of the thread groups includes running threads of at least one CPU, and each of the thread groups has a corresponding scheduling CPU, and all running threads in each of the thread groups have a corresponding binding time with the corresponding scheduling CPU; The scheduling module is configured to, for each of the thread groups, perform a matching scheduling operation on the corresponding scheduling CPU of the thread group according to the corresponding binding time of the thread group.

7. A CPU scheduling apparatus for a symmetric multiprocessor system, characterized by comprising: The apparatus comprises: a memory storing executable program codes; a processor coupled with the memory; the processor invokes the executable program codes stored in the memory to perform the CPU scheduling method of the symmetric multiprocessor system according to any one of claims 1-5.

8. A computer storable medium, characterized by The computer storage medium stores computer instructions, which are invoked to perform the CPU scheduling method of the symmetric multiprocessor system according to any one of claims 1-5.

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