A stable amplitude control system for high-Q MEMS resonators

Abstract

This invention discloses a stable amplitude control system for a high-Q MEMS resonator. This system is a digital closed-loop drive system based on a field programmable gate array (FPGA) as the control platform and DDS-PLL technology as the control scheme. The system uses a digital phase-locked loop (DPS) algorithm for frequency synthesis to track the gyroscope's vibration resonant frequency and phase. This structure utilizes the DDS algorithm to provide a high-resolution frequency signal, ensuring sufficiently small frequency steps. The PLL's bandpass characteristics also effectively suppress some spurious signals in the DDS output spectrum, achieving the complementary advantages of DDS and PLL. This improves the dynamic performance of the high-Q MEMS resonator control system, optimizes the stability accuracy of the MEMS gyroscope's amplitude and frequency, and further enhances the MEMS gyroscope's zero-bias output and anti-interference capabilities.

Description

Technical Field

[0001] The invention belongs to the technical field of error signal processing, in particular to a stable amplitude control system of a high-Q value MEMS resonator. Background Art

[0002] With the development of micromachining technology, MEMS silicon micromechanical gyroscopes have been widely used in industrial automation, inertial navigation, automotive electronics and other fields. Compared with fiber optic gyroscopes and laser gyroscopes, MEMS silicon micromechanical gyroscopes have the advantages of small size, high reliability, low cost, and mass production. However, due to processing errors and the susceptibility of weak signals to interference, the accuracy of MEMS silicon micromechanical gyroscopes is still at a low level. Therefore, how to improve the accuracy of MEMS gyroscopes is currently a major research direction. MEMS gyroscopes work based on the Coriolis force principle. According to the Coriolis force formula, the driving vibration amplitude and frequency directly affect the scale factor and zero bias performance of the MEMS gyroscope. Maintaining the stability of the gyroscope drive mode is a key prerequisite for achieving high-precision gyroscopes.

[0003] At present, the driving circuits of silicon micromechanical gyroscopes all adopt closed-loop driving methods. Among them, the solutions based on AGC technology to achieve driving amplitude stabilization and based on PLL technology to achieve frequency control are relatively mature. However, since the existing MEMS gyroscopes all use vacuum packaging technology, the Q value of the MEMS gyroscope is greatly improved and the mechanical thermal noise of the gyroscope is reduced. Among them, the resonance peak of the high-Q MEMS resonator driving mode with a quality factor between 10000-1000000 is very high and the bandwidth of the waveform is very narrow. Therefore, a slight frequency drift will cause a large change in the output amplitude, which increases the difficulty of controlling the amplitude and frequency of the driving mode. The original control scheme can no longer meet the control accuracy requirements, resulting in a decrease in the stability of the system for the driving mode control. Therefore, it is necessary to further improve the control accuracy of the system to meet the requirements of the gyroscope driving mode stability. When the gyro drive force increases sufficiently, the MEMS gyroscope's drive capacitance exhibits nonlinear responses to changes in the drive displacement. This leads to coupling between the phase angle and gain conditions of the AGC loop, degrading the system's control performance. Conventional PLL loops use a CORDIC algorithm for frequency control. Because this algorithm is a numerical linear approximation algorithm, its control accuracy is limited by the number of iterations, resulting in low frequency resolution. Furthermore, PLL technology suffers from long frequency conversion times and poor phase noise when the output step size is small. Therefore, it is necessary to provide a new method for stable amplitude control of high-Q MEMS resonators. Summary of the Invention

[0004] The present invention aims to provide a method for controlling the stable amplitude of a high-Q MEMS resonator, addressing the problem of insufficient control accuracy of existing closed-loop drive control loops for MEMS gyroscopes. Building on existing MEMS gyroscope drive closed-loop systems, the present invention utilizes DDS-PLL hybrid frequency synthesis technology to achieve higher frequency resolution, enabling high-precision control of the gyroscope's drive mode, thereby improving the gyroscope's overall stability and anti-interference capabilities.

[0005] The technical solution to achieve the purpose of the present invention is: a stable amplitude control system for a high-Q MEMS resonator, the system including an AGC loop and a digital phase-locked loop;

[0006] The AGC circuit is used to control the driving amplitude;

[0007] The digital phase-locked loop is used to control the resonant frequency;

[0008] The AGC loop includes a first multiplication and demodulation unit, a first low-pass filtering unit, and a first PI control unit connected in sequence; the digital signal corresponding to the MEMS resonator driving mode is amplitude demodulated by the first multiplication and demodulation unit, and the demodulated output signal is passed through the first low-pass filtering unit to obtain amplitude information of the MEMS resonator during operation. The amplitude is compared with a reference value set by the system to obtain an amplitude deviation signal. The first PI control unit outputs an amplitude control amount, which is the amplitude gain of the system at this time, based on the amplitude deviation signal, to form an AC driving force that is fed back to the driving electrode to achieve amplitude closed-loop control;

[0009] The digital phase-locked loop includes a second multiplication demodulation unit, a second low-pass filtering unit, a second PI control unit, a direct digital synthesis DDS algorithm frequency synthesis unit and a voltage-controlled oscillator DCO unit connected in sequence, wherein the second multiplication demodulation unit and the second low-pass filtering unit constitute a phase detector; the digital signal corresponding to the MEMS resonator driving mode obtains a phase deviation signal through the second multiplication demodulation unit and the second low-pass filtering unit, and then generates a frequency control signal Δω through the second PI control unit and outputs it to the direct digital synthesis DDS algorithm frequency synthesis unit; the frequency control signal Δω0 output by the direct digital synthesis DDS algorithm frequency synthesis unit is used as the input signal of the voltage-controlled oscillator DCO unit, and the voltage-controlled oscillator DCO unit generates a sine and cosine signal with a frequency of the resonant frequency, and then the phase error signal obtained through the voltage-controlled oscillator DCO unit is converted into the phase error signal. The feedback is sent to the output of the phase detector to form a closed-loop control. The final output frequency signal and the amplitude control amount of the AGC loop generate a driving feedback force to achieve driving amplitude stabilization of the MEMS gyroscope.

[0010] Furthermore, the direct digital synthesis DDS algorithm frequency synthesis unit includes an FPGA frequency control word conversion unit, a phase accumulator, a waveform memory ROM, a digital low-pass filter and a system clock; the FPGA frequency control word conversion unit converts the frequency control signal Δω output by the second PI control unit into a corresponding frequency control word M, where the conversion coefficient is K f Driven by the system clock, the phase accumulator linearly accumulates the frequency control word M and N Modulo operation is performed, and the sum obtained is used as the phase value, where N is the word length of the phase accumulator; the binary phase addressing code output by the phase accumulator is sent to the waveform memory ROM for addressing, so that it outputs the corresponding discrete amplitude sequence, and then the discrete amplitude sequence waveform is smoothed by a digital low-pass filter to obtain the required frequency waveform.

[0011] Furthermore, the frequency resolution output by the frequency synthesis unit of the direct digital synthesis (DDS) algorithm depends on the number of bits N of the phase accumulator. The larger N is, the higher the frequency resolution is.

[0012] Furthermore, the minimum frequency resolution Δf output by the direct digital synthesis (DDS) algorithm frequency synthesis unit is min The number of bits N of the phase accumulator satisfies:

[0013]

[0014] Among them, f c Represents the system clock frequency, P represents the phase-locked loop division ratio, and R represents the reference division ratio.

[0015] Furthermore, the phase accumulator averages every 2 N / M clock cycles overflow once, and the value of M in the system at this time can be used to obtain the frequency value Δf0 output by the direct digital synthesis DDS algorithm frequency synthesis unit. The relationship between them satisfies:

[0016]

[0017] Furthermore, the first low-pass filtering unit and the second low-pass filtering unit adopt FIR digital low-pass filters designed by Kaiser window function design method.

[0018] Furthermore, the parameters of the FIR digital low-pass filter include: the center frequency is set to 500 kHz, the passband frequency is set to 500 Hz, the stopband frequency is set to 14 kHz, the stopband attenuation is greater than 50 dB, and the final order is 109; the total length D of the Kaiser window function satisfies:

[0019]

[0020] Among them, A s represents the stopband attenuation, and Δf represents the normalized transition bandwidth.

[0021] Furthermore, the phase noise L of the digital phase-locked loop output frequency signal o Satisfies the following formula:

[0022] L o =L DDS +20logP'

[0023] Where, L DDS It represents the phase noise output by the frequency synthesis unit of the direct digital synthesis (DDS) algorithm, and P' represents the frequency multiplication times.

[0024] Compared with the prior art, the present invention has the following significant advantages:

[0025] Based on existing control methods, on the one hand, the voltage resolution of the original digital phase-locked loop frequency control signal is improved by generating a frequency control signal through a DDS circuit, so that the amplitude and frequency of the gyroscope drive mode can achieve higher control accuracy, thereby improving the overall stability and anti-interference capability of the gyroscope. On the other hand, compared with the original PLL technology, the DDS-PLL hybrid technology combines the advantages of both technologies, with high precision, low phase noise, good spurious noise suppression, broadband and good spectrum quality. It improves the dynamic and steady-state characteristics of the high-Q MEMS resonator amplitude stabilization system. Specifically:

[0026] (1) The digital phase-locked loop adopts direct digital frequency synthesis technology DDS to generate the frequency control signal. The DDS circuit provides a high-precision voltage signal input for the voltage-controlled oscillator of the phase-locked loop. The DDS circuit has the advantages of small output step size and low phase noise, but more spurious noise. When the output step size of PLL is small, the phase noise is poor, but the spurious noise suppression effect is good. The scheme of using DDS and PLL hybrid technology to achieve frequency synthesis combines the advantages of the two technologies, so that the system design meets the requirements of broadband and fast frequency conversion speed, is suitable for the control of high-Q value MEMS resonators, and achieves better control effect.

[0027] (2) The frequency resolution of the output of the DDS algorithm frequency synthesis unit adopted in the present invention depends on the number of bits N of the phase accumulator. When N is large enough, the resolution accuracy that is difficult to achieve with traditional methods can be obtained, and can reach the micro-Hz level at the highest.

[0028] (3) The low-pass filtering unit adopts an independently designed FIR digital low-pass filter, which is easy to achieve linear phase and is suitable for processing signals with high phase requirements. The present invention selects the Kaiser window function design method, which achieves good high-frequency suppression effect through parameter estimation and optimization processing without attenuating low-frequency components, and has good filtering characteristics.

[0029] (4) The amplitude gain A formed by the frequency signal output by the DDS excitation PLL and the AGC loop in the feedback channel of the closed-loop control system x As a feedback AC driving signal, the gyroscope driving mode obtains a higher-precision resonant frequency signal, thereby improving the amplitude stability and frequency stability of the high-Q value MEMS resonator driving mode.

[0030] The present invention is further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 FIG. 4 is a schematic diagram of a closed-loop drive control principle of a MEMS gyroscope in one embodiment.

[0032] Figure 2 FIG. 4 is a schematic diagram of a DDS system used in one embodiment.

[0033] Figure 3 FIG. 4 is a simulation diagram of a DDS system used in an embodiment.

[0034] Figure 4 1 is a DDS system simulation waveform diagram used in an embodiment, wherein Figure (a) is a waveform diagram of the DDS system synthesizing the required frequency, and Figure (b) is a schematic diagram of the power spectrum density of the synthesized waveform.

[0035] Figure 5 This is a simulation diagram of a digital phase-locked loop system in one embodiment.

[0036] Figure 6 This is a simulation diagram of signals before and after the FIR digital low-pass filter in one embodiment.

[0037] Figure 7 FIG. 4 is a schematic diagram of a DDS-PLL technology principle in one embodiment.

[0038] Figure 8 FIG. 4 is a frequency characteristic diagram of a MEMS gyroscope closed-loop drive system in one embodiment.

[0039] Figure 9 FIG. 4 is a phase trajectory diagram of a MEMS gyroscope closed-loop drive system in one embodiment. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0041] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0042] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features specified as "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that ordinary technicians in this field can implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0043] In one embodiment, combined Figure 1 , provides a stable amplitude control method for high-Q MEMS resonators, which is a digital dual closed-loop drive control system based on AGC technology and DDS-PLL frequency synthesis technology. The MEMS gyroscope drive mode is converted into a voltage signal V reflecting the size of the displacement x by the displacement voltage conversion circuit. The analog signal is converted into a digital signal by the ADC chip, and then the sin(ωt) and cos(ωt) signals are input respectively and the amplitude and phase demodulated by the multiplier are performed. After the demodulated output signal passes through the FIR digital low-pass filter, the amplitude information and phase difference information of the MEMS resonator when it is working are obtained. The vibration amplitude is compared with the reference value A set by the system to obtain a deviation signal. The PI controller outputs an amplitude control quantity according to the deviation signal, which is the amplitude gain A of the system at this time. x , forming an AC driving force that is fed back to the driving electrode to achieve amplitude closed-loop control. The phase deviation signal is obtained through demodulation and digital filtering, and the frequency control signal Δω is generated through PI control. The FPGA is used to control the DDS algorithm to output a frequency control signal Δω0 with higher precision as the input signal of the voltage-controlled oscillator (DCO). The voltage-controlled oscillator (DCO) circuit then generates a cosine signal cos(ω) with a frequency equal to the resonant frequency. d t), the phase error obtained The frequency signal of the final output and the amplitude gain A formed by the AGC loop are fed back to the output of the phase detector through the P frequency division to form a closed loop control loop. x As the feedback AC driving signal, it passes through DAC and voltage-electrostatic force conversion coefficient K vf The conversion is used to realize the driving amplitude stabilization of the MEMS gyroscope.

[0044] Since the MEMS gyroscope has the characteristics of miniaturization, the output signal during operation is very weak and easily interfered by parasitic effects and the coupling between the driving electrode and the sensitive electrode. In addition, the resonator with a high Q value has the characteristics of high sensitivity and small mechanical bandwidth. Therefore, the control system needs to meet the characteristics of high control accuracy and good dynamic characteristics. The present invention adopts DDS-PLL hybrid technology to improve the frequency resolution of the output signal. In addition to improving the control accuracy of the system, it also has the advantages of fast frequency conversion speed, low phase noise and frequency drift, easy integration and function expansion of the fully digital structure, broadband and good spectrum quality. The implementation principle of the DDS technology used is as follows: Figure 2 As shown in the figure, it includes six parts: frequency control word conversion unit, frequency word register, phase accumulator, sine lookup table ROM, digital low-pass filter and system clock, where M is the frequency control word, N is the word length of the phase accumulator, and m is the number of ROM address lines. The frequency control signal Δω output by the PI controller is converted into the corresponding frequency control word M by the FPGA control unit, where the conversion coefficient is K f . At 100MHz system clock f c Driven by the phase accumulator, the frequency control word M is linearly accumulated, and the 2 N The modulo operation is performed, and the sum is used as the phase value. The sine function table ROM is queried in the form of binary code to convert the phase information into the corresponding digital quantized sine amplitude value. The digital low-pass filter is then used to smooth the waveform to obtain the required frequency waveform. Finally, the frequency value processed by the DDS algorithm is used as the input control signal of the voltage-controlled oscillator. The phase accumulator averages every 2 N / M clock cycles overflow once, so the frequency control word M and clock frequency f c It reflects the frequency value of the DDS output signal. By reading the value of M in the system at this time, the output frequency value Δf0 can be obtained. The relationship between them satisfies:

[0045]

[0046] The minimum frequency resolution of the DDS is related to the word length of the phase accumulator. By selecting an appropriate word length N, a very high frequency resolution can be achieved, up to micro-Hz level. Figure 3 As shown, it can be seen that the spectrum quality of the output signal is very high and the spurious components are very small.

[0047] The module that realizes the frequency control function of the system of the present invention is the digital phase-locked loop link, which controls the frequency of the output signal by detecting the phase difference of the signal, and keeps the input signal and the output signal with the same frequency and phase information. The main modules of the digital PLL include three parts: phase detector, PI controller and voltage-controlled oscillator (DCO). The phase detector consists of a multiplier and a FIR digital low-pass filter. The specific simulation model is as follows: Figure 4 shown.

[0048] Among them, the low-pass filter module adopts the independently designed FIR digital low-pass filter, which is easy to achieve linear phase and suitable for processing signals with high phase requirements. This solution uses the Kaiser window function design method, which achieves good high-frequency suppression effect without attenuating low-frequency components through parameter estimation and optimization processing. Figure 5 It can be seen that the waveform amplitude after low-pass filtering satisfies the relationship of twice the waveform amplitude before filtering and the output curve is smooth, so the filter has good filtering characteristics.

[0049] The DDS-PLL hybrid technology used in this invention increases the frequency resolution of the control system, improves the dynamic and steady-state characteristics of the system, has a good control effect on the vibration amplitude of the high-Q MEMS resonator, and improves the amplitude and frequency stability of the drive detection output signal. Figure 6 This is the principle diagram of high-precision frequency control based on DDS-PLL hybrid technology. The driving modal displacement signal is Among them A x (t) is the vibration amplitude, ω0 is the initial frequency of DCO, Δω is the frequency modulation amount output by the PI controller, Is the phase shift of the driving mode. The phase difference signal is obtained by multiplying the driving displacement signal with the cos(ω0+Δω)t signal for phase demodulation and digital low-pass filtering. for By setting the reference value of the PI controller to 0 to adjust the size of Δω, and then using FPGA to control the DDS algorithm to synthesize a higher precision frequency control signal Δω0 as the input signal of the DCO circuit, the phase error signal obtained by the voltage controlled oscillator Feedback to the phase detector output, if the phase or frequency of the input signal changes, through the feedback control of the voltage controlled oscillator module, the output signal of the loop, that is, the voltage controlled oscillator frequency and phase, will track the changes of the input signal. With the input control voltage v c (t) Satisfy:

[0050]

[0051] Where D0 represents the voltage-controlled sensitivity of the voltage-controlled oscillator.

[0052] In order to further illustrate that the amplitude control system of the present invention has good dynamic and steady-state characteristics, the frequency characteristic analysis and phase trajectory diagram analysis of the drive closed-loop system are carried out, as shown in FIG. Figure 7 and Figure 8 As shown in the figure, the frequency point where the amplitude-frequency response reaches -3dB is 145Hz. Therefore, the bandwidth of the closed-loop system is 145Hz, which meets the bandwidth requirements of the high-Q MEMS resonator and makes the system more robust. Figure 8 It can be seen that the system's root loci are all located on the left half of the imaginary axis, with two poles pointing from the pole to infinity and one from the pole to the zero. Changing the loop gain does not affect the system's stability. When the loop gain is small, the effect of poles far from the imaginary axis on the system is negligible, and the system's characteristics are determined by the conjugate poles near the imaginary axis. When the loop gain is large, the poles near the imaginary axis will cancel each other out, and the system's characteristics are determined by the conjugate poles far from the imaginary axis. Clearly, the larger the loop gain, the more stable the loop.

[0053] The system proposed in the present invention utilizes a digital phase-locked loop (PLL) based on a DDS algorithm for frequency synthesis to track the gyroscope's vibration resonant frequency and phase. This structure can utilize the DDS algorithm to provide a high-resolution frequency signal to ensure a sufficiently small frequency step. At the same time, the bandpass characteristic of the PLL can effectively suppress some spurious signals in the DDS output spectrum, thereby realizing the complementary advantages of DDS and PLL, improving the dynamic performance of the high-Q MEMS resonator control system, optimizing the stability accuracy of the MEMS gyroscope's amplitude and frequency, and thereby improving the zero-bias output and anti-interference capabilities of the MEMS gyroscope.

[0054] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are only illustrative of the principles of the present invention. Without departing from the spirit and scope of the present invention, any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention shall be included in the scope of protection of the present invention.

Claims

1. A stable amplitude control system for a high-Q MEMS resonator, characterized in that: The system includes an AGC loop and a digital phase-locked loop; The AGC circuit is used to control the driving amplitude; The digital phase-locked loop is used to control the resonant frequency; The AGC loop includes a first multiplication and demodulation unit, a first low-pass filtering unit, and a first PI control unit connected in sequence; the digital signal corresponding to the MEMS resonator driving mode is amplitude demodulated by the first multiplication and demodulation unit, and the demodulated output signal is passed through the first low-pass filtering unit to obtain amplitude information of the MEMS resonator during operation. The amplitude is compared with a reference value set by the system to obtain an amplitude deviation signal. The first PI control unit outputs an amplitude control amount, which is the amplitude gain of the system at this time, based on the amplitude deviation signal, to form an AC driving force that is fed back to the driving electrode to achieve amplitude closed-loop control; The digital phase-locked loop includes a second multiplication demodulation unit, a second low-pass filtering unit, a second PI control unit, a direct digital synthesis DDS algorithm frequency synthesis unit and a voltage-controlled oscillator DCO unit connected in sequence, wherein the second multiplication demodulation unit and the second low-pass filtering unit constitute a phase detector; the digital signal corresponding to the MEMS resonator driving mode obtains a phase deviation signal through the second multiplication demodulation unit and the second low-pass filtering unit, and then generates a frequency control signal Δω through the second PI control unit and outputs it to the direct digital synthesis DDS algorithm frequency synthesis unit; the frequency control signal Δω0 output by the direct digital synthesis DDS algorithm frequency synthesis unit is used as the input signal of the voltage-controlled oscillator DCO unit, and the voltage-controlled oscillator DCO unit generates a sine and cosine signal with a frequency of the resonant frequency, and then the phase error signal obtained through the voltage-controlled oscillator DCO unit is converted into the phase error signal. The feedback is sent to the output of the phase detector to form a closed-loop control. The final output frequency signal and the amplitude control amount of the AGC loop generate a driving feedback force to achieve driving amplitude stabilization of the MEMS gyroscope.

2. The stable amplitude control system of the high-Q MEMS resonator according to claim 1, characterized in that: The direct digital synthesis (DDS) algorithm frequency synthesis unit includes an FPGA frequency control word conversion unit, a phase accumulator, a waveform memory ROM, a digital low-pass filter, and a system clock; the FPGA frequency control word conversion unit converts the frequency control signal Δω output by the second PI control unit into a corresponding frequency control word M, where the conversion coefficient is K f Driven by the system clock, the phase accumulator linearly accumulates the frequency control word M and N Modulo operation is performed, and the sum obtained is used as the phase value, where N is the word length of the phase accumulator; the binary phase addressing code output by the phase accumulator is sent to the waveform memory ROM for addressing, so that it outputs the corresponding discrete amplitude sequence, and then the discrete amplitude sequence waveform is smoothed by a digital low-pass filter to obtain the required frequency waveform.

3. The stable amplitude control system of the high-Q MEMS resonator according to claim 2, characterized in that: The frequency resolution output by the frequency synthesis unit of the direct digital synthesis (DDS) algorithm depends on the number of bits N of the phase accumulator. The larger N is, the higher the frequency resolution is.

4. The stable amplitude control system of the high-Q MEMS resonator according to claim 3, characterized in that: The minimum frequency resolution Δf output by the frequency synthesis unit of the direct digital synthesis DDS algorithm min The number of bits N of the phase accumulator satisfies: Among them, f c Represents the system clock frequency, P represents the phase-locked loop division ratio, and R represents the reference division ratio.

5. The stable amplitude control system of the high-Q MEMS resonator according to claim 2, characterized in that: The phase accumulator averages every 2 N / M clock cycles overflow once, and the value of M in the system at this time can be used to obtain the frequency value Δf0 output by the direct digital synthesis DDS algorithm frequency synthesis unit. The relationship between them satisfies:

6. The stable amplitude control system of the high-Q MEMS resonator according to claim 1, characterized in that: The first low-pass filtering unit and the second low-pass filtering unit adopt FIR digital low-pass filters designed by the Kaiser window function design method.

7. The stable amplitude control system of the high-Q MEMS resonator according to claim 6, characterized in that: The parameters of the FIR digital low-pass filter include: the center frequency is set to 500 kHz, the passband frequency is set to 500 Hz, the stopband frequency is set to 14 kHz, the stopband attenuation is greater than 50 dB, and the final order is 109; the total length D of the Kaiser window function satisfies: Among them, A s represents the stopband attenuation, and Δf represents the normalized transition bandwidth.

8. The stable amplitude control system of a high-Q MEMS resonator according to claim 1, characterized in that: The phase noise L of the digital phase-locked loop output frequency signal o Satisfies the following formula: L o =L DDS +20logP' Where, L DDS It represents the phase noise output by the frequency synthesis unit of the direct digital synthesis (DDS) algorithm, and P' represents the frequency multiplication times.

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