A method for quantitatively characterizing wafer surface stress and a standard method for detecting wafer surface stress

Abstract

The application discloses a method for quantitatively characterizing wafer surface layer stress and a standard method for detecting wafer surface layer stress, and belongs to the technical field of wafer stress detection. The method comprises the following steps: (1) performing resistivity testing on a wafer, and obtaining the Young's modulus of the wafer according to the measured resistivity value and a fitting function; (2) testing the strain of the surface layer of the wafer, and calculating the surface layer stress of the wafer according to the strain and the Young's modulus. The method predicts the Young's modulus of different regions of the wafer through the resistivity value of the wafer and the fitting function, saves the detection time compared with directly testing the Young's modulus of the whole wafer, can quickly and accurately predict the Young's modulus distribution of the wafer, and quantitatively characterizes the surface layer stress distribution of the whole wafer by utilizing the relationship among stress, Young's modulus and strain, and can be popularized for the standardized detection of wafer surface layer stress.

Description

Technical Field

[0001] This application relates to a method for quantitatively characterizing surface stress of a wafer and a standard method for detecting surface stress of a wafer, belonging to the field of wafer stress detection technology. Background Technology

[0002] Silicon carbide (SiC) possesses excellent electrical and physical properties and has attracted considerable attention as a substrate material for high-temperature, high-frequency, and high-efficiency power devices. However, to date, most commercially available SiC wafers still exhibit a certain number of crystal defects, such as micropipes, subgrain boundaries, and dislocations, preventing the full realization of the SiC material's potential. Furthermore, surface defects are introduced during wafer fabrication. These defects, along with intrinsic crystal defects, lead to residual stress on the wafer surface, causing deformation and failure, severely impacting material quality and lifespan. Therefore, studying the residual stress state on the surface of SiC wafers is crucial.

[0003] Currently, there are several methods for testing the surface stress of silicon carbide wafers. Micro-Raman spectroscopy calculates stress values ​​based on a biaxial stress model and phonon strain energy. However, due to the long wavelength of Raman spectra, the calculated stress value represents the bulk stress of the wafer and cannot accurately analyze the surface stress. Neutron scattering is suitable for thicker samples, such as ingots of a certain thickness, but testing wafer stress requires a small-angle neutron scattering instrument, which is currently uncommon in industrial production. Optical interferometry has relatively low accuracy and is not suitable for scenarios requiring precise stress resolution. Although comparing theoretically calculated and simulated cell parameters with actual measured cell parameters can yield stress values, theoretical calculations cannot accurately simulate non-uniform doping and complex surface defect states, resulting in low accuracy of the detection results. Summary of the Invention

[0004] To address the aforementioned issues, a method for quantitatively characterizing wafer surface stress and a standard method for detecting wafer surface stress are provided. This method predicts the Young's modulus of different regions of the entire wafer using the resistivity value and a fitting function. Compared to directly testing the Young's modulus of the entire wafer, this method saves testing time and can quickly and accurately predict the Young's modulus distribution of the wafer. Furthermore, by utilizing the relationship between stress, Young's modulus, and strain, the surface stress distribution of the entire wafer can be obtained. This method can be widely applied to the standardized detection of wafer surface stress.

[0005] According to one aspect of this application, a method for quantitatively characterizing surface stress of a wafer is provided, comprising the following steps:

[0006] (1) Perform resistivity testing on the wafer, and obtain the Young's modulus of the wafer based on the measured resistivity value and the fitting function;

[0007] (2) Test the strain of the wafer surface layer, and calculate the surface stress of the wafer based on the strain and Young's modulus.

[0008] Directly testing the Young's modulus of the entire wafer takes a long time, while testing the resistivity of the wafer only takes 2-3 minutes. This method uses a constructed fitting function to predict the Young's modulus of different regions of the entire wafer by detecting the resistivity of the wafer, which greatly shortens the detection time and saves detection costs. It is suitable for industrial mass testing of the surface stress of wafers. The surface stress refers to the absolute stress of the wafer, that is, the residual stress contained in the wafer compared to the stress-free wafer.

[0009] Optionally, in step (1), the Young's modulus and resistivity at several test points on the test wafer are measured, and the Young's modulus and resistivity at each test point are fitted to obtain the fitting function.

[0010] Optionally, the Young's modulus of the wafer can be tested using the nanoindentation continuous stiffness method, with the indentation depth being 0-1000 nm. Since the load force is different at different indentation depths, the Young's modulus at the test point can be calculated accordingly.

[0011] Preferably, there are no fewer than 10 test points.

[0012] Optionally, the fitting function is y = a*x + b*x 2 +c, where the value of a ranges from 100 to 300, the value of b ranges from -100 to 100, and the value of c ranges from -2000 to 2000.

[0013] By mapping the resistivity value and Young's modulus of the same test point on the wafer one-to-one, an accurate functional relationship can be fitted. Then, the Young's modulus of any point on the wafer can be obtained through resistivity. This fitting function is obtained by fitting the Young's modulus and resistivity of a limited number of test points, rather than fitting the Young's modulus and resistivity of the entire wafer area. The above fitting method can reduce the number of tests in the fitting process and save fitting time. Even with a limited number of test points, it can still improve the reliability of the fitting function. The above fitting function improves the detection accuracy and provides a basis for the quantitative characterization of surface stress on the wafer.

[0014] Optionally, the surface stress includes in-plane stress and interlayer stress, and the calculation formulas for the in-plane stress and interlayer stress are as follows:

[0015] F a =G*△a,F c =G*△c,

[0016] Where F a Let F be the in-plane stress, Δa be the in-plane strain, and F be the in-plane strain. cLet be the in-plane stress, Δc be the interlaminar strain, and G be the Young's modulus.

[0017] Optionally, the in-plane strain and interlayer strain are obtained by XRD testing. The XRD test uses the Omega-Rel scanning mode. Based on Bragg's formula and the lattice calculation formula for the hexagonal crystal system, the lattice parameters a and c of the wafer are obtained. Based on the standard lattice parameters a1 and c1 of silicon carbide crystals, the in-plane strain and interlayer strain are calculated according to the following formula:

[0018] ,

[0019] Where △a is the in-plane strain and △c is the interlayer strain.

[0020] Optionally, the formula for calculating the lattice of a hexagonal crystal system is:

[0021] ,

[0022] Where d is the interplanar spacing, and h, k, and l are all crystal plane indices.

[0023] This application can calculate in-plane strain and interlayer strain based on the changes in lattice parameters of the wafer within and between layers. Furthermore, by combining this with the Young's modulus at the test point, the in-plane stress and interlayer stress at that test point can be obtained. This method subdivides the stress at the test point according to direction, enabling quantitative characterization of the stress distribution in different directions on the wafer surface. This provides more accurate surface stress data for the wafer, which can be fed back into the wafer manufacturing and processing process to optimize wafer production and processing.

[0024] Optionally, the test crystal planes for the XRD test are the (004) plane and the (105) plane.

[0025] Optionally, the half-width at half-maximum (WHM) of the (004) and (105) planes is less than 40 arcsec.

[0026] When XRD tests were performed on the two crystal planes mentioned above, the measured diffraction peaks were strong and the peak widths were relatively reasonable, making it easier to scan the signal. The obtained parameters a and c were also more accurate, improving the detection accuracy. Moreover, when testing the (105) and (004) crystal planes at the same test point, the lifting angle was small when the sample was lifted by the device, and the change in coordinate points was negligible. Furthermore, the full width at half maximum (FWHM) was less than 40 arcsec in the overall detection. When other diffraction crystal planes were used, the detection accuracy would decrease if the FWHM was greater than 40 arcsec, thereby reducing the precision of this method.

[0027] Optionally, the symmetric scattering method is used to test the (004) surface, and the oblique symmetric scattering method is used to test the (105) surface.

[0028] Optionally, the wafer is a silicon carbide wafer, which includes semi-insulating and doped types.

[0029] Optionally, the diameter of the wafer is 6 inches or more;

[0030] The vertical depth of the surface layer is 3-60 μm.

[0031] For both semi-insulating and doped silicon carbide, the Young's modulus of the wafer varies at different locations. Since doped silicon carbide may have non-uniform doping, the variation in Young's modulus of doped silicon carbide is greater, making detection more difficult. The method in this application can quantitatively characterize the surface stress of large-size doped silicon carbide wafers through fitting functions, and the detection accuracy is higher than other detection methods.

[0032] According to another aspect of this application, a standard method for detecting surface stress on a wafer is provided, comprising the following steps:

[0033] Step 1: Select several detection points on the wafer, perform Young's modulus tests on the detection points, and perform resistivity tests on the entire wafer. Fit the resistivity and Young's modulus at the detection points to obtain the fitting function.

[0034] Step 2: Based on the resistivity of the entire wafer and the fitting function, obtain the magnitude and distribution of Young's modulus on the entire wafer;

[0035] Step 3: Perform XRD testing on the surface of the wafer to obtain the strain of the wafer surface. Calculate the surface stress of the wafer based on the strain and the Young's modulus obtained in Step 2.

[0036] In this standard method for detecting surface stress of a wafer, the interlayer strain and in-plane strain calculated from the fitting function and the lattice parameters after XRD testing of the wafer are the same as those in the method for quantitatively characterizing surface stress of a wafer. Operators can calculate the in-plane stress and interlayer stress of the wafer according to the above standard method steps and procedures for detecting surface stress of a wafer.

[0037] The beneficial effects of this application include, but are not limited to:

[0038] 1. According to the method for quantitatively characterizing the surface stress of a wafer in this application, the Young's modulus value at any location on the wafer can be obtained by using the resistivity distribution and fitting function of the wafer. Compared with testing the Young's modulus of the entire wafer, this greatly shortens the detection time and saves detection costs.

[0039] 2. According to the method for quantitatively characterizing the surface stress of a wafer in this application, the wafer is tested using X-ray diffraction, and a special diffraction crystal plane is selected to obtain accurate strain values. Based on the Young's modulus and strain values ​​at any position, the overall surface stress distribution of the wafer is quantitatively calculated, thereby improving the test accuracy.

[0040] 3. According to the method for quantitatively characterizing the surface stress of a wafer in this application, an accurate fitting function is obtained by fitting the resistivity value and Young's modulus at the same location on the wafer. Then, the Young's modulus at any point on the wafer can be obtained through resistivity, which provides a basis for the quantitative characterization of the surface stress of the wafer.

[0041] 4. According to the method for quantitatively characterizing the surface stress of a wafer in this application, XRD diffraction is performed on the (004) and (105) planes of the wafer to obtain the interlayer strain and in-plane strain of the wafer at different test points. This method can quantitatively characterize the stress distribution at the test point in different directions and obtain more accurate surface stress data of the wafer.

[0042] 5. The method for quantitatively characterizing the surface stress of a wafer according to this application can test the stress distribution of a large-size doped silicon carbide wafer and feed the stress distribution back to the wafer production and processing process, thereby optimizing the wafer production and processing.

[0043] 6. The method for quantitatively characterizing wafer surface stress according to this application saves testing costs, shortens testing time, and can obtain accurate wafer surface stress data, and is applicable to surface stress testing of silicon carbide wafers of different sizes and thicknesses. Attached Figure Description

[0044] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0045] Figure 1 This is a diagram showing the Young's modulus test process and distribution of a 6-inch doped silicon carbide wafer involved in Embodiment 1 of this application.

[0046] Figure 2 This is a resistivity distribution diagram of the wafer involved in Embodiment 1 of this application;

[0047] Figure 3 This is a fitting graph of the Young's modulus and resistivity of the wafer involved in Embodiment 1 of this application.

[0048] Figure 4 The XRD test patterns of the wafer involved in Embodiment 1 of this application on the (004) and (105) planes are shown.

[0049] Figure 5 This is a diagram showing the XRD test points and coordinate transformation of the wafer involved in Embodiment 1 of this application. Detailed Implementation

[0050] The present application is described in detail below with reference to the embodiments, but the present application is not limited to these embodiments.

[0051] Unless otherwise specified, all raw materials used in the embodiments of this application were purchased through commercial channels.

[0052] Example 1

[0053] This embodiment relates to a method for quantitatively characterizing the surface stress of a wafer, including the following steps:

[0054] (1) Obtaining the fitting function and calculating Young's modulus

[0055] The first step involves selecting 2-3 test points at the center, and around the center (top, bottom, left, and right) of the ground 6-inch doped silicon carbide wafer to measure Young's modulus. The method used for measuring Young's modulus is the nanoindentation continuous stiffness method, with an indentation depth of 0-1000 nm. The testing process is as follows: Figure 1 As shown in (a), the Young's modulus distribution of the final wafer is shown in [reference]. Figure 1 (b);

[0056] The second step is to test the resistivity of the entire wafer, and obtain the resistivity distribution map of the wafer (see figure). Figure 2 By fitting the Young's modulus and resistivity at each test point, a fitting function is obtained, such as... Figure 3 As shown;

[0057] The third step is to obtain the magnitude and distribution of the Young's modulus of the entire wafer based on the resistivity distribution and fitting function of the entire wafer.

[0058] (2) Test the surface strain of the wafer and calculate the surface stress of the wafer.

[0059] The first step was to use XRD to test the 2θ angle at different points on the wafer. The mode used was Omega-Rel scanning mode. The crystal planes tested were the (004) plane and the (105) plane. The (004) plane was tested using the symmetric scattering method. The test results are shown in [Figure number missing]. Figure 4 (b) and (105) surfaces were tested using the oblique symmetric scattering method. The results are shown in […]. Figure 4 (a);

[0060] The second step involves obtaining the lattice parameters a and c of the wafer based on Bragg's formula and the lattice calculation formula for the hexagonal crystal system. Then, using the standard lattice parameters a1 and c1 of the wafer, the in-plane strain and interlayer strain are calculated according to the following formula:

[0061] ,

[0062] Where △a is the in-plane strain and △c is the interlayer strain;

[0063] The formula for calculating the lattice structure of a hexagonal crystal system is:

[0064] ,

[0065] Where d is the interplanar spacing, and h, k, and l are all crystal plane indices;

[0066] Bragg's formula is: 2dsinθ=nλ, where d is the interplanar spacing, θ is the diffraction half-angle, n is the diffraction order, and λ is the incident wavelength.

[0067] Third, based on the in-plane strain, interlayer strain, and Young's modulus mentioned above, the in-plane stress and interlayer stress of the surface layer of a 6-inch doped silicon carbide wafer are calculated using the following formula:

[0068] F a =G*△a,F c =G*△c,

[0069] Where F a Let F be the in-plane stress, Δa be the in-plane strain, and F be the in-plane strain. c Let be the in-plane stress, Δc be the interlaminar strain, and G be the Young's modulus, according to... Figure 5 The XRD beam scanning path was converted into coordinates with the wafer center as the origin, and the test data of in-plane stress and interlayer stress of the wafer under different coordinates were obtained. The results are shown in Table 1.

[0070] Table 1

[0071]

[0072]

[0073] Example 2

[0074] This embodiment quantitatively characterizes the polished 8-inch semi-insulating silicon carbide wafer, following the same steps as in Example 1, to obtain the in-plane stress and interlayer stress of the surface layer of the 8-inch semi-insulating silicon carbide wafer. The test data are shown in Table 2.

[0075] Table 2

[0076]

[0077]

[0078]

[0079] Reliability verification

[0080] The Young's modulus of the silicon carbide wafers tested by the methods of Examples 1 and 2 were measured. Based on the comparison between the actual measured Young's modulus and the predicted Young's modulus of Examples 1 and 2, the prediction error of Young's modulus was calculated using the following formula: E = [(G-G0) / G0]*100%, where G0 is the Young's modulus at the test point actually measured by the nanoindentation continuous stiffness method, and G is the Young's modulus calculated based on resistivity and fitting function. In Example 1, the error at different test points is in the range of 0.4-0.6%, and in Example 2, the error at different test points is in the range of 0.3-0.5%.

[0081] The above description is merely an embodiment of this application, and the scope of protection of this application is not limited to these specific embodiments, but is determined by the claims of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the technical concept and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for quantitatively characterizing surface stress of a wafer, characterized in that, Includes the following steps: (1) Test the Young's modulus and resistivity at several test points on the wafer, fit the Young's modulus and resistivity at each test point to obtain the fitting function, perform resistivity test on the wafer, and obtain the Young's modulus of the wafer based on the measured resistivity value and the fitting function. (2) Test the strain of the wafer surface layer, and calculate the surface stress of the wafer based on the strain and Young's modulus; The surface stress includes in-plane stress and interlayer stress, and the calculation formulas for the in-plane stress and interlayer stress are as follows: F a =G*△a,F c =G*△c, Where F a Let F be the in-plane stress, Δa be the in-plane strain, and F be the in-plane strain. c Let be the in-plane stress, Δc be the interlaminar strain, and G be the Young's modulus. The in-plane strain and interlayer strain were obtained by XRD testing. The XRD test used the Omega-Rel scanning mode. Based on Bragg's formula and the lattice calculation formula for the hexagonal crystal system, the lattice parameters a and c of the wafer were obtained. Based on the standard lattice parameters a1 and c1 of silicon carbide crystals, the in-plane strain and interlayer strain were calculated according to the following formula: ， Where △a is the in-plane strain and △c is the interlayer strain; The formula for calculating the lattice structure of a hexagonal crystal system is: ， Where d is the interplanar spacing, and h, k, and l are all crystal plane indices.

2. The method according to claim 1, characterized in that, The fitting function is y = a*x + b*x 2 +c, where the value of a ranges from 100 to 300, the value of b ranges from -100 to 100, and the value of c ranges from -2000 to 2000.

3. The method according to claim 1, characterized in that, The test crystal planes for the XRD test are the (004) plane and the (105) plane.

4. The method according to claim 3, characterized in that, The half-width at half-maximum (WHM) of the (004) and (105) planes is less than 40 arcsec.

5. The method according to any one of claims 1-4, characterized in that, The wafer is a silicon carbide wafer, which includes semi-insulating and doped types.

6. A standard method for detecting surface stress on a wafer, characterized in that, Includes the following steps: Step 1: Select several detection points on the wafer, perform Young's modulus tests on the detection points, and perform resistivity tests on the entire wafer. Fit the resistivity and Young's modulus at the detection points to obtain the fitting function. Step 2: Based on the resistivity of the entire wafer and the fitting function, obtain the magnitude and distribution of Young's modulus on the entire wafer; Step 3: Perform XRD testing on the surface of the wafer. Based on Bragg's formula and the lattice calculation formula for the hexagonal crystal system, obtain the lattice parameters a and c of the wafer. Using the standard lattice parameters a1 and c1 of the wafer, calculate the in-plane strain and interlayer strain according to the following formula: ， Where △a is the in-plane strain and △c is the interlayer strain; The formula for calculating the lattice structure of a hexagonal crystal system is: ， Where d is the interplanar spacing, and h, k, and l are all crystal plane indices; Based on the in-plane strain, interlaminar strain, and Young's modulus mentioned above, the in-plane stress and interlaminar stress of the wafer surface layer are calculated according to the following formula: F a =G*△a,F c =G*△c, Where F a Let F be the in-plane stress, Δa be the in-plane strain, and F be the in-plane strain. c Let be the in-plane stress, Δc be the interlaminar strain, and G be the Young's modulus.

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