General-purpose spaceborne computer simulator

Abstract

This invention provides a universal spaceborne computer simulator, comprising: a universal simulator motherboard and a dedicated simulator daughterboard. The universal simulator motherboard provides common hardware for different spaceborne computers; the dedicated simulator daughterboard provides customized hardware for different spaceborne computers. The universal simulator motherboard includes a storage resource expansion system, an I / O interface simulation system, a power conversion module, and a motherboard debugging interface. The dedicated simulator daughterboard includes a target processor and memory components, providing a hardware platform for the operation of onboard software, and configuring the storage components according to the actual situation of the target processor. The universal simulator motherboard adopts a general-purpose hardware implementation for efficient, fast, and low-cost design, while the dedicated simulator daughterboard adopts a personalized design based on the actual state of the simulated object, meeting the application requirements of different spaceborne computers. By simulating the physical interfaces, logical relationships, and timing characteristics of real systems, it provides users with a rapid prototyping and verification platform.

Description

Technical Field

[0001] This invention relates to the field of spaceborne computer technology, and more specifically, to a general-purpose spaceborne computer simulator. Background Technology

[0002] As the control core of aerospace equipment's electronic systems, spaceborne computers are characterized by high functional integration, complex external interfaces, high hardware costs, and long development cycles. In the development process of aerospace equipment, it is typically necessary to develop a target spaceborne computer or electrical components to test and verify subsystems, inter-system physical interfaces, application layer protocols, and interface timing characteristics. Based on the current development realities of aerospace products, a development cycle of 6 to 12 months is usually required to complete the development and verification of a single unit. Furthermore, the high hardware costs hinder the cost reduction of aerospace equipment.

[0003] On the other hand, different aerospace equipment models have varying requirements for onboard computers based on application requirements such as functional complexity, operational lifespan, and resistance to space radiation. This makes it difficult to standardize the selection of the core central processing unit (CPU). For example, large-platform, long-life satellite models typically use SPARC V7 or SPARC V8 series aerospace-grade radiation-hardened CPU processors, while low-cost, commercial satellite models use PowerPC or ARM series industrial-grade CPU processors. The spaceflight application software and external interface forms of onboard computers in different design states are also different, making it difficult to prototype and verify different models and technical states of onboard computers through a unified verification platform. With the development trends of rapid response, mass production, and low cost in aerospace equipment, there is an urgent need for an efficient, fast, and low-cost general-purpose onboard computer simulator that meets the requirements for rapid and low-cost verification while also satisfying the verification needs of different aerospace model design states. Summary of the Invention

[0004] In view of the deficiencies in the prior art, the purpose of this invention is to provide a universal spaceborne computer simulator.

[0005] In a first aspect, embodiments of this application provide a general-purpose spaceborne computer simulator, comprising: a general-purpose simulator motherboard and a dedicated simulator daughterboard interconnected via inter-board connectors. The general-purpose simulator motherboard includes: a storage resource expansion system, an I / O interface simulation system, a power conversion module, and a motherboard debugging interface. The dedicated simulator daughterboard includes: a target processor and a memory component, wherein:

[0006] The general simulator master board is used to provide a common hardware carrier for different spaceborne computers;

[0007] The dedicated simulator subboard is used to provide a unique hardware carrier for different spaceborne computers;

[0008] The storage resource expansion system is used to expand the general storage resource interface for the target processor;

[0009] The IO interface simulation system is used to realize bus conversion using CPU IO bus, AXI (Advanced Xtensible Interface) bus, and PCIE bus, and to simulate the internal functional modules, external interface modules, and external stand-alone interface modules of the onboard computer.

[0010] The power conversion module is used to provide various levels of secondary power supply for various electronic components of the general simulator motherboard and the special simulator daughterboard.

[0011] The motherboard debugging interface is used to provide users with storage resource expansion FPGA (Field-Programmable Gate Array), IO (In-Out) interface simulation FPGA debugging interface, to debug FPGA functions, and to monitor the address and data of each level of bus in real time;

[0012] The board-to-board connector is used to establish interconnection of power supply signals and data signals between the general simulator motherboard and the dedicated simulator daughterboard.

[0013] The target processor is used to select and determine the processor based on the CPU processor in the user's actual simulated onboard computer.

[0014] The memory component is used to directly mount storage resources onto the target processor's dedicated storage interface.

[0015] Optionally, the storage resource expansion system includes: a storage resource expansion FPGA and a first storage resource;

[0016] The storage resource expansion FPGA uses a high-performance static random-access memory (SRAM) type FPGA as the hardware core to expand the storage resources of the target processor and realize IO data communication with the IO interface module FPGA;

[0017] The first storage resource includes various types of memory used to simulate the general-purpose memory actually configured in a spaceborne computer.

[0018] Optionally, the I / O interface simulation system includes: an I / O interface simulating an FPGA and a second storage resource;

[0019] The IO interface simulates the FPGA using a high-performance SRAM-type FPGA as the hardware core. It simulates the internal functional modules and external interface functional modules of the onboard computer in the form of internal functional modules of the FPGA, and realizes bus conversion through CPU IO bus, AXI bus, and PCIE (PCI-Express) bus.

[0020] The second storage resource includes various different memories used to provide configuration information and process data storage space for the IO interface simulating the FPGA.

[0021] Optionally, the power conversion module uses power devices including: a DC / DC converter, a point-of-load power supply, and an LDO (low dropout linear regulator) to convert the primary power supply into a secondary power supply, wherein the secondary power supply includes: 3.3V and 5V.

[0022] Optionally, the memory components are configured according to the actual state of the simulated onboard computer and are limited to storage resources directly mounted on the target processor's dedicated storage interface, including synchronous dynamic random-access memory (SDRAM), DDR2 (Double Data Rate 2), and DDR3 (Double Data Rate 3).

[0023] Optionally, the inter-board connector is an FMC high-speed inter-board connector.

[0024] Optionally, a CPU-AXI bus conversion module can be used to convert the target processor's I / O bus into a standard AXI data bus.

[0025] Optionally, all I / O function modules are mounted on the AXI bus and divided into internal computer function modules and computer interface function modules.

[0026] The computer's internal functional modules include: a satellite time management module, a dual-machine communication module, an autonomous control takeover module, and a watchdog module, etc.

[0027] The computer interface functional modules include: RS422 communication module, AD acquisition module, DA output module, OC instruction input / output module, TTL instruction input / output module, etc.

[0028] Optionally, the external interface interaction of the onboard computer is simulated in the form of FPGA functional modules, covering the external interface of the onboard computer, and simulating the actual response actions of various single machines communicating with the onboard computer on the satellite according to the actual communication protocol. The external interface of the computer includes: RS422 interface, LVDS interface, AD acquisition interface, DA conversion interface, OC command interface, TTL level interface, etc.

[0029] Compared with the prior art, the present invention has the following beneficial effects: The present application adopts a spaceborne computer simulation platform architecture of a general motherboard + a dedicated daughterboard, which concentrates the common hardware of different spaceborne computers on the motherboard and implements different functional modules and external interfaces through a configurable FPGA; and the motherboard and daughterboard of the general spaceborne computer simulator adopt standard FMC connectors and form a defined interface, so that the general simulator motherboard adopts a general hardware design to achieve high efficiency, speed and low cost, and the dedicated simulator daughterboard adopts personalized design according to the actual state of the simulated object to meet the application requirements of different spaceborne computers. Thus, it can provide users with a rapid prototype simulation and verification platform by simulating the physical interface, logical relationship and timing characteristics of the real system. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort. Other features, objects, and advantages of the present invention will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0031] Figure 1 A schematic diagram of the architecture of a general-purpose spaceborne computer simulator provided for embodiments of this application; Figure 2 The circuit diagram of a general-purpose spaceborne computer simulator provided in this application embodiment. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0033] It should be noted that when a component is said to be "fixed" to another component, it can be directly on the other component or it can be in a middle component. When a component is said to be "connected" to another component, it can be directly connected to the other component or it may be in a middle component.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0035] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0036] The technical solutions of the present invention and how they solve the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0037] This application aims to provide a high-efficiency, fast, and low-cost general-purpose spaceborne computer simulator. Based on a simulator architecture of a general-purpose simulator motherboard and a dedicated simulator daughterboard, it rapidly builds a semi-physical real-time computer simulator. By simulating the physical interfaces, logical relationships, and timing characteristics of a real system, it provides users with a rapid prototyping and verification platform. The system architecture based on the general-purpose simulator motherboard and dedicated simulator daughterboard centralizes the common hardware of different spaceborne computers on the motherboard and implements different functional modules and external interfaces through a configurable high-performance SRAM-type FPGA; personalized hardware such as the target processor of different spaceborne computers is designed on the daughterboard, achieving efficient and fast simulation of spaceborne computer products.

[0038] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0039] Figure 1 This application provides an embodiment of a general-purpose spaceborne computer simulator, as shown in the following schematic diagram. Figure 1 As shown, the general-purpose spaceborne computer simulator in this embodiment may include: a general-purpose simulator motherboard 112 and a dedicated simulator daughterboard 113 interconnected via inter-board connectors. The general-purpose simulator motherboard 112 includes: a storage resource expansion system 102, an IO interface simulation system 101, an IO interface simulation FPGA 103, a second storage resource 104, a first storage resource 106, a storage resource expansion FPGA 105, a first inter-board connector 108, and a second inter-board connector 109. The dedicated simulator daughterboard 113 includes: a target processor 110 and a memory component 111.

[0040] For example, the storage resource expansion system includes: a storage resource expansion FPGA and a first storage resource; the storage resource expansion FPGA uses a high-performance SRAM-type FPGA as the hardware core to expand the storage resources for the target processor and realize IO data communication with the IO interface module FPGA; the first storage resource includes various types of memory to simulate the general-purpose memory actually configured in the onboard computer.

[0041] Specifically, the first storage resource includes various types of memory such as SRAM, MRAM, EEPROM, and NOR FLASH, which are used to simulate the general-purpose memory actually configured in a spaceborne computer and meet the user's needs for various volatile and non-volatile storage resources.

[0042] For example, the IO interface simulation system includes: an IO interface simulation FPGA and a second storage resource; the IO interface simulation FPGA uses a high-performance SRAM-type FPGA as the hardware core, and simulates the internal functional modules and external interface functional modules of the onboard computer in the form of internal functional modules of the FPGA, and realizes bus conversion through CPU IO bus, AXI bus and PCIE bus; the second storage resource includes a variety of different memories, which are used to provide configuration information and process data storage space for the IO interface simulation FPGA.

[0043] Specifically, the second storage resource may include SRAM, MRAM, NAND FLASH and other memories, providing configuration information and process data storage space for the IO interface to simulate the FPGA.

[0044] For example, the power conversion module uses power devices including: DC / DC converter, point-of-load power supply, LDO, to convert primary power to secondary power. The secondary power includes multiple levels such as 3.3V and 5V to provide power to various types of devices on the motherboard and daughterboard.

[0045] For example, the memory components are configured according to the actual state of the simulated onboard computer and are limited to storage resources directly mounted on the target processor's dedicated storage interface, including SDRAM, DDR2, and DDR3.

[0046] For example, the inter-board connector uses the FMC high-speed inter-board connector.

[0047] For example, the target processor is selected based on the CPU processor in the user's actual simulated onboard computer, supporting CPUs with different instruction set architectures such as SPRAC and PowerPC, such as TSC695F, BM3803, BM3823, SM750, and FT-M6672.

[0048] For example, a CPU-AXI bus conversion module is used to convert the target processor's I / O bus into a standard AXI data bus.

[0049] For example, all IO function modules are mounted on the AXI bus and are divided into internal computer function modules and computer interface function modules. The internal computer function modules include: satellite time management module, dual-machine communication module, autonomous control module, watchdog module, etc.; the computer interface function modules include: RS422 communication module, AD acquisition module, DA output module, OC instruction input / output module, TTL instruction input / output module, etc.

[0050] For example, the external interface interaction of the onboard computer is simulated in the form of FPGA functional modules, covering the external interface of the onboard computer, and simulating the actual response actions of various single machines communicating with the onboard computer on the satellite according to the actual communication protocol. The external interface of the computer includes: RS422 interface, LVDS interface, AD acquisition interface, DA conversion interface, OC command interface, TTL level interface, etc.

[0051] In this embodiment, a spaceborne computer simulation platform architecture of a general-purpose motherboard and a dedicated daughterboard is adopted. The common hardware of different spaceborne computers is concentrated on the motherboard and different functional modules and external interfaces are implemented through a configurable FPGA. The motherboard and daughterboard of the general-purpose spaceborne computer simulator adopt standard FMC connectors and form a defined interface. This allows the general-purpose simulator motherboard to adopt a general hardware design to achieve high efficiency, speed and low cost. The dedicated simulator daughterboard adopts a personalized design according to the actual state of the simulated object to meet the application requirements of different spaceborne computers. In this way, by simulating the physical interface, logical relationship and timing characteristics of the real system, a rapid prototype simulation and verification platform can be provided for users.

[0052] Figure 2 A circuit schematic diagram of a general-purpose spaceborne computer simulator provided in this application embodiment is shown below. Figure 2As shown, it includes a general simulator motherboard 201, a dedicated simulator daughterboard 202, a storage resource expansion FPGA 203, an I / O interface module FPGA 205, a first storage resource 204, a second storage resource 206, a power conversion module 207, a motherboard debugging interface 208, a first inter-board connector 209 and a second inter-board connector 212, a target processor 210, and a memory component 211.

[0053] In this embodiment, the general-purpose simulator motherboard 201 provides a common hardware carrier for different onboard computers; the dedicated simulator daughterboard 202 provides a unique hardware carrier for different onboard computers; the storage resource expansion FPGA 203 expands the general-purpose storage resource interface for the target processor; and the I / O interface simulating FPGA 205, with CPU... The system utilizes an IO bus to convert between an AXI bus and a PCIE bus, simulating the internal functional modules, external interface modules, and external stand-alone interface modules of an onboard computer. The first storage resource 204 provides configuration information and process data storage space for the SRAM-type FPGA. The second storage resource 206 simulates the general-purpose memory actually configured in the onboard computer. The power conversion module 207 provides various levels of secondary power supply for different electronic components on the general-purpose simulator motherboard and the dedicated simulator daughterboard. The motherboard debugging interface 208 provides users with a storage resource expansion FPGA and an IO interface to simulate FPGA debugging. The first inter-board connector 209 and the second inter-board connector 212 are used to interconnect power and data signals between the general-purpose simulator motherboard and the dedicated simulator daughterboard. The target processor 210 is the actual CPU processor and its minimum circuitry (clock, reset, etc.) in the simulated onboard computer. The memory component 211 is a storage resource directly mounted on the target processor's dedicated storage interface.

[0054] In this embodiment, the general-purpose spaceborne computer simulator adopts a system architecture of a general-purpose simulator motherboard + a dedicated simulator daughterboard. The common hardware of different spaceborne computers is concentrated on the motherboard, and different functional modules and external interfaces are implemented through a configurable FPGA. The personalized hardware such as the target processor of different computers is designed on the daughterboard, which can meet the application requirements of different models of spaceborne computers.

[0055] In this embodiment, the motherboard and daughterboard of the general-purpose spaceborne computer simulator use standard FMC connectors and form a defined interface. Spaceborne computers in new technological states can quickly complete daughterboard design based on the standard interface, achieving efficient and rapid simulation. The system architecture of a general-purpose simulator motherboard + dedicated simulator daughterboard enables efficient and rapid simulation of spaceborne computer products in different technological states.

[0056] It should be noted that those skilled in the art will understand that various aspects of the present invention can be implemented as systems, methods, or program products. Therefore, various aspects of the present invention can be specifically implemented in the following forms: a completely hardware implementation, a completely software implementation (including firmware, microcode, etc.), or a combination of hardware and software implementations, collectively referred to herein as a "circuit," "module," or "platform." Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various modifications or variations within the scope of the claims, which do not affect the essence of the present invention.

Claims

1. A universal spaceborne computer simulator, characterized in that, include: A general-purpose simulator motherboard and a dedicated simulator daughterboard are interconnected via inter-board connectors. The general-purpose simulator motherboard includes: a storage resource expansion system, an I / O interface simulation system, a power conversion module, and a motherboard debugging interface. The dedicated simulator daughterboard includes: a target processor and a memory component. The general simulator master board is used to provide a common hardware carrier for different spaceborne computers; The dedicated simulator subboard is used to provide a unique hardware carrier for different spaceborne computers; The storage resource expansion system is used to expand the general storage resource interface for the target processor; The IO interface simulation system is used to realize bus conversion using CPU IO bus, AXI bus, and PCIE bus, and to simulate the internal functional modules, external interface modules, and external stand-alone interface modules of the onboard computer. The power conversion module is used to provide various levels of secondary power supply for various electronic components of the general simulator motherboard and the special simulator daughterboard. The motherboard debugging interface is used to provide users with storage resources to expand the FPGA, IO interface to simulate the FPGA debugging interface, debug the FPGA function, and monitor the address and data of each level of bus in real time. The board-to-board connector is used to establish interconnection of power supply signals and data signals between the general simulator motherboard and the dedicated simulator daughterboard. The target processor is used to select and determine the processor based on the CPU processor in the user's actual simulated onboard computer. The memory component is used to directly mount storage resources onto the target processor's dedicated storage interface.

2. The universal spaceborne computer simulator according to claim 1, characterized in that, The storage resource expansion system includes: a storage resource expansion FPGA and a first storage resource; The storage resource expansion FPGA uses a high-performance SRAM-type FPGA as its hardware core to expand the storage resources of the target processor and realize IO data communication with the IO interface module FPGA. The first storage resource includes various types of memory used to simulate the general-purpose memory actually configured in a spaceborne computer.

3. The universal spaceborne computer simulator according to claim 1, characterized in that, The I / O interface simulation system includes: an I / O interface simulation FPGA and a second storage resource; The IO interface simulates the FPGA using a high-performance SRAM-type FPGA as the hardware core. It simulates the internal functional modules and external interface functional modules of the onboard computer in the form of internal functional modules of the FPGA, and uses the CPU IO bus, AXI bus and PCIE bus to realize bus conversion. The second storage resource includes various different memories used to provide configuration information and process data storage space for the IO interface simulating the FPGA.

4. The universal spaceborne computer simulator according to claim 1, characterized in that, The power conversion module uses power devices including a DC / DC converter, a point-of-load power supply, and an LDO to convert primary power into secondary power, wherein the secondary power includes 3.3V and 5V.

5. The universal spaceborne computer simulator according to claim 1, characterized in that, The memory components are configured according to the actual state of the simulated onboard computer and are limited to storage resources directly mounted on the target processor's dedicated storage interface, including SDRAM, DDR2, and DDR3.

6. The universal spaceborne computer simulator according to claim 1, characterized in that, The inter-board connector is an FMC high-speed inter-board connector.

7. The universal spaceborne computer simulator according to any one of claims 1-6, characterized in that, A CPU-AXI bus conversion module is used to convert the target processor's I / O bus into a standard AXI data bus.

8. The universal spaceborne computer simulator according to claim 7, characterized in that, All I / O function modules are mounted on the AXI bus and are divided into internal computer function modules and computer interface function modules. The computer's internal functional modules include: a satellite time management module, a dual-machine communication module, an autonomous control takeover module, and a watchdog module; The computer interface functional modules include: an RS422 communication module, an AD acquisition module, a DA output module, an OC instruction input / output module, and a TTL instruction input / output module.

9. The universal spaceborne computer simulator according to any one of claims 1-6, characterized in that, The external interface interaction of the onboard computer is simulated in the form of FPGA functional modules. It covers the external interface of the onboard computer and simulates the actual response actions of various single machines communicating with the onboard computer on the satellite according to the actual communication protocol. The external interface of the computer includes: RS422 interface, LVDS interface, AD acquisition interface, DA conversion interface, OC command interface, and TTL level interface.

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