Accelerator offload device, accelerator offload method, and program

Abstract

An embodiment of the present invention provides an accelerator offload device (100) comprising: a data processing amount acquisition unit (110) that acquires a current data processing amount and / or a predicted data processing amount for which an offload target process is being performed; a computation destination determination unit (120) that determines whether to perform the computation by the CPU (11) or to offload the computation to the ACC (12) on the basis of the amount of data processed by the APL (1), and that changes the offload destination of the computation process offload unit (130) if a change is necessary; and an arithmetic processing unloading unit (130) that accepts a request for arithmetic processing from the APL (1), stores the data to be processed and the processing command in the shared memory, and causes the CPU (11) or the ACC (12) to execute the processing.

Description

Technical Field

[0001] The invention relates to an accelerator unloading device, an accelerator unloading method and a program. Background Art

[0002] Depending on the type of processor, the workloads that the processor is good at (with high processing power) are different. Compared with the highly versatile CPU (Central Processing Unit), there are accelerators (hereinafter appropriately referred to as ACC) such as FPGA (Field Programmable Gate Array) / (in the following description, " / " means "or") GPU (Graphics Processing Unit) / ASIC (Application Specific Integrated Circuit) that can calculate high-parallel workloads that the CPU is not good at (with low processing power) at high speed and efficiently. By combining these different types of processors, the workloads that the CPU is not good at are offloaded to the ACC and calculated, thereby improving the overall calculation time and calculation efficiency. The use of offloading technology is making progress.

[0003] Representative examples of specific workloads for ACC offloading include encoding / decoding processing (FEC: Forward Error Correction processing), media processing of sound and images, encryption / decryption processing, etc. in vRAN (virtual Radio Access Network).

[0004] Fig.25 This is a schematic diagram of a process of offloading part of the processing performed by the CPU to the accelerator (ACC).

[0005] like Fig.25 As shown, the accelerator system includes hardware (HW) 10 , an operating system (OS) etc. 20 , and an application (APL) 1 .

[0006] The hardware 10 includes a CPU 11 and an accelerator (ACC) 12 .

[0007] The ACC 12 is a computing unit hardware that performs specific calculations at high speed based on input from the CPU 11. Specifically, the accelerator 12 is a PLD (Programmable Logic Device) such as a GPU or FPGA.

[0008] The CPU 11 offloads part of the processing of the APL 1 (a workload that the CPU 11 is not good at) to the ACC 12 , thereby achieving performance and power efficiency that cannot be achieved by software (CPU processing) alone.

[0009] Patent document 1 describes a control device comprising: a communication unit that receives a data packet from a network; a plurality of first control units that function as a plurality of virtual control units; a distribution circuit that distributes the received data packet into a plurality of data packets; and a plurality of second control units that distribute the data packets distributed by the distribution circuit to the plurality of virtual control units.

[0010] Non-patent document 1 describes CUDA Toolkit (registered trademark), which is a development environment for creating high-performance GPU-accelerated applications. When using CUDA Toolkit, applications can be developed, optimized, and deployed on GPU-accelerated embedded systems, desktop workstations, enterprise data centers, cloud development platforms, and HPC (high performance computing) supercomputers.

[0011] Prior art literature

[0012] Patent Literature

[0013] Patent document 1: Japanese Patent Application Publication No. 2019-153019.

[0014] Non-patent literature

[0015] Non-patent document 1: CUDA, [online], [retrieved on May 11, 2015], Internet 〈http: / / developer.nvidia.com / cuda-toolkit〉 Summary of the invention

[0016] Problem that the invention aims to solve

[0017] When performing processing involving high-parallelism and high-load computing, there are two methods considered in the prior art: (1) performing the computing by a single CPU and (2) offloading part of the processing to the ACC 12 .

[0018] (1) In the method of performing calculations by the CPU alone, since all processing can be performed by the CPU alone, there is no need to use ACC 12, and the power consumption of the entire system can be suppressed. On the other hand, when the amount of data to be processed is large, the processing efficiency of CPU 11 becomes a bottleneck, and the processing performance has a limit.

[0019] (2) In the method of offloading part of the processing to ACC12, the bottleneck can be eliminated and the performance can be improved by having ACC12 perform the processing with poor processing efficiency in CPU11. On the other hand, ACC12 always operates regardless of the amount of data processing, which has power consumption overhead.

[0020] Fig.26 This figure is used to explain the problem of (1) the method of performing calculations by a single CPU.

[0021] like Fig.26 As shown in FIG. 1 , CPU 11 does not use ACC, and the CPU alone performs the calculations for processing 1 of step S1, processing 2 of step S2, offload processing of step S10, and processing 3 of step S3. CPU 11 does not use ACC, so there is no power consumption overhead in ACC. However, since the CPU alone performs offload processing, which CPU 11 is not good at, a performance bottleneck occurs when the amount of data processing is large (see Fig.26 denoted by reference numeral a).

[0022] Fig. 27 A diagram for explaining the problem of (2) offloading part of the processing to ACC12.

[0023] like Fig. 27 As shown, after the process 1 of step S1 and the process 2 of step S2, the CPU 11 offloads the offload target process (step S10) to the ACC 12. The CPU 11 receives the processing result from the ACC 12 and performs the calculation of the process 3 of step S3.

[0024] The high-speed processing of ACC12 can eliminate the performance bottleneck of CPU11 (refer to Fig. 27 However, when there is no data to be processed or the amount of processing is small, the system will continue to operate and generate power consumption (see Fig. 27 denoted by reference numeral c).

[0025] As described above, in processing involving high-workload calculations, there is a problem of minimizing power consumption while suppressing CPU performance bottlenecks.

[0026] The present invention has been made in view of such a background, and an object of the present invention is to minimize power consumption while suppressing CPU performance bottlenecks without changing application programs.

[0027] Solutions for solving problems

[0028] In order to solve the above-mentioned problems, an accelerator unloading device is adopted, which offloads specific processing of an application to an accelerator, and is characterized in that it has: a data processing volume acquisition unit, which acquires the current data processing volume of the offloaded object processing, and / or the predicted data processing volume; an operation destination determination unit, which determines whether the CPU performs the operation or offloads the operation to the accelerator based on the data processing volume acquired by the data processing volume acquisition unit, and changes the offloading destination when change is necessary; and an operation processing offloading unit, which has a shared memory between the CPU or the accelerator that performs parallel operations, accepts the request for operation processing from the application, stores the data and processing commands of the processing object in the shared memory, and enables the CPU or the accelerator to perform the processing.

[0029] Effects of the Invention

[0030] According to the present invention, it is possible to minimize power consumption while suppressing CPU performance bottlenecks without changing application programs. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 This is a schematic structural diagram of an accelerator unloading system according to a first embodiment of the present invention.

[0032] Figure 2 It is a diagram for explaining the features and operation of the accelerator unloader device according to the first embodiment of the present invention.

[0033] Figure 3 It is an operation explanatory diagram for explaining dynamic switching between the ACC and the CPU of the accelerator unloading device according to the first embodiment of the present invention.

[0034] Figure 4 This is a flowchart showing a data processing operation in the APL operation of the accelerator unloading device according to the first embodiment of the present invention.

[0035] Figure 5 This is an operation explanation diagram of the accelerator offloading system in which the data processing amount acquisition unit of the accelerator offloading device according to the first embodiment of the present invention acquires the processing amount and passes it to the calculation destination determination unit.

[0036] Figure 6 This is a flowchart of the operation of the data processing amount acquisition unit of the accelerator offloading device according to the first embodiment of the present invention acquiring the processing amount and passing it to the calculation destination determination unit.

[0037] Figure 7 This is an operation explanation diagram of switching the execution position (ACC→CPU) of the accelerator unloading device according to the first embodiment of the present invention.

[0038] Figure 8This is a flowchart showing the operation of switching the execution position (ACC→CPU) of the accelerator unloading device according to the first embodiment of the present invention.

[0039] Fig. 9 This is an operation explanation diagram of switching the execution position (CPU→ACC) of the offloading target process of the accelerator offloading device according to the first embodiment of the present invention.

[0040] Fig.10 This is a flowchart showing the operation of switching the execution position (CPU→ACC) of the accelerator unloading device according to the first embodiment of the present invention.

[0041] Fig.11 This is a schematic structural diagram of an accelerator unloading system according to a second embodiment of the present invention.

[0042] Fig.12 This is a diagram for explaining the operation of the data processing amount acquisition unit of the accelerator offloading device according to the second embodiment of the present invention, in which the data processing amount acquisition unit acquires information and passes the information to the calculation destination determination unit.

[0043] Fig.13 This is a flowchart showing the operation of the data processing amount acquisition unit of the accelerator offloading device according to the second embodiment of the present invention, in which the data processing amount acquisition unit acquires information and passes the information to the calculation destination determination unit 120 .

[0044] Fig.14 This is an operation explanation diagram of switching the execution position (ACC→CPU) of the offloading target process of the accelerator offloading device according to the second embodiment of the present invention.

[0045] Fig.15 This is a flowchart showing the operation of switching the execution position (ACC→CPU) of the accelerator unloading device according to the second embodiment of the present invention.

[0046] Fig.16 This is an operation explanation diagram of switching the execution position (CPU→ACC) of the offloading target process of the accelerator offloading device according to the second embodiment of the present invention.

[0047] Fig.17 This is a flowchart showing the operation of switching the execution position (CPU→ACC) of the accelerator unloading device according to the second embodiment of the present invention.

[0048] Fig.18 This is a schematic structural diagram of an accelerator unloading system according to a third embodiment of the present invention.

[0049] Fig.19 This is a diagram for explaining the operation of changing the number of cores executing a process (while the offload target process is being executed by the CPU) in the accelerator offloading device according to the third embodiment of the present invention.

[0050] Fig. 20 This is an operation explanation diagram of switching the execution position (CPU→ACC) of the accelerator unloading device according to the third embodiment of the present invention.

[0051] Fig.21 This is a flowchart showing the operation of switching the execution position (CPU→ACC) of the accelerator unloading device according to the third embodiment of the present invention.

[0052] Fig. 22 This is an operation explanatory diagram of switching the execution position (ACC→CPU) of the accelerator unloading device according to the third embodiment of the present invention.

[0053] Fig.23 1 is a flowchart showing the operation of <switching the execution position of the offloading target process (ACC→CPU)> of the accelerator offloading device according to the third embodiment of the present invention.

[0054] Fig.24 The hardware configuration diagram shows an example of a computer that realizes the function of the accelerator offloading device of the accelerator offloading system according to each embodiment of the present invention.

[0055] Fig.25 This is a schematic diagram of a process of offloading part of the processing performed by the CPU to the accelerator (ACC).

[0056] Fig.26 This figure is a diagram for explaining the problem of the method of performing calculations by a single CPU.

[0057] Fig. 27 A diagram for explaining the problem of a method of offloading part of the processing to the ACC. DETAILED DESCRIPTION

[0058] Hereinafter, an accelerator unloading system and the like in a mode for carrying out the present invention (hereinafter referred to as “this embodiment”) will be described with reference to the drawings.

[0059] (First Embodiment)

[0060] [Overall structure]

[0061] Figure 1 FIG. 1 is a schematic structural diagram of an accelerator unloading system according to a first embodiment of the present invention. Fig.21 The same components are denoted by the same reference numerals.

[0062] like Figure 1As shown, the accelerator offloading system 1000 includes hardware (HW) 10, an operating system 20, etc., a high-speed data communication unit 30 as a high-speed data transmission middleware, an accelerator offloading device 100, and an APL 1.

[0063] The hardware 10 includes a CPU 11 , an accelerator (ACC) 12 , and a ring buffer 13 .

[0064] The ACC 12 is a computing unit hardware that performs specific calculations at high speed based on input from the CPU 11. Specifically, the accelerator 12 is a PLD such as a GPU or FPGA.

[0065] The ring buffer 13 is provided in the hardware 10 and replicates the target workload. The calculation processing offloading unit 130 (described later) of the accelerator offloading device 100 exchanges data with the accelerator via the ring buffer 13 .

[0066] [High-speed data communication unit 30]

[0067] The high-speed data communication unit 30 is a high-speed data communication layer composed of CUDA, OpenCL BBDEV API, etc. For example, the high-speed data communication unit 30 is CUDA Toolkit (registered trademark) for using GPUs made by NVIDIA (registered trademark) and OpenCL (registered trademark) for computing using heterogeneous processors. In addition, BBDEV API (registered trademark) provides an accelerator I / O function for processing wireless access signals as a Development Kit (library).

[0068] The high-speed data communication unit 30 integrates the accelerator I / O function provided as a library such as CUDA, OpenCL BBDEV API, etc. into the APL 1, thereby enabling the APL 1 to have the accelerator I / O function for processing the wireless access signal.

[0069] [Accelerator Unloading Device 100]

[0070] The accelerator offloading device 100 includes a data processing amount acquiring unit 110 , a calculation destination determining unit 120 , a calculation processing offloading unit 130 , and an ACC power supply control unit 140 .

[0071] The accelerator offloading device 100 has the following characteristics: a parallel operation processing execution unit (collectively referred to as a processing unit that is executed by either the CPU or the ACC) is dynamically switched between the ACC 12 and the CPU 11 (characteristic <1> ); When switching the parallel operation processing execution unit, APL1 is not changed and the executing APL1 is not interrupted (characteristic <2> ); When the amount of data to be processed is small, the CPU 11 performs the processing, and the power consumption of the ACC 12 is reduced to a minimum, and when the ACC 12 is not working, the power consumption of the ACC 12 is minimized (characteristic <3> ).

[0072] In Features <1> In the process, the performance bottleneck of CPU 11 is eliminated through the high-speed processing of ACC 12.

[0073] In Features <2> In the switch, the switch is transparent, no APL1 needs to be changed, and no APL1 interrupt will be generated during the switch.

[0074] In Features <3> In the case where the amount of data to be processed is small, the CPU 11 performs the processing, and by reducing the power consumption of the ACC 12, the power cost can be minimized.

[0075] <Data Processing Amount Acquisition Unit 110>

[0076] As a feature <1> The data processing amount acquisition unit 110 acquires the current data processing amount of the offload target process and / or the predicted data processing amount, and notifies the calculation destination determination unit 120 (<data processing amount notification>).

[0077] Examples of the acquired information include (1) the amount of parallel computation data per second [Byte] and (2) the CPU usage rate (when the CPU 11 performs parallel computation).

[0078] Examples of the acquisition method include (1) acquiring the amount of processed data from the calculation processing offload unit 130 and (2) acquiring the CPU usage rate from the operating system.

[0079] <Calculation Destination Determination Unit 120>

[0080] As a feature <1> The calculation destination determination unit 120 determines whether the calculation is to be performed by the CPU 11 or offloaded to the ACC 12 according to the data processing amount of the APL 1, and changes the offloading destination of the calculation processing offloading unit 130 if necessary (<offloading destination change instruction>).

[0081] In an example of the determination method, an operator determines in advance a threshold value regarding the amount of processed data, CPU usage, or workload, and changes the processing destination when the amount exceeds the threshold value.

[0082] As a function of feature <3>, when the operation destination determination unit 120 changes the execution destination of the process, it notifies this information to the ACC power control unit 140 (<offloading destination information>). In addition, when the operation destination determination unit 120 changes the process execution destination from the CPU 11 to the ACC 12, it receives the power information of the ACC 12 (<power information>), and at the timing when the ACC 12 can execute the power process, it instructs the operation process offloading unit 130 to make the change.

[0083] <operation process offloading unit 130>

[0084] As a function of feature <1>, the operation process offloading unit 130 has a shared memory (not shown) between the CPU 11 or the ACC 12 that executes parallel operations, receives a commission for operation processing from the APL 1, stores the data and processing commands of the processing object in the shared memory, and causes the CPU 11 or the ACC 12 to execute this process (<operation process offloading>) (refer to Figure 1 the reference numeral aa in the attached drawing).

[0085] The operation process offloading unit 130 receives a processing commission from the APL 1 through the same interface, stores the data and processing commands of the processing object in the shared memory, and causes the CPU 11 or the ACC 12 to execute this process.

[0086] When the operation process offloading unit 130 receives a change from the operation destination determination unit 120, it changes the execution location of the operation process from the ACC 12 to the CPU 11, or from the CPU 11 to the ACC 12.

[0087] As a function of feature <2>, the operation process offloading unit 130 receives a commission for parallel operation processing from the APL 1, and causes the CPU 11 or the ACC 12 to execute this process. It has a shared memory between the CPU 11 or the ACC 12 that executes parallel operations, and executes by storing the data and processing commands of the processing object in the shared memory. In the case of any execution destination, since the processing commission is received from the APL 1 through the same interface, there will be no interruption when the APL 1 changes or switches.

[0088] <ACC power control unit 140>

[0089] As a function of feature <3>, the ACC power control unit 140 reduces the power of the ACC 12 or increases the power of the ACC 12 and returns it to a processable state (<ACC power operation>) based on the offloading destination information obtained from the operation destination determination unit 120. When the processing destination changes from the ACC 12 to the CPU 11, the ACC power control unit 140 performs processing to reduce the power of the ACC 12. When the processing destination changes from the CPU 11 to the ACC 12, the ACC power control unit 140 performs processing to increase the power of the ACC 12 and return it to a processable state. The ACC power control unit 140 provides information indicating that it has become processable to the operation destination determination unit 120.

[0090] Hereinafter, the operation of the accelerator offloading device 100 of the accelerator offloading system 1000 configured as described above will be described.

[0091] (Features and operation modes)

[0092] Figure 2 A diagram for explaining the features and operation modes of the accelerator offloading device 100. The same processing parts are labeled with the same step numbers as Fig. 27 the same.

[0093] As Figure 2 shown by the arrow aa1 in, through the high-speed processing of the ACC 12, the performance bottleneck of the CPU 11 is eliminated (feature <1>).

[0094] As Figure 2 shown by the reference numeral aa2 in, the switching is transparent and there is no need to change the APL1, and no interruption of the APL1 occurs during the switching (feature <2>).

[0095] As Figure 2 shown by the reference numeral aa1 in, when the data processing volume is small, the CPU 11 performs the processing, and by reducing the power consumption of the ACC 12, the power overhead can be minimized (feature <3>).

[0096] [Dynamic switching between ACC 12 and CPU 11 (feature <1>)]

[0097] The dynamic switching between the ACC 12 and the CPU 11 (feature <1>) will be described.

[0098] Feature <1> dynamically switches whether the target offloading process is performed by the CPU 11 or the ACC 12 according to the data processing volume. Thus, when the data processing volume is large, the processing is offloaded to the ACC 12, and the performance bottleneck of the CPU 11 can be eliminated.

[0099] Figure 3It is a working explanation diagram of an accelerator offloading system for explaining the dynamic switching between ACC12 and CPU11 (feature <1>). For the same structural parts as Figure 1 the same reference numerals are assigned. In the following description, the corresponding functional parts of the work are indicated by thick frames.

[0100] The arithmetic processing offloading unit 130 accepts a commission for arithmetic processing from APL1, and causes CPU11 (refer to Figure 3 the reference numeral cc in the figure) or ACC12 (refer to Figure 3 the reference numeral bb in the figure) to execute this processing. When receiving a change from the operation destination determination unit 120, it changes the execution position of the arithmetic processing from ACC12 to CPU11, or from CPU11 to ACC12.

[0101] <Data processing flow during the operation of APL1>

[0102] Figure 4 It is a flowchart showing the data processing work during the operation of APL1.

[0103] Figure 4 The processing shown continues during application startup.

[0104] In step S11, APL1 executes processing other than the offloading target processing on CPU11.

[0105] In step S12, when APL1 needs to perform the offloading target processing, it starts the arithmetic processing offloading unit 130. The arithmetic processing offloading unit 130 confirms the "execution position of the offloading target processing" set at startup or dynamically changed in the operation destination determination unit 120.

[0106] In step S13, the arithmetic processing offloading unit 130 determines whether the "execution position of the offloading target processing" is ACC12.

[0107] When the "execution position of the offloading target processing" is ACC12 (Yes in S13), in step S14, the arithmetic processing offloading unit 130 writes the offloading processing content and the data of the processing object into the shared memory between it and ACC12.

[0108] In step S15, ACC12 reads the information written in the shared memory and executes the offloading target processing. Thereafter, ACC12 stores the data of the processing result in the shared memory between it and the arithmetic processing offloading unit 130.

[0109] In step S16, the arithmetic processing offloading unit 130 reads this data and delivers it to the application (APL1). The application continues the processing after the offloading target processing and ends the processing of this flow.

[0110] In the above step S13, when the "location where the offload target process is executed" is not the ACC 12 (S13: No), in step S17, the calculation processing offload unit 130 determines whether the offload target process is executed on the same core.

[0111] When the offload target process is executed on the same core ( S17 : Yes), in step S18 , the calculation processing offload unit 130 executes the offload target process.

[0112] In step S19, the calculation processing offloading unit 130 passes the processing result data to the application. The application continues the processing after the offloading target processing, and the processing of this flow ends.

[0113] In the above step S17, if the offload target process is not executed on the same core (S17: No), in step S20, the arithmetic processing offload unit 130 writes the process content and the data of the process target in the shared memory between the CPU 11 core executing the offload target process.

[0114] In step S19, the core of the CPU 11 reads the information written in the shared memory and executes the offload target process. Thereafter, the core of the CPU 11 stores the data of the processing result in the shared memory between the CPU 11 and the calculation processing offload unit 130, and the process proceeds to step S19.

[0115] <Data Processing Amount Acquisition Unit 110 Acquires the Processing Amount and Sends it to the Calculation Target Determination Unit 120>

[0116] Figure 5 This is a diagram for explaining the operation of the accelerator offloading system in which the data processing amount acquisition unit 110 acquires the processing amount and passes it to the calculation destination determination unit 120. Figure 1 The same components are denoted by the same reference numerals.

[0117] like Figure 5 As shown, the data processing amount acquisition unit 110 acquires the data processing amount from the APL1 and the calculation processing offloading unit 130 (see Figure 5 Figure dd).

[0118] First, the amount of processing acquired by the data processing amount acquisition unit 110 and an example of a method thereof will be described.

[0119] Method example (1): The data processing amount acquisition unit 110 acquires the processing amount from APL1.

[0120] The APL 1 periodically transfers the processing volume to the data processing volume acquisition unit 110 .

[0121] The above processing is performed via the shared memory, but requires changes on the APL1 side.

[0122] Method example (2): The data processing amount acquisition unit 110 acquires the processing amount from the calculation processing offloading unit 130 .

[0123] The calculation processing offloading unit 130 periodically transfers the processing volume being offloaded to the data processing volume acquisition unit 110. This transfer is performed via the shared memory.

[0124] Method example (3): Method referring to CPU usage

[0125] The data processing amount acquisition unit 110 acquires the usage rate of the core of the CPU 11 that is performing the offload process and the core of the CPU 11 that is executing the APL 1 .

[0126] The data processing amount acquisition unit 110 performs this operation by periodically referring to the CPU usage information held by the operating system (operating system etc. 20 ).

[0127] Method example (4): Refer to the method of ACC12 usage rate

[0128] The data processing amount acquisition unit 110 acquires information on the degree to which the ACC 12 is operating when the ACC 12 performs the offload processing.

[0129] This information is acquired through a shared memory provided in advance between the data processing amount acquisition unit 110 and the ACC 12 .

[0130] Next, the frequency with which the data processing amount acquisition unit 110 acquires data and transfers the data to the calculation destination determination unit 120 will be described.

[0131] The operator sets in advance the frequency of obtaining data processing volume.

[0132] For example, the CPU usage rate is referenced every 10 μsec (in the case of the above method example (3)), and information on the shared memory with the calculation processing offload unit 130 is read every 20 μsec (in the case of the above method example (2)).

[0133] In the calculation destination determination unit 120 , the read information may be shared immediately or in batches. For example, the average value of 10 CPU usage rates read every 10 μsec may be shared every 100 μsec.

[0134] Figure 6 To express Figure 5 Flowchart of the operation of the data processing amount acquisition unit 110 acquiring the processing amount and passing it to the calculation destination determination unit 120.

[0135] Figure 6 The processing shown is performed continuously while the application is activated.

[0136] In step S31 , the data processing amount acquisition unit 110 acquires the data processing amount from the APL1 and the calculation processing offload unit 130 .

[0137] In step S32, the data processing amount acquisition unit 110 passes the acquired data processing amount to the calculation destination determination unit 120. This transfer is performed via the shared memory.

[0138] In step S33 , the calculation destination determination unit 120 reads the data from the shared memory and ends the processing of this flow.

[0139] <Switch the execution location of the offload target process (ACC12 → CPU11)>

[0140] Figure 7 This is a diagram for explaining the operation of the accelerator offloading system for switching the execution location of the offloading target process (ACC12 → CPU11). Figure 1 The same components are denoted by the same reference numerals.

[0141] like Figure 7 As shown, the operation destination determination unit 120 reads the data processing amount from the shared memory with the data processing amount acquisition unit 110 (see Figure 7 When the execution location needs to be changed from the ACC 12 to the CPU 11, the calculation destination determination unit 120 issues an instruction to change the execution location to the calculation processing offload unit 130 (see Figure 7 ee), and sends an instruction to the ACC power supply control unit 140 to set the ACC 12 to the power saving mode (refer to Figure 7 ACC power supply control unit 140 sets ACC 12 to power saving mode (refer to Figure 7 Figure 8 shows the reference numeral gg).

[0142] The following describes the change judgment logic of the offload processing execution position for switching the execution position of the offload target process (ACC12→CPU11).

[0143] The logic for change determination may use statically specified logic, or may acquire statistical information such as delay time and throughput from the calculation processing offload unit 130 and perform dynamic change.

[0144] ·Static specification example

[0145] The timing for changing the execution location of the process from the ACC 12 to the CPU 11 is as follows.

[0146] (1) The utilization rate of ACC12 is less than 50%.

[0147] (2) The amount of processing offloaded by the arithmetic processing offload unit 130 is lower than a predetermined value (for example, 1000 requests per second).

[0148] Dynamically specified example

[0149] The timing for changing the execution location of the process from the ACC 12 to the CPU 11 is as follows.

[0150] (1) When the delay condition is fully satisfied, the execution location of the process is changed to the CPU 11 .

[0151] (1-1) The delay conditions that the offload target process should satisfy are obtained in advance from APL1.

[0152] (1-2) The calculation processing offload unit 130 regularly measures the delay time required for processing.

[0153] (1-3) The measured delay time is delivered to the calculation destination determination unit 120 via the shared memory.

[0154] (1-4) The calculation destination determination unit 120 compares the measured delay time T with the delay condition R in (1-1) above, and when T is within 1 / 2 of R, changes the execution location of the process from the ACC 12 to the CPU 11 .

[0155] Next, a method of changing the execution position of the uninstall process will be described.

[0156] The calculation destination determination unit 120 writes to the shared memory between the calculation processing offload unit 130 according to the different offload processing execution locations. For example, when changing to [ACC12:1, CPU11:2], the value written in the shared memory is rewritten from 1 to 2 (1→2). The calculation processing offload unit 130 confirms the written value each time when offloading the processing, and offloads to the execution location that matches the value.

[0157] Next, a method of setting the accelerator to the power saving mode will be described.

[0158] The ACC power supply control unit 140 receives an instruction from the calculation destination determination unit 120 and performs power saving optimization on the ACC 12. The power saving optimization of the ACC 12 is as follows.

[0159] Power saving optimization example (1): Turn off the power of the accelerator.

[0160] Power saving optimization example (2): In FPGA, rewrite the circuit to consume less power.

[0161] Power saving optimization example (3): Power saving optimization is performed on the connection bus between PCIe (Peripheral Component Interconnect Express) and ACC12.

[0162] Power saving optimization example (4): reducing the number of execution cores of the accelerator.

[0163] Figure 8 To indicate switching Figure 7 Flow chart of the work of the execution location (ACC12→CPU11) of the offload object processing.

[0164] Figure 8 The processing shown is performed continuously while the application is activated.

[0165] In step S41 , the calculation destination determination unit 120 reads the data processing amount from the shared memory with the data processing amount acquisition unit 110 .

[0166] In step S42 , the calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution position based on the data processing amount.

[0167] In step S43 , the calculation destination determination unit 120 determines whether it is necessary to change the execution location from the ACC 12 to the CPU 11 .

[0168] When there is no need to change the execution location from the ACC 12 to the CPU 11 ( S43 : No), the processing of this flow is terminated.

[0169] When the execution location needs to be changed from the ACC 12 to the CPU 11 ( S43 : YES), in step S44 , the calculation destination determination unit 120 issues an instruction to change the execution location to the calculation processing offloading unit 130 .

[0170] In step S45 , the calculation destination determination unit 120 issues an instruction to the ACC power supply control unit 140 to set the ACC 12 to the power saving mode.

[0171] In step S46 , the ACC power supply control unit 140 sets the ACC 12 to the power saving mode and ends the processing of this flow.

[0172] <Switch the execution location of the offload target process (CPU11 → ACC12)>

[0173] Fig. 9 This is a diagram for explaining the operation of the accelerator offloading system for switching the execution position of the offloading target process (CPU11 → ACC12). Figure 1 The same components are denoted by the same reference numerals.

[0174] like Fig. 9 As shown, the calculation destination determination unit 120 instructs the ACC power supply control unit 140 to restore the ACC 12 from the power saving mode (see Fig. 9 The ACC power supply control unit 140 restores the ACC 12 from the power saving mode (see Fig. 9 ii), and notifies the calculation destination determination unit 120 (refer to Fig. 9 The calculation destination determination unit 120 instructs the calculation processing offload unit 130 to change the execution location of the processing (see Fig. 9 denoted by reference numeral kk).

[0175] The following describes the change determination logic of the offload processing execution position for switching the execution position of the offload target process (CPU 11 → ACC 12 ).

[0176] The logic for change determination may be statically specified logic, or may be dynamically changed by acquiring statistical information such as delay time and throughput from the calculation processing offload unit 130 .

[0177] ·Static specification example

[0178] The timing for changing the execution location of the process from the CPU 11 to the ACC 12 is as follows.

[0179] (1) The CPU usage rate used in the offload process is greater than a prescribed value (eg, 80%).

[0180] (2) The amount of processing offloaded by the arithmetic processing offload unit 130 is lower than a predetermined value (for example, 1000 requests per second).

[0181] Dynamically specified example

[0182] The timing for changing the execution location of the process from the CPU 11 to the ACC 12 is as follows.

[0183] (1) When the delay condition is fully satisfied, the execution location of the process is changed to the CPU 11 .

[0184] (1-1) The delay conditions that the offload target process should satisfy are obtained in advance from APL1.

[0185] (1-2) The calculation processing offload unit 130 regularly measures the delay time required for processing.

[0186] (1-3) The measured delay time is delivered to the calculation destination determination unit 120 via the shared memory.

[0187] (1-4) The calculation destination determination unit 120 compares the measured delay time T with the delay condition R of (1-1), and when T is greater than R, changes the execution location of the process from the CPU 11 to the ACC 12 .

[0188] Next, a method of restoring the accelerator from the power saving mode will be described.

[0189] The ACC power supply control unit 140 receives the instruction from the calculation destination determination unit 120 and returns the ACC 12 to the active state. The ACC 12 is restored as follows.

[0190] Restoration example (1): Connect the power supply of the accelerator.

[0191] Restoration example (2): Write a circuit to execute the offload object processing in the FPGA.

[0192] Recovery example (3): Cancel the power saving optimization of the connection bus between PCIe and ACC12.

[0193] Restoration example (4): Increase the number of execution cores of the accelerator.

[0194] Next, the reason why the order in which the calculation destination determination unit 120 issues instructions differs between the change from CPU 11 to ACC 12 and the change from ACC 12 to CPU 11 will be described.

[0195] When ACC12 is optimized for power saving, it is impossible to perform processing using ACC12. Therefore, in the change of execution position from ACC12 to CPU11, the execution position of the processing is switched first, and then ACC12 is optimized for power saving, and in the change of execution position from CPU11 to ACC12, ACC12 is restored first, and then the execution position of the processing is changed.

[0196] Fig.10 To indicate switching Fig. 9 Flow chart of the work of the execution location (CPU11→ACC12) of the offload object processing.

[0197] Fig.10 The processing shown is performed continuously while the application is activated.

[0198] In step S51 , the calculation destination determination unit 120 reads the data processing amount from the shared memory with the data processing amount acquisition unit 110 .

[0199] In step S52 , the calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution position based on the data processing amount.

[0200] In step S53 , the calculation destination determination unit 120 determines whether it is necessary to change the execution location from the CPU 11 to the ACC 12 .

[0201] When it is not necessary to change the execution location from the CPU 11 to the ACC 12 ( S53 : No), the processing of this flow is terminated.

[0202] When it is necessary to change the execution location from the CPU 11 to the ACC 12 ( S53 : YES), in step S54 , the calculation destination determination unit 120 instructs the ACC power supply control unit 140 to restore the ACC 12 from the power saving mode.

[0203] In step S55 , the ACC power supply control unit 140 restores the ACC 12 from the power saving mode, and notifies the calculation destination determination unit 120 that the restoration is complete.

[0204] In step S56 , the calculation destination determination unit 120 instructs the calculation processing offload unit 130 to change the processing execution location, and ends the processing of this flow.

[0205] (Second Embodiment)

[0206] [Overall structure]

[0207] Fig.11 FIG. 1 is a schematic structural diagram of an accelerator unloading system according to a second embodiment of the present invention. Figure 1 The same structural parts are denoted by the same reference numerals and the description of the repeated parts is omitted.

[0208] like Fig.11 As shown, the accelerator offloading system 1000A includes hardware (HW) 10, an operating system 20, a high-speed data communication unit 30, a traffic volume prediction information providing unit 210 provided outside the server 150, an accelerator offloading device 200, and an APL1.

[0209] In the accelerator unloading device 200 , the data processing volume acquisition unit 110 does not acquire the predicted data processing volume from the server 150 , but receives it from the traffic volume prediction information providing unit 210 outside the server 150 .

[0210] [Accelerator Unloading Device 200]

[0211] The accelerator offloading device 200 includes a traffic volume prediction information providing unit 210 provided outside the server 150 , a data processing volume acquiring unit 110 , a calculation destination determining unit 120 , a calculation processing offloading unit 130 , and an ACC power supply control unit 140 .

[0212] <Traffic Volume Forecast Information Providing Unit 210>

[0213] The traffic volume prediction information providing unit 210 provides prediction information of traffic volume increase or decrease to the data processing volume acquiring unit 110 .

[0214] The traffic volume prediction information providing unit 210 is configured using, for example, a RAN Intelligent Controller (RIC) in a vRAN (virtualized Distributed Unit).

[0215] The traffic volume prediction information providing unit 210 provides information such as prediction of traffic volume increase or decrease (hereinafter referred to as traffic volume increase or decrease prediction information) to the server 150 (e.g., vDU server in vRAN) equipped with the accelerator offloading device 200. An example of traffic volume increase or decrease prediction information is that a planned event such as a fireworks display occurs, causing the traffic volume to increase fivefold from 12:34.

[0216] <Data Processing Amount Acquisition Unit 110>

[0217] The data processing amount acquisition unit 110 receives the expected increase or decrease in the traffic volume and the time information from the traffic volume forecast information provision unit 210. The data processing amount acquisition unit 110 passes the acquired information to the calculation destination determination unit 120.

[0218] The accelerator offloading device 200 is mounted on a vDU server (server 150) in the vRAN. In this case, the data processing volume acquisition unit 110 in the vDU server receives the traffic volume increase / decrease prediction information from the RIC serving as the traffic volume prediction information providing unit 210. As an example of an acquisition method, the data processing volume acquisition unit 110 receives traffic volume increase / decrease prediction and time information from a network interface connected to the traffic volume prediction information providing unit 210.

[0219] <Calculation Destination Determining Unit 120>

[0220] The calculation destination determination unit 120 determines the execution location of the offload target process based on the "traffic volume prediction information" acquired from the data processing volume acquisition unit 110. It should be noted that the cooperation with the ACC power supply control unit 140 and the calculation processing offload unit 130 is the same as the first embodiment.

[0221] Next, the operation of the accelerator unloading device 200 of the accelerator unloading system 1000A configured as described above will be described.

[0222] <The data processing amount acquisition unit 110 acquires information and passes it to the calculation destination determination unit 120>

[0223] Fig.12 This is a diagram for explaining the operation of the accelerator offloading system in which the data processing amount acquisition unit 110 acquires information and passes it to the calculation destination determination unit 120. Fig.11 The same components are denoted by the same reference numerals.

[0224] like Fig.12 As shown, the traffic volume forecast information providing unit 210 sends information such as the expected increase or decrease of traffic volume to the data processing volume acquiring unit 110 (refer to Fig.12 The data processing amount acquisition unit 110 delivers the acquired traffic volume forecast information to the calculation destination determination unit 120 (refer to Fig.12 The handover is performed via a shared memory.

[0225] The amount of processing acquired by the data processing amount acquisition unit 110 and an example of a method thereof will be described.

[0226] Method Example (1): Receiving business volume increase and decrease information via the network

[0227] The data processing amount acquisition unit 110 receives prediction information from the traffic volume prediction information provision unit 210, such as that the traffic volume will increase fivefold or reach 6 Gbps starting at 12:34.

[0228] The data processing amount acquisition unit 110 receives the above-mentioned prediction information from a network interface connected to the traffic volume prediction information provision unit 210 .

[0229] Method Example (2): Periodically receiving current traffic information via the network

[0230] The data processing amount acquisition unit 110 periodically receives information on the current traffic amount from the traffic amount prediction information provision unit 210 .

[0231] The data processing amount acquisition unit 110 receives the above-mentioned traffic volume information from a network interface connected to the traffic volume prediction information provision unit 210 .

[0232] Method Example (3): Receiving traffic increase and decrease events via the network

[0233] The data processing amount acquisition unit 110 receives event information indicating that the amount of traffic has significantly increased or decreased since 12:34, for example, from the traffic volume forecast information provision unit 210 .

[0234] The data processing amount acquisition unit 110 receives the event information from a network interface connected to the traffic volume prediction information provision unit 210 .

[0235] Fig.13 To express Fig.12 Flowchart of the operation of the data processing amount acquisition unit 110 acquiring information and passing it to the calculation destination determination unit 120.

[0236] In step S61 , the traffic volume prediction information providing unit 210 sends information such as expected increase or decrease in traffic volume to the data processing volume acquiring unit 110 .

[0237] In step S62, the data processing volume acquisition unit 110 receives information such as expected increase or decrease in traffic volume from the traffic volume prediction information providing unit 210. This is achieved by accessing an interface connected to the traffic volume prediction information providing unit 210 on the network.

[0238] In step S63, the data processing amount acquisition unit 110 passes the acquired traffic volume prediction information to the calculation destination determination unit 120. This transfer is performed via the shared memory.

[0239] In step S64 , the calculation destination determination unit 120 reads the data from the shared memory and ends the processing of this flow.

[0240] <Switch the execution location of the offload target process (ACC12 → CPU11)>

[0241] Fig.14 This is a diagram for explaining the operation of the accelerator offloading system for switching the execution location of the offloading target process (ACC12 → CPU11). Fig.11 The same components are denoted by the same reference numerals.

[0242] like Fig.14 As shown, the calculation destination determination unit 120 reads the traffic volume prediction information from the shared memory between the calculation destination determination unit 120 and the data processing volume acquisition unit 110 (see Fig.14 Figure numerals (mm).

[0243] The calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution location based on the traffic volume prediction information, and when it is necessary to change the execution location from ACC 12 to CPU 11, it issues an instruction to change the execution location to the calculation processing offload unit 130 (see Fig.14 The calculation destination determination unit 120 issues an instruction to the ACC power supply control unit 140 to set the ACC 12 to the power saving mode (see Fig.14 ACC power supply control unit 140 sets ACC 12 to power saving mode (refer to Fig.14 pp).

[0244] The following describes the logic for determining the change of the execution location of the uninstall process.

[0245] The calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution location based on the traffic volume (traffic volume prediction information).

[0246] Example of judging execution position change

[0247] The timing for changing the processing execution location from the ACC 12 to the CPU 11 is as follows.

[0248] (1) The received traffic volume per second is less than 1 Gbps.

[0249] (2) Based on the traffic volume reduction information, it is predicted that the traffic volume per second will be less than 1 Gbps from a certain time. In this case, the calculation destination determination unit 120 instructs to change the processing execution location from the ACC 12 to the CPU 11 when the time comes.

[0250] (3) When there is event information indicating a significant decrease in the amount of business, the calculation destination determination unit 120 instructs the processing execution location to be changed from the ACC 12 to the CPU 11 .

[0251] Fig.15 To indicate switching Fig.14 Flow chart of the work of the execution location (ACC12→CPU11) of the offload object processing.

[0252] This process continues while the application is running.

[0253] In step S71 , the calculation destination determination unit 120 reads the traffic volume prediction information from the shared memory with the data processing amount acquisition unit 110 .

[0254] In step S72 , the calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution location based on the traffic volume prediction information.

[0255] In step S73, the calculation destination determination unit 120 determines whether it is necessary to change the execution location from the ACC 12 to the CPU 11. If it is not necessary to change the execution location from the ACC 12 to the CPU 11 (S73: No), the processing of this flow ends.

[0256] When the execution location needs to be changed from the ACC 12 to the CPU 11 ( S73 : YES), in step S74 , the calculation destination determination unit 120 issues an instruction to change the execution location to the calculation processing offloading unit 130 .

[0257] In step S75 , the calculation destination determination unit 120 issues an instruction to the ACC power supply control unit 140 to set the ACC 12 to the power saving mode.

[0258] In step S76 , the ACC power supply control unit 140 sets the ACC 12 to the power saving mode and ends the processing of this flow.

[0259] <Switch the execution location of the offload target process (CPU11 → ACC12)>

[0260] Fig.16This is a diagram for explaining the operation of the accelerator offloading system for switching the execution position of the offloading target process (CPU11 → ACC12). Fig.11 The same components are denoted by the same reference numerals.

[0261] like Fig.16 As shown, the calculation destination determination unit 120 reads the traffic volume prediction information from the shared memory between the calculation destination determination unit 120 and the data processing volume acquisition unit 110 (see Fig.16 Figure numerals (mm).

[0262] The calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution location based on the traffic volume prediction information, and if it is necessary to change the execution location from the CPU 11 to the ACC 12, instructs the ACC power supply control unit 140 to restore the ACC 12 from the power saving mode (see Fig.16 The ACC power supply control unit 140 restores the ACC 12 from the power saving mode (see Fig.16 rr), and notifies the calculation destination determination unit 120 (refer to Fig.16 The calculation destination determination unit 120 instructs the calculation processing offloading unit 130 to change the processing execution location ( Fig.16 tt of the figure).

[0263] The following describes the logic for determining the change of the execution location of the uninstall process.

[0264] The calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution location based on the traffic volume (traffic volume prediction information).

[0265] Example of judging execution position change

[0266] The timing for changing the processing execution location from the CPU 11 to the ACC 12 is as follows.

[0267] (1) The received traffic volume per second is higher than 1 Gbps.

[0268] (2) Based on the traffic increase information, it is predicted that the traffic volume per second will exceed 1 Gbps from a certain time. In this case, the calculation destination determination unit 120 instructs to change the processing execution location from the CPU 11 to the ACC 12 when the time comes.

[0269] (3) When there is event information indicating a significant increase in the amount of traffic, the calculation destination determination unit 120 instructs to change the processing execution location from the CPU 11 to the ACC 12 .

[0270] Fig.17 To express Fig.16Flow chart of the work of switching the offloading object processing execution location (CPU11→ACC12).

[0271] This process continues while the application is running.

[0272] In step S81 , the calculation destination determination unit 120 reads the traffic volume prediction information from the shared memory with the data processing amount acquisition unit 110 .

[0273] In step S82 , the calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution location based on the traffic volume prediction information.

[0274] In step S83, the calculation destination determination unit 120 determines whether it is necessary to change the execution location from the CPU 11 to the ACC 12. If it is not necessary to change the execution location from the CPU 11 to the ACC 12 (S83: No), the processing of this flow ends.

[0275] When it is necessary to change the execution location from the CPU 11 to the ACC 12 ( S83 : YES), in step S84 , the calculation destination determination unit 120 instructs the ACC power supply control unit 140 to restore the ACC 12 from the power saving mode.

[0276] In step S85 , the ACC power supply control unit 140 restores the ACC 12 from the power saving mode, and notifies the calculation destination determination unit 120 that the restoration is complete.

[0277] In step S86 , the calculation destination determination unit 120 instructs the calculation processing offload unit 130 to change the processing execution location, and ends the processing of this flow.

[0278] (Third Embodiment)

[0279] [Overall structure]

[0280] Fig.18 FIG. 1 is a schematic structural diagram of an accelerator unloading system according to a third embodiment of the present invention. Figure 1 The same structural parts are denoted by the same reference numerals and the description of the repeated parts is omitted.

[0281] like Fig.18 As shown, the accelerator offloading system 1000B includes hardware (HW) 10, an operating system etc. 20, a high-speed data communication unit 30, an accelerator offloading device 300, and an APL 1.

[0282] The CPU 11 includes a plurality of CPU cores (core #a) 11a, (core #b) 11b, (core #c) 11c, . . . .

[0283] [Accelerator unloading device 300]

[0284] The accelerator offloading device 300 includes a data processing amount acquisition unit 110 , a calculation destination determination unit 120 , a calculation processing offloading unit 130 , an ACC power supply control unit 140 , and a CPU performance control unit 310 .

[0285] The accelerator offloading device 300 includes a CPU performance control unit 310 . When the CPU 11 performs an offload target process, the CPU performance control unit 310 controls the CPU performance by scaling down (Scale In) or scaling up (Scale Out) the number of cores that execute the process.

[0286] The accelerator offloading device 300 reduces power consumption by controlling the frequency of the CPU 11 when offloading the offloading target process to the ACC 12 .

[0287] The CPU performance control section 310 includes a CPU core expansion section 311 and a CPU frequency control section 312 .

[0288] The CPU core expansion unit 311 increases or decreases the number of execution cores to satisfy performance requirements when the CPU 11 performs offload target processing.

[0289] The CPU frequency control unit 312 performs power saving optimization by reducing the CPU frequency during a period when no processing is performed on the CPU core, such as during a period when the offload target processing is performed by the ACC 12. The CPU frequency control unit 312 restores the frequency of the CPU 11 when the processing is restarted.

[0290] Next, the operation of the accelerator unloading device 300 of the accelerator unloading system 1000B configured as described above will be described.

[0291] The work of the accelerator unloading device 300 is divided into the following tasks for explanation: the work of changing the number of cores executing the processing (CPU11 executes the unloading object processing); the work of switching the execution position of the unloading object processing (CPU11→ACC12); the work of switching the execution position of the unloading object processing (ACC12→CPU11).

[0292] <Changing the number of cores executing processing (while CPU 11 is executing the offload target processing)>

[0293] Fig.19 This is a diagram for explaining the operation of the accelerator offloading system for changing the number of cores executing a process (while the offloading target process is being executed by the CPU 11). Fig.18 The same components are denoted by the same reference numerals.

[0294] The calculation processing offloading unit 130 is executing the offload target processing on the CPU core (core#a) 11a of the CPU 11 (see Fig.19 Figure 1 shows the reference numeral uu).

[0295] The calculation destination determination unit 120 reads the data processing amount from the shared memory with the data processing amount acquisition unit 110 (see Fig.19 Reference numeral vv).

[0296] The calculation destination determination unit 120 determines whether the offload processing execution location needs to be changed based on the data processing amount, and if the offload processing execution location needs to be changed, notifies the CPU performance control unit 310 of the intention (see Fig.19 denoted by the reference numeral ww).

[0297] The CPU core expansion unit 311 performs core allocation to increase or decrease the number of execution cores in order to meet the performance conditions when the CPU 11 performs the offload target process (see Fig.19 xx).

[0298] The CPU frequency control unit 312 reduces the CPU frequency during a period when no processing is performed on the CPU core, such as during a period when the ACC 12 performs offload processing (see Fig.19 yy).

[0299] Describes the determination and notification of the number of cores required for offload target processing.

[0300] The calculation destination determination unit 120 determines the number of cores to be allocated according to the amount of processing to be offloaded while the CPU 11 is executing the offload target processing, and notifies the CPU performance control unit 310. The determination of the number of cores to be allocated includes the following determination examples.

[0301] Example (1): Determine the increase or decrease based on the average utilization of the CPU 11 of the allocated cores

[0302] If the average usage rate is 80% or more: the number of cores of CPU 11 is increased by one; if the average usage rate is less than 30%: the number of cores of CPU 11 is decreased by one; etc.

[0303] Determination Example (2): Determine the required number based on the number of requests per second of the calculation processing offload unit 130

[0304] The number of requests per second is,

[0305] Less than 500: The number of cores of CPU11 is 1;

[0306] 500 or more but less than 750: The number of cores of CPU 11 is 2;

[0307] 750 or more but less than 1000: the number of cores of CPU11 is 3; etc.

[0308] Fig.19 The work of changing the number of cores executing the processing (the CPU 11 is executing the offload object processing) is the same as described below. Fig.21 The steps S51, S52, S53, and S94 to S96 in the flowchart correspond to each other.

[0309] <Switch the execution location of the offload target process (CPU11 → ACC12)>

[0310] Fig. 20 This is a diagram for explaining the operation of the accelerator offloading system for switching the execution position of the offloading target process (CPU11 → ACC12). Fig.18 The same components are denoted by the same reference numerals.

[0311] like Fig. 20 As shown, when the execution location needs to be changed from the CPU 11 to the ACC 12, the calculation destination determination unit 120 instructs the calculation processing offload unit 130 to change the execution location of the processing (see Fig. 20 zz).

[0312] The calculation destination determination unit 120 notifies the CPU performance control unit 310 that the processing execution location is changed from the CPU 11 to the ACC 12 (see Fig. 20 11). When the number of execution cores of the CPU 11 needs to be changed, the operation destination determination unit 120 notifies the CPU performance control unit 310 of the required number of cores. The CPU core expansion unit 311 allocates cores that match the required number of cores (see Fig.19 The CPU frequency control unit 312 reduces the frequency of the CPU core used to execute the offload target process (see reference xx). Fig.19 yy).

[0313] A description will be given of the reduction in the case where the offload target process is switched from CPU 11 to ACC 12 .

[0314] When a plurality of CPU 11 cores are allocated to the offload target process, the CPU core expansion unit 311 reduces the cores when the process execution location is offloaded from the CPU 11 to the ACC 12. That is, the CPU core expansion unit 311 releases the CPU core that was used to ensure the offload target process and reallocates it to the application process, etc.

[0315] Fig.21 To express Fig. 20 The flowchart of the work of switching the unloading object processing execution position (CPU11→ACC12). This process includes Fig.19 The work of changing the number of cores executing the processing (the offload object processing is executed by CPU11).

[0316] Fig.21 The processing shown is performed continuously while the application is started.

[0317] It should be noted that Fig.10 The same processing steps in the process are marked with the same step numbers.

[0318] In step S51 , the calculation destination determination unit 120 reads the data processing amount from the shared memory with the data processing amount acquisition unit 110 .

[0319] In step S52 , the calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution position based on the data processing amount.

[0320] In step S53 , the calculation destination determination unit 120 determines whether it is necessary to change the execution location from the CPU 11 to the ACC 12 .

[0321] When it is not necessary to change the execution location from the CPU 11 to the ACC 12 ( S53 : No), the process proceeds to step S94 .

[0322] In step S53 , when the execution location needs to be changed from the CPU 11 to the ACC 12 ( S53 : Yes), in step S91 , the calculation destination determination unit 120 instructs the calculation processing offloading unit 130 to change the execution location of the processing.

[0323] In step S92 , the calculation destination determination unit 120 notifies the CPU performance control unit 310 that the execution location of the process is changed from the CPU 11 to the ACC 12 .

[0324] In step S93 , the CPU frequency control unit 312 reduces the frequency of the CPU core used to execute the offload target process to perform power saving optimization, and ends the processing of this flow.

[0325] In the above step S53, if it is not necessary to change the execution location from CPU 11 to ACC 12 (S53: No), in step S94, the calculation destination determination unit 120 determines whether it is necessary to change the number of execution cores of CPU 11 based on the data processing amount. If it is not necessary to change the number of execution cores of CPU 11 (S94: No), the processing of this flow is terminated.

[0326] When the number of execution cores of the CPU 11 needs to be changed ( S94 : Yes), in step S95 , the calculation destination determination unit 120 notifies the CPU performance control unit 310 of the required number of cores.

[0327] In step S96 , the CPU core expansion unit 311 allocates cores corresponding to the required number of cores and ends the processing of this flow.

[0328] <Switch the execution location of the offload target process (ACC12 → CPU11)>

[0329] Fig. 22 This is a diagram for explaining the operation of the accelerator offloading system for switching the execution location of the offloading target process (ACC12 → CPU11). Fig.18 The same components are denoted by the same reference numerals.

[0330] like Fig. 22 As shown, the calculation destination determination unit 120 notifies the CPU performance control unit 310 that the execution location of the processing is changed from ACC12 to CPU11; the number of cores of CPU11 required for the offload target processing (see Fig. 22 The CPU core expansion unit 311 allocates the notified required number of cores to the offload target processing (see Fig. 22 The CPU frequency control unit 312 increases the frequency of the assigned core to the highest value (see Fig. 22 The CPU frequency control unit 312 notifies the calculation destination determination unit 120 (see Fig. 22 The calculation destination determination unit 120 issues an instruction to the calculation processing offload unit 130 to change the execution location (see Fig. 22 zz).

[0331] Describes notification of the number of cores required for offload object processing.

[0332] When the execution location of the offload target process is changed from ACC12 to CPU11, the calculation destination determination unit 120 determines the number of cores to be allocated according to the processing volume, and notifies the CPU performance control unit 310. The number of cores to be allocated has the following determination examples.

[0333] Decision example (1): Decision based on the usage rate of ACC12

[0334] The utilization rate of ACC12 is,

[0335] Less than 20%: The number of CPU cores is 1;

[0336] More than 20% and less than 50%: the number of CPU cores is 2; etc.

[0337] Decision Example (2): Decision based on the number of requests per second of the calculation processing offload unit 130

[0338] The number of requests per second is,

[0339] Less than 500: The number of CPU cores is 1;

[0340] 500 or more but less than 750: The number of CPU cores is 2;

[0341] 750 or more but less than 1000: The number of CPU cores is 3; etc.

[0342] Fig.23 To express Fig. 22 Flow chart of the work of <Switching the execution location of the offload object processing (ACC12→CPU11)>.

[0343] It should be noted that Figure 8 The same processing steps in the process are marked with the same step numbers.

[0344] In step S41 , the calculation destination determination unit 120 reads the data processing amount from the shared memory with the data processing amount acquisition unit 110 .

[0345] In step S42 , the calculation destination determination unit 120 determines whether it is necessary to change the offload processing execution position based on the data processing amount.

[0346] In step S43 , the calculation destination determination unit 120 determines whether it is necessary to change the execution location from the ACC 12 to the CPU 11 .

[0347] When there is no need to change the execution location from the ACC 12 to the CPU 11 ( S43 : No), the processing of this flow is terminated.

[0348] When the execution location needs to be changed from ACC12 to CPU11 (S43: Yes), in step S101, the calculation destination determination unit 120 notifies the CPU performance control unit 310 that the execution location of the processing is changed from ACC12 to CPU11 and the number of cores of CPU11 required for the offload target processing is changed.

[0349] In step S102 , the CPU core expansion unit 311 allocates the notified required number of cores to the offload target process.

[0350] In step S103 , the CPU frequency control unit 312 increases the frequency of the assigned core to the maximum value.

[0351] In step S104 , the CPU frequency control unit 312 notifies the calculation destination determination unit 120 of the completion of the core allocation and the frequency change.

[0352] In step S44 , the calculation destination determination unit 120 issues an instruction to the calculation processing offload unit 130 to change the execution location.

[0353] In step S45 , the calculation destination determination unit 120 issues an instruction to the ACC power supply control unit 140 to set the ACC 12 to the power saving mode.

[0354] In step S46 , the ACC power supply control unit 140 sets the ACC 12 to the power saving mode and ends the processing of this flow.

[0355] [Hardware Structure]

[0356] The accelerator unloading devices 100, 200, 300 of the above-mentioned embodiments are composed of, for example, Fig.24 The structure shown is implemented by a computer 900.

[0357] Fig.24 1 is a diagram showing a hardware configuration of an example of a computer 900 that realizes the functions of the accelerator offloading devices 100 , 200 , and 300 .

[0358] The computer 900 includes a CPU 901, a RAM 902, a ROM 903, a HDD 904, an accelerator 905, an input / output interface (I / F) 906, a media interface (I / F) 907, and a communication interface (I / F: Interface) 908. The accelerator 905 and Figure 1 , Fig.11 , Fig.18 The accelerator unloading devices 100, 200, and 300 shown correspond.

[0359] The accelerator 905 is an accelerator (device) 11 (which processes at least one of the data from the communication I / F 908 and the data from the RAM 902 at high speed). Figure 1 , Figure 5 ). In addition, as the accelerator 905, a type (look-aside type) can be used that returns the execution result to the CPU 901 or RAM 902 after executing the processing from the CPU 901 or RAM 902. On the other hand, as the accelerator 905, a type (in-line type) can also be used that enters between the communication I / F 908 and the CPU 901 or RAM 902 and performs processing.

[0360] The accelerator 905 is connected to an external device 915 via a communication I / F 908. The input / output I / F 906 is connected to an input / output device 916. The medium I / F 907 reads and writes data from a recording medium 917.

[0361] The CPU 901 operates based on the program stored in the ROM 903 or the HDD 904, and performs operations by executing the program (also referred to as an application program or its abbreviation) read into the RAM 902. Figure 1 , Fig.11 , Fig.18 The program controls each part of the accelerator unloading device 100, 200, 300 shown. In addition, the program can also be distributed via a communication line or stored in a recording medium 917 such as a CD-ROM.

[0362] The ROM 903 stores a boot program executed by the CPU 901 when the computer 900 is activated, a program depending on the hardware of the computer 900 , and the like.

[0363] The CPU 901 controls an input / output device 916 including an input unit such as a mouse and a keyboard, and an output unit such as a display and a printer, via an input / output I / F 906. The CPU 901 obtains data from the input / output device 916 via the input / output I / F 906, and outputs generated data to the input / output device 916. In addition, as a processor, a GPU (Graphics Processing Unit) or the like may be used together with the CPU 901.

[0364] HDD 904 stores programs executed by CPU 901 and data used by the programs, etc. Communication I / F 908 receives data from other devices via a communication network (eg, NW (Network)) and outputs it to CPU 901, and also transmits data generated by CPU 901 to other devices via the communication network.

[0365] The medium I / F 907 reads the program or data stored in the recording medium 917 and outputs it to the CPU 901 via the RAM 902. The CPU 901 loads the target processing program from the recording medium 917 to the RAM 902 via the medium I / F 907 and executes the loaded program. The recording medium 917 is an optical recording medium such as a DVD (Digital Versatile Disc), a PD (Phase change rewritable disk), a magneto-optical recording medium such as an MO (Magneto Optical disk), a magnetic recording medium, a conductor storage tape medium, or a semiconductor memory.

[0366] For example, when the computer 900 functions as an accelerator unloading device 100, 200, 300 constituting one of the devices of the present embodiment, the CPU 901 of the computer 900 implements the functions of the accelerator unloading device 100, 200, 300 by executing the program loaded on the RAM 902. In addition, the data in the RAM 902 is stored in the HDD 904. The CPU 901 reads and executes the program of the target processing from the recording medium 917. In addition, the CPU 901 can also read the program related to the target processing from other devices via the communication network.

[0367] [Effect]

[0368] As described above, the accelerator offloading device 100 that offloads specific processing of an application (APL1) to an accelerator (ACC12) comprises: a data processing volume acquisition unit 110 that acquires the current data processing volume of the offloaded object processing and / or the predicted data processing volume; an operation destination determination unit 120 that determines whether the operation is to be performed by CPU11 or offloaded to ACC12 based on the data processing volume of APL1, and changes the offloading destination of the operation processing offloading unit 130 when a change is required; and an operation processing offloading unit 130 that has a shared memory with CPU11 or ACC12 that performs parallel operations, accepts a request for operation processing from APL1, stores data of the processing object and processing commands in the shared memory, and enables CPU11 or ACC12 to perform the processing.

[0369] In this way, without changing the application program, the CPU performance bottleneck can be suppressed while minimizing the power consumption. That is, according to the data processing volume, by dynamically switching whether the offload object processing is performed by the CPU 11 or the ACC 12, when the data processing volume is large, the processing is offloaded to the ACC 12, which can eliminate the performance bottleneck of the CPU 11 (characteristic <1> The dynamic switching of the operation processing unit is performed transparently in APL1, so there is no need to change APL1, and no interruption of APL1 will occur during the switching (feature <2> ). When CPU 11 performs parallel calculations, the power consumption of ACC 12 can be reduced, so that the power consumption caused by installing ACC 12 can be minimized (characteristic <3> ).

[0370] In the accelerator unloading device 100 ( Figure 1 ) is characterized in that the calculation processing offload unit 130 accepts a processing request from APL1 through the same interface, stores the data of the processing object and the processing command in the shared memory, and enables CPU11 or ACC12 to execute the processing.

[0371] In this way, the operation processing offload unit 130 stores the data and processing commands to be processed in the shared memory on the hardware 10, and the parallel operation processing execution unit is assigned to either ACC12 or CPU11, and the application program will not be changed, so that specific processing of the application program (APL1) can be executed at high speed.

[0372] In the accelerator unloading device 100 ( Figure 1 ) is characterized in that the calculation processing offloading unit 130 changes the execution location of the calculation processing from ACC12 to CPU11, or from CPU11 to ACC12 when receiving a change from the calculation destination determination unit 120.

[0373] In this way, the calculation processing offload unit 130 can dynamically switch the parallel calculation processing execution unit between ACC12 and CPU11. The dynamic switching of the calculation processing unit is transparently performed in APL1, so there is no need to change APL1, and no interruption of APL1 will be generated during the switching.

[0374] In the accelerator unloading device 100 ( Figure 1 ) is characterized in that it has an ACC power control unit 140, which performs ACC power control to reduce the power of ACC12 or increase the power of ACC12 to return it to a processable state based on the unloading destination information obtained from the operation destination determination unit 120.

[0375] In this way, the calculation processing offloading unit 130 can minimize the power consumption overhead caused by carrying ACC12 by reducing the power consumption of ACC12 when CPU11 performs parallel calculations. In addition, when ACC12 is not working, the power consumption of ACC12 can be minimized.

[0376] In the accelerator unloading device 200 ( Fig.14 ) is characterized in that it has a business volume prediction information providing unit 210, which provides the prediction information of business volume increase or decrease to the data processing volume acquisition unit 110.

[0377] In this way, the calculation processing offloading unit 130 can perform not only the current data processing volume but also the calculation processing offloading using the prediction information of the traffic volume increase or decrease. In addition, the data processing volume acquisition unit 110 can acquire the predicted data processing volume from the traffic volume prediction information providing unit 210 outside the server 150 instead of acquiring the predicted data processing volume from the server 150. For example, the traffic volume prediction information providing unit 210 can use the RIC in the vRAN to send the traffic volume increase or decrease prediction information to the vDU server equipped with this system.

[0378] In the accelerator unloading device 300 ( Fig.18) is characterized in that the CPU has multiple CPU cores, and the accelerator unloading device 300 has a CPU performance control unit 310, which reduces or expands the number of cores executing processing to control the CPU performance when the above-mentioned CPU performs unloading object processing.

[0379] In this way, when the CPU 11 performs the offload target process, the number of cores executing the process can be reduced or expanded to change the performance, or when the offload target process is offloaded to the ACC 12, the power consumption can be reduced by controlling the frequency of the CPU 11.

[0380] It should be noted that, in each of the processes described in the above embodiments, all or part of the processes described as being performed automatically can be performed manually, or all or part of the processes described as being performed manually can be performed automatically by a known method. In addition, the information on the processing sequence, control sequence, specific names, various data, and parameters contained in the above articles and shown in the drawings can be changed arbitrarily unless otherwise specified.

[0381] In addition, the components of each device shown in the figure are conceptual functions and do not necessarily need to be physically configured as shown in the figure. That is, the specific distribution and integration of each device is not limited to the figure, and all or part of them can be functionally or physically dispersed and distributed in arbitrary units according to various workloads or usage conditions.

[0382] In addition, with respect to the above-mentioned structures, functions, processing units, processing methods, etc., part or all of them can also be implemented by hardware, such as by designing in an integrated circuit. In addition, the above-mentioned structures, functions, etc. can also be implemented by software for interpreting and executing programs for the processor to implement various functions. Information such as programs, tables, files, etc. that implement various functions can be stored in a recording device such as a memory, a hard disk, an SSD (Solid State Drive), or an IC (Integrated Circuit) card, an SD (Secure Digital) card, an optical disk, or other recording media.

[0383] Description of Reference Numerals

[0384] 1: APL (application);

[0385] 10: Hardware;

[0386] 11: CPU;

[0387] 11a, 11b, 11c: CPU core (core##);

[0388] 12: ACC (accelerator);

[0389] 13: Ring buffer;

[0390] 30: High-speed data communication department;

[0391] 100, 200, 300: accelerator unloading device;

[0392] 110: data processing amount acquisition unit;

[0393] 120: calculation destination determination unit;

[0394] 130: calculation processing offloading unit;

[0395] 140: ACC power supply control unit;

[0396] 210: Business volume forecast information provision department;

[0397] 1000~1000B: Accelerator unloading system.

Claims

1. An accelerator offloading device, which offloads specific processing of an application to an accelerator, characterized in that: have: A data processing volume acquisition unit, which acquires the current data processing volume of the offload object being processed and / or the predicted data processing volume; a calculation destination determination unit, which determines whether to perform the calculation by the CPU or to offload the calculation to the accelerator based on the data processing amount acquired by the data processing amount acquisition unit, and changes the offloading destination if change is necessary; as well as The operation processing offloading unit has a shared memory between the CPU or the accelerator that performs parallel operations, accepts the request for operation processing from the application, stores the data of the processing object and the processing command in the shared memory, and enables the CPU or the accelerator to execute the processing.

2. The accelerator unloading device according to claim 1, characterized in that: The arithmetic processing offloading unit receives a processing request from the application program via the same interface, stores data of a processing target and a processing command in the shared memory, and causes the CPU or the accelerator to execute the processing.

3. The accelerator unloading device according to claim 1, characterized in that: The arithmetic processing offloading unit changes the execution location of the arithmetic processing from the accelerator to the CPU or from the CPU to the accelerator when receiving the change of the offloading destination from the arithmetic processing destination determination unit.

4. The accelerator unloading device according to claim 1, characterized in that: have: The accelerator power control unit performs accelerator power control for reducing the power of the accelerator or increasing the power of the accelerator to return the accelerator to a processable state based on the offload destination information acquired from the calculation destination determination unit.

5. The accelerator unloading device according to claim 1, characterized in that: have: The business volume prediction information providing unit provides prediction information of business volume increase or decrease to the data processing volume acquiring unit.

6. The accelerator unloading device according to claim 1, characterized in that: The CPU has multiple CPU cores. The accelerator offloading device includes a CPU performance control unit that controls CPU performance by reducing or increasing the number of cores that execute processing when the CPU performs offload target processing.

7. An accelerator uninstallation method, which is an accelerator uninstallation method of an accelerator uninstallation device, wherein the accelerator uninstallation device uninstalls specific processing of an application to an accelerator, characterized in that: The accelerator unloading device performs: A step of obtaining a current data processing volume of the object being offloaded and / or a predicted data processing volume; Based on the acquired data processing amount, deciding whether to perform the calculation by the CPU or to offload the calculation to the accelerator, and changing the offloading destination if change is needed; as well as, A shared memory is provided between the CPU or the accelerator that performs parallel operations, a request for operation processing is accepted from the application, data of the processing object and processing instructions are stored in the shared memory, and the CPU or the accelerator executes the processing steps. 8 . A program for causing a computer to function as the accelerator unloading device according to claim 1 .

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