Driving module and display device

Abstract

The present application belongs to the field of display, and specifically relates to a driving module and a display device. The driving module includes a source driving chip, a polarity partition control module, a picture detection module and a selection module. Each source driving chip is connected to multiple columns of data lines of a display panel, the source driving chips of odd columns are connected to a pull-down power supply, and the source driving chips of even columns are connected to a pull-up power supply and a pull-down power supply through a polarity partition control module. The picture detection module is connected to the polarity partition control module, and is used to control the polarity partition control module to work according to the detected crosstalk degree of the display picture, so as to form a conventional polarity mode and a polarity symmetry mode; in the polarity symmetry mode, the selection module outputs a second polarity signal, and controls the polarity reversal interval of the display panel to be n rows, so as to avoid the situation where the polarity of the entire column of pixels at the junction of the display areas controlled by different source driving chips is the same, so as to improve or eliminate the crosstalk and the display unevenness caused by the bright and dark lines.

Description

Technical Field

[0001] The present application belongs to the field of display, and specifically relates to a driving module and a display device. Background Art

[0002] Thin Film Transistor Liquid Crystal Display (TFT-LCD) includes an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate. When the liquid crystal display is displayed, the pixel electrode on one side of the array substrate and the common electrode on one side of the color filter substrate form a liquid crystal capacitor (Clc) to drive the deflection of the liquid crystal molecules and control the brightness of each sub-pixel to realize the picture display. The pixel electrode and the common electrode on one side of the array substrate form a storage capacitor (Cst) to maintain the voltage of the liquid crystal capacitor.

[0003] If a single-direction electric field is applied to the liquid crystal molecules for a long time, the liquid crystal molecules may be polarized, resulting in a decrease in display quality or even damage to the liquid crystal material. By reversing the polarity and alternating the direction of the electric field, the polarization of the liquid crystal molecules can be effectively avoided. Polarity reversal methods include frame reversal, row reversal, column reversal, and dot reversal.

[0004] When the liquid crystal display is displaying, the data line provides pixel voltage to the pixel electrode. The polarity reversal makes the pixel voltage greater than or less than the voltage of the common electrode. The coupling capacitance (Cdc) formed between the data line and the pixel electrode will cause the pixel voltage to shift, resulting in crosstalk, which affects the display effect of the liquid crystal display. Summary of the invention

[0005] The purpose of the present application is to provide a driving module and a display device to improve or eliminate lateral crosstalk and improve the display effect of a liquid crystal display.

[0006] In order to achieve the above object, the present application provides a driving module, including a plurality of source driving chips, each of which is connected to a plurality of columns of data lines of a display panel, and the driving module further includes:

[0007] A polarity partition control module, wherein the source driver chips of the odd columns are connected to a pull-down power supply, and the source driver chips of the even columns are connected to a pull-up power supply and the pull-down power supply through the polarity partition control module, and the pull-down power supply includes a ground terminal;

[0008] An image detection module, connected to the display panel and the polarity partition control module, for controlling the polarity partition control module to work according to the detected crosstalk degree of the display image, so as to form a conventional polarity mode and a polarity symmetric mode;

[0009] A selection module, in the conventional polarity mode, the selection module outputs a first polarity signal to control the polarity reversal interval of the display panel to be 1 frame, and in the polarity symmetry mode, the selection module outputs a second polarity signal to control the polarity reversal interval of the display panel to be n lines, where n is greater than 1 at least for part of the time within 1 frame.

[0010] Optionally, the selection module outputs a second polarity signal to control the polarity reversal interval of the display panel to be 2 lines.

[0011] Optionally, the polarity partition control module includes a first transistor and a resistor, the control end of the first transistor is connected to the picture detection module, the first end of the first transistor is connected to the pull-up power supply, the second end of the first transistor is connected to the source driver chip of the even column through a connecting node, and the resistor connects the connecting node and the pull-down power supply.

[0012] Optionally, the selection module includes a selection unit and a signal processing unit, the selection unit includes a second transistor and a third transistor, one of the second transistor and the third transistor is a P-type transistor and the other is an N-type transistor, the control end of the second transistor and the control end of the third transistor are the control ends of the selection unit, the control end of the selection unit is directly or indirectly connected to the picture detection module, the first end of the second transistor is connected to the timing controller, the second end of the second transistor is connected to all the source driver chips, the first end of the third transistor is connected to the timing controller through the signal processing unit, and the second end of the third transistor is connected to all the source driver chips.

[0013] Optionally, the signal processing unit includes a plurality of switching transistors, the first ends of the plurality of switching transistors are respectively connected to the timing controller, the second polarity signals output by the timing controller to different switching transistors are different, the second ends of the plurality of switching transistors are all connected to the first end of the third transistor, the turn-on voltages of different switching transistors are different, and the selection module also includes a reversal control unit, the control ends of the plurality of switching transistors are all connected to the reversal control unit, and the reversal control unit is used to control one of the plurality of switching transistors to turn on.

[0014] Optionally, the signal processing unit is a frequency conversion unit, and the frequency conversion unit can convert the first polarity signal into the second polarity signal.

[0015] Optionally, the selection module further includes an inversion control unit, which is connected to the frequency conversion unit and is used to control the coefficient of frequency conversion of the frequency conversion unit.

[0016] Optionally, the selection module also includes a fourth transistor, a control end of the fourth transistor is directly or indirectly connected to the picture detection module, a first end of the fourth transistor is connected to the pull-up power supply, and a second end of the fourth transistor is connected to the control end of the selection unit.

[0017] Optionally, the control end of the fourth transistor is directly connected to the picture detection module; or

[0018] The polarity partition control module includes a first transistor and a resistor, the control end of the first transistor is connected to the picture detection module, the first end of the first transistor is connected to the pull-up power supply, the second end of the first transistor is connected to the source driver chip of the even column through a connection node, the resistor is connected to the connection node and the pull-down power supply, and the control end of the fourth transistor is connected to the connection node; or

[0019] The source driver chip of the odd column is connected to the pull-down power supply through a first signal line, and the source driver chip of the even column is connected to the polarity partition control module through a second signal line. The driving module also includes a comparison module, and the two input ends of the comparison module are respectively connected to the first signal line and the second signal line, and the output end of the comparison module is connected to the control end of the fourth transistor. The comparison module includes an OR gate circuit, a comparator or an operational amplifier.

[0020] The present application also provides a display device, comprising:

[0021] Display panel;

[0022] The driving module is connected to the display panel.

[0023] The driving module and display device disclosed in this application have the following beneficial effects:

[0024] In the present application, the driving module includes multiple source driver chips, a polarity partition control module, a picture detection module and a selection module. Each source driver chip is connected to multiple columns of data lines of the display panel. The source driver chips of odd columns are connected to the pull-down power supply, and the source driver chips of even columns are connected to the pull-up power supply and the pull-down power supply through the polarity partition control module. The picture detection module is connected to the display panel and the polarity partition control module, and is used to control the polarity partition control module to work according to the detected crosstalk degree of the display picture, forming a conventional polarity mode and a polarity symmetry mode. In the conventional polarity mode, the selection module outputs a first polarity signal to control the polarity reversal interval of the display panel to be 1 frame; in the polarity symmetry mode, the selection module outputs a second polarity signal to control the polarity reversal interval of the display panel to be n rows, so as to avoid the situation where the polarity of the entire column of pixels at the junction of the display area controlled by different source driver chips is the same, which not only improves or eliminates the crosstalk, but also improves or eliminates the display unevenness caused by bright and dark lines, that is, improves the display effect of the display panel.

[0025] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by the practice of the present application.

[0026] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0028] Figure 1 It is a structural schematic diagram of the driving module in Example 1 of the present application.

[0029] Figure 2 It is a schematic diagram of the display panel in the conventional polarity mode in the first embodiment of the present application.

[0030] Figure 3 This is a schematic diagram of the polarity symmetry of the display panel in the first embodiment of the present application.

[0031] Figure 4 It is a schematic diagram of the display panel in the conventional polarity mode in the first embodiment of the present application.

[0032] Figure 5 It is a structural diagram of the signal processing unit in Example 1 of the present application.

[0033] Figure 6This is another structural diagram of the signal processing unit in Example 1 of the present application.

[0034] Figure 7 This is a schematic diagram of converting a first polarity signal into a second polarity signal in Embodiment 1 of the present application.

[0035] Figure 8 This is a schematic diagram of the connection node controlling the fourth transistor in the first embodiment of the present application.

[0036] Fig. 9 This is a schematic diagram of the comparison module controlling the fourth transistor in the first embodiment of the present application.

[0037] Fig.10 Schematic diagram of the common electrode voltage waveform in Example 1 of the present application.

[0038] Fig.11 It is a schematic diagram of the structure of the display device in the second embodiment of the present application.

[0039] Description of reference numerals:

[0040] 100, display panel; 101, first display area; 102, second display area; 110, data line; 120, sub-pixel;

[0041] 200, driving module; 210, source driving chip; 220, polarity partition control module; 221, first transistor; 222, resistor; 230, image detection module; 231, waveform recognition unit; 240, selection module; 241, selection unit; 2411, second transistor; 2412, third transistor; 242, signal processing unit; 2421, switching transistor; 243, reversal control unit; 244, fourth transistor; 251, pull-up power supply; 252, pull-down power supply; 260, comparison module. DETAILED DESCRIPTION

[0042] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be more comprehensive and complete and fully convey the concept of the example embodiments to those skilled in the art.

[0043] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present application. However, those skilled in the art will appreciate that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps, etc. can be adopted. In other cases, known methods, devices, realizations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0044] The present application is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments of the present application described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be understood as limiting the present application.

[0045] Embodiment 1

[0046] See also Figure 1 and Figure 2 As shown, in this embodiment, the driving module 200 is used to drive the display panel 100 to display images.

[0047] The display panel 100 includes a plurality of columns of data lines 110 and a plurality of sub-pixels 120 arranged in an array, and each column of sub-pixels 120 is arranged between two adjacent data lines 110. That is, the data lines 110 have one more column than the sub-pixels 120. The sub-pixels 120 in odd-numbered rows are connected to the data lines 110 on the first side of the adjacent data lines 110 in the column where they are located, and the sub-pixels 120 in even-numbered rows are connected to the data lines 110 on the second side of the adjacent data lines 110 in the column where they are located. For example, the first side is the right side, and the second side is the left side, and the sub-pixels 120 in odd-numbered rows are connected to the data lines 110 on the right side of the adjacent data lines 110 in the column where they are located, and the sub-pixels 120 in even-numbered rows are connected to the data lines 110 on the left side of the adjacent data lines 110 in the column where they are located.

[0048] The polarity reversal mode of the display panel 100 is dot reversal, that is, the polarity of the sub-pixel 120 in the row direction and the column direction is alternately positive and negative. The polarity reversal interval of the display panel 100 is 1 frame. For example, in the current frame, the polarity of the data signal output by the multiple data lines 110 in the row direction is "+-+-" in sequence, and in the next frame, the polarity of the data signal output by the multiple data lines 110 in the row direction is "-+-+" in sequence.

[0049] The driving module 200 includes a plurality of source driver chips 210, a polarity partition control module 220, a picture detection module 230 and a selection module 240. Each source driver chip 210 is connected to a plurality of columns of data lines 110 of the display panel 100, that is, a plurality of source driver chips 210 form a plurality of columns. The total number of source driver chips 210 may be an odd number or an even number. The source driver chips 210 of the odd columns are connected to the pull-down power supply 252, and the source driver chips 210 of the even columns are connected to the pull-up power supply 251 and the pull-down power supply 252 through the polarity partition control module 220, and the pull-down power supply 252 includes a ground terminal (GND). The voltage VDD of the pull-up power supply 251 is greater than the voltage of the pull-down power supply 252.

[0050] The image detection module 230 is connected to the display panel 100 and the polarity partition control module 220, and is used to control the operation of the polarity partition control module 220 according to the detected crosstalk degree of the display image, so as to form a normal polarity mode and a polarity symmetry mode. The default state is the normal polarity mode, the pull-down power supply 252 outputs a low-level signal to the source driver chip 210 of the odd-numbered columns, and the polarity of the first display area 101 controlled by the source driver chip 210 of the odd-numbered columns is "+-+-"; the polarity partition control module 220 controls the source driver chip 210 of the even-numbered columns to be disconnected from the pull-up power supply 251, and the pull-down power supply 252 outputs a low-level signal to the source driver chip 210 of the even-numbered columns, and the polarity of the second display area 102 controlled by the source driver chip 210 of the even-numbered columns is "+-+-", such as Figure 2 shown.

[0051] When the image detection module 230 detects that the display image has serious crosstalk, the image detection module 230 controls the polarity partition control module 220 to work, and switches the display panel 100 from the normal polarity mode to the polarity symmetry mode. In the polarity symmetry mode, the polarity of the first display area 101 controlled by the source driver chip 210 of the odd column remains unchanged, the polarity partition control module 220 controls the source driver chip 210 of the even column to be turned on with the pull-up power supply 251, and the pull-up power supply 251 outputs a high-level signal to the source driver chip 210 of the even column, and the polarity of the second display area 102 controlled by the source driver chip 210 of the even column becomes "-+-+", and the polarities of adjacent display areas of the display panel 100 are symmetrical, such as Figure 3 shown.

[0052] It should be understood that if the polarity of the second display area 102 on the right is "-+-+", that is, the polarity of the adjacent first display area 101 and the second display area 102 is symmetrical, the pixel voltage and the common voltage of the first display area 101 and the second display area 102 are coupled in opposite directions, which can offset the coupling and improve or eliminate crosstalk. However, the pixel column at the junction of the first display area 101 and the second display area 102 will have the same positive polarity or negative polarity as a whole column, such as Figure 4As shown, the polarities of the sub-pixels 120 in the row and column directions of other areas of the first display area 101 and the second display area 102 alternate between positive and negative, causing the pixel columns at the junction to become brighter or darker than other areas, i.e., forming bright lines or dark lines, affecting the display effect of the display panel 100.

[0053] In order to improve or eliminate the display unevenness caused by the bright and dark lines, the driving module 200 in this embodiment further includes a selection module 240. In the normal polarity mode, the selection module 240 outputs a first polarity signal (P1) to control the polarity reversal interval of the display panel 100 to be 1 frame; in the polarity symmetric mode, the selection module 240 outputs a second polarity signal (P2) to control the polarity reversal interval of the display panel 100 to be n lines, and n is greater than 1 at least for part of the time within 1 frame.

[0054] n may be an odd or even number greater than 1, for example, the second polarity signal controls the polarity reversal interval of the display panel 100 to be 2 lines, 3 lines, 4 lines or 8 lines, etc. In addition, the polarity reversal interval within 1 frame time may also be changed, such as the reversal interval time is 2 lines and 1 line alternately, for example, the polarity of the sub-pixels 120 in the 1st and 2nd lines remains unchanged, the polarity of the sub-pixels 120 in the 3rd line is reversed, the polarity of the sub-pixels 120 in the 4th and 5th lines is reversed again, and the polarity of the sub-pixels 120 in the 6th line is reversed again; the reversal interval time of the next frame is 1 line and 2 lines alternately, for example, the polarity of the sub-pixels 120 in the 1st line remains unchanged, the polarity of the sub-pixels 120 in the 2nd and 3rd lines is reversed, the polarity of the sub-pixels 120 in the 4th line is reversed again, and the polarity of the sub-pixels 120 in the 5th and 6th lines is reversed again.

[0055] In the polarity symmetry mode, the selection module 240 outputs a second polarity signal, and the polarity of the sub-pixel 120 in the pixel column at the junction alternates between positive and negative. Although the polarity reversal method of the pixel column at the junction is not completely consistent with the polarity reversal method of other areas of the first display area 101 and the second display area 102, both perform positive and negative polarity alternation, thereby improving or eliminating the display unevenness caused by bright and dark lines.

[0056] It should be noted that the above embodiments are only described by taking the dot inversion of the display panel 100 as an example, and the polarity inversion mode of the display panel 100 also includes row inversion and column inversion, etc. No matter how the polarity inversion mode of the display panel 100 changes, as long as the polarities of adjacent display areas are symmetrical and the polarities of the entire column at the junction are the same, the driving module 200 disclosed above can be used to drive, so as to improve or eliminate the display unevenness caused by bright and dark lines.

[0057] In this embodiment, the driving module 200 includes a plurality of source driving chips 210, a polarity partition control module 220, a picture detection module 230 and a selection module 240. Each source driving chip 210 is connected to a plurality of columns of data lines 110 of the display panel 100. The source driving chips 210 of the odd columns are connected to the pull-down power supply 252. The source driving chips 210 of the even columns are connected to the pull-up power supply 251 and the pull-down power supply 252 through the polarity partition control module 220. The picture detection module 230 is connected to the display panel 100 and the polarity partition control module 220, and is used to control the crosstalk degree of the display picture according to the detected display picture. The polarity partition control module 220 is controlled to work to form a conventional polarity mode and a polarity symmetry mode. In the conventional polarity mode, the selection module 240 outputs a first polarity signal to control the polarity reversal interval of the display panel 100 to be 1 frame; in the polarity symmetry mode, the selection module 240 outputs a second polarity signal to control the polarity reversal interval of the display panel 100 to be n rows, thereby avoiding the situation where the polarities of the entire pixel columns at the junction of the display areas controlled by different source driver chips 210 are the same, thereby improving or eliminating crosstalk and improving or eliminating the display unevenness caused by bright and dark lines, that is, improving the display effect of the display panel 100.

[0058] In some embodiments, the selection module 240 outputs a second polarity signal to control the display panel 100 to have a polarity reversal interval of 2 rows. In the polarity symmetric mode, when the polarity reversal interval of the display panel 100 is 2 rows, the polarity of the pixel columns at the junction is reversed every two rows, and the polarity of the pixel columns other than the pixel columns at the junction is reversed every two rows, and the polarity reversal method is the same.

[0059] The polarity of the pixel column is reversed every two rows, and the polarity changes between the sub-pixels 120 are more dispersed. Such dispersed polarity changes can effectively reduce flicker and improve display uniformity.

[0060] In some embodiments, the polarity partition control module 220 includes a first transistor 221 and a resistor 222, the control end of the first transistor 221 is connected to the picture detection module 230, the first end of the first transistor 221 is connected to the pull-up power supply 251, and the second end of the first transistor 221 is connected to the source driver chip 210 of the even column through the connection node A. The resistor 222 connects the connection node A and the pull-down power supply 252. The first transistor 221 can be an N-type metal oxide field effect transistor (NMOS).

[0061] In the normal polarity mode, the picture detection module 230 outputs a low-level signal to the control end of the first transistor 221, the first transistor 221 is turned off, and the voltage of the connection node A is pulled down by the pull-down power supply 252, that is, the pull-down power supply 252 outputs a low-level signal to all source driver chips 210, and the polarities of the first display area 101 and the second display area 102 are both "+-+-", and the first display area 101 and the second display area 102 have the same polarity; in the polarity symmetric mode, the picture detection module 230 outputs a high-level signal to the control end of the first transistor 221, the first transistor 221 is turned on, and the pull-up power supply 251 pulls the connection node A to a high level, that is, the pull-down power supply 252 outputs a low-level signal to the source driver chips 210 of the odd columns, the polarity of the first display area 101 is "+-+-", the pull-up power supply 251 outputs a high-level signal to the source driver chips 210 of the even columns, and the polarity of the second display area 102 is "-+-+", and the polarity of the first display area 101 and the second display area 102 is symmetric.

[0062] In some embodiments, the selection module 240 includes a selection unit 241 and a signal processing unit 242. The selection unit 241 includes a second transistor 2411 and a third transistor 2412, one of which is a P-type transistor and the other is an N-type transistor. For example, the second transistor 2411 is a P-type metal oxide field effect transistor (PMOS), and the third transistor 2412 is an N-type metal oxide field effect transistor.

[0063] The control end of the second transistor 2411 and the control end of the third transistor 2412 are the control ends of the selection unit 241, and the control end of the selection unit 241 is directly or indirectly connected to the picture detection module 230. In other words, the selection unit 241 can be controlled by the control signal output by the picture detection module 230, and can also be controlled by other functional modules in the driving module 200. The first end of the second transistor 2411 is connected to the timing controller (TCON), and the second end of the second transistor 2411 is connected to all source driver chips 210; the first end of the third transistor 2412 is connected to the timing controller through the signal processing unit 242, and the second end of the third transistor 2412 is connected to all source driver chips 210.

[0064] The selection unit 241 includes a second transistor 2411 and a third transistor 2412 . The selection unit 241 is composed of two transistors. The structure of the selection unit 241 is simple, which can reduce the manufacturing cost of the driving module 200 .

[0065] See also Figure 5As shown, the signal processing unit 242 includes a plurality of switch transistors 2421, the first ends of the plurality of switch transistors 2421 are respectively connected to the timing controller, and the second ends of the plurality of switch transistors 2421 are all connected to the first end of the third transistor 2412. The second polarity signals output by the timing controller to different switch transistors 2421 are different. For example, the second polarity signal output by the timing controller to the first switch transistor 2421 controls the polarity reversal interval of the display panel 100 to be 2 lines, the second polarity signal output by the timing controller to the second switch transistor 2421 controls the polarity reversal interval of the display panel 100 to be 4 lines, and the second polarity signal output by the timing controller to the third switch transistor 2421 controls the polarity reversal interval of the display panel 100 to be 2 lines and 1 line alternately.

[0066] Different switch transistors 2421 have different turn-on voltages. The selection module 240 also includes a reversal control unit 243. The control ends of the multiple switch transistors 2421 are all connected to the reversal control unit 243. The output voltage of the reversal control unit 243 is adjustable, and it controls one of the multiple switch transistors 2421 to turn on. The reversal control unit 243 selects the polarity reversal interval of the display panel 100 through the signal processing unit 242 to determine the polarity reversal method in the column direction. The reversal control unit 243 can be connected to the picture detection module 230, and the picture detection module 230 selects the polarity reversal method in the column direction according to the display picture, or the polarity reversal method in the column direction can be manually selected.

[0067] The signal processing unit 242 includes a plurality of switch transistors 2421 . The timing controller outputs different second polarity signals to different switch transistors 2421 . By controlling the switch transistors 2421 , different second polarity signals can be selectively output, thereby realizing the selection of the polarity inversion mode in the column direction as needed.

[0068] See also Figure 6 As shown, the signal processing unit 242 is a frequency conversion unit, which can convert the first polarity signal into the second polarity signal. The first polarity signal and the second polarity signal have different frequencies, such as Figure 7 shown.

[0069] The signal processing unit 242 is a frequency conversion unit, which can convert a first polarity signal into a second polarity signal. The timing controller only needs to output a first polarity signal, which can simplify the structure of the timing controller and reduce the manufacturing cost of the driving module 200.

[0070] In some embodiments, the selection module 240 further includes a reversal control unit 243, which is connected to the frequency conversion unit, and the reversal control unit 243 is used to control the coefficient of the frequency conversion of the frequency conversion unit. For example, a high level or low level time of the first polarity signal is 1 frame, and a high level or low level time of the second polarity signal is the time for scanning 2 rows, 4 rows, etc., specifically the time for scanning 2 rows or 4 rows, which is controlled by the reversal control unit 243. In other words, the reversal control unit 243 selects the polarity reversal interval of the display panel 100 through the signal processing unit 242 to determine the polarity reversal method in the column direction. The reversal control unit 243 can be connected to the picture detection module 230, and the picture detection module 230 selects the polarity reversal method in the column direction according to the display picture, or the polarity reversal method in the column direction can be manually selected.

[0071] The frequency conversion unit is connected to the inversion control unit 243. The inversion control unit 243 can convert the frequency of the frequency conversion unit to select and output different second polarity signals, thereby realizing the selection of the polarity inversion mode in the column direction as needed.

[0072] In some embodiments, the selection module 240 further includes a fourth transistor 244, a control terminal of the fourth transistor 244 is directly or indirectly connected to the picture detection module 230, a first terminal of the fourth transistor 244 is connected to the pull-up power supply 251, and a second terminal of the fourth transistor 244 is connected to the control terminal of the selection unit 241. The fourth transistor 244 can be an N-type metal oxide field effect transistor.

[0073] The fourth transistor 244 controls the pull-up power source 251 to write power into the fourth transistor 244 , and the pull-up power source 251 controls the selection unit 241 to work, thereby preventing the control signal output by the image detection module 230 from attenuating and affecting the operation of the selection unit 241 .

[0074] In some embodiments, the control terminal of the fourth transistor 244 is directly connected to the image detection module 230, such as Figure 1 It should be understood that when the fourth transistor 244 is not provided, the control terminal of the selection unit 241 can be directly connected to the picture detection module 230 .

[0075] The fourth transistor 244 and the first transistor 221 are both connected to the picture detection module 230. The high and low level control signals output by the picture detection module 230 control the two transistors at the same time. The picture detection module 230 outputs a high level control signal to control the polarity partition control module 220 to switch to the polarity symmetry mode while controlling the selection module 240 to output a second polarity signal to avoid the situation where the polarity of the entire pixel column at the junction of the display areas controlled by different source driver chips 210 is the same.

[0076] In some embodiments, the control terminal of the fourth transistor 244 is connected to the connection node A. Figure 8 shown.

[0077] When the display screen has serious crosstalk, the screen detection module 230 outputs a high-level signal to the control end of the first transistor 221, the first transistor 221 is turned on, the pull-up power supply 251 pulls the connection node A to a high level, and the pull-up power supply 251 outputs a high-level signal to the source driver chip 210 of the even-numbered columns. The polarity of the first display area 101 and the second display area 102 are symmetrical, forming a polarity symmetrical mode. At the same time, the control end of the connection node A voltage is written to the selection unit 241, and the control selection module 240 outputs a second polarity signal to avoid the situation where the polarity of the entire pixel column at the junction of the display areas controlled by different source driver chips 210 is the same.

[0078] By controlling the selection module 240 with the voltage of the connection node A, the number of transistors controlled by the picture detection module 230 can be reduced, thereby preventing the control signal output by the picture detection module 230 from being attenuated and affecting the operation of the selection unit 241 .

[0079] In some embodiments, the source driver chips 210 of the odd columns are connected to the pull-down power supply 252 through the first signal line, and the source driver chips 210 of the even columns are connected through the second signal line polarity partition control module 220. The driving module 200 also includes a comparison module 260, the two input terminals of the comparison module 260 are respectively connected to the first signal line and the second signal line, and the output terminal of the comparison module 260 is connected to the control terminal of the fourth transistor 244. Fig. 9 The comparison module 260 includes a comparator or an operational amplifier.

[0080] In the polarity symmetry mode, the first signal line signal is a low-level control signal, the second signal line signal is a high-level control signal, the voltages of the first signal line signal and the second signal line signal are different, the output end of the comparator or the operational amplifier outputs a high-level signal, and the control selection module 240 outputs a second polarity signal to avoid the situation where the polarities of the entire pixel column at the junction of the display area controlled by different source driver chips 210 are the same.

[0081] By using the first signal line and the second signal line to control the selection module 240 , the number of transistors controlled by the picture detection module 230 can be reduced, thereby preventing the control signal output by the picture detection module 230 from being attenuated and affecting the operation of the selection unit 241 .

[0082] It should be noted that the comparison module 260 may be a comparator or an operational amplifier, but is not limited thereto. The comparison module 260 may also be an OR gate circuit, depending on the specific situation.

[0083] In some embodiments, the picture detection module 230 is a timing controller, which includes a waveform recognition unit 231, which is connected to the common electrode of the display panel 100 and the polarity partition control module 220, and the waveform recognition unit 231 is used to control the polarity partition control module 220 to turn on the source driver chip 210 and the pull-up power supply 251 of the even-numbered columns when the common electrode voltage Vcom exceeds the preset interval. It should be noted that the picture detection module 230 can be a timing controller, but is not limited thereto, and the picture detection module 230 can also be an additional detection module, which can be determined according to the specific situation.

[0084] When the pixel voltage is offset during crosstalk, it will cause the common electrode voltage Vcom to fluctuate. In the waveform recognition unit 231, an interval value is set according to the common electrode voltage Vcom, that is, a positive and negative trigger value m1 and m2 are set, such as Fig.10 As shown, when it is identified that the common electrode voltage Vcom exceeds the preset interval (greater than m1 or less than m2, indicating serious crosstalk and poor picture quality), a high-level signal is output to the source driver chip 210 of the even-numbered columns, and the display panel 100 switches to the polarity symmetric mode, and the pixel voltages and common voltages of the adjacent first display area 101 and second display area 102 are coupled in opposite directions, thereby offsetting the coupling and improving or eliminating the crosstalk. On the contrary, when the common electrode voltage Vcom does not exceed the preset interval, the display panel 100 is in the normal polarity mode.

[0085] In some technical solutions, the timing controller can detect the display screen and control the display panel 100 to a conventional polarity mode or a polarity symmetric mode according to the display screen. When using the timing controller to detect the display screen, some complex screens may not be detected, and the detection must be performed based on the pixel arrangement structure and number. The existing known crosstalk screens may not be complete. If a new screen has crosstalk later, then the pixel structure of this screen is different from the existing one, and the timing controller cannot detect it. In addition, the crosstalk phenomenon of different liquid crystals is inconsistent, and the unified setting cannot be fully compatible, which requires more debugging time.

[0086] In this embodiment, the waveform recognition unit 231 is connected to the common electrode of the display panel 100 and the polarity partition control module 220. The waveform recognition unit 231 switches the display panel 100 to a conventional polarity mode or a polarity symmetric mode according to the common electrode voltage Vcom. Compared with the solution of using a timing controller to detect the display screen, it can be generally used to detect different crosstalk phenomena.

[0087] Embodiment 2

[0088] See also Fig.11As shown, the display device in this embodiment includes the driving module 200 disclosed in the first embodiment and the display panel 100 , and the display panel 100 is connected to the source driving chip 210 of the driving module 200 .

[0089] In this embodiment, the display device includes a driving module 200, which includes a plurality of source driving chips 210, a polarity partition control module 220, a picture detection module 230 and a selection module 240. Each source driving chip 210 is connected to a plurality of columns of data lines 110 of the display panel 100, the source driving chips 210 of the odd columns are connected to the pull-down power supply 252, and the source driving chips 210 of the even columns are connected to the pull-up power supply 251 and the pull-down power supply 252 through the polarity partition control module 220. The picture detection module 230 is connected to the display panel 100 and the polarity partition control module 220, and is used to detect the display picture according to the detected The crosstalk degree controls the polarity partition control module 220 to work, forming a conventional polarity mode and a polarity symmetry mode. In the conventional polarity mode, the selection module 240 outputs a first polarity signal to control the polarity reversal interval of the display panel 100 to be 1 frame; in the polarity symmetry mode, the selection module 240 outputs a second polarity signal to control the polarity reversal interval of the display panel 100 to be n rows, thereby avoiding the situation where the polarity of the entire pixel column at the junction of the display area controlled by different source driver chips 210 is the same, thereby improving or eliminating the crosstalk and the display unevenness caused by the bright and dark lines, that is, improving the display effect of the display panel 100 and the display device.

[0090] The terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first", "second", etc. may explicitly or implicitly include one or more of the feature. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0091] In this application, unless otherwise clearly specified and limited, the terms "assembly", "connection" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0092] In the description of this specification, the description with reference to the terms "some embodiments", "exemplarily", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0093] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application. Therefore, any changes or modifications made in accordance with the claims and description of the present application should fall within the scope of the patent of this application.

Claims

1. A driving module, comprising a plurality of source driving chips, each of which is connected to a plurality of columns of data lines of a display panel, characterized in that: The driving module also includes: A polarity partition control module, wherein the source driver chips of the odd columns are connected to a pull-down power supply, and the source driver chips of the even columns are connected to a pull-up power supply and the pull-down power supply through the polarity partition control module, and the pull-down power supply includes a ground terminal; An image detection module, connected to the display panel and the polarity partition control module, for controlling the polarity partition control module to work according to the detected crosstalk degree of the display image, so as to form a conventional polarity mode and a polarity symmetric mode; A selection module, in the conventional polarity mode, the selection module outputs a first polarity signal to control the polarity reversal interval of the display panel to be 1 frame, and in the polarity symmetry mode, the selection module outputs a second polarity signal to control the polarity reversal interval of the display panel to be n lines, where n is greater than 1 at least for part of the time within 1 frame.

2. The driving module according to claim 1, characterized in that: The selection module outputs a second polarity signal to control the polarity reversal interval of the display panel to be 2 lines.

3. The driving module according to claim 1, characterized in that: The polarity partition control module includes a first transistor and a resistor, the control end of the first transistor is connected to the picture detection module, the first end of the first transistor is connected to the pull-up power supply, the second end of the first transistor is connected to the source driver chip of the even column through a connecting node, and the resistor connects the connecting node and the pull-down power supply.

4. The driving module according to claim 1, characterized in that: The selection module includes a selection unit and a signal processing unit, the selection unit includes a second transistor and a third transistor, one of the second transistor and the third transistor is a P-type transistor and the other is an N-type transistor, the control end of the second transistor and the control end of the third transistor are the control ends of the selection unit, the control end of the selection unit is directly or indirectly connected to the picture detection module, the first end of the second transistor is connected to the timing controller, the second end of the second transistor is connected to all the source driver chips, the second transistor is used to output the first polarity signal provided by the timing controller to all the source driver chips, the first end of the third transistor is connected to the timing controller through the signal processing unit, the second end of the third transistor is connected to all the source driver chips, and the third transistor is used to output the second polarity signal provided by the signal processing unit to all the source driver chips.

5. The driving module according to claim 4, characterized in that: The signal processing unit includes a plurality of switching transistors, the first ends of the plurality of switching transistors are respectively connected to the timing controller, the second polarity signals output by the timing controller to different switching transistors are different, the second ends of the plurality of switching transistors are all connected to the first end of the third transistor, the turn-on voltages of different switching transistors are different, and the selection module also includes a reversal control unit, the control ends of the plurality of switching transistors are all connected to the reversal control unit, and the reversal control unit is used to control one of the plurality of switching transistors to turn on.

6. The driving module according to claim 4, characterized in that: The signal processing unit is a frequency conversion unit, and the frequency conversion unit can convert the first polarity signal into the second polarity signal.

7. The driving module according to claim 6, characterized in that: The selection module further includes an inversion control unit, which is connected to the frequency conversion unit and is used to control the coefficient of frequency conversion of the frequency conversion unit.

8. The driving module according to claim 4, characterized in that: The selection module further includes a fourth transistor, a control end of the fourth transistor is directly or indirectly connected to the picture detection module, a first end of the fourth transistor is connected to the pull-up power supply, and a second end of the fourth transistor is connected to the control end of the selection unit.

9. The driving module according to claim 8, characterized in that: The control end of the fourth transistor is directly connected to the picture detection module; or The polarity partition control module includes a first transistor and a resistor, the control end of the first transistor is connected to the picture detection module, the first end of the first transistor is connected to the pull-up power supply, the second end of the first transistor is connected to the source driver chip of the even column through a connection node, the resistor is connected to the connection node and the pull-down power supply, and the control end of the fourth transistor is connected to the connection node; or The source driver chip of the odd column is connected to the pull-down power supply through a first signal line, and the source driver chip of the even column is connected to the polarity partition control module through a second signal line. The driving module also includes a comparison module, and the two input ends of the comparison module are respectively connected to the first signal line and the second signal line, and the output end of the comparison module is connected to the control end of the fourth transistor. The comparison module includes an OR gate circuit, a comparator or an operational amplifier.

10. A display device, characterized in that: include: Display panel; The driving module according to any one of claims 1 to 9, connected to the display panel.

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