Edge polishing detection method and device and medium

Abstract

The invention provides an edge polishing detection method and device and a medium. The detection method comprises the following steps: uniformly forming concave holes in the edge part of a test wafer subjected to an edge grinding process through a laser beam; the subsurface damage depth generated in the edge grinding procedure is detected according to the shape of the inner wall of each concave hole; and determining the polishing removal amount of the edge polishing process according to the subsurface damage depth.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor manufacturing technology, and in particular to an edge polishing detection method, device and medium. Background Art

[0002] As the integration of semiconductor devices increases, the edge of the wafer is required to be as free of contamination as possible and have a low roughness. Usually, the following processing steps are performed on the edge of the wafer to remove damage to the edge and make the wafer mirror-finished, namely, edge grinding and edge polishing. In the edge grinding process, a metal or resin grinding wheel with a set mesh size is used to grind the edge of the wafer through high rotation. During this grinding process, mechanical damage will inevitably be caused to the edge surface of the wafer and the sub-surface at a shallow depth from the surface. These damages can be eliminated through the edge polishing process.

[0003] However, if the depth of some damage is too deep and the edge polishing process cannot completely eliminate the mechanical damage, then the mechanical damage remaining at the edge of the wafer will reduce the strength of the wafer, resulting in the risk of wafer breakage during the processing of semiconductor devices. Summary of the invention

[0004] The present invention provides an edge polishing detection method, device and medium, which can reduce the edge roughness and edge defect incidence rate after the edge polishing process.

[0005] The technical solution of the present disclosure is achieved as follows: In a first aspect, the present disclosure provides a method for detecting edge polishing, the method for detecting edge polishing comprising: Uniformly forming a cavity on an edge portion of a test wafer that has undergone an edge grinding process by a laser beam; detecting the depth of sub-surface damage caused by the edge grinding process according to the inner wall morphology of each cavity; The polishing removal amount of the edge polishing process is determined according to the sub-surface damage depth.

[0006] In some optional examples, detecting the depth of sub-surface damage caused by the edge grinding process according to the inner wall morphology of each cavity includes: Acquire an image of the inner wall morphology of each cavity; Identify cracks extending from the edge of each cavity to the interior of each cavity in each image; The sub-surface damage depth is determined based on the length of the crack inside each cavity.

[0007] In some optional examples, determining the sub-surface damage depth according to the length of the crack inside each cavity includes: Determine the maximum length of the crack from the lengths of all cracks inside the cavity; The maximum length is determined as the sub-surface damage depth.

[0008] In some optional examples, determining the sub-surface damage depth according to the length of the crack inside each cavity includes: The mean and variance of the lengths of the cracks inside all the pits are obtained, and the sub-surface damage depth is determined according to the mean and variance.

[0009] In some optional examples, determining the polishing removal amount of the edge polishing process according to the sub-surface damage depth includes: determining a correction value for polishing removal amount according to the subsurface damage depth; The polishing removal amount of the edge polishing step is determined according to the reference polishing removal amount and the correction value.

[0010] In some optional examples, uniformly forming a cavity on an edge portion of a test wafer that has completed an edge grinding process by a laser beam includes: Determine at least one uniformly distributed detection position on an edge portion of the test wafer; The laser beam is used to blast the concave holes into the chamfered surfaces of the upper and lower surfaces and the edge surface at each detection position.

[0011] In some optional examples, after the test wafer performs the edge polishing process according to the polishing removal amount, the method further includes: When the concave holes at the edge of the test wafer still exist, detecting whether there is sub-surface damage according to the inner wall morphology of each concave hole; When the subsurface damage is absent, the test wafer is edge polished again to eliminate the pits.

[0012] In some optional examples, after the test wafer performs the edge polishing process according to the polishing removal amount, the method further includes: When the concave portion of the edge portion of the test wafer does not exist, the test wafer is subjected to a final polishing process.

[0013] In some optional examples, after determining the polishing removal amount of the edge polishing process according to the sub-surface damage depth, the method further includes mixing the test wafer into the wafer to be processed and performing the edge polishing process according to the polishing removal amount of the edge polishing process.

[0014] In a second aspect, the present disclosure provides an edge polishing detection device, the device comprising: a cavity forming unit configured to uniformly form a cavity on an edge portion of the test wafer that has completed an edge grinding process by using a laser beam; a detection unit configured to determine the depth of sub-surface damage caused by the edge grinding process according to the inner wall morphology of each cavity; The determination unit is configured to determine a polishing removal amount of an edge polishing process according to the sub-surface damage depth.

[0015] In a third aspect, the present disclosure provides an edge polishing detection device, the device comprising: a processor and a memory; the processor is used to execute instructions stored in the memory to implement the edge polishing detection method as described in the first aspect.

[0016] In a fourth aspect, the present disclosure provides a computer storage medium storing at least one instruction, wherein the at least one instruction is used to be executed by a processor to implement the edge polishing detection method as described in the first aspect.

[0017] The present invention provides an edge polishing detection method, device and medium. After a laser beam bombards a cavity at the edge of a test wafer that has completed an edge grinding process, the sub-surface damage depth is detected according to the inner wall morphology of the cavity, and the polishing removal amount of a subsequent edge polishing process is determined according to the sub-surface damage depth. The mechanical damage generated in the edge grinding process can be eliminated to the greatest extent, the elimination rate of mechanical damage in the edge polishing process is improved, and the edge roughness and edge defect incidence rate after the edge polishing process are reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A cross-sectional view of the appearance surface of the wafer provided by the present invention in the height direction of the wafer.

[0019] Figure 2 A schematic flow chart of an edge polishing detection method provided in the present invention.

[0020] Figure 3 A schematic top view of the surface of a test wafer provided in the present disclosure.

[0021] Figure 4 A schematic diagram of the composition of an edge polishing detection device provided by the present invention.

[0022] Figure 5 A schematic diagram of the composition of another edge polishing detection device provided in the present invention.

[0023] Figure 6 A schematic structural diagram of an edge polishing detection device provided by the present invention. DETAILED DESCRIPTION

[0024] The technical solutions in the present disclosure will be described clearly and completely below in conjunction with the accompanying drawings in the present disclosure.

[0025] In this disclosure, Figure 1 A cross-sectional view showing the appearance surface of wafer 1 in the wafer height direction. Figure 1 In the embodiment, the wafer 1 includes an upper surface 2 and a lower surface 3. Since these two surfaces are consistent with the radial direction of the wafer 1, they can also be referred to as the radial surface portion of the wafer in the embodiment of the present invention. In addition, the wafer 1 also includes an edge portion 7 composed of a chamfered surface 4 on the upper surface side, a chamfered surface 5 on the lower surface side, and an edge surface 6. For the edge portion 7, the chamfered surface 4 on the upper surface side and the chamfered surface 5 on the lower surface side are inclined relative to the upper surface 2 and the lower surface 3, and the edge surface 6 is the portion of the edge portion 7 other than the chamfered surface 4 on the upper surface side and the chamfered surface 5 on the lower surface side, and is perpendicular to the upper surface 2 and the lower surface 3. The edge surface 6 can also be a curved surface. The boundaries between the chamfered surface 4 on the upper surface side and the chamfered surface 5 on the lower surface side and the edge surface 6 are as shown in FIG. Figure 1 As shown, it is usually smoothly formed.

[0026] During the wafer processing process, the edge of the wafer obtained by cutting usually has damages such as edges, burrs, broken edges, and even cracks, and the edge surface is relatively rough. The edge grinding process can not only remove these damages, but also provide a relatively flat surface as a processing basis for the subsequent edge polishing process. Specifically, the edge grinding process is to fix the wafer on a rotatable hard carrier, and a high-speed rotating grinding wheel is provided in the edge direction of the wafer. By controlling the hard carrier, the wafer and the grinding wheel make a relative high-speed rotational motion, and at the same time, add appropriate grinding fluid to grind the edge of the wafer to the required diameter size tolerance and edge profile shape, and complete the grinding of the wafer edge. Since the grinding wheel is usually made of metal or resin, during the edge grinding process, the relative high-speed rotational motion between the wafer and the grinding wheel will inevitably cause mechanical damage to the edge surface of the wafer and the sub-surface at a shallow depth from the surface. It should be noted that "sub-surface" refers to a material layer located below the surface of the wafer, such as an area only a few microns to tens of microns deep from the surface. Compared with direct mechanical damage on the wafer surface, subsurface damage is a hidden damage that cannot be directly observed by the naked eye. After the edge grinding process, the wafer edge can be polished by means such as chemical-mechanical polishing (CMP). This edge polishing process can not only remove or reduce mechanical damage, but also further reduce the roughness of the wafer edge.

[0027] However, during the wafer processing, the depth of surface and sub-surface mechanical damage at different positions on the wafer edge is not consistent. In order to eliminate these mechanical damages as much as possible in the edge polishing process, the above-mentioned mechanical damages at different positions on the wafer edge need to be considered when determining the polishing removal amount of the edge polishing process.

[0028] Based on this, see Figure 2 , which shows an edge polishing detection method provided by the present disclosure, and the edge polishing detection method includes steps S201 to S203.

[0029] In step S201 , a laser beam is used to uniformly form a cavity on an edge portion of a test wafer that has undergone an edge grinding process.

[0030] In this disclosure, you can choose Figure 1 The wafer 1 shown in FIG. 1 is used as a test wafer 10. Figure 3 The top view of the surface of the test wafer 10 shown in FIG. 1 is illustratively a region of 3-5 mm starting from the periphery of the test wafer 10 toward the center O of the test wafer. Figure 3 The circular area between the dotted circle and the solid circle is defined as the edge portion 7 of the test wafer 10. Based on this definition, Figure 3 The edge portion 7 shown in FIG. Figure 1 The chamfered surface 4 on the upper surface side, the chamfered surface 5 on the lower surface side, and the edge surface 6 are shown.

[0031] In the specific implementation process, in order to be able to comprehensively detect the depth of sub-surface damage of the edge portion caused by the edge grinding process, the present disclosure evenly arranges multiple detection positions on the edge portion 7 of the test wafer that has completed the edge grinding process, and blasts a cavity at each detection position by a laser beam. It should be noted that the depth of the cavity can be determined based on the target removal amount of the edge polishing process and the number of grinding wheels used when the test wafer is chamfered. In some examples, when using a grinding wheel with a mesh of 800 to 3000 to chamfer the test wafer, the depth of the cavity is typically 2 microns to 20 microns.

[0032] It is understandable that these pits can be removed in a subsequent edge polishing process and therefore will not cause damage to the final test wafer, compared to conventional solutions that require destructive detection of sub-surface damage on the test wafer.

[0033] In some examples, such as Figure 3 As shown, the line connecting the notch of the test wafer and the center O is used as a reference, and the test position is rotated counterclockwise one by one according to the set angle θ, so as to obtain evenly distributed test positions. In some examples, the set angle θ can be 30 degrees, 45 degrees, 60 degrees, 90 degrees, etc.

[0034] In some examples, since the semiconductor device manufacturing process is usually performed only on the upper surface of the wafer, it is possible to blast a cavity only on the chamfered surface 4 on the upper surface side of the edge portion 7 at each detection position by a laser beam.

[0035] In some examples, in order to more accurately obtain the damage depth caused by the edge grinding process, the chamfered surface 4 on the upper surface side, the chamfered surface 5 on the lower surface side and the edge surface 6 of the edge portion 7 at each detection position can be blasted with a laser beam to form a cavity.

[0036] In step S202, the depth of sub-surface damage caused by the edge grinding process is detected according to the inner wall morphology of each cavity.

[0037] It should be noted that almost all mechanical damage existing on the edge surface of the test wafer can be removed in the edge polishing process. However, due to the different depths of the damage, mechanical damage at a shallow depth (sub-surface) from the edge surface of the test wafer may not be completely eliminated if a conventional edge polishing process is performed according to the default polishing removal amount (also referred to as the reference polishing removal amount in this disclosure). Based on this, after detecting the sub-surface damage depth of the inner wall of each cavity corresponding to each detection position in step S202, the reference polishing removal amount can be corrected according to these sub-surface damage depths. Performing the edge polishing process according to the corrected polishing removal amount can remove as much sub-surface damage as possible.

[0038] In some possible implementations, detecting the depth of sub-surface damage caused by the edge grinding process according to the inner wall morphology of each cavity includes: Acquire an image of the inner wall morphology of each cavity; Identify cracks extending from the edge of each cavity to the interior of each cavity in each image; The sub-surface damage depth is determined based on the length of the crack inside each cavity.

[0039] For the above implementation, specifically, an image of the inner wall morphology of each cavity can be collected by means of optical microscope, scanning electron microscope (SEM), atomic force microscope (AFM) and X-ray micro-tomography. Then, for the acquired image, the image area that is significantly different from the inner wall background of the cavity can be screened out in the acquired image by means of image analysis and processing, and whether there is a crack pattern in these image areas can be identified. After the crack pattern is identified, the length of the crack obtained by measurement can be used to determine the sub-surface damage depth of each cavity. For example, taking the height direction of the test wafer as the projection direction, the length of the crack in the cavity in the projection direction can be determined as the sub-surface damage depth of the cavity.

[0040] It should be noted that the sub-surface damage depth at each detection position on the edge of the test wafer is different. In the present disclosure, the sub-surface damage depths at all detection positions are statistically analyzed, and the sub-surface damage depth used to characterize the overall edge of the test wafer is determined based on the statistical results.

[0041] In some examples, determining the sub-surface damage depth according to the length of the crack inside each pit includes: Determine the maximum length of the crack from the lengths of all cracks inside the cavity; The maximum length is determined as the sub-surface damage depth.

[0042] For the above example, specifically, if the polishing removal amount is corrected according to the subsurface damage depth determined by the maximum length of the crack, then performing the edge polishing process according to the corrected polishing removal amount will remove these cracks to the maximum extent, thereby eliminating the subsurface damage at the edge of the test wafer.

[0043] In some examples, determining the sub-surface damage depth according to the length of the crack inside each pit includes: The mean and variance of the lengths of the cracks inside all the pits are obtained, and the sub-surface damage depth is determined according to the mean and variance.

[0044] For the above example, specifically, the numerical range of the depth of most subsurface damage can be determined according to a set number of variance ranges (e.g., 3 or 6 variance ranges) with the mean value of the crack length as the center, and the subsurface damage depth can be determined according to the numerical range. Then, the polishing removal amount is corrected according to the subsurface damage depth, and then the edge polishing process is performed according to the corrected polishing removal amount, which will eliminate most of the cracks and further eliminate most of the subsurface damage at the edge of the test wafer.

[0045] In step S203, a polishing removal amount of an edge polishing process is determined according to the sub-surface damage depth.

[0046] In the present disclosure, after obtaining the sub-surface damage depth characterizing the entire edge of the test wafer through the above step S202, the default baseline polishing removal amount of the edge polishing equipment can be corrected based on the sub-surface damage depth to obtain the polishing removal amount used when performing the edge polishing process.

[0047] In some examples, determining the polishing removal amount of the edge polishing process according to the subsurface damage depth includes: determining a correction value for polishing removal amount according to the subsurface damage depth; The polishing removal amount of the edge polishing step is determined according to the reference polishing removal amount and the correction value.

[0048] For the above example, specifically, when the subsurface damage depth is less than or equal to the reference polishing removal amount, it means that the subsurface damage can be completely removed by performing the edge polishing process according to the reference polishing removal amount. When the subsurface damage depth is greater than the reference polishing removal amount, it means that the subsurface damage of the edge cannot be completely removed by performing the edge polishing process according to the reference polishing removal amount, and the reference polishing removal amount needs to be corrected so that the subsurface damage can be removed to the maximum extent when the corrected polishing removal amount is used as the polishing removal amount of the edge polishing process.

[0049] Through the above technical scheme, after the laser beam bombards the cavity at the edge of the test wafer that has completed the edge grinding process, the sub-surface damage depth is detected according to the inner wall morphology of the cavity, and the polishing removal amount of the subsequent edge polishing process is determined according to the sub-surface damage depth. This can eliminate the mechanical damage generated in the edge grinding process to the greatest extent, improve the elimination rate of mechanical damage in the edge polishing process, and reduce the edge roughness and edge defect incidence rate after the edge polishing process.

[0050] After the edge polishing process is performed based on the above technical solution, the cavity at the edge of the test wafer can also be detected to determine whether the cavity exists.

[0051] In some examples, if the concave hole does not exist at the edge of the test wafer, it can be indicated that the edge polishing process removes the concave hole, and the mechanical damage on the inner wall of the concave hole is also eliminated. In this case, the test wafer that has completed the edge polishing process can be subjected to subsequent wafer processing processes, such as a final polishing process.

[0052] In some examples, if the pits still exist, the inner wall morphology of each pit can be further detected to see if there is sub-surface damage. It should be noted that the detection process is the same as the method of detecting cracks inside the pits in the aforementioned technical solution, and will not be repeated here.

[0053] When the concave cavity does not have the sub-surface damage, it means that the aforementioned edge polishing process has completely removed the sub-surface damage at the edge of the test wafer, and the test wafer can be subjected to an edge polishing process again to eliminate the concave cavity.

[0054] When the sub-surface damage still exists in the pit, it means that the sub-surface damage at the edge of the test wafer is too deep and cannot be removed even if the edge polishing process is performed again. In this case, the test wafer can be considered as a test wafer with edge sub-surface damage, and subsequent processing steps will no longer be performed.

[0055] In actual production, considering production cost and efficiency issues, it may not be possible to form a cavity on all the processed wafers. In view of this, in some examples, after determining the polishing removal amount of the edge polishing process according to the subsurface damage depth, the method may further include mixing a test wafer into the wafer to be processed, and performing the edge polishing process according to the polishing removal amount of the edge polishing process.

[0056] For example, concave holes can be formed evenly on the edge parts of 5 test wafers, and the test wafers with concave holes can be mixed into 100 wafers to be processed, so as to undergo subsequent edge polishing processes on the same edge polishing equipment. After the edge polishing process is completed, by detecting the condition of the concave holes on the test wafers, such as the depth of the concave holes on the test wafers, the size change or whether the concave holes on the test wafers are completely eliminated, it can be inferred whether the treatment effect of the polishing process on the wafer edge is uniform, and whether there is a difference in efficiency or effect when the polishing equipment processes wafers at different stages. According to the above test results, the edge polishing process parameters can be optimized, such as adjusting the polishing force, time and flow rate of the polishing liquid according to the test results. Moreover, the above test results can also reflect the wear of the equipment or the storage of consumables, providing a basis for equipment maintenance and consumables replacement.

[0057] It should be noted that after the wafer processing process is completed through the above solution, the defects of the edge portion of the obtained wafer are greatly reduced. In particular, wafers with reduced or even eliminated edge defects such as chips and / or scratches and / or cracks can be obtained.

[0058] Based on the same inventive concept as the above technical solution, see Figure 4 , which shows an edge polishing detection device 40 provided by the present disclosure, the device 40 comprising: A cavity forming unit 401 is configured to uniformly form a cavity on an edge portion of a test wafer that has completed an edge grinding process by using a laser beam; A detection unit 402 is configured to determine the depth of sub-surface damage caused by the edge grinding process according to the inner wall morphology of each cavity; The determination unit 403 is configured to determine a polishing removal amount of an edge polishing process according to the sub-surface damage depth.

[0059] In some examples, the detection unit 402 is configured to: Acquire an image of the inner wall morphology of each cavity; Identify cracks extending from the edge of each cavity to the interior of each cavity in each image; The sub-surface damage depth is determined based on the length of the crack inside each cavity.

[0060] In some examples, the detection unit 402 is configured to: Determine the maximum length of the crack from the lengths of all cracks inside the cavity; The maximum length is determined as the sub-surface damage depth.

[0061] In some examples, the detection unit 402 is configured to: The mean and variance of the lengths of the cracks inside all the pits are obtained, and the sub-surface damage depth is determined according to the mean and variance.

[0062] In some examples, the determining unit 403 is configured to: determining a correction value for polishing removal amount according to the subsurface damage depth; The polishing removal amount of the edge polishing step is determined according to the reference polishing removal amount and the correction value.

[0063] In some examples, the cavity forming unit 401 is configured as follows: Determine at least one uniformly distributed detection position on an edge portion of the test wafer; The laser beam is used to blast the concave holes into the chamfered surfaces of the upper and lower surfaces and the edge surface at each detection position.

[0064] In some examples, the detection unit 402 is further configured to: After the test wafer is subjected to the edge polishing process according to the polishing removal amount, if there are still pits at the edge of the test wafer, detecting whether there is sub-surface damage according to the inner wall morphology of each pit; See also Figure 5The device 40 further includes an execution unit 404 configured to: when the sub-surface damage does not exist, perform edge polishing on the test wafer again to eliminate the pit.

[0065] In some examples, the execution unit 404 is further configured to: after the test wafer performs the edge polishing process according to the polishing removal amount, when there is no pit at the edge portion of the test wafer, perform a final polishing process on the test wafer.

[0066] Please refer to Figure 6 , which shows a structural block diagram of an edge polishing detection device 40 provided by an exemplary embodiment of the present disclosure. In some examples, the edge polishing detection device 40 can be at least one of a smart phone, a smart watch, a desktop computer, a laptop, a virtual reality terminal, an augmented reality terminal, a wireless terminal, and a laptop portable computer. The edge polishing detection device 40 has a communication function and can be connected to a wired network or a wireless network. The edge polishing detection device 40 can generally refer to one of a plurality of terminals. Those skilled in the art can know that the number of the above terminals can be more or less. In some examples, the edge polishing detection device 40 can receive data based on the wired network or wireless network to which it is connected. It can be understood that the edge polishing detection device 40 undertakes the calculation and processing work of the technical solution of the present disclosure, and the present disclosure does not limit this.

[0067] like Figure 6 As shown, the computing device in the present disclosure may include one or more of the following components: a processor 610 and a memory 620 .

[0068] Optionally, the processor 610 uses various interfaces and lines to connect various parts within the entire computing device, and executes various functions of the computing device and processes data by running or executing instructions, programs, code sets or instruction sets stored in the memory 620, and calling data stored in the memory 620. Optionally, the processor 610 can be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), and programmable logic array (PLA). The processor 610 can integrate one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), a neural network processor (NPU), and a baseband chip. Among them, the CPU mainly processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing the content that needs to be displayed on the touch display; the NPU is used to implement artificial intelligence (AI) functions; and the baseband chip is used to process wireless communications. It is understandable that the above baseband chip may not be integrated into the processor 610, but may be implemented by a separate chip.

[0069] The memory 620 may include a random access memory (RAM) or a read-only memory (ROM). Optionally, the memory 620 includes a non-transitory computer-readable storage medium. The memory 620 may be used to store instructions, programs, codes, code sets, or instruction sets. The memory 620 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above various method embodiments, etc.; the data storage area may store data created according to the use of the computing device, etc.

[0070] In addition, those skilled in the art can understand that the structure of the computing device shown in the above drawings does not constitute a limitation on the computing device, and the computing device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently. For example, the computing device also includes a display screen, a camera assembly, a microphone, a speaker, a radio frequency circuit, an input unit, a sensor (such as an acceleration sensor, an angular velocity sensor, a light sensor, etc.), an audio circuit, a WiFi module, a power supply, a Bluetooth module and other components, which will not be described in detail here.

[0071] The present disclosure also provides a computer-readable storage medium storing at least one instruction, wherein the at least one instruction is used to be executed by a processor to implement the edge polishing detection method described in the above embodiments.

[0072] The present disclosure also provides a computer program product, which includes computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computing device executes to implement the edge polishing detection method described in the above-mentioned various embodiments.

[0073] The above method is helpful to obtain a wafer with higher edge quality. In particular, the above method can be used to obtain a wafer with reduced or even eliminated edge defects such as notches and / or scratches and / or cracks.

[0074] Those skilled in the art should be aware that in one or more of the above examples, the functions described in the present disclosure can be implemented using hardware, software, firmware, or any combination thereof. When implemented using software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any media that facilitates the transmission of computer programs from one place to another. Storage media can be any available media that can be accessed by a general or special-purpose computer.

[0075] It should be noted that the technical solutions described in the present disclosure can be combined arbitrarily without conflict.

[0076] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A method for detecting edge polishing, characterized in that: The detection method of edge polishing comprises: Uniformly forming a cavity on an edge portion of a test wafer that has undergone an edge grinding process by a laser beam; detecting the depth of sub-surface damage caused by the edge grinding process according to the inner wall morphology of each cavity; The polishing removal amount of the edge polishing process is determined according to the sub-surface damage depth.

2. The edge polishing detection method according to claim 1, characterized in that: The detecting the sub-surface damage depth caused by the edge grinding process according to the inner wall morphology of each cavity comprises: Acquire an image of the inner wall morphology of each cavity; Identify cracks extending from the edge of each cavity to the interior of each cavity in each image; The sub-surface damage depth is determined based on the length of the crack inside each cavity.

3. The edge polishing detection method according to claim 2, characterized in that: Determining the sub-surface damage depth according to the length of the crack inside each cavity comprises: Determine the maximum length of the crack from the lengths of all cracks inside the cavity; The maximum length is determined as the sub-surface damage depth.

4. The edge polishing detection method according to claim 2, characterized in that: Determining the sub-surface damage depth according to the length of the crack inside each cavity comprises: The mean and variance of the lengths of the cracks inside all the pits are obtained, and the sub-surface damage depth is determined according to the mean and variance.

5. The edge polishing detection method according to claim 1, characterized in that: The step of determining the polishing removal amount of the edge polishing process according to the sub-surface damage depth comprises: determining a correction value for polishing removal amount according to the subsurface damage depth; The polishing removal amount of the edge polishing step is determined according to the reference polishing removal amount and the correction value.

6. The edge polishing detection method according to claim 1, characterized in that: The laser beam is used to uniformly form a cavity on the edge of the test wafer after the edge grinding process, including: Determine at least one uniformly distributed detection position on an edge portion of the test wafer; The laser beam is used to blast the concave holes into the chamfered surfaces of the upper and lower surfaces and the edge surface at each detection position.

7. The edge polishing detection method according to any one of claims 1 to 6, characterized in that: After the test wafer performs the edge polishing process according to the polishing removal amount, the method further includes: When the concave holes at the edge of the test wafer still exist, detecting whether there is sub-surface damage according to the inner wall morphology of each concave hole; When the subsurface damage is absent, the test wafer is edge polished again to eliminate the pits.

8. The edge polishing detection method according to any one of claims 1 to 6, characterized in that: After the test wafer performs the edge polishing process according to the polishing removal amount, the method further includes: When the concave portion of the edge portion of the test wafer does not exist, the test wafer is subjected to a final polishing process.

9. The edge polishing detection method according to any one of claims 1 to 6, characterized in that: After determining the polishing removal amount of the edge polishing process according to the subsurface damage depth, the method further includes mixing the test wafer into the wafer to be processed and performing the edge polishing process according to the polishing removal amount of the edge polishing process.

10. An edge polishing detection device, characterized in that: The device comprises: a cavity forming unit configured to uniformly form a cavity on an edge portion of the test wafer that has completed an edge grinding process by using a laser beam; a detection unit configured to determine the depth of sub-surface damage caused by the edge grinding process according to the inner wall morphology of each cavity; The determination unit is configured to determine a polishing removal amount of an edge polishing process according to the sub-surface damage depth.

11. An edge polishing detection device, characterized in that: The device comprises: a processor and a memory; the processor is used to execute instructions stored in the memory to implement the edge polishing detection method as claimed in any one of claims 1 to 9.

12. A computer storage medium, characterized in that: The computer storage medium stores at least one instruction, and the at least one instruction is used to be executed by a processor to implement the edge polishing detection method according to any one of claims 1 to 9.

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