Array substrate, preparation method of array substrate, display panel and display device

Abstract

The embodiment of the invention discloses an array substrate, a preparation method of the array substrate, a display panel and a display device.The array substrate comprises a substrate, a driving circuit layer and a charge shielding layer, the driving circuit layer is arranged on the substrate and comprises an active layer, the charge shielding layer is arranged between the substrate and the driving circuit layer, and the active layer is arranged between the driving circuit layer and the charge shielding layer. The orthographic projection of the charge shielding layer on the substrate is overlapped with the orthographic projection of the active layer on the substrate, so that the charge shielding layer can play a role in electric shielding between the substrate and the driving circuit layer, and the influence of the polarization effect of the substrate on the current of the driving circuit layer can be reduced; therefore, the risk of brightness change of the light-emitting sub-pixels caused by current change of the driving circuit layer is reduced, the risk of ghosting of the display panel is further reduced, and the display effect of the display panel is improved.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular, relates to an array substrate, a method for preparing the array substrate, a display panel, and a display device. Background Art

[0002] Organic light emitting diodes (OLED) and flat panel display devices based on light emitting diodes (LED) have the advantages of high image quality, power saving, thin body and wide application range, and are widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc., becoming the mainstream of display devices. However, the display effect of current display panels still needs to be improved. Summary of the invention

[0003] The purpose of the present application is to provide an array substrate, a method for preparing the array substrate, a display panel and a display device, which can improve the display effect of the display panel.

[0004] In a first aspect, the present application provides an array substrate, which includes a substrate, a driving circuit layer and a charge shielding layer, wherein the driving circuit layer is arranged on the substrate, and the driving circuit layer includes an active layer; the charge shielding layer is arranged between the substrate and the driving circuit layer, and the orthographic projection of the charge shielding layer on the substrate overlaps with the orthographic projection of the active layer on the substrate.

[0005] In some embodiments, the charge shielding layer is disposed as an entire layer.

[0006] In some embodiments, the array substrate further includes a first barrier layer, and the first barrier layer is disposed between the substrate and the driving circuit layer;

[0007] Preferably, the material of the first barrier layer includes silicon oxide;

[0008] Preferably, the array substrate further comprises a first buffer layer, and the first buffer layer is arranged between the first barrier layer and the driving circuit layer;

[0009] Preferably, the first buffer layer includes a first buffer sublayer and a second buffer sublayer, and the first buffer sublayer and the second buffer sublayer are stacked;

[0010] Preferably, the material of the first buffer sublayer includes silicon nitride;

[0011] Preferably, the material of the second buffer sublayer includes silicon oxide;

[0012] Preferably, the charge screening layer is disposed between the substrate and the first blocking layer.

[0013] In some embodiments, the display panel includes a display area and a frame area, the driving circuit layer is disposed in the display area, and the charge shielding layer at least covers a portion of the substrate corresponding to the display area;

[0014] Preferably, the charge shielding layer extends from the display area to the frame area and covers at least a portion of the substrate corresponding to the frame area;

[0015] Preferably, the charge shielding layer covers the entire corresponding border area of ​​the substrate.

[0016] In some embodiments, the material of the charge shielding layer includes a transparent conductive material;

[0017] Preferably, the material of the charge shielding layer includes amorphous silicon;

[0018] Preferably, the material of the charge shielding layer comprises a plasma-treated material;

[0019] Preferably, the plasma treatment is to treat the material of the charge shielding layer with a reaction gas, and the reaction gas includes at least one of nitrogen, nitrous oxide and oxygen.

[0020] In some embodiments, the array substrate further includes a silicon nitride layer, which is disposed on a side of the charge shielding layer facing away from the substrate, and the silicon nitride layer is in contact with the charge shielding layer.

[0021] A second aspect of the present application provides a method for preparing an array substrate, the method comprising:

[0022] forming a substrate;

[0023] forming a charge shielding layer on the substrate;

[0024] A driving circuit layer is formed on the charge screening layer, wherein the driving circuit layer includes an active layer, and an orthographic projection of the charge screening layer on the substrate overlaps with an orthographic projection of the active layer on the substrate.

[0025] In some embodiments, in the step of forming a charge shielding layer on the substrate, the charge shielding layer is provided as an entire layer.

[0026] In some embodiments, before the step of forming a driving circuit layer on the charge shielding layer, the step further includes:

[0027] Plasma treating the charge shielding layer;

[0028] Preferably, the step of plasma treating the charge shielding layer comprises:

[0029] The charge shielding layer is subjected to plasma treatment by using a reaction gas, wherein the reaction gas includes at least one of nitrogen, nitrous oxide, and oxygen.

[0030] In some embodiments, the step of plasma treating the charge shielding layer comprises:

[0031] A silicon nitride layer is formed on the charge shielding layer.

[0032] A third aspect of the present application provides a display panel, comprising the array substrate described in any one of the above items or an array substrate prepared by any one of the above preparation methods.

[0033] A fourth aspect of the present application provides a display device, comprising the above display panel.

[0034] The present application provides an array substrate, a method for preparing the array substrate, a display panel and a display device. The array substrate includes a substrate, a driving circuit layer and a charge shielding layer. The driving circuit layer is arranged on the substrate and includes an active layer. The charge shielding layer is arranged between the substrate and the driving circuit layer. The orthographic projection of the charge shielding layer on the substrate overlaps with the orthographic projection of the active layer on the substrate. Therefore, the charge shielding layer can play an electrical shielding role between the substrate and the driving circuit layer, which can reduce the influence of the polarization effect of the substrate on the current of the driving circuit layer, reduce the risk of brightness change of the light-emitting sub-pixel due to the current change of the driving circuit layer, thereby reducing the risk of afterimage phenomenon in the display panel and improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0036] Figure 1 A top view of a display panel used for the array substrate provided in some embodiments of the present application;

[0037] Figure 2 A schematic cross-sectional view of a display panel used in an array substrate provided in some embodiments of the present application;

[0038] Figure 3 Another cross-sectional schematic diagram of a display panel applied to the array substrate provided in some embodiments of the present application;

[0039] Figure 4 Another schematic cross-sectional view of a display panel used in the array substrate provided in some embodiments of the present application;

[0040] Figure 5 A flow chart of a method for preparing an array substrate provided in some other embodiments of the present application;

[0041] Figure 6Another flow chart of a method for preparing an array substrate provided in some embodiments of the present application;

[0042] Figure 7 Another flow chart of a method for preparing an array substrate provided in some other embodiments of the present application;

[0043] Figure 8 Another flow chart of a method for preparing an array substrate provided in some embodiments of the present application.

[0044] The figures are as follows:

[0045] Tag Name

[0046] Substrate 10; first substrate layer 11; second barrier layer 12; amorphous silicon layer 13; second substrate layer 14; drive circuit layer 20; active layer 21; charge shielding layer 30; light emitting structure 40; first barrier layer 50; first buffer layer 60; first buffer sublayer 61; second buffer sublayer 62; silicon nitride layer 70; display area AA; frame area NA. DETAILED DESCRIPTION

[0047] The following detailed description and drawings of the embodiments of the present application are used to illustrate the principles of the present application, but cannot be used to limit the scope of the present application, that is, the present application is not limited to the described embodiments.

[0048] In the description of the present application, it should be noted that, unless otherwise specified, "multiple" means more than two; the terms "upper", "lower", "left", "right", "inside", "outside", etc., indicating the orientation or positional relationship, are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. "Vertical" is not strictly vertical, but is within the allowable error range. "Parallel" is not strictly parallel, but is within the allowable error range.

[0049] Reference to "embodiments" in this application means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in this application may be combined with other embodiments.

[0050] The directional words appearing in the following description are all directions shown in the figures, and do not limit the specific structure of this application. In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0051] The flexible display panel achieves its bendability through a flexible substrate. The flexible substrate may have a polarization effect, which usually causes current changes in the driving circuit layer when acting on the driving circuit layer. For example, it will cause current changes in the channel region of the active layer of the driving circuit layer, resulting in changes in the brightness of the light-emitting sub-pixels lit by the driving circuit layer, thereby causing color deviation and resulting in image retention on the display panel, seriously affecting the display effect.

[0052] An embodiment of the present application provides an array substrate, which can be applied to a display panel. The display panel can be an organic light emitting diode (OLED) display panel. The display panel can also be other types of display panels, such as a micro light emitting diode (Micro Light Emitting Diode, Micro-LED for short) or a quantum dot light emitting diode (Quantum Light Emitting Diode, QLED for short) display panel.

[0053] Please refer to Figure 1 and Figure 2 In a first aspect, the present application provides an array substrate, which includes a substrate 10, a driving circuit layer 20 and a charge shielding layer 30. The driving circuit layer 20 is arranged on the substrate 10, and the driving circuit layer 20 includes an active layer 21; the charge shielding layer 30 is arranged between the substrate 10 and the driving circuit layer 20, and the orthographic projection of the charge shielding layer 30 on the substrate 10 overlaps with the orthographic projection of the active layer 21 on the substrate 10.

[0054] The array substrate includes a substrate 10 and a driving circuit layer 20 disposed on the substrate 10. The substrate 10 may be a flexible substrate made of materials such as polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC) or cellulose acetate propionate (CAP). A driving circuit for controlling the light emitting structure 40 to emit light is disposed in the driving circuit layer 20. The driving circuit layer 20 includes a plurality of thin film transistors, each of which may include an active layer 21 (semiconductor layer), a gate insulating layer, a gate electrode, an interlayer insulating layer, and inorganic film layers such as source and drain electrodes. By patterning these inorganic film layers, a driving circuit for controlling the light emitting sub-pixels in the light emitting structure 40 to emit light may be formed. There are multiple implementation methods for the specific circuit structure, which will not be described in detail here.

[0055] The charge shielding layer 30 is arranged between the substrate 10 and the driving circuit layer 20, and is used to realize electrical shielding between the substrate 10 and the driving circuit layer 20. The charge shielding layer 30 can be a layer structure arranged as a whole layer, or the charge shielding layer 30 can also be a layer structure after patterning. The overlap of the orthographic projection of the charge shielding layer 30 on the substrate 10 and the orthographic projection of the active layer 21 in the driving circuit layer 20 on the substrate 10 can be that the orthographic projection of the active layer 21 on the substrate 10 can be located within the orthographic projection of the charge shielding layer 30 on the substrate 10, or part of the orthographic projection of the active layer 21 on the substrate 10 can be located within the orthographic projection of the charge shielding layer 30 on the substrate 10, and the remaining part of the orthographic projection is located outside the orthographic projection of the charge shielding layer 30 on the substrate 10, or the orthographic projections of the active layer 21 and the charge shielding layer 30 on the substrate 10 can also be completely overlapped.

[0056] In the array substrate provided in the present application, the driving circuit layer 20 is arranged on the substrate 10 and includes an active layer 21. The charge shielding layer 30 is arranged between the substrate 10 and the driving circuit layer 20. The orthographic projection of the charge shielding layer 30 on the substrate 10 overlaps with the orthographic projection of the active layer 21 in the driving circuit layer 20 on the substrate 10. Therefore, the charge shielding layer 30 can play an electrical shielding role between the substrate 10 and the active layer 21 of the driving circuit layer 20, and can prevent the polarization of the substrate 10 from affecting the channel region of the driving circuit layer 20 to a certain extent and causing the current change of the driving circuit layer 20, thereby reducing the risk of brightness change of the luminous pixels caused by the current change of the driving circuit layer 20, and thereby reducing the risk of afterimage phenomenon in the display panel.

[0057] In addition, the charge shielding layer 30 can also be used to shield the influence of static electricity in the substrate 10 on the driving circuit layer 20, thereby improving the anti-static ability of the array substrate.

[0058] In some embodiments, the charge shielding layer 30 is provided as a whole layer, which can improve the electric shielding effect of the charge shielding layer 30 between the substrate 10 and the driving circuit layer 20, and further reduce the risk of image sticking in the display panel. In addition, the charge shielding layer 30 provided as a whole layer does not need to be subjected to additional etching and other process treatments after film formation, which can simplify the film formation process and reduce production costs.

[0059] See also Figure 3 In some embodiments, the array substrate further includes a first barrier layer 50 , which is disposed between the substrate 10 and the driving circuit layer 20 and can be used to block metal particles.

[0060] The first barrier layer 50 may be at least one of silicon nitride and silicon oxide. The first barrier layer 50 is disposed between the substrate 10 and the driving circuit layer 20, and the charge shielding layer 30 may be located between the substrate 10 and the first barrier layer 50, or between the first barrier layer 50 and the driving circuit layer 20, which is not limited in this embodiment.

[0061] Preferably, the material of the first barrier layer 50 includes silicon oxide. Silicon oxide material has good physical shielding ability and chemical stability, and can effectively block the diffusion and migration of metal ions.

[0062] Preferably, the array substrate further includes a first buffer layer 60 , which is disposed between the first barrier layer 50 and the driving circuit layer 20 , and can prevent film layer contamination and can be used to block metal particles.

[0063] When the charge shielding layer 30 is disposed between the first blocking layer 50 and the driving circuit layer 20 , the charge shielding layer 30 may be located between the first blocking layer 50 and the first buffer layer 60 , or between the first buffer layer 60 and the driving circuit layer 20 .

[0064] Please continue reading Figure 3 Optionally, the first buffer layer 60 may include a first buffer sublayer 61 and a second buffer sublayer 62 arranged on the first buffer sublayer 61, and the first buffer sublayer 61 is located on the first barrier layer 50. The first buffer sublayer 61 and the second buffer sublayer 62 work together to further reduce the risk of film contamination and further block metal ions.

[0065] Preferably, the material of the first buffer sublayer 61 includes silicon nitride, which can improve the performance of the first buffer sublayer 61 .

[0066] Preferably, the material of the second buffer sublayer 62 includes silicon oxide, which can improve the performance of the second buffer sublayer 62 .

[0067] Preferably, the charge shielding layer 30 is arranged between the substrate 10 and the first blocking layer 50. Compared with arranging the charge shielding layer 30 between the first blocking layer 50 and the first buffer layer 60 or between the first buffer layer 60 and the driving circuit layer 20, the influence of the charge shielding layer 30 on the characteristics of the driving circuit layer 20 can be reduced.

[0068] Please continue reading Figure 3 In some optional embodiments, the substrate 10 may include a first substrate layer 11, a second barrier layer 12, an amorphous silicon layer 13 and a second substrate layer 14 stacked in sequence, and the charge shielding layer 30 is disposed between the second substrate layer 14 and the first barrier layer 50. The first substrate layer 11 and the second substrate layer 14 may both be polyimide films, and the second barrier layer 12 may be a silicon oxide layer.

[0069] In some embodiments, the display panel includes a display area AA and a frame area NA, the driving circuit layer 20 is disposed in the display area AA, and the charge shielding layer 30 at least covers a portion of the substrate 10 corresponding to the display area AA.

[0070] The array substrate includes a display area AA and a frame area NA. The display area AA refers to the area where the image can be displayed and is provided with sub-pixels. The frame area NA refers to the area where the image cannot be displayed and is generally used for routing, or placing cameras, binding terminals, test terminals, etc. For example, the frame area NA can surround the display area AA in the circumferential direction and is the outer frame of the display panel; the frame area NA can also be surrounded by the display area AA and is the area corresponding to the display panel and the camera.

[0071] The driving circuit layer 20 is arranged in the display area AA, and the charge shielding layer 30 at least covers the portion of the substrate 10 corresponding to the display area AA, that is, the orthographic projection of the portion of the substrate 10 corresponding to the display area AA on the driving circuit layer 20 can be located within the orthographic projection of the charge shielding layer 30 on the driving circuit layer 20, which can improve the electrical shielding effect of the charge shielding layer 30 between the substrate 10 and the driving circuit layer 20.

[0072] Preferably, the charge shielding layer 30 extends from the display area AA to the frame area and covers at least a portion of the frame area corresponding to the substrate 10, which can improve the shielding effect of the charge shielding layer 30 and further reduce the influence of the polarization of the substrate 10 on the driving circuit layer 20.

[0073] Preferably, the charge shielding layer 30 covers the entire border area NA of the substrate 10 to further enhance the electrical shielding effect of the charge shielding layer 30 .

[0074] In some embodiments, the material of the charge shielding layer 30 includes a transparent conductive material, so that it has a good electric shielding effect, while avoiding adding a film layer in the array substrate to affect the display effect of the display panel.

[0075] Optionally, the material of the charge shielding layer 30 may include at least one of indium tin oxide, molybdenum, and amorphous silicon to have a good electric shielding effect while avoiding adding a film layer in the array substrate to affect the display effect of the display panel.

[0076] Preferably, the material of the charge shielding layer 30 includes amorphous silicon to facilitate film formation, reduce production difficulty and improve production efficiency.

[0077] Preferably, the material of the charge shielding layer 30 includes a plasma-treated material.

[0078] It is understandable that the raw material for preparing amorphous silicon is usually silane, which contains a large amount of hydrogen elements. Therefore, when the material of the charge shielding layer 30 includes amorphous silicon, a large amount of hydrogen elements will inevitably exist in the charge shielding layer 30. The hydrogen elements have a weak ability to combine with other elements in the charge shielding layer 30. Therefore, when conducting a reliability test on a display panel including the above array substrate, the display panel is in a high-temperature environment, causing the hydrogen elements in the charge shielding layer 30 to diffuse to the edge of the panel or other surrounding film layers at high temperature, and the distribution is uneven, thereby causing the display panel to display unevenly.

[0079] Therefore, in this embodiment, by setting the material of the charge shielding layer 30 to include a plasma-treated material, after the charge shielding layer 30 is formed, the material of the charge shielding layer 30 is plasma-treated to reduce the hydrogen content in the charge shielding layer 30, thereby reducing the risk of the hydrogen element in the charge shielding layer 30 diffusing to the edge of the panel or other surrounding film layers at high temperature, thereby reducing the possibility of uneven display of the display panel, and further ensuring the display effect.

[0080] Preferably, the plasma treatment is to treat the material of the charge shielding layer 30 with a reaction gas, wherein the reaction gas includes an element that can be combined with hydrogen.

[0081] During the plasma treatment process, by discharging the reaction gas toward the charge shielding layer 30, or placing the substrate 10 and the charge shielding layer 30 into a reaction chamber filled with the above-mentioned reaction gas, the corresponding elements in the reaction gas can react with the hydrogen element, so that the hydrogen element is separated from the charge shielding layer 30, thereby reducing the hydrogen element content in the charge shielding layer 30.

[0082] See also Figure 4 In some embodiments, the array substrate further includes a silicon nitride layer 70 , which is disposed on a side of the charge shielding layer 30 facing away from the substrate 10 , and the silicon nitride layer 70 is in contact with the charge shielding layer 30 .

[0083] Silicon nitride can be prepared by plasma treatment of silicon-containing gas and nitrogen-containing gas. For example, silicon nitride can be prepared by silane and at least one of nitrogen and laughing gas. During the preparation process, hydrogen in the charge shielding layer 30 can react with nitrogen-containing gas. For example, hydrogen can react with nitrogen to generate ammonia, or react with laughing gas to generate ammonia and water, thereby leaving the charge shielding layer 30. In addition, since there are more hydrogen elements in the charge shielding layer 30 and less hydrogen elements in silicon nitride, during the preparation process of the silicon nitride layer 70, silicon nitride can also capture hydrogen elements in the charge shielding layer 30 and form relatively stable nitrogen-hydrogen bonds to further reduce the hydrogen content in the charge shielding layer 30.

[0084] The second aspect of the present application provides a display panel, comprising any of the above array substrates. Since the display panel adopts all the technical solutions of all the above embodiments, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described one by one here.

[0085] See also Figure 5 According to a third aspect of the present application, there is provided a method for preparing an array substrate, the method comprising:

[0086] S1. Form a substrate 10. The substrate 10 of the present application may be a flexible substrate, and the substrate 10 may include a first substrate layer 11, a second barrier layer 12, an amorphous silicon layer 13, and a second substrate layer 14 stacked in sequence. During the preparation process, the first substrate layer 11, the second barrier layer 12, the amorphous silicon layer 13, and the second substrate layer 14 may be formed in sequence, wherein the first substrate layer 11 and the second substrate layer 14 may be polyimide films, and the second barrier layer 12 may be a silicon oxide layer.

[0087] S2. Forming a charge shielding layer 30 on the substrate 10. The charge shielding layer 30 may be a layer structure provided as a whole layer. In this case, the charge shielding layer 30 may be prepared by forming a charge shielding material on the substrate 10. Alternatively, the charge shielding layer 30 may also be a layer structure after patterning. In the process of preparing the charge shielding layer 30, the charge shielding material may be first formed on the substrate 10, and then the charge shielding material may be patterned to form a charge shielding layer 30 having a preset pattern.

[0088] S3. A driving circuit layer 20 is formed on the charge shielding layer 30. The driving circuit layer 20 includes an active layer 21. The orthographic projection of the charge shielding layer 30 on the substrate 10 overlaps with the orthographic projection of the active layer 21 on the substrate 10. The active layer 21 of the driving circuit layer 20 is located on the side of the charge shielding layer 30 away from the substrate 10, and its orthographic projection on the substrate 10 overlaps with the orthographic projection of the charge shielding layer 30 on the substrate 10. Therefore, the charge shielding layer 30 can play an electrical shielding role between the substrate 10 and the driving circuit layer 20, and is used to reduce the influence of the polarization effect of the substrate 10 on the channel region of the driving circuit layer 20, and can prevent the driving circuit layer 20 from changing the current to a certain extent, thereby reducing the risk of brightness change of the luminous pixel caused by the current change of the driving circuit layer 20, avoiding the phenomenon of screen afterimage due to color deviation of the display panel, so as to improve the display effect.

[0089] In some embodiments, in the step of forming the charge shielding layer 30 on the substrate 10 , the charge shielding layer 30 is provided as an entire layer.

[0090] In these embodiments, the charge shielding layer 30 is provided as a whole layer, that is, there is no need to perform patterning on the charge shielding layer 30 , which can simplify the process steps and improve production efficiency.

[0091] See also Figure 6 In some embodiments, before the step of forming the driving circuit layer 20 on the charge shielding layer 30, the step further includes:

[0092] S4, plasma treatment is performed on the charge shielding layer 30. By discharging the reaction gas toward the charge shielding layer 30, or placing the substrate 10 and the charge shielding layer 30 in a reaction chamber filled with the reaction gas, the corresponding elements in the reaction gas react with the hydrogen element, and then the hydrogen element is separated from the charge shielding layer 30, thereby reducing the hydrogen content in the charge shielding layer 30.

[0093] In this embodiment, by performing plasma treatment on the charge shielding layer 30 to reduce the hydrogen content therein, the risk of the hydrogen element in the charge shielding layer 30 diffusing to the edge of the panel or other surrounding film layers at high temperature can be reduced, thereby reducing the possibility of uneven display of the display panel and improving the display effect.

[0094] See also Figure 7 In some embodiments, the step of plasma treating the charge shielding layer 30 includes:

[0095] S41, plasma treatment is performed on the charge shielding layer 30 using a reaction gas, wherein the reaction gas includes an element that can be combined with the hydrogen element. It is understood that the reaction gas including the element that can be combined with the hydrogen element can be discharged to the charge shielding layer 30, or the substrate 10 and the charge shielding layer 30 are placed in a reaction chamber filled with the reaction gas, so that the corresponding element in the reaction gas reacts with the hydrogen element, thereby causing the hydrogen element to be separated from the charge shielding layer 30, thereby reducing the hydrogen content in the charge shielding layer 30.

[0096] Preferably, the reaction gas includes at least one of nitrogen, nitrous oxide, and oxygen. Gases such as nitrogen, nitrous oxide, and oxygen can react chemically with hydrogen element more easily to reduce the difficulty of the process. Among them, nitrogen can react with hydrogen element to generate ammonia, nitrous oxide can react with hydrogen element to generate ammonia and water, and oxygen can react with hydrogen element to generate water.

[0097] Optionally, the reaction gas may also be other gases that can react with hydrogen element, which is not limited in this embodiment.

[0098] See also Figure 8 In some embodiments, the step of plasma treating the charge shielding layer 30 includes:

[0099] S42, forming a silicon nitride layer 70 on the charge shielding layer 30. Silicon nitride can be prepared by plasma treatment of silicon-containing gas and nitrogen-containing gas, for example, silicon nitride can be prepared by silane and at least one of nitrogen and laughing gas. During the preparation process, the nitrogen-containing gas can react with the hydrogen element in the charge shielding layer 30 to separate the hydrogen element from the charge shielding layer 30. In addition, since there are more hydrogen elements in the charge shielding layer 30 and less hydrogen elements in silicon nitride, during the preparation process of the silicon nitride layer 70, silicon nitride can also capture the hydrogen elements in the charge shielding layer 30 and form relatively stable nitrogen-hydrogen bonds to further reduce the hydrogen content in the charge shielding layer 30.

[0100] In some optional embodiments, the charge shielding layer 30 may be dehydrogenated by jointly performing step S41 and step S42, that is, after the charge shielding layer 30 is formed on the substrate 10, the charge shielding layer 30 may be firstly plasma-treated with a reaction gas so that the reaction gas reacts with the hydrogen element in the charge shielding layer 30 as much as possible, and then a silicon nitride layer 70 is formed on the charge shielding layer 30. When hydrogen elements remain in the charge shielding layer 30, the nitrogen-containing gas introduced during the film formation of the silicon nitride layer 70 may react with the remaining hydrogen elements in the charge shielding layer 30 to further remove the hydrogen elements in the charge shielding layer 30.

[0101] Although the embodiments disclosed in this application are as above, the contents described are only embodiments adopted for facilitating the understanding of this application and are not intended to limit the present invention. Any technician in the technical field to which this application belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in this application, but the scope of protection of this application shall still be subject to the scope defined in the attached claims.

[0102] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the replacement of other connection methods described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of the present application.

Claims

1. An array substrate, characterized in that: The array substrate comprises: substrate; A driving circuit layer is disposed on the substrate, and the driving circuit layer includes an active layer; A charge shielding layer is disposed between the substrate and the driving circuit layer, and an orthographic projection of the charge shielding layer on the substrate overlaps with an orthographic projection of the active layer on the substrate.

2. The array substrate according to claim 1, characterized in that: The charge shielding layer is arranged as a whole layer.

3. The array substrate according to claim 1, characterized in that: The array substrate further comprises a first barrier layer, wherein the first barrier layer is arranged between the substrate and the driving circuit layer; Preferably, the material of the first barrier layer includes silicon oxide; Preferably, the array substrate further comprises a first buffer layer, and the first buffer layer is arranged between the first barrier layer and the driving circuit layer; Preferably, the first buffer layer includes a first buffer sublayer and a second buffer sublayer, and the first buffer sublayer and the second buffer sublayer are stacked; Preferably, the material of the first buffer sublayer includes silicon nitride; Preferably, the material of the second buffer sublayer includes silicon oxide; Preferably, the charge shielding layer is disposed between the substrate and the first blocking layer.

4. The array substrate according to claim 1, characterized in that: The array substrate comprises a display area and a frame area, the driving circuit layer is arranged in the display area, and the charge shielding layer at least covers a portion of the substrate corresponding to the display area; Preferably, the charge shielding layer extends from the display area to the frame area and covers at least a portion of the substrate corresponding to the frame area; Preferably, the charge shielding layer covers the entire region of the substrate corresponding to the border region.

5. The array substrate according to claim 1, characterized in that: The material of the charge shielding layer includes a transparent conductive material; Preferably, the material of the charge shielding layer includes amorphous silicon; Preferably, the material of the charge shielding layer comprises a plasma-treated material; Preferably, the plasma treatment is to treat the material of the charge shielding layer using a reaction gas, and the reaction gas includes at least one of nitrogen, nitrous oxide and oxygen.

6. The array substrate according to any one of claims 1 to 5, characterized in that: The array substrate further comprises a silicon nitride layer, which is arranged on a side of the charge shielding layer away from the substrate, and the silicon nitride layer is in contact with the charge shielding layer.

7. A method for preparing an array substrate, characterized in that: The preparation method comprises: forming a substrate; forming a charge shielding layer on the substrate; A driving circuit layer is formed on the charge screening layer, wherein the driving circuit layer includes an active layer, and an orthographic projection of the charge screening layer on the substrate overlaps with an orthographic projection of the active layer on the substrate.

8. The preparation method according to claim 7, characterized in that: In the step of forming a charge shielding layer on the substrate, the charge shielding layer is provided as a whole layer.

9. The preparation method according to claim 7, characterized in that: Before the step of forming a driving circuit layer on the charge shielding layer, the step further includes: performing plasma treatment on the charge shielding layer; Preferably, the step of plasma treating the charge shielding layer comprises: The charge shielding layer is subjected to plasma treatment by using a reaction gas, wherein the reaction gas includes at least one of nitrogen, nitrous oxide, and oxygen.

10. The preparation method according to claim 9, characterized in that: The step of plasma treating the charge shielding layer comprises: A silicon nitride layer is formed on the charge shielding layer.

11. A display panel, characterized in that: The invention comprises the array substrate according to any one of claims 1 to 6 or an array substrate prepared by the preparation method according to any one of claims 7 to 10.

12. A display device, characterized in that: Includes the display panel as claimed in claim 11.

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