Method for repairing crosstalk noise violation on data path

Abstract

The invention is applicable to the technical field of integrated circuit design, and provides a method for repairing crosstalk noise violation on a data path, which comprises the following steps of: reading a crosstalk noise violation report of a static time sequence analysis STA tool; finding an interconnection line corresponding to each violation in the report from a layout wiring tool, and finding adjacent interconnection line position information and connected logic unit information of the current interconnection line; selecting a corresponding repairing scheme according to the specific conditions of the interconnection lines and the connected logic units, and executing and adjusting the repairing scheme so as to repair crosstalk noise on a data path; and after a round of repair is completed, if crosstalk noise violation is also detected in the STA tool, the steps need to be executed again until all crosstalk noise problems are solved. According to the method provided by the invention, the crosstalk problem is efficiently identified and solved through an automatic process, the signal integrity and the function correctness of circuit design are ensured, and compared with a traditional scheme, the method is more targeted, and the gain brought by single change is favorably improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuit design, and in particular relates to a method for repairing crosstalk noise violations on a data path. Background Art

[0002] As integrated circuits enter the ultra-deep submicron process era, the crosstalk noise problem caused by long-distance wiring has seriously affected signal integrity. The main problem is the crosstalk noise generated by the coupling capacitance between signal lines, which leads to logic errors and timing violations.

[0003] like Figure 1 The schematic diagram of the crosstalk noise hazards shown in the figure. There are a large number of interconnects in the integrated circuit design that connect different transistors together to form a complete function. Coupling capacitance is generated between conductors, which will cause potential crosstalk. Figure 1 In the figure, A and B are two adjacent interconnects (dashed lines in the figure), with coupling capacitance between them, A is a flipping signal, and B is a low-level signal, and both signals are solid lines in the figure. When the signal of interconnect A changes from a low level to a high level, an upward glitch will be transmitted to interconnect B through the coupling capacitance between them. At this time, the low-level interconnect B will also generate an upward glitch. When this glitch exceeds a threshold, the signal of interconnect B, which should have maintained a low level, will be recognized by the logic unit as a momentary high level, resulting in a logic error and affecting the circuit function.

[0004] For the solution to this problem, Patent 1, publication number CN116090401A, discloses a method for designing standard cells and integrated circuits. By customizing multiple buffers to enhance the driving force of the signal, multiple parallel signal lines are designed, each signal line is connected to a buffer to ensure the consistency of signal transmission, and a power line is inserted between each group of two adjacent signal lines. In high-speed digital systems, long-distance parallel wiring of strip lines is prone to far-end crosstalk, which also limits the wiring density. Another example is Patent 2, publication number CN 118333002 A, which discloses a method and device for determining wiring density, which proposes using a preset simulation calculation model, combined with the wiring parameters and the relative dielectric constant value range of the material, to determine the corresponding crosstalk noise value after adjusting the strip line spacing, and to predict and optimize the crosstalk noise through simulation.

[0005] In the above patents, the method of customized buffer and parallel arrangement of signal lines provided by Patent 1 solves the crosstalk noise on the data path, which increases the complexity of the design and manufacturing cost, puts higher requirements on the design tools and manufacturing processes, and limits the flexibility and applicability of the design. Patent 2 relies on a preset simulation calculation model to determine the value of crosstalk noise prevention, and needs to obtain the value range of the relative dielectric constant corresponding to the target material. If the simulation model is inaccurate, the actual crosstalk noise control effect may deviate from the expected one, and it also increases the number of design iterations and time, which may cause the project to be delayed.

[0006] Therefore, the current technical solutions cannot solve the problem of crosstalk noise well. Summary of the invention

[0007] In view of the above problems, an object of the present invention is to provide a method for repairing crosstalk noise violations on a data path, aiming to solve the above technical problems.

[0008] The present invention adopts the following technical solution:

[0009] Step S1, reading a crosstalk noise violation report of a static timing analysis STA tool;

[0010] Step S2, finding the interconnection lines corresponding to each violation in the report from the layout and routing tool, and finding the position information of the adjacent interconnection lines and the connected logic unit information of the current interconnection line;

[0011] Step S3, selecting a corresponding repair scheme according to the specific conditions of the interconnection lines and the connected logic units, and executing and adjusting the scheme to repair the crosstalk noise on the data path;

[0012] Step S4: Use the STA tool to re-verify whether there is still a crosstalk noise violation. If there is still a crosstalk noise violation, return to step S1 to repair it again until there is no crosstalk noise violation in the report.

[0013] Furthermore, in step S1, the crosstalk noise violation report includes the name of the violating logic unit instance and its pins, the names of the victim and the aggressor interconnection lines, and the height and duration of the waveform affected by each aggressor.

[0014] Furthermore, in step S2, the position information of the adjacent interconnection lines includes the winding level, the winding pitch, the length of each line segment and the total line length of the adjacent interconnection lines.

[0015] Furthermore, in step S2, the connected logic unit information of the interconnection line includes driving capability, the number of driving logic units, and the type of logic unit.

[0016] Furthermore, in step S3, the repair scheme includes inserting a buffer to interrupt long lines, inserting a buffer to reduce fan-out, increasing the driving capability of the previous logic unit, improving the winding level, increasing the winding spacing, and adding a shielding line.

[0017] Furthermore, when the length of the interconnect line with violations exceeds the preset value and the fan-out of the interconnect line is less than the sector threshold, a repair solution of inserting a buffer to interrupt the long line is selected; when the number of interconnect line driving logic units with violations is greater than the set value, a repair solution of inserting a buffer to reduce the fan-out is selected; when adjacent interconnect lines lack winding resources at a low level, the windings are dense, the line spacing is the minimum spacing, and there are long-distance parallel wiring in each layer, a repair solution of increasing the winding level is selected; when adjacent interconnect lines have sufficient winding resources and the winding spacing at the same layer is the minimum spacing, a repair solution of increasing the winding spacing to reduce coupling electricity is selected: when adjacent interconnect lines have sufficient winding resources and other repair solutions cannot obtain a certain gain, a repair solution of adding a shielding line is selected.

[0018] The beneficial effects of the present invention are as follows: the technical solution of the present invention adopts the crosstalk noise violation report results of the STA tool, and can accurately select the interconnection improvement repair scheme according to the specific situation of the adjacent interconnection position information and the connected logic unit information of the interconnection, without affecting the interconnections on other data paths without violations, saving winding resources to the greatest extent, and reducing the impact of timing on other paths. The repair strategy is not limited to inserting buffers to interrupt long lines, increasing the driving capability of the previous logic unit, and increasing the winding spacing, but also includes strategies such as improving the winding hierarchy, adding shielding lines, and reducing fan-out. These are more targeted than traditional solutions and help to improve the gain brought by a single change. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a schematic diagram of the harm caused by crosstalk noise provided by an embodiment of the present invention;

[0020] Figure 2 is a flow chart of a method for repairing a crosstalk noise violation on a data path provided by an embodiment of the present invention;

[0021] Figure 3 This is a schematic diagram of inserting a buffer to reduce fan-out and fix crosstalk noise;

[0022] Figure 4 Schematic diagram of fixing crosstalk noise by increasing line spacing. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0024] In order to illustrate the technical solution of the present invention, a specific embodiment is provided below for illustration.

[0025] like Figure 1 As shown, the method for repairing crosstalk noise violation on the data path provided by this embodiment includes the following steps:

[0026] Step S1, reading a crosstalk noise violation report of a static timing analysis STA tool.

[0027] STA (Static Timing Analysis) tool is software for static timing analysis. This analysis method is crucial in digital circuit design. It analyzes the logic synthesis, layout and routing of the circuit, calculates the worst timing path of the circuit under different working conditions, and ensures that the timing performance of the circuit meets the requirements. For integrated circuit design, by reading the crosstalk noise violation report of the STA tool, you can know what violations exist in the current design, the causes, and the impact on system performance.

[0028] Specifically, the crosstalk noise violation report includes the name of the violating logic unit instance and its pins, the names of the victim and aggressor interconnects, and the height and duration of the waveform affected by each aggressor.

[0029] Step S2: Find the interconnection lines corresponding to each violation in the report from the placement and routing tool, and find the position information of the adjacent interconnection lines and the connected logic unit information of the current interconnection line.

[0030] In this step, the adjacent interconnection line position information includes the winding level, winding spacing, each line length and total line length of the adjacent interconnection lines. The interconnection line connected logic unit information includes driving capability, driving logic unit number and logic unit type.

[0031] Step S3: Select a corresponding repair solution according to the specific conditions of the interconnection line and the connected logic unit, and execute and adjust it to repair the crosstalk noise on the data path.

[0032] Repair solutions include inserting buffers to interrupt long wires, inserting buffers to reduce fan-out, increasing the driving capability of the previous logic unit, improving the winding level, increasing the winding spacing, and adding shielding wires. The details are as follows:

[0033] (1) When the length of the interconnect line with a violation exceeds a preset value and the fan-out of the interconnect line is less than the sector threshold, a repair solution of inserting a buffer to interrupt the long line is selected. The preset value is determined by the average length of the interconnect line without noise violations under the process.

[0034] (2) When the number of interconnect line driving logic units with violations is greater than the set value, the data is too high, and a repair solution of inserting a buffer to reduce the fan-out is selected to enhance the driving capability.

[0035] (3) When adjacent interconnects lack wiring resources at low levels, the wiring is dense, the wire spacing is the minimum spacing, and there are long parallel wiring distances in each layer, a repair solution that increases the wiring level is selected to reduce the parallel wiring distance.

[0036] (4) When the adjacent interconnect wire winding resources are sufficient and the spacing between the windings on the same layer is the minimum spacing, the repair solution of increasing the winding spacing to reduce the coupling current is selected to reduce the coupling effect by increasing the spacing.

[0037] (5) When there are sufficient resources for winding adjacent interconnect wires and other repair solutions cannot achieve a certain gain, choose the repair solution of adding shielded wires to reduce the impact of crosstalk.

[0038] For example, for the above repair solution (2), combined with Figure 3 The schematic diagram of inserting a buffer to reduce fan-out and repair crosstalk noise is shown. In digital circuits, fan-out is an important concept, which refers to the number of other similar logic gates or devices that can be effectively driven by the output of a logic gate or electronic device, that is, the number of input loads driven by an output signal. In digital circuits, the larger the fan-out, the more loads (such as gate circuits or other signal lines) are driven. When the fan-out on the interconnect is too large, that is, the number of driven logic units is too large, the driving ability of the interconnect becomes weaker and is more susceptible to crosstalk noise. Figure 3 In the example, two groups of logic cells are driven after the logic cell D, namely B1 and B2. C is a newly inserted buffer. At this time, the number of logic cells driven after the logic cell D is the number of logic cells in B2 plus 1. Therefore, the fan-out effect can be reduced, the driving capability of the interconnection line is enhanced, and the influence of interference is reduced. In addition, by reducing the fan-out, the layout of the interconnection line can be improved, the line spacing can be increased, and the coupling effect can be reduced.

[0039] As in the above repair solution (4), combined with Figure 4 The schematic diagram of increasing the line spacing to repair crosstalk noise is shown in the figure. The left and right diagrams are before and after the repair, and the line spacing on the right is increased compared to the left. The capacitance value between interconnects is inversely proportional to the distance between them. When the interconnects are close, their electric fields overlap and increase the mutual influence. By increasing the distance, the electric field strength will weaken as the distance increases, thereby reducing the coupling effect.

[0040] Step S4: Use the STA tool to re-verify whether there is still a crosstalk noise violation. If there is still a crosstalk noise violation, return to step S1 to repair it again until there is no crosstalk noise violation in the report.

[0041] After completing a round of repairs, if crosstalk noise violations are still detected in the STA tool, you need to perform the above steps again until all crosstalk noise issues are resolved.

[0042] The method of this embodiment is applied to the case where crosstalk noise is found on the data path during the timing check after layout and routing. The technical solution of the embodiment of the present invention is easy to implement, and repairing the crosstalk noise violation can obtain certain improvements and benefits. The results can be compared through the STA tool analysis to determine the effect before and after the repair and the gain ratio, which is fully compatible with the back-end implementation and the timing sign-off process.

[0043] In summary, the technical solution of the present invention is a method for repairing crosstalk noise violations on a data path during the digital back-end implementation of chip design. The method analyzes the interconnect lines containing crosstalk noise violations based on the results of the timing sign-off tool, and implements ECO (Engineering Change Order) by increasing the front-stage drive, inserting a buffer unit, changing the winding rules, etc. according to the information of the front-stage drive unit, line length, fan-out, driven unit, etc., so as to achieve the purpose of improving the crosstalk noise on the data path.

[0044] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for repairing crosstalk noise violations on a data path, characterized in that: The method comprises the following steps: Step S1, reading a crosstalk noise violation report of a static timing analysis STA tool; Step S2, finding the interconnection lines corresponding to each violation in the report from the layout and routing tool, and finding the position information of the adjacent interconnection lines and the connected logic unit information of the current interconnection line; Step S3, selecting a corresponding repair scheme according to the specific conditions of the interconnection lines and the connected logic units, and executing and adjusting the scheme to repair the crosstalk noise on the data path; Step S4: Use the STA tool to re-verify whether there is still a crosstalk noise violation. If there is still a crosstalk noise violation, return to step S1 to repair it again until there is no crosstalk noise violation in the report.

2. The method for repairing crosstalk noise violations on a data path as claimed in claim 1, characterized in that: In step S1, the crosstalk noise violation report includes the instance name of the violating logic unit and its pins, the interconnection line names of the victim and the aggressor, and the waveform height and duration affected by each aggressor.

3. The method for repairing crosstalk noise violation on a data path as claimed in claim 2, characterized in that: In step S2, the position information of adjacent interconnection lines includes the winding level, winding pitch, length of each line segment and total length of the adjacent interconnection lines.

4. The method for repairing crosstalk noise violation on a data path as claimed in claim 2, characterized in that: In step S2, the connected logic unit information of the interconnection line includes driving capability, the number of driving logic units, and the type of logic unit.

5. The method for repairing crosstalk noise violation on a data path as claimed in claim 2, characterized in that: In step S3, the repair scheme includes inserting a buffer to interrupt the long line, inserting a buffer to reduce the fan-out, increasing the driving capability of the previous logic unit, improving the winding level, increasing the winding spacing, and adding a shielding line.

6. The method for repairing crosstalk noise violation on a data path as claimed in claim 5, characterized in that: When the length of the interconnect line with violation exceeds the preset value and the fan-out of the interconnect line is less than the sector threshold, a repair solution of inserting a buffer to interrupt the long line is selected; When the number of interconnect line driver logic units with violations is greater than a set value, a repair scheme of inserting a buffer to reduce fan-out is selected; When adjacent interconnects lack wiring resources at low levels, the wiring is dense, the wire spacing is the minimum spacing, and there are long parallel wirings at each layer, choose a repair solution that increases the wiring level; When the adjacent interconnect wire winding resources are sufficient and the same-layer winding spacing is the minimum spacing, choose to increase the winding spacing to reduce the coupling current repair solution: When there are sufficient resources for winding adjacent interconnect wires and other repair solutions cannot achieve a certain gain, the repair solution of adding shielding wires is selected.

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