Configuration logic execution optimization method, system, equipment, medium and product

Abstract

The invention discloses a configuration logic execution optimization method, system and device, a medium and a product, and relates to the technical field of data processing, and the method comprises the steps: configuring a configuration logic based on the current application demand of a DCS system of a user; optimizing the configuration logic based on a dependency relationship between algorithm blocks to obtain a plurality of optimized configuration logic data streams; on the basis of the dependency relationship between each optimized configuration logic data stream and the algorithm block, according to a data stream parallel principle, constructing a configuration logic relationship indication table in which a plurality of algorithm block names are stored; based on the configuration logic relation indication table, generating an algorithm dependency relation register corresponding to each algorithm block; and according to the algorithm dependency relationship in the algorithm dependency relationship register, carrying out parallel calling on a plurality of algorithm actuators so as to execute the configuration logic. The execution efficiency of the configuration logic is improved.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to a configuration logic execution optimization method, system, device, medium and product. Background Art

[0002] The Digital Control System (DCS) of a nuclear power plant controls more than 300 systems and nearly 10,000 sets of equipment in the nuclear power plant. It is the control center of the nuclear power plant. Due to its extremely high safety and reliability requirements, the digital control system of a nuclear power plant is the most important and difficult part of the localization of nuclear power equipment. Among them, the execution of configuration logic is the most important component of the DCS configuration algorithm, which has the characteristics of large amount of computing data, complex logical functions, many types of algorithm blocks, and high execution time requirements.

[0003] At present, most of the configuration logic used in control system engineering is in serial order. The data flow and execution results of the configuration logic execution are determined by the order of the configuration logic and the input-output relationship between the algorithm blocks. In order to ensure the certainty and uniqueness of the algorithm logic execution results and to reduce the complexity of the system developed based on FPGA, the configuration logic scheduling of digital instrumentation and control systems based on FPGA at home and abroad currently adopts serial scheduling technology. However, in serial execution, the configuration logic execution depends on the execution results of all previous configuration logics, which has strong dependence, long algorithm execution time, and low execution efficiency.

[0004] With the development of digital instrumentation and control systems, the number of algorithm blocks executed in a single cycle is increasing. Improving the efficiency of algorithm calculation and execution has become an urgent problem to be solved. Summary of the invention

[0005] The purpose of this application is to provide a configuration logic execution optimization method, system, device, medium and product, thereby improving the execution efficiency of the configuration logic.

[0006] To achieve the above objectives, this application provides the following solutions: In a first aspect, the present application provides a configuration logic execution optimization method, the configuration logic execution optimization method comprising: Based on the application requirements of the user's current DCS system, a configuration logic is configured; the configuration logic includes a plurality of algorithm blocks and dependency relationships between the algorithm blocks, and the dependency relationships represent connection relationships between the algorithm blocks; Based on the dependency relationship between the algorithm blocks, the configuration logic is optimized to obtain a plurality of optimized configuration logic data flows; each optimized configuration logic data flow allows parallel execution; Based on the dependency relationship between each optimized configuration logic data flow and the algorithm block, according to the data flow parallel principle, a configuration logic relationship indication table storing multiple algorithm block names is constructed; wherein the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm block located before the current algorithm block number; Based on the configuration logic relationship indication table, an algorithm dependency register corresponding to each algorithm block is generated; each algorithm dependency register stores a dependency relationship between a current algorithm block and an algorithm block located before the current algorithm block; According to the algorithm dependency in the algorithm dependency register, multiple algorithm executors are called in parallel to execute the configuration logic.

[0007] Optionally, when the configuration logic includes multiple algorithm pages, each algorithm page includes multiple algorithm blocks, and the algorithm pages are connected through input variables and output variables; When the configuration logic includes a single algorithm page, each algorithm block is connected by a connecting line.

[0008] Optionally, based on the dependency relationship between the algorithm blocks, the configuration logic is optimized to obtain a plurality of optimized configuration logic data flows, specifically including: Optimizing and arranging algorithm blocks in the configuration logic that have no dependency relationship between the previous and the next blocks to obtain an optimized configuration logic data flow graph; the optimized configuration logic data flow graph includes a plurality of optimized configuration logic data flows; There is no dependency relationship between the algorithm blocks between the optimized configuration logic data flows, and there is a dependency relationship between the adjacent algorithm blocks within the optimized configuration logic data flows.

[0009] In a second aspect, the present application provides a configuration logic execution optimization system, the configuration logic execution optimization system is used to implement the configuration logic execution optimization method, and the configuration logic execution optimization system includes: A configuration logic determination unit, configured to configure a configuration logic based on the application requirements of the user's current DCS system; the configuration logic includes a plurality of algorithm blocks and dependencies between the algorithm blocks, wherein the dependencies represent connection relationships between the algorithm blocks; A configuration logic data flow determination unit, used to optimize the configuration logic based on the dependency relationship between the algorithm blocks to obtain multiple optimized configuration logic data flows; each optimized configuration logic data flow allows parallel execution; A configuration logic relationship indication table determination unit is used to construct a configuration logic relationship indication table storing multiple algorithm block names based on the dependency relationship between each optimized configuration logic data flow and the algorithm block according to the data flow parallel principle; wherein the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm block located before the current algorithm block number; An algorithm dependency register generating unit, used to generate an algorithm dependency register corresponding to each algorithm block based on the configuration logic relationship indication table; each algorithm dependency register stores a dependency relationship between a current algorithm block and an algorithm block located before the current algorithm block; The execution determination unit is used to call multiple algorithm executors in parallel according to the algorithm dependency in the algorithm dependency register to execute the configuration logic.

[0010] Optionally, the configuration logic data flow determination unit specifically includes: Optimizing and arranging algorithm blocks in the configuration logic that have no dependency relationship between the previous and the next blocks to obtain an optimized configuration logic data flow graph; the optimized configuration logic data flow graph includes a plurality of optimized configuration logic data flows; There is no dependency relationship between the algorithm blocks between the optimized configuration logic data flows, and there is a dependency relationship between the adjacent algorithm blocks within the optimized configuration logic data flows.

[0011] In a third aspect, the present application provides a computer device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement any of the above-described configuration logic execution optimization methods.

[0012] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements any of the above-mentioned configuration logic execution optimization methods.

[0013] In a fifth aspect, the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the execution optimization method of the configuration logic described in any one of the above items.

[0014] According to the specific embodiments provided in this application, this application has the following technical effects: The present application discloses a configuration logic execution optimization method, system, device, medium and product. By utilizing the dependency relationship between algorithm blocks, multiple optimized configuration logic data streams are obtained. Based on the dependency relationship between each optimized configuration logic data stream and the algorithm block, a configuration logic relationship indication table storing multiple algorithm block names is constructed according to the data flow parallel principle. Based on the configuration logic relationship indication table, an algorithm dependency register corresponding to each algorithm block is generated. According to the algorithm dependency relationship in the algorithm dependency register, multiple algorithm executors are called in parallel. The traditional FPGA-based serial configuration logic execution can be improved to the parallel execution of multiple algorithm executors, which maximizes the execution efficiency of the algorithm executors and reduces the idle state of the algorithm executors. The scheduling between the algorithm executors is controlled by the algorithm dependency relationship, which ensures the certainty and uniqueness of the logic configuration execution process. At the same time, the execution efficiency of the configuration logic is improved, and the carrying capacity of the DCS control system is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 This is an application environment diagram of the execution optimization method of the configuration logic in one embodiment of the present application; Figure 2 A schematic diagram of a flow chart of a configuration logic execution optimization method provided in an embodiment of the present application; Figure 3 A configuration logic diagram provided for an embodiment of the present application; Figure 4 A schematic diagram of the dependency relationship between algorithm blocks provided in one embodiment of the present application; Figure 5 An optimized configuration logic data flow diagram provided for an embodiment of the present application; Figure 6 A schematic diagram of an algorithm dependency register provided in an embodiment of the present application; Figure 7 A schematic diagram of a configuration logic scheduling execution process provided by an embodiment of the present application; Figure 8 A schematic diagram of the structure of a computer device provided in one embodiment of the present application.

[0017] Reference numerals: Terminal 102 and server 104 . DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0019] The purpose of the present invention is to provide a configuration logic execution optimization method, which overcomes the shortcomings of the traditional DCS system configuration logic execution process, can complete complex configuration logic function calculations in a single cycle, while ensuring the certainty and uniqueness of the calculation process and calculation results, shortening the response time of the DCS, and improving the algorithm execution efficiency and reliability.

[0020] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0021] The execution optimization method of the configuration logic provided in the embodiment of the present application can be applied to Figure 1 In the application environment shown. Among them, the terminal 102 communicates with the server 104 through the network. The data storage system can store the data that the server 104 needs to process. The data storage system can be set up separately, or it can be integrated on the server 104, or it can be placed on the cloud or other servers. The terminal 102 can send the configuration logic to be processed to the server 104. After the server 104 receives the configuration logic to be processed, the server 104 executes the execution optimization method of the configuration logic for the configuration logic to be processed. The server 104 can feed back the obtained configuration logic execution result to the terminal 102. In addition, in some embodiments, the execution optimization method of the configuration logic can also be implemented separately by the server 104 or the terminal 102, such as the terminal 102 can directly optimize the execution of the configuration logic for the configuration logic to be processed, or the server 104 can obtain the configuration logic to be processed from the data storage system, and optimize the execution of the configuration logic for the configuration logic to be processed.

[0022] The terminal 102 may be, but is not limited to, various desktop computers, laptop computers, smart phones, tablet computers, IoT devices, and portable wearable devices. The IoT devices may be smart speakers, smart TVs, smart air conditioners, smart vehicle-mounted devices, etc. The portable wearable devices may be smart watches, smart bracelets, head-mounted devices, etc. The server 104 may be implemented as an independent server or a server cluster consisting of multiple servers, or may be a cloud server.

[0023] In an exemplary embodiment, Figure 2As shown, a configuration logic execution optimization method is provided. The method is executed by a computer device, and can be executed by a computer device such as a terminal or a server alone, or by a terminal and a server together. In the embodiment of the present application, the method is applied to Figure 1 Taking the server 104 in the example as an example, the following steps are included: Step S1, based on the application requirements of the user's current DCS system, configure a configuration logic; the configuration logic includes multiple algorithm blocks and dependencies between the algorithm blocks, and the dependency relationship represents the connection relationship between the algorithm blocks.

[0024] As an optional implementation, in step S1, when the configuration logic includes multiple algorithm pages, each algorithm page includes multiple algorithm blocks, and the algorithm pages are connected through input variables and output variables.

[0025] When the configuration logic includes a single algorithm page, each algorithm block is connected by a connecting line.

[0026] Specifically, configure a configuration logic, the schematic diagram of which is as follows Figure 3 As shown, there are 19 algorithm blocks in total, according to Figure 3 The number of the algorithm block in the algorithm block. For example, the name of the algorithm block numbered 0 is Blk0. By analogy, the names of the 19 algorithm blocks are Blk0, Blk1...Blk18. 0 、a 1 、a 2 、a 3 , b 0 , b 1 , b 2 , b 3 、c 0 、c 1 、c 2 、c 3 is the input of the algorithm block, d 0 d 1 d 2 d 3 is the output of the algorithm block. The configuration logic implements the following operations: 0 = a 0 a 1 a 2 a 3 + b 0 b 1 b 2 b 3 + c 0 c 1 c 2 c 3 , d 1 = a 0 a 1a 2 a 3 , d 2 =b 0 b 1 b 2 b 3 , d 3 = c 0 c 1 c 2 c 3 .

[0027] Determine the dependencies between each algorithm block and the previous one, such as Figure 4 As shown, M 0 、M 1 、M 2 、M 3 , N is the algorithm block number, I 0 ,I 1 ,I 2 ,I 3 Input pins for algorithm blocks, such as Figure 4 As shown, algorithm block N is said to depend on algorithm block M 0 、M 1 、M 2 、M 3 ; Combine Figure 4 It can be seen that the Blk1 algorithm block depends on Blk0, Blk2 depends on Blk1, Blk9 depends on Blk5, Blk8, and Blk15. The dependency relationship between the remaining algorithm blocks can be inferred by analogy.

[0028] Step S2, based on the dependency relationship between the algorithm blocks, the configuration logic is optimized to obtain a plurality of optimized configuration logic data flows; each optimized configuration logic data flow allows parallel execution.

[0029] As an optional implementation, step S2 specifically includes: The algorithm blocks without dependency relationship between the previous and the next in the configuration logic are optimized and arranged to obtain an optimized configuration logic data flow diagram; the optimized configuration logic data flow diagram includes multiple optimized configuration logic data flows. Among them, the algorithm blocks between the optimized configuration logic data flows have no dependency relationship, and the adjacent algorithm blocks within each optimized configuration logic data flow have dependency relationship.

[0030] Specifically, the configuration diagram corresponding to the configuration logic is sorted and optimized according to the dependency relationship, the algorithm relationship that does not have a dependency relationship between the front and the back is re-optimized and rearranged, and 4 data flow diagrams that can be executed simultaneously are sorted out, as shown below: Figure 5The optimized configuration logic data flow diagram is shown. The data flow diagram executed simultaneously can be deleted according to the complexity of the algorithm configuration. If the data flow already meets the system performance requirements, the number of data flows can be set less. It can be seen that the algorithm execution order before optimization is Blk0, Blk1... Blk19. After optimization, the four data flows can theoretically be executed completely in parallel.

[0031] Step S3, based on the dependency relationship between each optimized configuration logic data flow and algorithm block, and in accordance with the principle of data flow parallelism, construct a configuration logic relationship indication table storing multiple algorithm block names; wherein the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm block located before the current algorithm block number.

[0032] Specifically, based on Figure 5 The optimized configuration logic data flow diagram and the dependency relationship between the algorithm blocks are shown as follows: Figure 5 According to the column storage order shown in the red box diagram, the following configuration logic relationship indication table is obtained: First column: Blk0, Blk3, Blk6, Blk10, Blk13, Blk16.

[0033] Second column: Blk1, Blk4, Blk7, Blk11, Blk14, Blk17.

[0034] Third column: Blk2, Blk5, Blk8, Blk12, Blk15, Blk18.

[0035] Fourth column: Blk9.

[0036] Step S4, based on the configuration logic relationship indication table, generate an algorithm dependency register corresponding to each algorithm block; each algorithm dependency register stores the dependency relationship between the current algorithm block and the algorithm block located before the current algorithm block.

[0037] Specifically, according to the above logic relationship indication table, an algorithm dependency register is generated for each algorithm block. The schematic diagram of the algorithm dependency register is as follows: Figure 6 As shown in , the algorithm dependency register stores the dependency relationship between each algorithm block and the previous algorithm block. Since the width of the algorithm dependency register is limited and the amount of algorithm block number data is large, it is impossible to store all algorithm block numbers. The storage is now divided into coarse storage and fine storage. Coarse storage can only determine the dependency relationship with all previous algorithm blocks, such as Figure 6 Bit 15 in the , the detailed storage is as follows Figure 6From bit15...bit0 in the bit 15, we can know the dependency of the first 15 algorithm blocks and know which algorithm block it depends on. If bit15=1, it means that the algorithm block depends on an algorithm block other than the first 15 algorithm blocks. In other words, it must wait until all the algorithm blocks before the first 15 are calculated before it can be calculated. If bit15=0, it means that there is no dependency on the algorithm blocks before the first 15, and only the algorithm blocks before the first 15 need to be considered.

[0038] For example, for Blk9, the value of the algorithm dependency register is 000000000011010, where bit15=0 means that it does not depend on the algorithm blocks before the first 15 algorithm blocks; bit1=1 means that it depends on the second algorithm block Blk15, and bit3=1 means that it depends on the fourth algorithm block Blk8, and bit4=1 means that it depends on the fifth algorithm block Blk5, and the rest of the dependencies can be deduced in the same way.

[0039] Step S5: Calling multiple algorithm executors in parallel according to the algorithm dependency in the algorithm dependency register to execute the configuration logic.

[0040] After completing the above steps, follow Figure 7 The configuration logic scheduling execution diagram shown in the example of calling two algorithm executors is used to expand the calculation. All input data and algorithm block information are stored in Figure 7 In the CMemory storage area shown, the logical configuration is executed in the following sequence: Step S51, read BI information (first read the information of Blk0, Blk3, Blk6, Blk10) and LINK information (interconnection information between algorithm blocks) from the image storage area to the BI buffer (4 groups).

[0041] Step S52, read the data corresponding to BI from CMemory according to the BI information to the CMemory input data buffer (the input data a of Blk0, Blk3, Blk6, Blk10) 0 、a 1 、a 2 、a 3 , b 0 , b 1 , b 2 , b 3 、c 0 、c 1 、c 2 、c 3 .

[0042] Step S53: The 4 groups of BIs are flexibly called for calculation according to the idle states of the two algorithm executors. For example, algorithm executor 1 executes Blk0, algorithm executor 1 executes Blk3, and so on. The algorithm blocks with dependencies must wait for the dependent algorithm blocks to finish execution before they can execute. Also, the number of algorithm executors can be extended according to the system capacity and time margin requirements, and can be 4, 8, ….

[0043] Step S54: Each algorithm executor that has completed the calculation writes the result into the CMemory output buffer (4 groups). For example, the results of Blk0, Blk3, Blk6, and Blk10 are written into the buffer.

[0044] Step S55: Each group of CMemory output buffers writes the data into the CMemory input data area of the next algorithm block for calculation according to the LINK information. For example, after the calculation result of Blk0 is completed, it is written into the input data area of Blk0 it is connected to.

[0045] Step S56: And so on until the last algorithm block finishes execution.

[0046] Step S57: The final execution result is determined, and the calculation result: d 0 = a 0 a 1 a 2 a 3 + b 0 b 1 b 2 b 3 + c 0 c 1 c 2 c 3 ,d 1 =a 0 a 1 a 2 a 3 ,d 2 = b 0 b 1 b 2 b 3 ,d 3 = c 0 c 1 c 2 c 3 ,which is exactly the same as the result of serial operation. If the system supports 4 algorithm executors, the logical configuration time can be shortened to 1 / 4 of the serial execution.

[0047] Advantages of this application: This application optimizes the configuration logic relationship and determines the algorithm block dependency, thereby calling multiple algorithm executors in parallel for orderly calculations. Under the premise that each algorithm configuration is determined, the order and results of the algorithm execution process are also unique and certain, which meets the deterministic characteristics of the digital instrumentation and control system, greatly improves the execution efficiency, and indirectly improves the algorithm capacity, so that more complex FPGA-based digital instrumentation and control systems can be designed.

[0048] Based on the same inventive concept, the embodiment of the present application also provides a configuration logic execution optimization system for implementing the configuration logic execution optimization method involved above. The implementation scheme for solving the problem provided by the system is similar to the implementation scheme recorded in the above method, so the specific limitations of one or more configuration logic execution optimization system embodiments provided below can refer to the limitations of the configuration logic execution optimization method above, and will not be repeated here.

[0049] In an exemplary embodiment, a configuration logic execution optimization system is provided, comprising: The configuration logic determination unit is used to configure a configuration logic based on the application requirements of the user's current DCS system; the configuration logic includes multiple algorithm blocks and dependencies between the algorithm blocks, and the dependency relationship represents the connection relationship between the algorithm blocks.

[0050] The configuration logic data flow determination unit is used to optimize the configuration logic based on the dependency relationship between the algorithm blocks to obtain multiple optimized configuration logic data flows; each optimized configuration logic data flow allows parallel execution.

[0051] A configuration logic relationship indication table determination unit is used to construct a configuration logic relationship indication table storing multiple algorithm block names based on the dependency relationship between each optimized configuration logic data flow and algorithm block in accordance with the data flow parallel principle; wherein the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm block located before the current algorithm block number.

[0052] The algorithm dependency register generating unit is used to generate an algorithm dependency register corresponding to each algorithm block based on the configuration logic relationship indication table; each algorithm dependency register stores the dependency relationship between the current algorithm block and the algorithm block located before the current algorithm block.

[0053] The execution determination unit is used to call multiple algorithm executors in parallel according to the algorithm dependency in the algorithm dependency register to execute the configuration logic.

[0054] Optionally, the configuration logic data flow determination unit specifically includes: The algorithm blocks in the configuration logic that have no dependency relationship are optimized and arranged to obtain an optimized configuration logic data flow diagram; the optimized configuration logic data flow diagram includes multiple optimized configuration logic data flows.

[0055] There is no dependency relationship between the algorithm blocks between the optimized configuration logic data flows, and there is a dependency relationship between the adjacent algorithm blocks within the optimized configuration logic data flows.

[0056] In an exemplary embodiment, a computer device is provided, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement an execution optimization method of configuration logic.

[0057] In an exemplary embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the execution optimization method of the configuration logic is implemented.

[0058] In an exemplary embodiment, a computer program product is provided, including a computer program, which implements an execution optimization method of configuration logic when executed by a processor.

[0059] In an exemplary embodiment, a computer device is provided. The computer device may be a server or a terminal. The internal structure diagram thereof may be as follows: Figure 8 As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a configuration logic execution optimization method is implemented.

[0060] Those skilled in the art will understand that Figure 8 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0061] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0062] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM may be in various forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM).

[0063] The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. The non-relational database may include a distributed database based on blockchain, etc., but is not limited thereto. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but is not limited thereto.

[0064] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0065] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, according to the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A method for optimizing the execution of configuration logic, characterized in that: The execution optimization method of the configuration logic comprises: Based on the application requirements of the user's current DCS system, a configuration logic is configured; the configuration logic includes a plurality of algorithm blocks and dependency relationships between the algorithm blocks, and the dependency relationships represent connection relationships between the algorithm blocks; Based on the dependency relationship between the algorithm blocks, the configuration logic is optimized to obtain a plurality of optimized configuration logic data flows; each optimized configuration logic data flow allows parallel execution; Based on the dependency relationship between each optimized configuration logic data flow and the algorithm block, according to the data flow parallel principle, a configuration logic relationship indication table storing multiple algorithm block names is constructed; wherein the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm block located before the current algorithm block number; Based on the configuration logic relationship indication table, an algorithm dependency register corresponding to each algorithm block is generated; each algorithm dependency register stores a dependency relationship between a current algorithm block and an algorithm block located before the current algorithm block; According to the algorithm dependency in the algorithm dependency register, multiple algorithm executors are called in parallel to execute the configuration logic.

2. The execution optimization method of configuration logic according to claim 1, characterized in that: When the configuration logic includes multiple algorithm pages, each algorithm page includes multiple algorithm blocks, and the algorithm pages are connected through input variables and output variables; When the configuration logic includes a single algorithm page, each algorithm block is connected by a connecting line.

3. The execution optimization method of configuration logic according to claim 1, characterized in that: Based on the dependency relationship between the algorithm blocks, the configuration logic is optimized to obtain multiple optimized configuration logic data flows, specifically including: Optimizing and arranging algorithm blocks in the configuration logic that have no dependency relationship between the previous and the next blocks to obtain an optimized configuration logic data flow graph; the optimized configuration logic data flow graph includes a plurality of optimized configuration logic data flows; There is no dependency relationship between the algorithm blocks between the optimized configuration logic data flows, and there is a dependency relationship between the adjacent algorithm blocks within the optimized configuration logic data flows.

4. A configuration logic execution optimization system, characterized in that: The configuration logic execution optimization system is used to implement the configuration logic execution optimization method according to any one of claims 1 to 3, and the configuration logic execution optimization system includes: A configuration logic determination unit, configured to configure a configuration logic based on the application requirements of the user's current DCS system; the configuration logic includes a plurality of algorithm blocks and dependencies between the algorithm blocks, wherein the dependencies represent connection relationships between the algorithm blocks; A configuration logic data flow determination unit, used to optimize the configuration logic based on the dependency relationship between the algorithm blocks to obtain multiple optimized configuration logic data flows; each optimized configuration logic data flow allows parallel execution; A configuration logic relationship indication table determination unit is used to construct a configuration logic relationship indication table storing multiple algorithm block names based on the dependency relationship between each optimized configuration logic data flow and the algorithm block according to the data flow parallel principle; wherein the algorithm block corresponding to each current algorithm block name has a dependency relationship with the algorithm block located before the current algorithm block number; An algorithm dependency register generating unit, used to generate an algorithm dependency register corresponding to each algorithm block based on the configuration logic relationship indication table; each algorithm dependency register stores a dependency relationship between a current algorithm block and an algorithm block located before the current algorithm block; The execution determination unit is used to call multiple algorithm executors in parallel according to the algorithm dependency in the algorithm dependency register to execute the configuration logic.

5. The execution optimization system of configuration logic according to claim 4, characterized in that: The configuration logic data flow determination unit specifically includes: Optimizing and arranging algorithm blocks in the configuration logic that have no dependency relationship between the previous and the next blocks to obtain an optimized configuration logic data flow graph; the optimized configuration logic data flow graph includes a plurality of optimized configuration logic data flows; There is no dependency relationship between the algorithm blocks between the optimized configuration logic data flows, and there is a dependency relationship between the adjacent algorithm blocks within the optimized configuration logic data flows.

6. A computer device comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the execution optimization method of the configuration logic described in any one of claims 1 to 3.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the execution optimization method of the configuration logic described in any one of claims 1 to 3 is implemented.

8. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the execution optimization method of the configuration logic described in any one of claims 1 to 3 is implemented.

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