System on chip and method of operating same

Abstract

The invention discloses a system-on-chip and a method for operating the system-on-chip. The system on chip includes: at least one arithmetic processing unit configured to: process an instruction based on a driving voltage and a clock signal; a temperature management module configured to estimate a cooling coefficient and a heating coefficient associated with the at least one arithmetic processing unit based on the temperature measured at the at least one arithmetic processing unit, determining an operation frequency of a clock signal to be transmitted to the at least one arithmetic processing unit based on the cooling coefficient and the heat generation coefficient; and a dynamic voltage frequency adjustment (DVFS) module configured to output a control signal for adjusting the driving voltage and the clock signal based on the operating frequency.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2023-0177076, filed with the Korean Intellectual Property Office on December 7, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] Example embodiments of the inventive concept described herein relate to a system-on-chip (SoC) capable of stably controlling temperature. Background Art

[0003] A system-on-chip (SoC) refers to such a system semiconductor in which various functional blocks (such as an arithmetic processing unit (such as a central processing unit (CPU)), a memory, a communication modem, a peripheral interface circuit, etc.) are included to drive an electronic system (such as a computer system) and the plurality of various functional blocks are integrated into one chip. In a mobile electronic system, the SoC may be referred to as an application processor (AP).

[0004] Generally, there is a dynamic voltage and frequency scaling (DVFS) scheme that uses proportional-integral-derivative (PID) control to calculate power and dynamically adjust the frequency and voltage of a system-on-chip. The DVFS method based on PID control may be difficult to flexibly respond to temperature changes in a system-on-chip (SoC), and errors due to domain conversion may occur during intermediate calculations. In addition, the DVFS method based on PID control may require complex configurations in terms of implementation (such as the complexity of calculating dynamic power and static power, the need for a hardware module to check the ambient temperature of the system-on-chip (SoC), power calculation based on thermal resistance values, etc.). Summary of the Invention

[0005] Example embodiments of the inventive concept provide a system-on-chip (SoC) capable of stably controlling temperature.

[0006] According to some example embodiments, a system-on-chip includes: at least one arithmetic processing unit configured to process instructions based on a driving voltage and a clock signal; a temperature management module configured to estimate a cooling coefficient and a heating coefficient associated with the at least one arithmetic processing unit based on the temperature measured in the at least one arithmetic processing unit, and determine an operating frequency of the clock signal to be transmitted to the at least one arithmetic processing unit based on the cooling coefficient and the heating coefficient; and a dynamic voltage and frequency scaling (DVFS) module configured to output a control signal for adjusting the driving voltage and the clock signal based on the operating frequency.

[0007] According to some example embodiments, a method of operating a system-on-chip (SoC) includes: checking, by a temperature management module, a temperature of an arithmetic processing unit measured by a temperature sensor; estimating, by the temperature management module, a cooling coefficient and a heating coefficient of the arithmetic processing unit based on the temperature; determining, by the temperature management module, an operating frequency of a clock signal to be transmitted to the arithmetic processing unit based on the cooling coefficient and the heating coefficient; outputting, by a dynamic voltage and frequency scaling (DVFS) control module, a control signal for each of a driving voltage and the clock signal to be transmitted to the arithmetic processing unit based on the operating frequency; and processing, by the arithmetic processing unit, an instruction based on the driving voltage and the clock signal.

[0008] According to some example embodiments, an electronic device includes: at least one electronic circuit configured to be driven based on a received driving voltage and a parameter; a temperature management module configured to estimate a cooling coefficient and a heating coefficient associated with the at least one circuit based on a temperature measured in the at least one electronic circuit, and to determine a value of the parameter to be transmitted to the at least one electronic circuit based on the cooling coefficient and the heating coefficient; and a circuit controller configured to output a control signal for adjusting the parameter based on the value of the parameter.

[0009] A system-on-chip (SoC) according to some example embodiments can stably control temperature.

[0010] A system-on-chip (SoC) according to some example embodiments can calculate power for operating at a target temperature without adding additional hardware. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The above and other objects and features of the inventive concept will become apparent by describing embodiments of the inventive concept in detail with reference to the accompanying drawings.

[0012] Figure 1 is a block diagram showing a system-on-chip (SoC) according to some example embodiments.

[0013] Figure 2 is a diagram showing an example of a thermal model for controlling the temperature of an SoC according to some example embodiments.

[0014] Figure 3 is a diagram showing a thermal model for controlling the temperature of an SoC according to some example embodiments.

[0015] Figure 4 is a diagram showing in detail a method of determining an operating frequency and a driving voltage for reaching a target temperature based on a thermal model of an SoC according to some example embodiments.

[0016] Figure 5is a block diagram showing the configuration of a SoC according to some example embodiments.

[0017] Figure 6 is a diagram showing the DVFS table of a SoC according to some example embodiments.

[0018] Figure 7 is a flowchart showing a method of operating a system on a chip according to some example embodiments.

[0019] Figure 8 is a flowchart showing a method of determining an operating frequency of a system on a chip (SoC) according to some example embodiments.

[0020] Figure 9 is a flowchart showing a method of verifying a cooling coefficient and a heat generation coefficient of a system on a chip (SoC) according to some example embodiments.

[0021] Figure 10 is a diagram showing a method of adjusting a cooling coefficient and a heat generation coefficient of a system on a chip (SoC) according to some example embodiments.

[0022] Figure 11 is a flowchart showing a method of adjusting a power budget of a system on a chip (SoC) according to some example embodiments.

[0023] Figures 12A to 12B and 13A to Figure 13B is a diagram showing a method of adjusting a power budget according to a change in a temperature difference of a system on a chip (SoC) according to some example embodiments.

[0024] Figure 14 is a block diagram showing an example electronic device according to some example embodiments.

[0025] Figure 15 is a block diagram showing in detail the configuration of a system on a chip (SoC) according to some example embodiments.

[0026] Figure 16 is a block diagram showing in detail the configuration of a system on a chip (SoC) according to some example embodiments. Detailed Description

[0027] Hereinafter, some example embodiments of the inventive concept will be described clearly and in detail so that those skilled in the art can easily implement the inventive concept.

[0028] Accordingly, the accompanying drawings and the description are to be regarded as illustrative rather than restrictive. Throughout the specification, the same reference numerals refer to the same elements. Unless otherwise specifically stated, the order of operations or steps is not limited to the order presented in the claims or the drawings. The order of operations or steps may be changed, some operations or steps may be combined, certain operations or steps may be divided, and certain operations or steps may not be performed.

[0029] As used herein, unless the context clearly dictates otherwise, the singular forms are also intended to include the plural forms. Although the terms first, second, etc. may be used herein to describe various elements, components, steps, and / or operations, these terms are only used to distinguish one element, component, step, or operation from another.

[0030] Figure 1 is a block diagram showing a system-on-chip (SoC) according to some example embodiments.

[0031] A system-on-chip (SoC) 110 according to some example embodiments may control components of a computing system 100 to operate the computing system 100. The computing system 100 may be a mobile computing system. In some exemplary implementations, the SoC 110 may be an application processor (AP). The SoC 110 includes at least one operation processing unit (OPU) 111. The SoC 110 may estimate a cooling coefficient and a heat generation coefficient based on the temperature, operating frequency, and drive voltage of the SoC 110. In some example embodiments, in order to achieve a target temperature, the SoC 110 may adjust the drive voltage and operating frequency supplied to the SoC 110 based on the cooling coefficient and the heat generation coefficient. For example, the SoC 110 according to some example embodiments may determine the drive voltage and operating frequency for achieving the target temperature without any hardware configuration for measuring the ambient temperature.

[0032] Referring to Figure 1 , the SoC 110 may include at least one operation processing unit (OPU) 111, a temperature collection (TC) module 112, a temperature management (DTM) module 113, a dynamic voltage and frequency scaling (DVFS) module 114, and a clock signal controller 115. The SoC 110 may communicate with a power management integrated circuit (PMIC) 120 and a memory device 130.

[0033] In some example embodiments, a unit or module may represent hardware that can execute functions and operations according to their respective names, or computer program code that can execute specific functions and operations. However, the example embodiments are not limited thereto, and in some example embodiments, a module may represent an electronic recording medium (e.g., a processing unit) loaded with computer program code that can execute specific functions and operations. For example, a module may represent a functional and / or structural combination of hardware for executing some example embodiments and / or software for driving the hardware. The software may be implemented as firmware.

[0034] At least one OPU 111 may include a plurality of arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n. Each of the plurality of arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n may process instructions based on the supplied / received driving voltage and clock signal. For example, each of the plurality of arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n may be one of a central processing unit (CPU), a graphics processing unit (GPU), a neural network processing unit (NPU), a digital signal processing unit (DSP), and an image signal processing unit (ISP), but the example embodiments are not limited thereto. In some example embodiments, at least one of the plurality of arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n may be a central processing unit, and the central processing unit may include a plurality of cores. A part of the plurality of cores may have different sizes or computing capabilities.

[0035] At least one temperature sensor may be disposed in each of the plurality of arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n. In some example embodiments, a plurality of temperature sensors may be disposed in each of the plurality of arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n. The plurality of temperature sensors S1 to Sm respectively disposed in the plurality of arithmetic processing units (OPU_1,..., OPU_n) 111_1 to 111_n may be different from each other. For example, the number of temperature sensors S1, S2, and S3 disposed in the first arithmetic processing unit (OPU_1) may be different from the number of temperature sensors Sm-1 and Sm disposed in the nth processing unit (OPU_n). In some example embodiments, when the central processing unit includes a plurality of cores, temperature sensors are disposed on each of the plurality of cores, and the number of disposed temperature sensors may be different according to the size or computing capability of the core.

[0036] The temperature sensors S1 to Sm may measure the temperature at each specified time period, and provide, send, or transmit the measured temperature data TS1 to TSm to the temperature collection (TC) module 112.

[0037] According to some example embodiments, the provision of data and signals does not necessarily mean that the provider of the data and signals actively sends, provides, or transmits them to the recipient. In other words, the provision of data may include the recipient reading data generated and stored by the provider. In some example embodiments, the provision of data and signals may represent the direct transmission of data and signals, but should be understood to include the transmission of data and signals through other intermediate components.

[0038] The temperature collection (TC) module 112 may integrate the temperature data TS1 to TSm for each functional block having the same or similar functions, and generate the temperature data T1 to Tn for each hot region. For example, the temperature data TS1 to TSm may be converted into a representative temperature for each hot region. For example, the temperature data TS1, TS2, and TS3 of the first operation processing unit OPU_1 including a plurality of temperature sensors S1, S2, and S3 are converted into the temperature data T1 of the first hot region. The temperature collection (TC) module 112 may store the integrated temperature data TS1, TS2, and TS3 in the memory device 130. The temperature collection (TC) module 112 may provide, send, or transmit the integrated temperature data TS1, TS2, and TS3 to the temperature management (DTM) module 113. In some example embodiments, the highest temperature and the lowest temperature among the temperature data TS1, TS2, and TS3, or the average temperature of the temperature data TS1, TS2, and TS3 may be set as the representative temperature, but the example embodiments are not limited thereto. Various schemes (such as arithmetic mean, harmonic mean, weighted mean, etc.) may be used to determine the average temperature. The average temperature may be calculated by reflecting the positions where each of the temperature sensors S1 to Sm is placed.

[0039] According to some example embodiments, at least one operation processing unit (OPU) 111 may be respectively divided into operation processing units (OPU_1 to OPU_n) 111_1 to 111_n. Optionally, in some example embodiments, at least one of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n may be divided into a plurality of functional blocks. The following example embodiments are explained on the assumption that the functional blocks are respectively divided into operation processing units (OPU_1 to OPU_n) 111_1 to 111_n.

[0040] According to some example embodiments, a temperature management (DTM) module 113 may estimate a cooling coefficient and a heat generation coefficient for each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n based on temperature data TS1 to TSm, operation frequencies F1 to Fn, and drive voltages V1 to Vn of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n at a previous time. For example, the cooling coefficient and the heat generation coefficient may be estimated for each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n.

[0041] In some example embodiments, the temperature management (DTM) module 113 may estimate the cooling coefficient and the heat generation coefficient based on matrix operations of the temperature data TS1 to TSm, the operation frequencies F1 to Fn, and the drive voltages V1 to Vn of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n at a previous time.

[0042] In some example embodiments, the temperature management (DTM) module 113 may perform matrix operations based on floating-point operations. For example, the temperature management (DTM) module 113 may include a floating-point operation unit or may use the floating-point operation logic of one of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n. The floating-point operation logic may be implemented by one of hardware, software, and a combination of hardware and software.

[0043] The temperature management (DTM) module 113 may determine an operation frequency of a clock signal to be provided to each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n based on the cooling coefficient and the heat generation coefficient for each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n. The operation frequency may be an operation frequency for achieving a target temperature of each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n. The operation frequency may be a frequency in a higher frequency band or a lower frequency band than the operation frequency at a previous time. A target temperature may be preset for each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n. According to some example embodiments, optionally, the same target temperature may be set for all of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n.

[0044] The temperature management (DTM) module 113 may provide a control signal CTRL_DVFS to the DVFS module 114 to supply a clock signal of a determined operating frequency to each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n. The control signal CTRL_DVFS may include information about the operating frequency determined by the temperature management (DTM) module 113. The control signal CTRL_DVFS may include information about a plurality of operating frequencies for the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n.

[0045] The DVFS module 114 may determine the operating frequency and drive voltage of the clock signal to be supplied to each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n based on the operating frequency determined by the temperature management (DTM) module 113. For example, the DVFS module 114 may refer to a DVFS table to determine the operating frequency and drive voltage of the clock signal to be supplied to each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n, where the DVFS table is a look-up table pre-mapped with a plurality of operating frequencies of the clock signal and a plurality of drive voltage levels. Details according to some example embodiments will be described below with reference to Figure 6 description of details according to some example embodiments.

[0046] The DVFS module 114 may provide control signals CTRL_PMIC and CTRL_CLK to the PMIC 120 and the clock signal controller 115 such that the determined clock signal and drive voltage are supplied to each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n. The clock signal controller 115 may generate clock signals CLK1 to CLKn to be supplied to each of the operation processing units (OPU_1 to OPU_n) 111_1 to 111_n based on the control signal CTRL_CLK. In some example embodiments, the clock signal controller 115 may include a phase-locked loop (PLL) or a delay-locked loop (DLL).

[0047] The DVFS module 114 may store the determined clock signal and driving voltage together with time information in the memory device 130. The DVFS module 114 may store the clock signal and driving voltage of each of the arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n in the memory device 130. The time information may be absolute time information or relative time information distinguishable between time periods. According to some example embodiments, the DVFS module 114 may store only a preset number of clock signals and driving voltages in the memory device 130. For example, the clock signals and driving voltages before a specified time (or specified number of times) from the current time may be deleted, and the clock signals and driving voltages within a specified time (or specified number of times) from the current time may be stored in the memory device 130. The clock signals and driving voltages stored in the memory device 130 may be used to estimate the cooling coefficient and heat generation coefficient of the temperature management module 113.

[0048] The SoC 110 according to some example embodiments may determine the operating frequency and driving voltage of each of the arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n for achieving a target temperature only based on the temperature, operating frequency, and driving voltage of each of the arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n. Therefore, according to some example embodiments, no separate hardware is required to measure the ambient temperature. For example, the SoC 110 according to some example embodiments may not utilize separate hardware to measure the ambient temperature. In some example embodiments, the SoC 110 does not need to estimate various parameters or domain conversions during intermediate calculations for temperature management, but instead uses the cooling coefficient and heat generation coefficient estimated based on a small amount of data. For example, the SoC 110 may not estimate various parameters or domain conversions during intermediate calculations for temperature management, but may be configured to use the cooling coefficient and heat generation coefficient estimated based on a small amount of data. Therefore, the SoC 110 may quickly and stably control the temperature of each of the arithmetic processing units (OPU_1 to OPU_n) 111_1 to 111_n.

[0049] Figure 2 is a diagram showing an example of a thermal model for controlling the temperature of an SoC according to some example embodiments. Figure 2 The SoC of Figure 1 corresponds to the SoC 110 of Figure 1 and Figure 2 Examples of the thermal model according to some example embodiments will be described with reference to Figure 1 and Figure 2 In the description of the thermal model of

[0050] Assume that in the thermal model according to some example embodiments, the current temperature of the SoC 110 at the current time point (n) is determined based on the heat generation amount GH and the heat dissipation amount EH. The heat generation amount GH is the generated heat, and the heat dissipation amount EH is the dissipated heat. The heat generation factors HE that affect the heat generation amount GH of the SoC 110 may include the structure and material characteristics of the SoC 110 (e.g., chip characteristics HE1), the workload HE2 allocated to the SoC 110, the operating frequency HE3 of the SoC 110, and the drive voltage HE4 of the SoC 110. The cooling factors CE that affect the heat dissipation amount EH of the SoC 110 may include the board form factor CE1 for implementing the SoC 110, the ambient temperature CE2 of the SoC 110, and the temperature CE3 of the SoC 110. However, the example embodiments are not limited thereto, and the heat generation factors HE and the cooling factors CE may include Figure 2 other factors not shown in

[0051] Among the heat generation factors HE, the factors that can be dynamically controlled by the temperature management module 113 may include the operating frequency HE3 and the drive voltage HE4 of the SoC 110. Among the cooling factors CE, the factors that can be dynamically controlled or precisely calculated by the temperature management module 113 may include the temperature CE3 of the SoC 110. For example, the temperature CE3 of the SoC 110 can be identified by the temperature collection (TC) module 112, and the operating frequency HE3 and the drive voltage HE4 of the SoC 110 can be controlled by the DVFS module 114.

[0052] The heat dissipation amount EH of the SoC 110 tends to be proportional to the temperature CE3 of the SoC 110. In some example embodiments, the curve graph CGR of the heat dissipation amount EH and the cooling coefficient Ccoef may represent the temperature decrease rate of the SoC 110 caused by the cooling factors CE that affect the temperature decrease of the SoC 110. The heat generation amount GH of the SoC 110 tends to be proportional to the operating frequency HE3 and the drive voltage HE4 of the SoC 110. In some example embodiments, the curve graph HGR of the heat generation amount GH and the heat generation coefficient Hcoef may represent the temperature increase rate of the SoC 110 caused by the heat generation factors HE that affect the temperature increase of the SoC 110. Therefore, the heat generation coefficient Hcoef and the cooling coefficient Ccoef may vary with time.

[0053] According to some example embodiments, when the entire time portion during which the SoC 110 operates is equally divided into unit time intervals and the unit time is very short, it can be assumed that the values of the variables that affect the heat generation coefficient Hcoef and the cooling coefficient Ccoef are the same in adjacent time portions. For example, it can be assumed that the values of the heat generation factors HE and the cooling factors CE are the same in adjacent time portions. This can also be applied to Figure 2 the heat generation factors and the cooling factors not shown in

[0054] Thus, in some example embodiments, when it is assumed that the values of the heating element HE and the cooling element CE at the current time point (n) are equal to the values of the heating element HE and the cooling element CE at the next time point (n + 1), the heating coefficient Hcoef(n) and the cooling coefficient Ccoef(n) at the current time point (n) may also be the same as the heating coefficient Hcoef(n) and the cooling coefficient Ccoef(n) at the next time point (n + 1).

[0055] Figure 3 is a diagram showing a thermal model for controlling the temperature of an SoC according to some example embodiments. Figure 3 The SoC of Figure 1 and Figure 2 The SoC 110 corresponds. Reference will be made to Figure 1 , Figure 2 and Figure 3 to describe the thermal model according to some example embodiments.

[0056] Referring to Figure 2 an example of the thermal model in, the current temperature of the SoC 110 at the current point (n) may be based on the heat generation amount GH and the heat dissipation amount EH, and the heat generation amount GH and the heat dissipation amount EH may be determined by the heating coefficient Hcoef(n), the cooling coefficient Ccoef(n), the heating element HE, and the cooling element CE.

[0057] According to some example embodiments, when Figure 2 the example of the thermal model of is simplified to a dynamically controllable element or an accurately measurable element in the system, the thermal model may be the same as Figure 3 the thermal model of. Referring to Figure 3 , in some example embodiments, it may be assumed that the temperature TOS of the SoC 110 at the next time point (n + 1) is caused by the influence of the simplified heat generation amount and the simplified heat dissipation amount at the current time point (n). In some example embodiments, the heating element SHE of the simplified heat generation amount includes the operating frequency SHE1, the drive voltage SHE2, and the heating coefficient (Hcoef(n)) SHE3 of the SoC 110 at the current time (n), and the cooling element SCE of the simplified heat dissipation amount includes the temperature SCE1 of the SoC 110 at the current time point (n) and the cooling coefficient (Ccoef(n)) SCE2.

[0058] According to some example embodiments, the variables affecting the cooling and heating of the SoC 110 may be significantly greater than Figure 3 the variables affecting the cooling and heating of the SoC in the simplified thermal model of. However, according to some example embodiments, even when referring to Figure 3When the simplified heating element SHE and the simplified cooling element SCE described are applied to the SoC 110, it is experimentally confirmed that the error occurring in a very short unit time interval is negligible at the level of the SoC 110.

[0059] Figure 3 The thermal model of can be expressed as Equation 1 below.

[0060] <Equation 1>

[0061] In Equation 1, represents the temperature SCE1 of the SoC 110 at a specific time point (n), represents the cooling coefficient (Ccoef(n)) SCE2, represents the operating frequency SHE1 of the SoC 110, represents the drive voltage SHE2 of the SoC 110, and represents the heating coefficient (Hcoef(n)) SHE3. represents the temperature of the SoC 110 at the next time point (n+1).

[0062] According to some example embodiments, when Equation 1 is extended to multiple time points, Equation 1 can be expressed as a matrix operation of Equation 2.

[0063] <Equation 2>

[0064] In Equation 2, the subscripts n-2, n-1, and n represent time points respectively.

[0065] Therefore, in some example embodiments, when the temperatures ( , ), operating frequencies ( , ), and drive voltages ( , ) of the SoC 110 at two time points (n-1, n-2) before the current time point (n), the temperature ( ) at the previous time point (n-1), and the temperature ( ) at the current time point (n) are known, the cooling coefficient ( ) and the heating coefficient ( ) can be determined.

[0066] Based on reference Figure 2Example of the described thermal model, where the values of each of the heating element HE and the cooling element CE, the heating coefficient (Hcoef(n)), and the cooling coefficient (Ccoef(n)) are the same as those of the time parts adjacent to each other. Thus, in some example embodiments, the cooling coefficient ( ) and the heating coefficient ( ) of the SoC 110 determined at the current time point (n) can be estimated to be the same at the next time point (n + 1).

[0067] As a result, since the temperature ( ) at the current time point (n) can be measured, according to Equation 1, based on the cooling coefficient ( ) and the heating coefficient ( ), the target usage power ( ) of the SoC 110 for reaching the target temperature ( ) of the SoC 110 at the next time point (n + 1) can be determined.

[0068] Figure 4 is a diagram showing in detail a method for determining an operating frequency and a driving voltage for reaching a target temperature based on an SoC-based thermal model according to some example embodiments. Figure 4 The SoC of Figure 1 , Figure 2 and Figure 3 can correspond to the SoC 110 of Figure 1 , Figure 2 , Figure 3 and Figure 4 . Referring to

[0069] Referring to Figure 4 , the temperature (TOS(n - 1)) at the previous time point (n - 1) before the current time point (n) is determined by the cooling / heating element P1 at the previous time point (n - 2). In some example embodiments, the temperature (TOS(n)) at the current time point (n) is determined by the cooling / heating element P2 at the previous time point (n - 1). As a result, in some example embodiments, the temperature (TOS(n + 1)) at the next time point (n + 1) can be determined by the cooling / heating element P3 at the current time point (n). Thus, when the current temperature (TOS(n)), the cooling coefficient (Ccoef(n)), and the heating coefficient (Hcoef(n)) in the cooling / heating element P3 at the current time point (n) are known, the target temperature (TOS(n + 1)) at the future time point (n + 1) is applied to Equation 1 described above with reference to Figure 3 , and the target usage power ( ) of the SoC 110 for reaching the target temperature (TOS(n + 1)) can be determined. ) is feasible.

[0070] Referring to Figure 4 , SoC 110 can receive the operating frequencies (frequency(n - 2), frequency(n - 1)) and drive voltages (voltage(n - 2), voltage(n - 1)) of SoC 110 at two time points (n - 2, n - 1) before the current time point (n) from the memory device 130 of Figure 1 . SoC 110 can receive the temperature (TOS(n - 1)) of SoC 110 at the previous time point (n - 1) from the memory device 130 of Figure 1 , and receive the current temperature (TOS(n)) from the temperature collection (TC) module 112 of Figure 1 .

[0071] Based on the thermal model described with reference to Figure 2 and Figure 3 , it is assumed that the cooling coefficient (Ccoef(n)) and heating coefficient (Hcoef(n)) of SoC 110 at the current time point (n) and two time points (n - 2, n - 1) before the current time point are the same. Therefore, in some example embodiments, the cooling coefficient (Ccoef(n)) and heating coefficient (Hcoef(n)) can be determined based on the thermal model described with reference to Figure 3 .

[0072] As a result, SoC 110 can determine the target usage power ( ) by applying the current temperature (TOS(n)), cooling coefficient (Ccoef(n)), heating coefficient (Hcoef(n)), and target temperature (TOS(n + 1)) to Equation 1. SoC 110 can determine the target operating frequency ( ) based on the determined target usage power ( ) and the DVFS table.

[0073] Referring to Figure 4 , under the assumption that the cooling coefficient (Ccoef(n)) and heating coefficient (Hcoef(n)) at the current time point (n) and the previous two time points (n - 2, n - 1) are the same (PCOEF), SoC 110 can determine the target operating frequency ( ). Similarly, the SoC 110 can determine the target operating frequency to be used in the SoC 110 at the next time point (n+2) assuming that the cooling coefficient (Ccoef(n+1)) and the heating coefficient (Hcoef(n+1)) at the next time point (n+1) are the same as those at the previous two time points (n-1, n) (NCOEF). ) The SoC 110 can adjust the operating frequency provided to the SoC 110 by continuously repeating the same operation. Thus, in some exemplary embodiments, the operating frequency and the drive voltage can be dynamically determined to adapt to various situations of the SoC 110. According to some example embodiments, in some cases, the target temperature at each time point can be set to be the same or can be set differently.

[0074] Figure 5 FIG. is a block diagram showing in detail the configuration of the SoC 210 according to some example embodiments. Figure 5 The SoC 210 can correspond to the SoC 110 described with reference to Figure 1 . Figure 5 The SoC 210 can determine the operating frequency of the SoC 210 suitable for the target temperature based on the thermal model described with reference to Figures 2 to 4 . A detailed description of parts that are repetitive or similar to the parts described with reference to Figures 1 to 4 will be omitted.

[0075] Referring to Figure 5 , the computing system 200 can include the SoC 210, a power management device 220, a memory device 230, a display device 240, and a camera 250.

[0076] The SoC 210 can include at least one operation processing unit (OPU) 211, a temperature collection module (TCM) 212, a temperature management (DTM) module 213, a DVFS module 214, a controller 215, and a clock signal controller 216. The SoC 210 can communicate with the power management device 220, the memory device 230, the display device 240, and the camera 250.

[0077] The operation processing unit (OPU) 211 may include at least one operation processing unit (OPU_1 to OPU_n) 211_1 to 211_n, and the operation processing units (OPU_1 to OPU_n) 211_1 to 211_n may each include at least one temperature sensor (TS_1-1, TS_1-2, TS_1-3, …, TS_n-1, TS_n-2). Each of the temperature sensors (TS_1-1, TS_1-2, TS_1-3, ..., TS_n-1, TS_n-2) may measure the temperature and provide the measured temperature to the temperature collection module (TCM) 212. The temperature collection module (TCM) 212 may convert the temperature into a representative temperature of each of the operation processing units (OPU_1 to OPU_n) 211_1 to 211_n based on the measured temperature, and may provide the representative temperature to the thermal management (DTM) module 213. In some example embodiments, in addition to Figure 5 the temperature sensors (TS_1-1, TS_1-2, TS_1-3, …, TS_n-1, TS_n-2) shown in, the SoC 210 may further include temperature sensors arranged at various positions of the SoC 210. The temperature sensors may be arranged inside or outside the printed circuit board (PCB) of the SoC 210, and may be arranged on the controller 215 for controlling peripheral devices (such as the display device 240, the camera 250, etc.), but the example embodiments are not limited thereto. For example, there may be multiple controllers 215, and the temperature sensors may be separately arranged in each controller 215.

[0078] According to some example embodiments, the thermal management (DTM) module 213 may estimate the cooling coefficient and the heat generation coefficient of the SoC 210 based on the representative temperature of each of the operation processing units (OPU_1 to OPU_n) 211_1 to 211_n and the thermal model described with reference to Figures 2 to 4 The SoC 210 may estimate the cooling coefficient and the heat generation coefficient by using the representative temperature, the operating frequency, and the drive voltage data (TFV DATA) 233 stored in the memory device 230 at a previous time point.

[0079] The cooling coefficient and heating coefficient estimated at each of a plurality of time points may be stored as cooling coefficient and heating coefficient data (COEF DATA) 232 in a memory device 230. The memory device 230 may be a volatile memory device arranged outside the SoC 210. The memory device 230 may be implemented as a double data rate synchronous DRAM (DDR SDRAM), a high bandwidth memory (HBM), a hybrid memory cube (HMC), a dual in-line memory module (DIMM), an Optane DIMM, and / or a non-volatile DIMM (NVDIMM), a static RAM (SRAM), a cache, or a tightly coupled memory (TCM). Although the example embodiments shown are described assuming that the memory device 230 is placed outside the SoC 210, some data may be loaded into an internal memory device (not shown) inside the SoC 210. The internal memory device may be a cache, for example. Figure 5 In the example embodiments shown, some data may be loaded into an internal memory device (not shown) inside the SoC 210. The internal memory device may be a cache, for example.

[0080] The thermal management (DTM) module 213 may determine the operating frequency of the SoC 210 based on the estimated cooling coefficient and heating coefficient, the current temperature of the SoC 210, the DVFS table 231 stored in the memory device 230, and the target temperature.

[0081] The DVFS module 214 may determine the drive voltage and the frequency of the clock signal to be provided to the SoC 210 based on the DVFS table 231 and the operating frequency provided from the thermal management (DTM) module 213.

[0082] The DVFS module 214 may store, in the memory device 230, the frequency of the clock signal and the drive voltage provided to each of the arithmetic processing units (OPU_1 to OPU_n) 211_1 to 211_n at a plurality of time points, together with the representative temperature, as representative temperature, operating frequency, and drive voltage data (TFV DATA) 233.

[0083] In some example embodiments, the representative temperature, operating frequency, and drive voltage data (TFV DATA) 233 may be stored as many as the preset number of time points. Therefore, the representative temperature, operating frequency, and drive voltage data (TFV DATA) 233 may be updated over time.

[0084] The SoC 210 may operate using the drive voltage provided from the power management device 220 and the clock signal provided from the clock signal controller 216.

[0085] Figure 6 is a diagram showing a DVFS table 300 of an SoC according to some example embodiments. Figure 6 The DVFS table 300 of may be associated withFigure 5 corresponds to the DVFS table 231. Reference will be made to Figure 5 and Figure 6 to describe a method for determining the operating frequency of the SoC 210 by the temperature management (DTM) module 213 based on the DVFS table 300 according to some example embodiments. Figure 5 The temperature management (DTM) module 213 based on the DVFS table 300 will be described with reference to

[0086] Reference will be made to Figure 6 According to some example embodiments, the DVFS table 300 may include information about the operating frequency 320 and the drive voltage 330 corresponding to each of the multiple system - on - chip levels 310.

[0087] Figure 5 The temperature management (DTM) module 213 may determine the target usage power ( Figure 3 for the SoC 210 to reach the target temperature at the next time point based on the estimated cooling coefficient and heating coefficient and with reference to Equation 1 described in ). The temperature management (DTM) module 213 may determine the operating frequency 320 and the drive voltage 330 of the DVFS table 300 based on the system - on - chip level 310 corresponding to the target usage power ( ). For example, when the target usage power ( ) corresponds to the usage power of level 3 of the system - on - chip level 310 in the DVFS table 300, the temperature management (DTM) module 213 may determine the operating frequency of 1.1 GHz mapped to level 3 of the system - on - chip level 310 as the operating frequency of the SoC 210. The temperature management (DTM) module 213 may provide the information about the operating frequency of 1.1 GHz to Figure 5 the DVFS module 214.

[0088] In some example embodiments, when the system - on - chip levels 310 corresponding to the operating frequencies of 1.1 GHz or less provided from the DVFS table 300 are level 3, level 2, level 1, and level 0, Figure 5 the DVFS module 214 may select level 3 as the highest usage power. The DVFS module 214 may provide the information about the operating frequency of 1.1 GHz and the drive voltage of 600 mV mapped to the system - on - chip level 310 of level 3 to Figure 5 the clock signal controller 216 and the power management device 220 respectively.

[0089] Figure 7 is a flowchart showing a method for operating a system - on - chip according to some example embodiments. The SoC may correspond to Figure 1 the SoC 110 and Figure 5 the SoC 210. The detailed description of the repeated or similar parts will be omitted with reference to Figures 1 to 6 ​

[0090] In operation S110, Figure 1 the SoC 110 shown in Figure 5 or the SoC 210 shown in may check the temperature of each of a plurality of arithmetic processing units. The temperature of each of the plurality of arithmetic processing units may be a value obtained by converting the temperatures measured by a plurality of temperature sensors into a representative temperature of the same thermal region. In some example embodiments, the plurality of arithmetic processing units may be divided into different thermal regions. In some example embodiments, a plurality of cores arranged within the same processing unit may be divided into the same thermal region or may be divided into different thermal regions.

[0091] In operation S120, the SoC 110 or the SoC 210 may estimate a cooling coefficient and a heating coefficient of each of the plurality of arithmetic processing units based on the temperature of each of the plurality of arithmetic processing units. The cooling coefficient and the heating coefficient of one arithmetic processing unit may be different from the cooling coefficient and the heating coefficient of another arithmetic processing unit. The cooling coefficient and the heating coefficient of each of the plurality of arithmetic processing units may be based on the current temperature of each of the plurality of arithmetic processing units, the temperature at a previous time point, the operation frequency at the previous time point, and the driving voltage at the previous time point. There may be a plurality of previous time points. The cooling coefficient and the heating coefficient of each of the plurality of arithmetic processing units may be estimated based on Equation 1 and Equation 2 described with reference to Figure 3 The cooling coefficient and the heating coefficient of each of the plurality of arithmetic processing units may be estimated based on Equation 1 and Equation 2 described with reference to

[0092] In some example embodiments, when there is no inverse matrix of the leftmost matrix of Equation 2, the cooling coefficient and the heating coefficient estimated at the previous time point may be used as the cooling coefficient and the heating coefficient. For example, when the determinant of the leftmost matrix has a value of 0 (zero), the SoC 110 or 210 may use the cooling coefficient and the heating coefficient estimated at the previous time point.

[0093] In some example embodiments, the SoC 110 or the SoC 210 may selectively adjust the cooling coefficient and the heating coefficient estimated based on the cooling coefficient and the heating coefficient estimated at the previous time point. For example, the average value of the coefficient estimated at the previous time point and the coefficient estimated at the current time point may be determined as the final cooling coefficient and the final heating coefficient. The average value may be one of an arithmetic average value, a harmonic average value, and a weighted average value, or may be calculated by other methods. In the case of a weighted average, a weighted average value further reflecting one of the coefficient estimated at the current time point and the coefficient estimated at the previous time point according to an operation strategy may be determined as the final cooling coefficient and the final heating coefficient.

[0094] In operation S130, the SoC 110 or the SoC 210 may determine the operating frequency of each of the multiple arithmetic processing units based on the estimated cooling coefficient and heating coefficient. The SoC 110 or the SoC 210 may determine the operating frequency based on the target usage power used by each of the multiple arithmetic processing units to reach a preset target temperature. The target usage power may be estimated based on Equation 1 described with reference to Figure 3 described.

[0095] In operation S140, the SoC 110 or the SoC 210 may determine the operating frequency and drive voltage of the clock signal to be provided to each of the multiple arithmetic processing units based on the determined operating frequency and the DVFS table. The SoC 110 or the SoC 210 may output a control signal for adjusting the drive voltage and a control signal for adjusting the clock signal provided to each of the multiple arithmetic processing units based on the determined operating frequency and drive voltage of the clock signal.

[0096] In operation S150, the SoC 110 or the SoC 210 may operate and may process instructions based on the drive voltage provided by the power management device based on the control signal for adjusting the drive voltage and the clock signal provided by the clock signal controller based on the control signal for adjusting the clock signal.

[0097] Figure 8 is a flowchart showing a method for determining the operating frequency of a system-on-chip (SoC) according to some example embodiments. The operating frequency may be a frequency corresponding to the target usage power for each of the multiple arithmetic processing units to reach the target temperature. The SoC may be associated with Figure 1 the SoC 110 and Figure 5 the SoC 210 corresponding. The method for determining the operating frequency of the SoC described with reference to Figure 8 may correspond to operation S130 of Figure 7 . The detailed description of parts that are repetitive or similar to the parts described with reference to Figures 1 to 7 will be omitted.

[0098] In operation S210, the SoC 110 or the SoC 210 may verify the validity of the estimated cooling coefficient and heating coefficient for each of the multiple arithmetic processing units. For example, the SoC 110 or the SoC 210 may validate the estimated heating coefficient and cooling coefficient for each of the multiple arithmetic processing units. A method for verifying the validity of the cooling coefficient and heating coefficient according to some example embodiments will be described below with reference to Figure 9 described. Operation S210 may be selectively executed. For example, according to an example embodiment, operation S210 may or may not be executed.

[0099] In operation S220, a target usage power (e.g., a power budget) is calculated based on the cooling coefficient, heating coefficient, and target temperature that are determined to be valid. For example, SoC 110 or SoC 210 may calculate the target usage power / power budget based on the target temperature, heating coefficient, and cooling coefficient. The target usage power may be calculated for each of the multiple arithmetic processing units. SoC 110 or SoC 210 may calculate the target usage power / power budget based on the above <Equation 1>.

[0100] The target usage power may be the maximum power that can be used by each of the multiple arithmetic processing units of SoC 110 or SoC 210 to reach the target temperature. The target usage power may be referred to as the power budget for reaching the target temperature of SoC 110 or SoC 210.

[0101] In operation S230, SoC 110 or SoC 210 may adjust the power budget. For example, according to the operation strategy of SoC 110 or SoC 210, the calculated power budget may be adjusted actively or stably so that SoC 110 or SoC 210 reaches the set temperature. The method of adjusting the power budget according to some example embodiments will be described below with reference to Figures 11 to 1 3. Operation S230 may be selectively executed. For example, according to the example embodiments, operation S230 may or may not be executed.

[0102] According to some exemplary embodiments, SoC 110 or SoC 210 may determine the operating frequency based on the calculated power budget without adjusting the power budget.

[0103] In operation S240, SoC 110 or SoC 210 may determine the target operating frequency of SoC 110 or SoC 210 based on the calculated power budget (or the adjusted power budget) and the DVFS table. The DVFS table may correspond to Figure 6 the DVFS table 300.

[0104] SoC 110 or SoC 210 may determine the SoC level corresponding to the calculated power budget in the DVFS table 300, and determine the operating frequency mapped to the determined SoC level as the operating frequency of SoC 110 or SoC 210.

[0105] Figure 9 is a flowchart showing a method for verifying the cooling coefficient and heating coefficient of a system-on-chip (SoC) according to some example embodiments. The operating frequency may be the frequency corresponding to the target usage power for each of the multiple arithmetic processing units to reach the target temperature. The SoC may correspond to Figure 1 the SoC 110 and Figure 5 the SoC 210.

[0106] Refer to Figure 9 , in operation S310, SoC 110 or SoC 210 may check whether the heat generation coefficient and the cooling coefficient are normal. According to some example embodiments, when at least one of the heat generation coefficient and the cooling coefficient is abnormal, operation S320 may be executed. According to some example embodiments, when the heat generation coefficient and the cooling coefficient are normal, SoC 110 or SoC 210 may complete the verification operation and return to Figure 8 operation S220 of to calculate the power budget.

[0107] In some example embodiments, SoC 110 or SoC 210 may check whether the heat generation coefficient and the cooling coefficient are within a preset range, and check the sign of the heat generation coefficient and / or the sign of the cooling coefficient. For example, in the case where the heat generation coefficient is negative or the cooling coefficient is positive, SoC 110 or SoC 210 may determine that the heat generation coefficient and the cooling coefficient are abnormal. Optionally, in some example embodiments, SoC 110 or SoC 210 may determine whether the absolute values of the heat generation coefficient and the cooling coefficient are within a preset range, or whether the heat generation coefficient and the cooling coefficient are within a preset range from the values estimated at a previous time point.

[0108] In some example embodiments, SoC 110 or SoC 210 may map the verification results of the heat generation coefficient and the cooling coefficient to the estimated values of the heat generation coefficient and the cooling coefficient, and store them as cooling coefficient and heat generation coefficient data in the memory device. The cooling coefficient and heat generation coefficient data may correspond to the cooling coefficient and heat generation coefficient data (COEFDATA) 232 described with reference to Figure 5 .

[0109] In operation S320, SoC 110 or SoC 210 may check whether the heat generation coefficient and the cooling coefficient estimated at a previous time point are normal. To determine whether the heat generation coefficient and the cooling coefficient estimated at a previous time point are normal, the method described in operation S320 may be used, or the verification results included in the cooling coefficient and heat generation coefficient data stored in the memory device may be used.

[0110] When the heat generation coefficient and the cooling coefficient estimated at a previous time point are abnormal, SoC 110 or SoC 210 may execute operation S330.

[0111] In operation S330, SoC 110 or SoC 210 may calculate a power budget without based on a heat generation coefficient and a cooling coefficient. In some example embodiments, in operation S330, SoC 110 or SoC 210 may calculate the power budget for each of the multiple arithmetic processing units based on the ratio of the target temperature to the temperature of each of the multiple arithmetic processing units. For example, the power budget may be determined by multiplying the following power consumption by the ratio, where the power consumption is based on the operating frequency and drive voltage of each arithmetic processing unit at the current time point. After calculating the power budget in operation S330, SoC 110 or SoC 210 may return to Figure 8 operation S230 of adjusting the power budget or operation S240 of determining the operating frequency in

[0112] When the heat generation coefficient and the cooling coefficient estimated at a previous time point are normal, SoC 110 or SoC 210 may perform operation S340.

[0113] In operation S340, SoC 110 or SoC 210 may adjust the heat generation coefficient and the cooling coefficient estimated at the current time point based on the heat generation coefficient and the cooling coefficient estimated at the previous time point.

[0114] For example, the average value of the coefficient estimated at the previous time point and the coefficient estimated at the current time point may be determined as the final cooling and heat generation coefficients. The average value may be calculated by one of arithmetic mean, harmonic mean, and weighted mean or by other methods.

[0115] In some example embodiments, SoC 110 or SoC 210 may determine the weighted average value of the coefficient estimated at the previous time point and the coefficient estimated at the current time point as the final cooling and heat generation coefficients. For example, the weighted average value reflecting a preset weight for the coefficient estimated at the current time point and the coefficient estimated at the previous time point may be determined as the final cooling coefficient and heat generation coefficient. Refer to Figure 10 , in some example embodiments, SoC 110 or SoC 210 may determine the weighted average value interpolated by applying a higher weight according to the operation policy reflecting the coefficient estimated at the current time point as the final cooling coefficient and heat generation coefficient. The weight may change according to the operation policy of SoC 110 or SoC 210.

[0116] According to some example embodiments, operation S340 may be selectively performed. For example, operation S340 may be performed according to the example embodiments.

[0117] Figure 11is a flowchart showing a method of adjusting the power budget of a system-on-chip (SoC). The power budget may correspond to a target usage power for achieving a target temperature for each of a plurality of arithmetic processing units. The SoC may correspond to Figure 1 SoC 110 of Figure 5 and SoC 210 of Figure 11 The method of adjusting the power budget of the SoC described with reference to Figure 8 may correspond to operation S230 in Figures 1 to 10 A detailed description of parts that are repetitive or similar to the parts described with reference to

[0118] will be omitted. Figure 11 The method of adjusting the power budget according to some example embodiments described with reference to

[0119] is based on a change in the difference between the target temperature and the temperature of SoC110 or SoC 210. For example, the adjustment of the power budget in an example where the difference between the target temperature and the temperature of SoC 110 or SoC 210 increases over time may be different from an example where the difference between the target temperature and the temperature of SoC 110 or SoC 210 decreases over time.

[0120] In operation S231, SoC 110 or SoC 210 may compare the target temperature with the temperature of each of the plurality of arithmetic processing units.

[0121] In operation S232, SoC 110 or SoC 210 determines whether the difference between the target temperature and the temperature of SoC 110 or SoC 210 increases as it approaches the current time point. For example, the changes in a first temperature difference and a second temperature difference are determined, where the first temperature difference is the difference between the temperature of SoC 110 or SoC 210 at a first time point (e.g., a previous time point) and the target temperature, and the second temperature difference is the difference between the temperature of SoC 110 or SoC 210 at a second time point (e.g., the current time point) and the target temperature. In other words, in some example embodiments, the changes in the first temperature difference (e.g., the difference between the temperature of SoC 110 or SoC 210 at a first time point (e.g., a previous time point) and the target temperature) and the second temperature difference (e.g., the difference between the temperature of SoC 110 or SoC 210 at a second time point (e.g., the current time point) and the target temperature) are determined. In some example embodiments, when the second temperature difference is greater than the first temperature difference, operation S234 may be executed, and when the second temperature difference is less than the first temperature difference, operation S235 may be executed.

[0122] Referring Figure 12A , the temperature of SoC 110 or SoC 210 at the current time point (n) is higher than the target temperature. For example, Figure 12A shows a case where the second temperature difference DIFF_2 is greater than the first temperature difference DIFF_1. The second temperature difference DIFF_2 is the difference between the temperature of SoC 110 or SoC 210 at the current time point (n) and the target temperature, and the first temperature difference DIFF_1 is the difference between the temperature of SoC 110 or SoC 210 at the previous time point (n - 1) and the target temperature. For example, Figure 12A shows a situation where, after the previous time point (n - 1), as the time point approaches the current time point (n), the difference between the temperature of SoC 110 or SoC 210 and the target temperature increases, such that the temperature of SoC 110 or SoC 210 is further away from the target temperature.

[0123] Referring Figure 12B , the temperature of SoC 110 or SoC 210 at the current time point (n) is higher than the target temperature. For example, Figure 12B shows a case where the second temperature difference DIFF_2 is less than the first temperature difference DIFF_1. The second temperature difference DIFF_2 is the difference between the temperature of SoC 110 or SoC 210 at the current time point (n) and the target temperature, and the first temperature difference DIFF_1 is the difference between the temperature of SoC 110 or SoC 210 at the previous time point (n - 1) and the target temperature. For example, in Figure 12BIllustrates a situation where, after a previous time point (n - 1), as the time point approaches the current time point (n), the difference between the temperature of SoC 110 or SoC 210 and the target temperature decreases, such that the temperature of SoC 110 or SoC 210 gets closer to the target temperature.

[0124] In operation S234, considering the case where the temperature of SoC 110 or SoC 210 is further from the target temperature, SoC 110 or SoC 210 can actively adjust the calculated power budget to use the smallest possible power budget. Thus, in some example embodiments, SoC 110 or SoC 210 can compare the calculated power budget with a power budget reduced from the power budget at the previous time point (n - 1), and determine the smaller power budget as the final power budget.

[0125] In some example embodiments, a power budget that reduces a preset power amount from the power budget at the previous time point (n - 1), or a power budget that reduces a preset level difference at the system - on - chip level in the Figure 6 DVFS table can be used.

[0126] In operation S235, SoC 110 or SoC 210 can stably adjust the calculated power budget by considering the case where the temperature of SoC 110 or SoC 210 is close to the target temperature. Thus, in some example embodiments, SoC 110 or SoC 210 can compare the calculated power budget with the power budget at the previous time point (n - 1), and determine the smaller power budget as the final power budget.

[0127] In operations S234 and S235, SoC 110 or SoC 210 compares the calculated power budget with the power budget at the previous time point (n - 1) (or a power budget reduced from the power budget at the previous time point (n - 1)), and determines the smaller power budget as the final power budget. However, the example embodiments are not limited thereto, and in some example embodiments, other methods of adjusting the power budget can be used. For example, SoC 110 or SoC 210 can determine the average value of the calculated power budget and the power budget at the previous time point (n - 1) (or a power budget reduced from the power budget at the previous time point (n - 1)) as the final power budget. The average value can be calculated as one of an arithmetic mean, a harmonic mean, and a weighted mean, or can be calculated by other methods. In the case of a weighted average, a weighted average further reflecting one of the calculated power budget and the power budget at the previous time point (n - 1) (or a power budget reduced from the power budget at the previous time point (n - 1)) according to the operation strategy can be determined as the final power budget.

[0128] In operation S233, the SoC 110 or the SoC 210 determines whether the difference between the target temperature and the temperature of the SoC 110 or the SoC 210 increases as the current time point is approached. For example, the changes in a first temperature difference and a second temperature difference may be determined, the first temperature difference being the difference between the temperature of the SoC 110 or 210 at a first time point that is a previous time and the target temperature, and the second temperature difference being the difference between the temperature of the SoC 110 or 210 at a second time point that is the current time point and the target temperature. In some example embodiments, when the second temperature difference is greater than the first temperature difference, operation S236 may be performed, and when the second temperature difference is less than the first temperature difference, operation S237 may be performed.

[0129] Referring Figure 13A , the temperature of the SoC 110 or the SoC 210 at the current time point (n) is lower than the target temperature. For example, Figure 13A shows a case where the second temperature difference DIFF_2 is greater than the first temperature difference DIFF_1, the second temperature difference DIFF_2 being the difference between the temperature of the SoC 110 or the SoC 210 at the current time point (n) and the target temperature, and the first temperature difference DIFF_1 being the difference between the temperature of the SoC 110 or the SoC 210 at the previous time point (n - 1) and the target temperature. For example, Figure 13A shows a case where, after the previous time point (n - 1), as the time point approaches the current time point (n), the difference between the temperature of the SoC 110 or 210 and the target temperature increases, such that the temperature of the SoC 110 or the SoC 210 is further away from the target temperature.

[0130] Referring Figure 13B , the temperature of the SoC 110 or the SoC 210 at the current time point (n) is lower than the target temperature. For example, Figure 13B shows a case where the second temperature difference DIFF_2 is less than the first temperature difference DIFF_1, the second temperature difference DIFF_2 being the difference between the temperature of the SoC 110 or the SoC 210 at the current time point (n) and the target temperature, and the first temperature difference DIFF_1 being the difference between the temperature of the SoC 110 or the SoC 210 at the previous time point (n - 1) and the target temperature. For example, Figure 13B shows a case where, after the previous time point (n - 1), as the time point approaches the current time point (n), the difference between the temperature of the SoC 110 or the SoC 210 and the target temperature decreases, such that the temperature of the SoC 110 or the SoC 210 is closer to the target temperature.

[0131] In operation S236, SoC 110 or SoC 210 may consider the case where the temperature of SoC 110 or 210 is further away from the target temperature and actively adjust the calculated power budget to use the largest possible power budget. Thus, in some example embodiments, SoC 110 or 210 may compare the calculated power budget with a power budget increased from the power budget at the previous time point (n - 1) and determine the larger power budget as the final power budget.

[0132] In some example embodiments, a power budget that increases a preset power amount from the power budget at the previous time point (n - 1), or a power budget that increases a preset level difference at the SoC level in the Figure 6 DVFS table may be used.

[0133] In operation S237, SoC 110 or SoC 210 may stably adjust the calculated power budget by considering the case where the temperature of SoC 110 or 210 is close to the target temperature. Thus, in some example embodiments, SoC 110 or SoC 210 may compare the calculated power budget with the power budget at the previous time point (n - 1) and determine the larger power budget as the final power budget.

[0134] In operations S236 and S237, SoC 110 or SoC 210 does not exclude other methods of adjusting the power budget. Similar to those described in operations S234 and S235, in some example embodiments, SoC 110 or SoC 210 may determine the average value of the calculated power budget and the power budget at the previous time point (n - 1) (or a power budget increased from the power budget at the previous time point (n - 1)) as the final power budget.

[0135] Figure 14 is a block diagram showing an example electronic device 400 according to some example embodiments. The device according to some example embodiments may be an electronic device including an electronic circuit. A detailed description of parts that are repetitive or similar to the parts described with reference to Figures 1 to 1 3 will be omitted.

[0136] Referring to Figure 14 , the electronic device 400 may include a plurality of electronic circuits 410_1, 410_2,..., 410_n, a temperature collection module (TCM) 420, a temperature management (DTM) module 430, a circuit controller 440, a power supply controller 450, and a memory device 460.

[0137] The plurality of electronic circuits 410_1, 410_2,..., 410_n may be arithmetic processing units of the system - on - a - chip (SoC) described with reference to Figures 1 to 1 3 or other types of electronic circuits.

[0138] Multiple electronic circuits 410_1, 410_2, …, 410_n may respectively include temperature sensors S1, S2, …, Sn. Each of the temperature sensors S1, S2, …, Sn may be multiple. For example, in some example embodiments, each of the multiple electronic circuits 410_1, 410_2, …, 410_n may include multiple temperature sensors.

[0139] The temperature collection module (TCM) 420 may collect the temperatures measured by the temperature sensors S1, S2, …, Sn and convert them into representative temperatures for each of the multiple electronic circuits 410_1, 410_2, …, 410_n.

[0140] The circuit controller 440 may control variables that affect the performance, heat generation, and / or cooling of each of the multiple electronic circuits 410_1, 410_2, …, 410_n. For example, when each of the multiple electronic circuits 410_1, 410_2, …, 410_n is an arithmetic processing unit, the circuit controller 440 may change the frequency of the clock signal provided to each of the multiple electronic circuits 410_1, 410_2, …, 410_n. In some example embodiments, the circuit controller 440 may output signals that control various variables that affect the performance, heat generation, and / or cooling of each of the multiple electronic circuits 410_1, 410_2, …, 410_n.

[0141] The power supply controller 450 may provide a drive voltage to each of the multiple electronic circuits 410_1, 410_2, …, 410_n.

[0142] The temperature management (DTM) module 430 according to some example embodiments may estimate the cooling coefficient and heat generation coefficient for each of the multiple electronic circuits 410_1, 410_2, …, 410_n, and determine a value of one of the variables used to achieve a target temperature in each of the electronic circuits 410_1, 410_2, …, 410_n. The temperature management (DTM) module 430 may provide the determined value to the circuit controller 440.

[0143] The temperature management (DTM) module 430 may estimate the cooling coefficient and heat generation coefficient by replacing the operating frequency ( Figure 3 described in Equation 1 and Equation 2 ), and the drive voltage ( ) with one of the various variables that affect the performance, heat generation, and / or cooling of each of the multiple electronic circuits 410_1, 410_2, …, 410_n. In some example embodiments, based on the estimated cooling coefficient and heat generation coefficient, a value of one of the variables may be determined such that each of the multiple electronic circuits 410_1, 410_2, …, 410_n reaches the target temperature.

[0144] Therefore, with reference to Figure 14 the example embodiments described, dynamic thermal management can be performed even by circuitry other than the arithmetic processing units of the SoC.

[0145] Figure 15 FIG. [FIG. number] is a block diagram showing in detail the configuration of a system-on-chip (SoC) according to some example embodiments. Figure 15 The SoC 510 can determine the operating frequency of the SoC 510 suitable for the target temperature based on the thermal model described with reference to Figures 2 to 4 The detailed description of parts that are repetitive or similar to parts described with reference to Figures 1 to 14 will be omitted.

[0146] With reference to Figure 15 the example embodiments described, a closed-loop dynamic voltage and frequency adjustment operation can be performed on at least one arithmetic processing unit (OPU) 511 to change the frequency of the clock signal.

[0147] With reference to Figure 15 , the computing system 500 can include a system-on-chip (SoC) 510, a power management device 520, a memory device 530, and an accessory device 540.

[0148] The SoC 510 can include at least one arithmetic processing unit (OPU) 511, a temperature collection module (TCM) 512, a thermal management (DTM) module 513, a critical path monitor (CPM) 514, a clock signal generator 515, a power management unit (PMU) 516, a target frequency module 517, a frequency monitor 518, and a voltage determination module 519.

[0149] The SoC 510 can communicate with the power management device 520, the memory device 530, and the accessory device 540.

[0150] The arithmetic processing unit (OPU) 511 can include at least one arithmetic processing unit (OPU_1 to OPU_n) 511_1 to 511_n. The arithmetic processing units (OPU_1 to OPU_n) 511_1 to 511_n can each include at least one temperature sensor TS_1-1, TS_1-2, TS_1-3,..., TS_n-1, and TS_n-2. Each of the temperature sensors TS_1-1, TS_1-2, TS_1-3,..., TS_n-1, and TS_n-2 can measure the temperature and provide the measured temperature to the temperature collection module 512. The temperature collection module (TCM) 512 can convert the temperature into a representative temperature of each of the arithmetic processing units (OPU_1 to OPU_n) 511_1 to 511_n based on the measured temperature, and then can provide the representative temperature to the thermal management (DTM) module 513.

[0151] According to some example embodiments, a temperature management (DTM) module 513 may estimate a cooling coefficient and a heat generation coefficient of the SoC 510 based on a representative temperature of each of the operation processing units (OPU_1 to OPU_n) 511_1 to 511_n and the thermal model described hereinafter. The SoC 510 may estimate the cooling coefficient and the heat generation coefficient by using the representative temperature, operation frequency, and drive voltage data (TFV DATA) 533 stored in the memory device 530 at a previous time point. The cooling coefficient and the heat generation coefficient estimated at a plurality of time points may be stored in the memory device 530 as cooling coefficient and heat generation coefficient data (COEF DATA) 532. Figures 2 to 4

[0152] The temperature management (DTM) module 513 may determine an operation frequency of the SoC 510 based on the estimated cooling and heat generation coefficients, the current temperature of the SoC 510, the DVFS table 531 stored in the memory device 530, and a target temperature.

[0153] A target frequency module 517 may determine a target frequency based on the DVFS table 531 and the determined operation frequency.

[0154] The determined target frequency may be compared with the frequency of each of the operation processing units (OPU_1 to OPU_n) 511_1 to 511_n measured by the frequency monitor 518, and the difference may be provided to a voltage determination module 519.

[0155] The CPM 514, the clock signal generator 515, the target frequency module 517, the frequency monitor 518, the voltage determination module 519, and the voltage regulator 516_1 may constitute an outer loop.

[0156] The voltage determination module 519 may determine a power supply voltage during a next outer loop operation based on the frequency of each of the operation processing units (OPU_1 to OPU_n) measured by the frequency monitor 518 and the target frequency determined by the target frequency module 517. Alternatively, the voltage determination module 519 may determine a power supply voltage during a next outer loop operation based on the frequency of each of the operation processing units (OPU_1 to OPU_n) measured by the frequency monitor 518 and the operation frequency determined by the temperature management (DTM) module 513.

[0157] ​The power supply voltage determined by the voltage determination module 519 may be provided to the PMU 516. The voltage regulator 516_1 of the PMU 516 may generate a driving voltage by adjusting the voltage provided by the power management device 520 based on the determined power supply voltage, and may provide the generated driving voltage to each of the operation processing units (OPUs) (OPU_1 to OPU_n) 511_1 to 511_n.

[0158] The CPM 514 may monitor the clock signals provided to each of the operation processing units (OPU_1 to OPU_n) 511_1 to 511_n.

[0159] The CPM 514 and the clock signal generator 515 may form an inner loop. The inner loop may be repeatedly executed, and in each inner loop period, the CPM 514 may monitor the clock signals of each of the operation processing units (OPU_1 to OPU_n) 511_1 to 511_n. Each monitored clock signal may be fed back to the clock signal generator 515 in each inner loop period, such that the frequency of the clock signal may be changed. The outer loop operation may be executed at a period longer than the inner loop period. For example, multiple inner loop operations may be executed within one outer loop period.

[0160] Thus, in the example embodiment described with reference to Figure 15 the temperature management module 513 may determine the operating frequency of each of the operation processing units (OPU_1 to OPU_n) 511_1 to 511_n by using a thermal model based on a cooling coefficient and a heating coefficient. Based on the result of comparing the target frequency determined based on the operating frequency with the frequency of the monitored clock signal of each of the operation processing units (OPU_1 to OPU_n) 511_1 to 511_n, the frequency of the clock signal may be changed by being fed back to the clock signal generator 515 in each inner loop period. In some example embodiments, the power supply voltage during the next outer loop operation may be determined based on the comparison result.

[0161] Figure 16 is a block diagram showing in detail the configuration of a system on chip (SoC) according to some example embodiments. A detailed description of parts that are repetitive or similar to the parts described with reference to Figures 1 to 15 will be omitted, and the description will focus on the differences from the embodiments described with reference to Figure 15 The temperature management (DTM) module 613 of

[0162] Figure 16 may determine the operating frequency of the SoC 610 suitable for the temperature based on a thermal model that changes based on a part of the heating element HE and / or a part of the cooling element CE described with reference to Figures 2 to 4 description.

[0163] For example, the thermal model can be modified such that the elements controllable dynamically in the temperature management module 613 can be based only on the operating frequency HE3 of the SoC 610 among the heat generating elements HE in Equation 1 above.

[0164] <Equation 3>

[0165] Therefore, Equation 1 can be transformed into Equation 3. For example, different from the thermal model based on Equation 1, the thermal model based on Equation 3 can exclude the drive voltage HE4. For example, the heat generation coefficient of the thermal model based on Equation 3 is based only on the operating frequency . The function can be determined by monitoring the changes in the temperature and operating frequency of the SoC 610.

[0166] The temperature management module 613 can estimate the cooling coefficient and the heat generation coefficient by using the thermal model based on Equation 3.

[0167] The temperature management module 613 can determine the target frequency of the SoC 510 based on the estimated cooling coefficient and heat generation coefficient and the target temperature. For example, different from the example embodiments described previously, the temperature management module 613 can determine the target frequency based on Equation 3 instead of based on a preset DVFS table. The determined target frequency can be provided to the clock signal generator 615. Therefore, according to some example embodiments, the DVFS table may not be used separately.

[0168] The temperature management (DTM) module 613 can store the cooling coefficient and the heat generation coefficient estimated at each time point as the cooling coefficient and heat generation coefficient data (COEF DATA) 632 in the memory device 630.

[0169] The temperature management (DTM) module 613 can store the frequency of the clock signal provided to each of the multiple operation processing units (OPUs) 611 (OPU_1 to OPU_n) 611_1 to 611_n at multiple time points and the representative temperature in the memory device 230 as the representative temperature and operating frequency data (TF DATA) 633.

[0170] One or more of the elements disclosed above can include one or more processing circuits (such as, hardware including logic circuits; a hardware / software combination (such as, a processor executing software or a combination thereof)) or be implemented in the one or more processing circuits. For example, the processing circuit can more specifically include but is not limited to a central processing unit (CPU), an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a system on a chip (SoC), a programmable logic unit, a microprocessor, an application specific integrated circuit (ASIC), etc.

[0171] As described herein, any device, electronic device, module, unit, and / or portions thereof and / or any part of them according to any example embodiment may include one or more examples of a processing circuit (such as hardware including logic circuits; a hardware / software combination (such as a processor executing software); or a combination thereof), may be included in one or more examples of the processing circuit, and / or may be implemented by one or more examples of the processing circuit. For example, the processing circuit may more specifically include, but is not limited to, a central processing unit (CPU), an arithmetic logic unit (ALU), a graphics processing unit (GPU), an application processor (AP), a digital signal processor (DSP), a microcomputer, a field programmable gate array (FPGA) and programmable logic unit, a microprocessor, an application specific integrated circuit (ASIC), a neural network processor (NPU), an electronic control unit (ECU), an image signal processor (ISP), etc. In some example embodiments, the processing circuit may include a non-transitory computer-readable storage device (e.g., a memory) storing an instruction program, such as a solid state drive (SSD), and a processor (e.g., a CPU) configured to execute the instructions to implement the functions and / or methods performed by some or all of any device, electronic device, module, unit, and / or portions thereof according to any example embodiment.

[0172] Any memory described herein may be a non-transitory computer-readable medium and may store an instruction program. Any memory described herein may be a non-volatile memory (such as flash memory, phase change random access memory (PRAM), magnetoresistive RAM (MRAM), resistive RAM (ReRAM), or ferroelectric RAM (FRAM)), or a volatile memory (such as static RAM (SRAM), dynamic RAM (DRAM), or synchronous DRAM (SDRAM)).

[0173] Although some example embodiments have been described above with reference to the accompanying drawings, the example embodiments of the inventive concept are not limited to the above example embodiments and may be implemented in various different forms. In addition, the inventive concept may include technologies that can be easily modified and implemented in example embodiments. Therefore, the scope of the inventive concept should not be limited to the above example embodiments, but should be defined by the appended claims and the claims and any equivalents thereof.

Claims

1. A system on chip, comprising: At least one operation processing unit is configured to: process instructions based on the driving voltage and the clock signal; a temperature management module configured to estimate a cooling coefficient and a heating coefficient associated with the at least one operation processing unit based on a temperature measured at the at least one operation processing unit, and determine an operating frequency of a clock signal to be transmitted to the at least one operation processing unit based on the cooling coefficient and the heating coefficient; as well as The dynamic voltage-frequency adjustment module is configured to output a control signal for adjusting the driving voltage and the clock signal based on the operating frequency.

2. The system on chip according to claim 1, wherein: The temperature management module is configured to estimate a cooling coefficient and a heating coefficient based on past temperatures previously measured multiple times by the at least one operation processing unit, and past operating frequencies and past driving voltages associated with the past temperatures measured multiple times by the at least one operation processing unit.

3. The system on chip according to claim 1, wherein: The temperature management module is configured to estimate a cooling coefficient and a heating coefficient based on past temperatures previously measured multiple times by the at least one operation processing unit and past operation frequencies associated with the past temperatures measured multiple times by the at least one operation processing unit.

4. The system on chip according to claim 1, wherein: The temperature management module is configured to determine an operating frequency of a clock signal to be transmitted to the at least one operation processing unit based on a current temperature, a target temperature, a cooling coefficient, and a heating coefficient of the at least one operation processing unit.

5. The system on chip as claimed in claim 4, wherein: The temperature management module is configured to determine the operating frequency based on a lookup table in which the operating frequency of the clock signal and the driving voltage are mapped.

6. The system on chip according to claim 1, wherein: The temperature management module is configured to determine a target usage power associated with a target temperature based on a current temperature, a target temperature, a cooling coefficient, and a heating coefficient of the at least one operation processing unit, and determine an operating frequency of a clock signal to be transmitted to the at least one operation processing unit based on the target usage power.

7. The system on chip according to claim 6, wherein: The temperature management module is configured to: determine the difference between the target temperature and the current temperature at a first time point as a first temperature difference, determine the difference between the target temperature and the current temperature at a second time point after the first time point as a second temperature difference, and adjust the target usage power at the second time point based on the first temperature difference and the second temperature difference.

8. The system on chip according to any one of claims 1 to 7, wherein: The cooling coefficient is based on a temperature drop rate of the at least one operation processing unit due to a cooling factor affecting a temperature drop of the at least one operation processing unit, and the heating coefficient is based on a temperature rise rate of the at least one operation processing unit due to a heating factor affecting a temperature rise of the at least one operation processing unit.

9. The system on chip according to claim 6, wherein: The temperature management module is configured to verify a cooling coefficient and a heating coefficient.

10. The system on chip according to claim 1, wherein: The temperature management module is configured to adjust each of the cooling coefficient and the heating coefficient determined at a current control time point based on each of the cooling coefficient and the heating coefficient determined at a previous control time point, and determine an operating frequency of the clock signal based on the adjusted cooling coefficient and the adjusted heating coefficient.

11. The system on chip according to claim 10, wherein: The temperature management module is configured to: determine the adjusted cooling coefficient and the adjusted heating coefficient as interpolated values ​​obtained by assigning weights to each of the cooling coefficient and the heating coefficient determined at the previous control time point and each of the cooling coefficient and the heating coefficient determined at the current control time point, and determine the operating frequency of the clock signal based on the adjusted cooling coefficient and the adjusted heating coefficient.

12. The system on chip of claim 1, further comprising: A clock signal generator, configured to: transmit a clock signal to the at least one operation processing unit; A critical path monitor, configured to: monitor a clock signal; as well as The power management unit is configured to: generate a driving voltage, The power management unit is configured to determine the driving voltage based on a power supply voltage determined by comparing the operating frequency with the monitored frequency of the clock signal.

13. A method of operating a system on chip, the method comprising: Checking the temperature of the operation processing unit measured by the temperature sensor through the temperature management module; By means of a temperature management module, a cooling coefficient and a heating coefficient of the operation processing unit are estimated based on the temperature; determining, by the temperature management module, an operating frequency of a clock signal to be transmitted to the operation processing unit based on the cooling coefficient and the heating coefficient; outputting, by a dynamic voltage frequency adjustment control module, a control signal for adjusting each of a driving voltage and a clock signal to be transmitted to an operation processing unit based on an operating frequency; as well as The instruction is processed by the arithmetic processing unit based on the driving voltage and the clock signal.

14. The method of claim 13, wherein: The step of estimating the cooling coefficient and the heating coefficient includes estimating the cooling coefficient and the heating coefficient based on past temperatures previously measured multiple times by the operation processing unit and past operating frequencies and past driving voltages associated with the past temperatures measured multiple times by the operation processing unit.

15. The method of claim 13, wherein: The step of determining the operating frequency of the clock signal includes determining the operating frequency of the clock signal to be transmitted to the operation processing unit based on the current temperature of the operation processing unit, the target temperature, the cooling coefficient, and the heating coefficient.

16. The method of claim 13, wherein: The step of determining the operating frequency of the clock signal includes: determining a target usage power associated with the target temperature based on the current temperature of the operation processing unit, the target temperature, the cooling coefficient and the heating coefficient, and determining the operating frequency of the clock signal to be transmitted to the operation processing unit based on the target usage power.

17. The method of claim 16, further comprising: Through the temperature management module, the difference between the target temperature and the current temperature at the first time point is determined as the first temperature difference, the difference between the target temperature and the current temperature at the second time point after the first time point is determined as the second temperature difference, and the target usage power at the second time point is adjusted based on the comparison result between the first temperature difference and the second temperature difference.

18. The method of claim 13, further comprising: Through the temperature management module, each of the cooling coefficient and the heating coefficient determined at the current control time point is adjusted based on each of the cooling coefficient and the heating coefficient determined at the previous control time point, and the operating frequency of the clock signal is determined based on the adjusted cooling coefficient and the adjusted heating coefficient.

19. The method of claim 18, further comprising: The adjusted cooling coefficient and the adjusted heating coefficient are determined as interpolated values ​​by the temperature management module by assigning weights to each of the cooling coefficient and the heating coefficient determined at the previous control time point and each of the cooling coefficient and the heating coefficient determined at the current control time point.

20. An electronic device comprising: at least one electronic circuit configured to: be driven based on the received driving voltage and parameter; The thermal management module is configured as follows: estimating a cooling coefficient and a heating coefficient associated with the at least one electronic circuit based on a temperature measured at the at least one electronic circuit, and determining a value of the parameter to be transmitted to the at least one electronic circuit based on the cooling coefficient and the heating coefficient; as well as The circuit controller is configured to output a control signal for adjusting the parameter based on the value of the parameter.

Images