Power consumption optimization method and device for solid state disk controller, equipment and medium

Abstract

The invention discloses a power consumption optimization method and device of a solid state disk controller, equipment and a medium, and relates to the field of computers, and the method comprises the following steps: determining an uplink bandwidth demand and a downlink bandwidth demand of a nonvolatile memory fast solid state disk controller according to a response rate of a completion queue and a target attribute of each input / output request; determining a unidirectional maximum transmission bandwidth of the communication bus according to a link rate and a link width of the communication bus, and determining a current uplink bandwidth utilization rate and a current downlink bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, the uplink bandwidth demand and the downlink bandwidth demand; and adjusting the link rate of the communication bus according to the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate. According to the method and the device, the power consumption optimization of the nonvolatile memory fast solid state disk controller is realized.

Description

Technical Field

[0001] The present invention relates to the field of computer technologies, and particularly relates to a method, device, equipment and medium for optimizing the power consumption of a solid state drive controller. Background Art

[0002] An NVMe SSD (Non-Volatile Memory Express Solid State Drive) controller is a core component of a solid state drive, which is connected to a host through a PCIe (Peripheral Component Interconnect Express) channel, processes NVMe commands of the host, and is responsible for data storage, access, protection and internal operations.

[0003] The connection of a traditional NVMe SSD controller with a system host server and NAND Flash (Negative-AND Flash) is as Figure 1 shown. The controller is interconnected with the host through a PCIe high-speed bus and is interconnected with NAND Flash chips through an ONFI (Open NAND Flash Interface) standard interface. The I / O (Input / Output) requests and responses are completed by means of SQ (Submission Queue) and CQ (Completion Queue) of the NVMe protocol. The controller includes multiple components: a CPU (Central Processing Unit) processor runs software to implement protocols, etc.; an error correction engine detects and corrects data errors; a NAND Flash controller coordinates data transmission; a PCIe Endpoint (Endpoint) realizes two-way communication with the main control; an XOR (Exclusive OR) calculation engine accelerates RAID (Redundant Array of Independent Disks) parity check; a cache caches data to improve access speed.

[0004] The power consumption management of an NVMe SSD controller is of great significance, and reducing its operating power consumption has become a research focus. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a method, device, equipment and medium for optimizing the power consumption of a solid state drive controller, which can realize the power consumption optimization of a non-volatile memory express solid state drive controller, and the specific scheme is as follows:

[0006] In a first aspect, the present application discloses a method for optimizing the power consumption of a solid-state drive controller, including:

[0007] Determine the uplink bandwidth requirement and the downlink bandwidth requirement of the non-volatile memory express solid-state drive controller according to the response rate of the completion queue and the target attributes of each input / output request;

[0008] Determine the one-way maximum transmission bandwidth of the communication bus according to the link rate and link width of the communication bus, and determine the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate of the communication bus according to the one-way maximum transmission bandwidth, the uplink bandwidth requirement, and the downlink bandwidth requirement;

[0009] Adjust the link rate of the communication bus according to the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate to achieve power consumption optimization of the non-volatile memory express solid-state drive controller.

[0010] Optionally, determining the uplink bandwidth requirement and the downlink bandwidth requirement of the non-volatile memory express solid-state drive controller according to the response rate of the completion queue and the target attributes of each input / output request includes:

[0011] Determine the uplink bandwidth requirement and the downlink bandwidth requirement of the non-volatile memory express solid-state drive controller according to the response rate of the completion queue and the transmission direction and transmission length of each input / output request.

[0012] Optionally, determining the one-way maximum transmission bandwidth of the communication bus according to the link rate and link width of the communication bus, and determining the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate of the communication bus according to the one-way maximum transmission bandwidth, the uplink bandwidth requirement, and the downlink bandwidth requirement includes:

[0013] Obtain the link rate and link width of the communication bus by reading the configuration register defined based on the communication bus standard specification;

[0014] Determine the one-way maximum transmission bandwidth of the communication bus according to the link rate, link width, physical layer coding efficiency, and link transmission overhead of the communication bus;

[0015] Wherein, the physical layer coding efficiency is determined based on the coding method of the communication bus protocol, and the link transmission overhead includes the bandwidth occupation brought by the control information, data packet encapsulation, and link management operations specified based on the communication bus protocol;

[0016] Determine the ratio of the one-way maximum transmission bandwidth to the uplink bandwidth requirement, and determine the ratio of the one-way maximum transmission bandwidth to the uplink bandwidth requirement as the current uplink bandwidth utilization rate;

[0017] Determine the ratio of the unidirectional maximum transmission bandwidth to the downlink bandwidth requirement, and determine the ratio of the unidirectional maximum transmission bandwidth to the downlink bandwidth requirement as the current downlink bandwidth utilization rate.

[0018] Optionally, adjust the link rate of the communication bus according to the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate, including:

[0019] Determine whether the current uplink bandwidth utilization rate is greater than the first utilization threshold, or whether the current downlink bandwidth utilization rate is greater than the second utilization threshold;

[0020] If the current uplink bandwidth utilization rate is greater than the first utilization threshold, or the current downlink bandwidth utilization rate is greater than the second utilization threshold, increase the link rate of the communication bus to the maximum link rate supported by the current link.

[0021] Optionally, adjust the link rate of the communication bus according to the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate, including:

[0022] Determine whether the current uplink bandwidth utilization rate is less than the first utilization threshold and whether the current downlink bandwidth utilization rate is less than the second utilization threshold;

[0023] If the current uplink bandwidth utilization rate is less than the first utilization threshold and the current downlink bandwidth utilization rate is less than the second utilization threshold, record that there is a target situation in the current monitoring period, and monitor whether there is a target situation in the subsequent target number of periods, and adjust the link rate of the communication bus according to the corresponding monitoring results.

[0024] Optionally, adjust the link rate of the communication bus according to the corresponding monitoring results, including:

[0025] If the corresponding monitoring results indicate that there is a target situation in all subsequent target number of periods, perform a one-level reduction on the link rate of the communication bus; among them, the link rate of the communication bus has different rate levels.

[0026] Optionally, adjust the link rate of the communication bus according to the corresponding monitoring results, including:

[0027] If the corresponding monitoring results indicate that there is not a target situation in all subsequent target number of periods, keep the link rate of the communication bus unchanged.

[0028] In a second aspect, the present application discloses a power consumption optimization device for a solid-state drive controller, including:

[0029] A bandwidth requirement determination module, configured to determine the uplink bandwidth requirement and the downlink bandwidth requirement of the non-volatile memory express solid-state drive controller according to the response rate of the completion queue and the target attributes of each input / output request;

[0030] A bandwidth utilization rate determination module, configured to determine the unidirectional maximum transmission bandwidth of a communication bus according to the link rate and link width of the communication bus, and determine the current upstream bandwidth utilization rate and the current downstream bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, the upstream bandwidth requirement, and the downstream bandwidth requirement;

[0031] A power consumption optimization module, configured to adjust the link rate of the communication bus according to the current upstream bandwidth utilization rate and the current downstream bandwidth utilization rate, so as to implement power consumption optimization of the non-volatile memory solid state drive controller.

[0032] In a third aspect, the present application discloses an electronic device, including:

[0033] A memory, configured to store a computer program;

[0034] A processor, configured to execute the computer program to implement the power consumption optimization method of the solid state drive controller disclosed above.

[0035] In a fourth aspect, the present application discloses a computer-readable storage medium, configured to store a computer program; wherein, when the computer program is executed by a processor, the power consumption optimization method of the solid state drive controller disclosed above is implemented.

[0036] It can be seen that the present application proposes a power consumption optimization method for a solid state drive controller, including: determining the upstream bandwidth requirement and the downstream bandwidth requirement of the non-volatile memory solid state drive controller according to the response rate of the completion queue and the target attribute of each input / output request; determining the unidirectional maximum transmission bandwidth of the communication bus according to the link rate and link width of the communication bus, and determining the current upstream bandwidth utilization rate and the current downstream bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, the upstream bandwidth requirement, and the downstream bandwidth requirement; adjusting the link rate of the communication bus according to the current upstream bandwidth utilization rate and the current downstream bandwidth utilization rate, so as to implement power consumption optimization of the non-volatile memory solid state drive controller. In summary, the present application monitors the response rate of the completion queue and the target attribute of each input / output request to obtain the upstream and downstream bandwidth requirements of the non-volatile memory solid state drive controller. On this basis, combined with the link rate and link width of the communication bus, the unidirectional maximum transmission bandwidth of the communication bus is further determined, so as to obtain the current upstream and downstream bandwidth utilization rates. Since the link rate is positively correlated with the power consumption, when the data transmission demand change is judged according to the bandwidth utilization rate, the link rate of the communication bus can be dynamically adjusted. For example, when the data transmission demand increases and the bandwidth utilization rate is high, the link rate is increased to ensure the high efficiency of data transmission and meet the demand for high-performance storage in the data-intensive transmission scenario; while when the data transmission demand decreases and the bandwidth utilization rate is low, the link rate is decreased to reduce unnecessary power consumption. In this way, the power consumption optimization of the non-volatile memory solid state drive controller is realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained according to the provided drawings without creative efforts.

[0038] Figure 1 It is a schematic diagram of the connection structure of a traditional NVMe SSD controller system;

[0039] Figure 2 It is a flowchart of a power consumption optimization method for a solid-state drive controller disclosed in this application;

[0040] Figure 3 It is a flowchart of a specific power consumption optimization method for a solid-state drive controller disclosed in this application;

[0041] Figure 4 It is a schematic diagram of the structure of a power consumption optimization device for a solid-state drive controller disclosed in this application;

[0042] Figure 5 It is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0043] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0044] Power consumption management of the NVMe SSD controller is of great significance, and reducing its operating power consumption has become the research focus.

[0045] For this reason, the embodiments of this application propose a power consumption optimization scheme for a solid-state drive controller, which can achieve power consumption optimization for a non-volatile memory express solid-state drive controller.

[0046] The embodiments of this application disclose a power consumption optimization method for a solid-state drive controller. Refer to Figure 2 As shown, the method includes:

[0047] Step S11: Determine the uplink bandwidth requirement and the downlink bandwidth requirement of the non-volatile memory express solid-state drive controller according to the response rate of the completion queue and the target attributes of each input / output request.

[0048] It should be noted that the power consumption of the NVMe SSD controller directly affects the battery life of the device. In the data center scenario, the energy efficiency ratio is a more critical consideration factor. With the increasing emphasis on environmental protection and sustainable development concepts, the low-power consumption characteristics of the NVMe SSD controller have become increasingly prominent. It can not only reduce energy consumption and cooling requirements, help save costs, but also reduce the carbon footprint. In the PCIe system, the link rate is closely related to the power consumption and shows a positive proportional relationship. The higher the link rate, the greater the power consumption due to the need for stronger signal driving, better signal integrity, and higher serdes (Serializer-Deserializer) clock frequencies, etc. Based on this, this application proposes a transmission rate optimization technology for the NVMe SSD controller. This technology relies on real-time monitoring of the NVMe CQ queue response rate, calculates the transmission bandwidth of the NVMe protocol data on the PCIe link, and adopts the LDGA (Lazy Descending and Greedy Ascending mechanism) mechanism to achieve dynamic adaptive adjustment of the PCIe link transmission rate. In addition, this technology is implemented relying on the system software in the NVMe SSD controller, without additional hardware modification, making the maintenance and upgrade of the system more convenient and greatly reducing the deployment difficulty. Moreover, this technology is easy to integrate into existing NVMe SSD devices, providing an upgrade path for existing systems.

[0049] In this embodiment, according to the response rate of the completion queue and the transmission direction and transmission length of each input / output request, the uplink bandwidth requirement of the non-volatile memory express solid state drive controller is determined and the downlink bandwidth requirement 。The response rate of the completion queue is the number of I / O responses in the completion queue per unit time. Exemplarily, (1) within a set statistical time period (such as 1 second), record the number of I / O requests returned from the SSD controller to the host (such as 40 times) and the amount of data transferred (such as total upstream data = 40 × 4KB = 160KB), and record the number of I / O requests written from the host to the SSD controller (such as 60 times) and the amount of data transferred (such as total downstream data = 60 × 2KB = 120KB). (2) Calculate the average request size: average upstream request size = total upstream data volume / number of upstream requests = 160KB / 40 = 4KB / request, average downstream request size = total downstream data volume / number of downstream requests = 120KB / 60 = 2KB / request. (3) Obtain the I / O request rate: upstream request rate = number of upstream requests / statistical time = 40 times / 1s = 40 IOPS (Input / Output Operations Per Second), downstream request rate = number of downstream requests / statistical time = 60 times / 1s = 60 IOPS. (4) Calculate the upstream transmission bandwidth and the downstream transmission bandwidth, upstream transmission bandwidth = average upstream request size × upstream request rate = 4KB × 40 = 160KB / s, downstream transmission bandwidth = average downstream request size × downstream request rate = 2KB × 60 = 120KB / s. Among them, the I / O request rate represents the response rate, and the average upstream request size and the average downstream request size are the average values of the transmission lengths of each I / O request in the corresponding transmission direction within the statistical time period.

[0050] Step S12: Determine the unidirectional maximum transmission bandwidth of the communication bus according to the link rate and link width of the communication bus, and determine the current upstream bandwidth utilization rate and the current downstream bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, the upstream bandwidth requirement, and the downstream bandwidth requirement.

[0051] In this embodiment, by reading the configuration register defined based on the communication bus standard specification, the link rate and link width of the communication bus are obtained, and the unidirectional maximum transmission bandwidth of the communication bus is determined according to the link rate, link width, physical layer coding efficiency, and link transmission overhead of the communication bus. Among them, the physical layer coding efficiency is determined based on the coding method of the communication bus protocol, and the link transmission overhead includes the bandwidth occupation brought by the control information, data packet encapsulation, and link management operations specified by the communication bus protocol. Further, determine the ratio of the unidirectional maximum transmission bandwidth to the upstream bandwidth requirement, and determine the ratio of the unidirectional maximum transmission bandwidth to the upstream bandwidth requirement as the current upstream bandwidth utilization rate. Further, determine the ratio of the unidirectional maximum transmission bandwidth to the downstream bandwidth requirement, and determine the ratio of the unidirectional maximum transmission bandwidth to the downstream bandwidth requirement as the current downstream bandwidth utilization rate. The communication bus is a PCIe bus, specifically:

[0052] ;

[0053] ;

[0054] ;

[0055] represents the link rate; represents the link width; represents the physical layer coding efficiency. PCIe Gen1 and Gen2 use 8b / 10b coding with an efficiency of 0.8, and Gen3 and subsequent versions use 128b / 130b coding with an efficiency approximately equal to 1; represents the PCIe link transmission overhead; represents the unidirectional maximum transmission bandwidth; represents the current upstream bandwidth utilization rate. represents the current downstream bandwidth utilization rate.

[0056] For the PCIe bus, in this embodiment, the link rate and link width are first obtained by reading the configuration registers defined in its standard specification, and then the unidirectional maximum transmission bandwidth is calculated by combining the physical layer coding efficiency and the link transmission overhead. After that, the current upstream and downstream bandwidth utilization rates are obtained by dividing the unidirectional maximum transmission bandwidth by the upstream and downstream bandwidth requirements respectively. In this way, the actual utilization degrees of the bandwidth resources in the upstream and downstream directions of the PCIe bus during data transmission can be accurately measured, providing a data basis for subsequent optimization.

[0057] Step S13: Adjust the link rate of the communication bus according to the current upstream bandwidth utilization rate and the current downstream bandwidth utilization rate to achieve power consumption optimization of the non-volatile memory solid-state drive controller.

[0058] In one implementation, it is determined whether the current upstream bandwidth utilization rate is greater than the first utilization threshold, or whether the current downstream bandwidth utilization rate is greater than the second utilization threshold. If the current upstream bandwidth utilization rate is greater than the first utilization threshold, or the current downstream bandwidth utilization rate is greater than the second utilization threshold, the link rate of the communication bus is increased to the maximum link rate supported by the current link using the greedy ascent algorithm.

[0059] This effectively avoids data transmission delays caused by insufficient bandwidth. In scenarios with urgent data transmission needs, ensuring efficient data transmission is crucial. This adjustment ensures efficient business operations and avoids potential losses caused by transmission issues. From the perspective of overall system operation, rapidly increasing the link rate allows the system to maintain stability and efficiency under high load conditions, reducing additional resource consumption caused by problems such as data backlogs, achieving a balance between performance and power consumption, and indirectly optimizing the additional power consumption that may be caused by poor data transmission, achieving the goal of optimizing system performance and power consumption.

[0060] In another embodiment, it is determined whether the current uplink bandwidth utilization is less than a first utilization threshold, and whether the current downlink bandwidth utilization is less than a second utilization threshold. If the current uplink bandwidth utilization is less than the first utilization threshold, and the current downlink bandwidth utilization is less than the second utilization threshold, it is recorded that the target situation exists in the current monitoring period, and it is monitored whether the target situation exists in subsequent target periods, and then the link rate of the communication bus is adjusted according to the corresponding monitoring results.

[0061] On the one hand, if the corresponding monitoring results indicate that the target situation exists in the subsequent target number of cycles, the delay reduction algorithm is used to reduce the link rate of the communication bus by one level. The link rate of the communication bus has different rate levels. For example, if the current rate is Gen4 (PCIe Generation 4), the current rate is reduced by one level to Gen3. On the other hand, if the corresponding monitoring results indicate that the target situation does not exist in the subsequent target number of cycles, the link rate of the communication bus remains unchanged.

[0062] In this way, when bandwidth utilization remains low, the latency reduction algorithm reduces the link rate, directly reducing unnecessary power consumption. If low bandwidth utilization is not detected in all subsequent target cycles, the link rate remains unchanged, avoiding the additional power consumption and system instability caused by frequent link rate adjustments. This strategy of dynamically adjusting the link rate based on bandwidth utilization allows the system to find the optimal balance between performance and power consumption under different workloads.

[0063] See also Figure 3As shown in the figure, first, according to the response rate of the completion queue and the target attributes of each input / output request, the uplink bandwidth requirement and the downlink bandwidth requirement are measured. Then, the uplink bandwidth utilization rate and the downlink bandwidth utilization rate are calculated. Next, it is determined whether the uplink bandwidth utilization rate is greater than the first utilization threshold or the downlink bandwidth is greater than the second utilization threshold. If this condition is met, the greedy ascent algorithm is used to increase the PCIe link rate to the maximum rate supported by the device. If not, that is, the uplink bandwidth utilization rate is less than the first utilization threshold and the downlink bandwidth is less than the second utilization threshold, which is recorded as the target situation. Then, it continuously monitors the target number of cycles and determines whether the target situation still exists within the target number of cycles. If it exists, the latency reduction algorithm is used to lower the PCIe link rate by one level. If not, the PCIe link rate remains unchanged.

[0064] The specific operation process is as follows: The controller system software continuously monitors the data transmission requirements of the NVMe SSD controller and the current state of the PCIe link (including link rate and bandwidth utilization rate). When the data transmission requirements increase and the current link rate cannot meet them, the greedy ascent mechanism is started to quickly increase the PCIe link rate to the highest rate supported by the device, thereby reducing the transmission latency and increasing the throughput. After the rate is increased, if the data transmission requirements decrease, the system gradually reduces the rate according to the latency reduction mechanism to avoid unnecessary power consumption. By continuously weighing performance and power consumption in this way, while meeting the performance requirements, the power consumption can be minimized to the greatest extent, enabling the NVMe SSD controller to quickly respond and increase the rate during data transmission-intensive periods and reduce the rate to save energy when the requirements decrease, achieving a balance between high performance and low power consumption.

[0065] This technical solution has many beneficial effects: (1) Performance and power management: With the help of real-time monitoring and the LDGA mechanism, this technology achieves the best balance between data transmission performance and power consumption. When the data transmission task is heavy, it quickly increases the PCIe link rate to ensure low latency and high throughput of data transmission. When the data transmission requirements decrease, it timely reduces the link rate to avoid unnecessary energy consumption and minimize power consumption. (2) Reducing energy consumption: In the data center scenario, this technology effectively reduces the power consumption of the NVMe SSD controller. The reduction of the controller's power consumption reduces the overall energy consumption and thus reduces the power cost of the data center. (3) Contribution to green environmental protection: This technology conforms to the development trend of green energy conservation. By reducing the energy consumption during data transmission, it reduces carbon emissions. (4) System compatibility and maintainability: This technology is implemented through the firmware in the controller without modifying the hardware of the existing system, reducing the complexity and cost of upgrading. It not only makes the system easy to upgrade and deploy but also significantly improves the convenience of system maintenance and upgrade. Moreover, it can be integrated into the existing system to provide a convenient upgrade path for the existing system.

[0066] In addition, to further improve the system performance, the present application can also introduce environmental perception elements, such as parameters like the temperature and humidity of the environment where the device is located. Temperature has a significant impact on the operating state of the device. When the ambient temperature is high, a high link rate will cause the hardware to heat up more severely, and in severe cases, it may lead to a decline in device performance or even damage. In view of this, the system can embed a temperature sensing module. When the temperature reaches a pre-set threshold, even if the data transmission demand increases, the system will give priority to the heat dissipation needs of the device and actively reduce the link rate. At the same time, the performance loss caused by the speed reduction is compensated by optimizing the data processing algorithm. For example, data compression algorithms are used to reduce the amount of data transmitted and improve the data transmission efficiency. In addition, when the environmental humidity exceeds the normal range, the link rate can also be adjusted specifically to reduce the short-circuit risk caused by moisture and ensure the stable operation of the device, achieving multi-dimensional optimization of performance, power consumption, and device stability.

[0067] It can be seen that the present application proposes a method for optimizing the power consumption of a solid-state drive controller, including: determining the upstream bandwidth demand and downstream bandwidth demand of the non-volatile memory express solid-state drive controller according to the response rate of the completion queue and the target attributes of each input / output request; determining the unidirectional maximum transmission bandwidth of the communication bus according to the link rate and link width of the communication bus, and determining the current upstream bandwidth utilization rate and current downstream bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, upstream bandwidth demand, and downstream bandwidth demand; adjusting the link rate of the communication bus according to the current upstream bandwidth utilization rate and current downstream bandwidth utilization rate to achieve power consumption optimization of the non-volatile memory express solid-state drive controller. In summary, the present application monitors the response rate of the completion queue and the target attributes of each input / output request to obtain the upstream and downstream bandwidth demands of the non-volatile memory express solid-state drive controller. On this basis, combined with the link rate and link width of the communication bus, the unidirectional maximum transmission bandwidth of the communication bus is further determined, thereby obtaining the current upstream and downstream bandwidth utilization rates. Since the link rate is positively correlated with power consumption, when judging the change in data transmission demand according to the bandwidth utilization rate, the link rate of the communication bus can be dynamically adjusted. For example, when the data transmission demand increases and the bandwidth utilization rate is high, the link rate is increased to ensure the high efficiency of data transmission and meet the demand for high-performance storage in data-intensive transmission scenarios; while when the data transmission demand decreases and the bandwidth utilization rate is low, the link rate is reduced to reduce unnecessary power consumption. In this way, power consumption optimization of the non-volatile memory express solid-state drive controller is achieved.

[0068] Correspondingly, the embodiment of the present application also discloses a device for optimizing the power consumption of a solid-state drive controller. Refer to Figure 4 As shown, the device includes:

[0069] A bandwidth requirement determination module 11 is configured to determine the uplink bandwidth requirement and the downlink bandwidth requirement of the non-volatile memory express solid state drive controller according to the response rate of the completion queue and the target attributes of each input / output request;

[0070] The bandwidth requirement determination module 11 is configured to determine the unidirectional maximum transmission bandwidth of the communication bus according to the link rate and link width of the communication bus, and determine the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, the uplink bandwidth requirement, and the downlink bandwidth requirement;

[0071] A power consumption optimization module 13 is configured to adjust the link rate of the communication bus according to the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate, so as to optimize the power consumption of the non-volatile memory express solid state drive controller.

[0072] Among them, for the more specific working processes of the above-mentioned various modules, reference can be made to the corresponding content disclosed in the foregoing embodiments, and details are not described herein again.

[0073] It can be seen that the present application provides a power consumption optimization device for a solid state drive controller, including: a bandwidth requirement determination module 11 configured to determine the uplink bandwidth requirement and the downlink bandwidth requirement of the non-volatile memory express solid state drive controller according to the response rate of the completion queue and the target attributes of each input / output request; a bandwidth requirement determination module 11 configured to determine the unidirectional maximum transmission bandwidth of the communication bus according to the link rate and link width of the communication bus, and determine the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, the uplink bandwidth requirement, and the downlink bandwidth requirement; a power consumption optimization module 13 configured to adjust the link rate of the communication bus according to the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate, so as to optimize the power consumption of the non-volatile memory express solid state drive controller. It can be seen that the present application monitors the response rate of the completion queue and the target attributes of each input / output request to obtain the uplink and downlink bandwidth requirements of the non-volatile memory express solid state drive controller. On this basis, combined with the link rate and link width of the communication bus, the unidirectional maximum transmission bandwidth of the communication bus is further determined, so as to obtain the current uplink and downlink bandwidth utilization rates. Since the link rate is positively correlated with the power consumption, when judging the change of data transmission requirements according to the bandwidth utilization rate, the link rate of the communication bus can be dynamically adjusted. For example, when the data transmission requirements increase and the bandwidth utilization rate is high, the link rate is increased to ensure the high efficiency of data transmission and meet the requirements for high-performance storage in data-intensive transmission scenarios; while when the data transmission requirements decrease and the bandwidth utilization rate is low, the link rate is decreased to reduce unnecessary power consumption. In this way, the power consumption of the non-volatile memory express solid state drive controller is optimized.

[0074] Furthermore, an embodiment of the present application also provides a computer program product, including computer programs / instructions, which, when executed by a processor, implement the steps of the power consumption optimization method for the solid-state drive controller described above.

[0075] Furthermore, an embodiment of the present application also provides an electronic device. Figure 5 It is a structural diagram of an electronic device 20 shown according to an exemplary embodiment. The content in the figure should not be regarded as any limitation on the scope of use of the present application.

[0076] Figure 5 It is a schematic structural diagram of an electronic device 20 provided by an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a display screen 23, an input / output interface 24, a communication interface 25, a power supply 26, and a communication bus 27. Among them, the memory 22 is used to store computer programs, and the computer programs are loaded and executed by the processor 21 to implement the relevant steps in the power consumption optimization method for the solid-state drive controller disclosed in any of the foregoing embodiments. In addition, the electronic device 20 in this embodiment may specifically be an electronic computer.

[0077] In this embodiment, the power supply 26 is used to provide operating voltages for the various hardware devices on the electronic device 20; the communication interface 25 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows is any communication protocol applicable to the technical solution of the present application, and no specific limitation is imposed on it here; the input / output interface 24 is used to obtain external input data or output data to the outside, and its specific interface type can be selected according to specific application requirements, and no specific limitation is made here.

[0078] In addition, as a carrier for resource storage, the memory 22 may be a read-only memory, a random access memory, a magnetic disk, or an optical disc, etc., and the resources stored thereon may include a computer program 221, and the storage method may be short-term storage or permanent storage. Among them, in addition to the computer program that can be used to complete the power consumption optimization method for the solid-state drive controller executed by the electronic device 20 disclosed in any of the foregoing embodiments, the computer program 221 may further include computer programs that can be used to complete other specific tasks.

[0079] Furthermore, an embodiment of the present application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the power consumption optimization method for the solid-state drive controller disclosed above.

[0080] For the specific steps of this method, reference may be made to the corresponding content disclosed in the foregoing embodiments, and no further elaboration will be made here.

[0081] In the present application, the various embodiments are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the various embodiments, reference can be made to each other. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple. For the relevant parts, reference can be made to the description in the method section.

[0082] Those skilled in the art can further realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of the examples have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Skilled professionals can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.

[0083] The steps of the methods or algorithms described in combination with the embodiments disclosed herein can be directly implemented by hardware, software modules executed by a processor, or a combination of the two. The software modules can be placed in a random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, or any other form of storage medium known in the technical field.

[0084] Finally, it should also be noted that in this document, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including", or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article, or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article, or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of another identical element in the process, method, article, or device including the element.

[0085] The above has introduced in detail a power consumption optimization method, device, equipment, and storage medium of a solid-state drive controller. Specific examples are used in this article to elaborate on the principle and implementation manner of this application. The description of the above embodiments is only used to help understand the method and its core idea of this application; at the same time, for those of ordinary skill in the art, according to the idea of this application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation on this application.

Claims

1. A power consumption optimization method for a solid-state drive controller, characterized in that, Including: Determine the upstream bandwidth requirement and downstream bandwidth requirement of the non-volatile memory express solid state drive controller according to the response rate of the completion queue and the target attributes of each input / output request; Determine the unidirectional maximum transmission bandwidth of the communication bus according to the link rate and link width of the communication bus, and determine the current upstream bandwidth utilization rate and current downstream bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, the upstream bandwidth requirement and the downstream bandwidth requirement; Adjust the link rate of the communication bus according to the current upstream bandwidth utilization rate and the current downstream bandwidth utilization rate to achieve power consumption optimization of the non-volatile memory express solid state drive controller.

2. The power consumption optimization method of the solid state drive controller according to claim 1, characterized in that, The determining the upstream bandwidth requirement and downstream bandwidth requirement of the non-volatile memory express solid state drive controller according to the response rate of the completion queue and the target attributes of each input / output request includes: Determine the upstream bandwidth requirement and downstream bandwidth requirement of the non-volatile memory express solid state drive controller according to the response rate of the completion queue and the transmission direction and transmission length of each input / output request.

3. The power consumption optimization method of the solid-state drive controller according to claim 1, wherein The determining the unidirectional maximum transmission bandwidth of the communication bus according to the link rate and link width of the communication bus, and determining the current upstream bandwidth utilization rate and current downstream bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, the upstream bandwidth requirement and the downstream bandwidth requirement includes: Obtain the link rate and the link width of the communication bus by reading a configuration register defined based on the communication bus standard specification; Determine the unidirectional maximum transmission bandwidth of the communication bus according to the link rate, the link width, the physical layer coding efficiency and the link transmission overhead of the communication bus; Wherein, the physical layer coding efficiency is determined based on the coding method of the communication bus protocol, and the link transmission overhead includes the bandwidth occupation brought by control information, data packet encapsulation and link management operations specified based on the communication bus protocol; Determine the ratio of the unidirectional maximum transmission bandwidth to the upstream bandwidth requirement, and determine the ratio of the unidirectional maximum transmission bandwidth to the upstream bandwidth requirement as the current upstream bandwidth utilization rate; Determine the ratio of the unidirectional maximum transmission bandwidth to the downstream bandwidth requirement, and determine the ratio of the unidirectional maximum transmission bandwidth to the downstream bandwidth requirement as the current downstream bandwidth utilization rate.

4. The power consumption optimization method of the solid-state drive controller according to any one of claims 1 to 3, characterized in that, The adjusting the link rate of the communication bus according to the current upstream bandwidth utilization rate and the current downstream bandwidth utilization rate includes: Judge whether the current upstream bandwidth utilization rate is greater than a first utilization rate threshold, or whether the current downstream bandwidth utilization rate is greater than a second utilization rate threshold; If the current upstream bandwidth utilization rate is greater than the first utilization rate threshold, or the current downstream bandwidth utilization rate is greater than the second utilization rate threshold, increase the link rate of the communication bus to the maximum link rate supported by the current link.

5. The power consumption optimization method of the solid state drive controller according to any one of claims 1 to 3, characterized in that, The adjusting the link rate of the communication bus according to the current upstream bandwidth utilization rate and the current downstream bandwidth utilization rate includes: Determine whether the current uplink bandwidth utilization rate is less than the first utilization rate threshold and whether the current downlink bandwidth utilization rate is less than the second utilization rate threshold; If the current uplink bandwidth utilization rate is less than the first utilization rate threshold and the current downlink bandwidth utilization rate is less than the second utilization rate threshold, record that there is a target situation in the current monitoring period, and monitor whether the target situation exists in the subsequent target number of periods, and adjust the link rate of the communication bus according to the corresponding monitoring results.

6. The power consumption optimization method of the solid-state drive controller according to claim 5, characterized in that The adjusting the link rate of the communication bus according to the corresponding monitoring results includes: If the corresponding monitoring results indicate that the target situation exists in all of the subsequent target number of periods, perform a one-level reduction processing on the link rate of the communication bus; wherein, the link rate of the communication bus has different rate levels.

7. The power consumption optimization method of the solid-state drive controller according to claim 5, characterized in that The adjusting the link rate of the communication bus according to the corresponding monitoring results includes: If the corresponding monitoring results indicate that the target situation does not exist in all of the subsequent target number of periods, keep the link rate of the communication bus unchanged.

8. A power consumption optimization device for a solid state drive controller, characterized in that, Includes: A bandwidth requirement determination module, configured to determine the uplink bandwidth requirement and the downlink bandwidth requirement of the non-volatile memory express solid state drive controller according to the response rate of the completion queue and the target attributes of each input / output request; A bandwidth utilization rate determination module, configured to determine the unidirectional maximum transmission bandwidth of the communication bus according to the link rate and the link width of the communication bus, and determine the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate of the communication bus according to the unidirectional maximum transmission bandwidth, the uplink bandwidth requirement, and the downlink bandwidth requirement; A power consumption optimization module, configured to adjust the link rate of the communication bus according to the current uplink bandwidth utilization rate and the current downlink bandwidth utilization rate, so as to realize the power consumption optimization of the non-volatile memory express solid state drive controller.

9. An electronic device, characterized in that, Includes: A memory, configured to store a computer program; A processor, configured to execute the computer program to implement the power consumption optimization method of the solid state drive controller according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, For storing a computer program; wherein, when the computer program is executed by a processor, the power consumption optimization method of the solid state drive controller according to any one of claims 1 to 7 is implemented.

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