Heterojunction diode based on P-type diamond-n-type gallium oxide nanorod and preparation method thereof

Abstract

The invention discloses a heterojunction diode based on a P-type diamond-n-type gallium oxide nanorod. The heterojunction diode comprises a diamond ohmic contact metal layer, a p-type diamond substrate layer, a p-type diamond nanorod, an n-type gallium oxide buffer layer, a first n-type gallium oxide nanorod, a second n-type gallium oxide nanorod and a gallium oxide ohmic contact metal layer which are sequentially laminated. The diamond and the gallium oxide of the heterojunction diode are arranged in a nano column shape, so that the heterojunction diode has excellent carrier transmission and separation efficiency and excellent heat conduction performance.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and particularly relates to a heterojunction diode based on p-type diamond - n-type gallium oxide nanorods and a preparation method thereof. Background Art

[0002] With the rapid technological innovation in electronic fields such as new energy vehicles, 5G communication, and smart grids, new requirements are put forward for power electronic devices and semiconductor technology. The application of semiconductor materials has gradually shifted from the first-generation semiconductors represented by silicon and germanium to the latest-generation semiconductors represented by gallium oxide, diamond, gallium nitride, and silicon carbide.

[0003] Gallium oxide (Ga2O3) and diamond, as emerging wide-bandgap semiconductor materials, each have unique advantages. Gallium oxide (especially β-Ga2O3) has an ultra-wide bandgap width, a high breakdown field strength, and good electrical conductivity, and is suitable for high-power, high-voltage devices and ultraviolet optoelectronic devices. However, its p-type doping is difficult, and its thermal conductivity is relatively low, which limits its heat dissipation performance in high-power applications. Diamond is famous for its extremely wide bandgap width, ultra-high thermal conductivity, and high breakdown field strength, and is suitable for high-power and high-frequency applications under extreme conditions. The diamond and gallium oxide heterojunction pn junction combines the high thermal conductivity and high breakdown field strength of diamond with the ultra-wide bandgap and high-frequency characteristics of gallium oxide, showing great potential in high-power, high-frequency, and high-temperature devices, and having broad application prospects especially in fields such as solar-blind ultraviolet detection, power electronics, and high-frequency devices.

[0004] However, in practical applications, although the diamond and gallium oxide heterojunction pn junction has excellent material properties, there are still many challenges in aspects such as carrier transport and heat conduction performance. Therefore, it is necessary to further study the structural morphology and processing technology of the material to promote its practical application in high-performance devices. Summary of the Invention

[0005] The present invention aims to solve at least one of the technical problems existing in the prior art to a certain extent. For this reason, the present invention provides a heterojunction diode and a preparation method thereof. The heterojunction diode of the present invention has excellent carrier transport and separation efficiency and heat conduction performance.

[0006] Therefore, in the first aspect of the present invention, the present invention proposes a heterojunction diode, comprising: p-type diamond nanorods, an n-type gallium oxide buffer layer, a first n-type gallium oxide nanorod, and a second n-type gallium oxide nanorod.

[0007] Thus, the heterojunction diode with a nanorod structure of the present invention has excellent carrier transport and separation efficiency and heat conduction performance.

[0008] In some embodiments, the heterojunction diode satisfies at least one of the following: (1) the doping concentration of the p-type diamond nanorods is 10 14 ~10 17 cm -3 , and the doping element includes boron; (2) the doping concentration of the n-type gallium oxide buffer layer is 10 14 ~10 17 cm -3 , and the doping element includes silicon; (3) the doping concentration of the first n-type gallium oxide nanorod is 10 14 ~10 17 cm -3 , and the doping element includes silicon; (4) the doping concentration of the second n-type gallium oxide nanorod is 10 19 ~10 21 cm -3 , and the doping element includes silicon.

[0009] In some embodiments, the heterojunction diode includes a diamond ohmic contact metal layer, a p-type diamond substrate layer, p-type diamond nanorods, an n-type gallium oxide buffer layer, a first n-type gallium oxide nanorod, a second n-type gallium oxide nanorod, and a gallium oxide ohmic contact metal layer stacked in sequence.

[0010] In some embodiments, the heterojunction diode satisfies at least one of the following: (1) the doping concentration of the p-type diamond substrate layer is 10 19 ~10 21 cm -3 , and the doping element includes boron; (2) the diamond ohmic contact metal layer includes at least one of Au, Al, Cu, N, and Ag; (3) the gallium oxide ohmic contact metal layer includes at least one of Au, Al, Cu, N, and Ag.

[0011] In a second aspect of the present invention, a method for preparing the heterojunction diode of the first aspect is provided, including the following steps: growing a p-type diamond epitaxial layer on a p-type diamond substrate layer; covering the p-type diamond epitaxial layer with a patterned metal mask, etching the exposed area of the metal mask to form p-type diamond nanorods; growing an n-type gallium oxide buffer layer on the p-type diamond nanorods; sequentially growing a first n-type gallium oxide nanorod and a second n-type gallium oxide nanorod on the n-type gallium oxide buffer layer; forming a gallium oxide ohmic contact metal layer on one side of the sample, forming a diamond ohmic contact metal layer on the other side of the sample, and annealing to form an ohmic contact to obtain the heterojunction diode.

[0012] The preparation method proposed by the present invention realizes the efficient integration of p-type diamond and n-type gallium oxide heterojunction diodes through a step-by-step epitaxial growth and nanocolumn patterning process. The preparation method of the present invention realizes the high-performance and high-reliability manufacturing of diamond / gallium oxide heterojunction diodes through a three-step strategy of nanocolumn patterning etching-buffer layer stress regulation-gradient doping epitaxy. Therefore, the heterojunction diode of the present invention has excellent carrier transport and separation efficiency and thermal conduction performance.

[0013] In some embodiments, the method for growing a p-type diamond epitaxial layer on a p-type diamond substrate layer includes using MPCVD to grow a layer with a thickness of 5-10 μm.

[0014] In some embodiments, in the step of covering the p-type diamond epitaxial layer with a patterned metal mask, the metal mask includes one of Al, Au, Cr, and Ni.

[0015] In some embodiments, in the step of etching the exposed area of the metal mask, it includes: performing RIE etching on the exposed area of the metal mask; removing the remaining metal mask after RIE etching with an acidic solution.

[0016] In some embodiments, the method for growing an n-type gallium oxide buffer layer on a p-type diamond nanocolumn includes using magnetron sputtering; and / or, the method for sequentially growing a first n-type gallium oxide nanocolumn and a second n-type gallium oxide nanocolumn on the n-type gallium oxide buffer layer includes using MOCVD.

[0017] In some embodiments, the method for forming a gallium oxide ohmic contact metal layer on one side of the sample includes using magnetron sputtering, and the thickness of the gallium oxide ohmic contact metal layer is 1-5 μm; and / or, the method for forming a diamond ohmic contact metal layer on the other side of the sample includes using magnetron sputtering, and the thickness of the diamond ohmic contact metal layer is 1-5 μm.

[0018] Compared with the prior art, the beneficial technical effects achieved by the present invention are:

[0019] (1) The diamond and gallium oxide with nanocolumn structures provide a directional transmission path and a clear interface, which is beneficial to the transport and separation of carriers. At the same time, it also has higher thermal conduction performance and improves the interface cracking problem caused by the difference in thermal expansion coefficients.

[0020] (2) Depositing a layer of n-type gallium oxide buffer layer on the diamond substrate and annealing the gallium oxide buffer layer improve the quality of the buffer layer, thereby reducing stress and providing nucleation points for MOCVD epitaxial growth.

[0021] (3) The design of the nanocolumn structure increases the surface area of the material and provides more active sites. When applied to sensors, it can improve the sensitivity and response speed.

[0022] Additional aspects and advantages of the present invention will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above and / or additional aspects and advantages of the present invention will become apparent and be readily understood from the description of the embodiments in conjunction with the following drawings, wherein:

[0024] Figure 1 is a schematic diagram of the morphological structure of the heterojunction diode of the present invention;

[0025] Figure 2 is a flowchart for the preparation of the heterojunction diode of the present invention;

[0026] FIG. 3 is a diagram showing the preparation process of the heterojunction diode according to Embodiment 1 of the present invention;

[0027] wherein, 1 - p-type diamond substrate layer; 2 - p-type diamond nanorods; 3 - n-type gallium oxide buffer layer; 4 - first n-type gallium oxide nanorods; 5 - second n-type gallium oxide nanorods; 6 - gallium oxide ohmic contact metal layer; 7 - diamond ohmic contact metal layer. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0028] Embodiments of the present invention will be described in detail below. The embodiments described below are exemplary and are only used to explain the present invention and should not be construed as limiting the present invention.

[0029] It should be noted that the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. Further, in the description of the present invention, unless otherwise specified, "a plurality" means two or more.

[0030] In the ranges disclosed herein, the endpoints and any value are not limited to the exact range or value, and these ranges or values should be understood to include values close to these ranges or values. For numerical ranges, between the endpoint values of each range, between the endpoint values of each range and individual point values, and between individual point values, they can be combined with each other to obtain one or more new numerical ranges, and these numerical ranges should be regarded as specifically disclosed herein.

[0031] In this document, the term "comprising" or "including" is an open expression, that is, it includes the content specified by the present invention, but does not exclude other aspects of the content.

[0032] In the first aspect of the embodiments of the present invention, the present invention provides a heterojunction diode, comprising: a p-type diamond nanorod, an n-type gallium oxide buffer layer, a first n-type gallium oxide nanorod, and a second n-type gallium oxide nanorod.

[0033] In the present invention, the p-type diamond and the n-type gallium oxide are in the form of nanorods. The design of the nanorod array has the following advantages: First, it can significantly improve the carrier transport and separation efficiency. This is because the vertical arrangement of the nanorods forces the carriers (holes in the p-region and electrons in the n-region) to transport along the axial direction (longitudinal direction) of the columnar structure, avoiding the tortuous paths of lateral diffusion in the planar structure. Therefore, it provides a directional transport path and a clear interface for the carriers, thereby reducing the transport resistance and the recombination probability, which is beneficial to the transport and separation of carriers. Second, the diamond and gallium oxide in the form of nanorods have higher thermal conductivity. The high thermal conductivity of the diamond nanorods (>2000 W / m·K) can quickly conduct away the heat generated in the gallium oxide layer, solving the problem of low thermal conductivity of gallium oxide. Third, the interface formed by the columnar structure improves the interface cracking problem caused by the difference in the thermal expansion coefficients of diamond and gallium oxide. Since the gaps between the nanorods provide an "elastic buffer space" for thermal expansion, it allows diamond and gallium oxide to expand non-uniformly when the temperature changes, without causing interface cracking due to rigid constraints. Fourth, in the present invention, by inserting an n-type gallium oxide buffer layer between the p-type diamond nanorods and the n-type gallium oxide nanorods, the stress is reduced and nucleation sites are provided for MOCVD epitaxial growth. Fifth, since the columnar structure increases the specific surface area of the material and provides more active sites, it enhances the surface adsorption, catalytic, or sensing ability. Thus, the heterojunction diode of the present invention has excellent carrier transport and separation efficiency and thermal conductivity.

[0034] In some embodiments of the present invention, the heterojunction diode satisfies at least one of the following: (1) The doping concentration of the p-type diamond nanorods is 10 14 ~10 17 cm -3 , and the doping element includes boron; (2) The doping concentration of the n-type gallium oxide buffer layer is 10 14 ~10 17 cm -3 , and the doping element includes silicon; (3) The doping concentration of the n-type gallium oxide nanorods is 10 14 ~10 17 cm -3 , and the doping element includes silicon; (4) The doping concentration of the n-type gallium oxide nanorods is 10 19 ~10 21 cm -3 , and the doping element includes silicon.

[0035] The heterojunction diode provided by the embodiments of the present invention realizes the comprehensive advantages of high-voltage tolerance, high thermal stability, and high-frequency response through material selection (diamond / gallium oxide), doping gradient, and nanostructure optimization. Therefore, the heterojunction diode of the present invention has excellent carrier transport and separation efficiency and good thermal conductivity.

[0036] As an example, the doping concentration of the p-type diamond nanorods is 10 14 cm -3 、10 15 cm -3 、10 16 cm -3 、10 17 cm -3 etc.; the doping concentration of the n-type gallium oxide buffer layer is 10 14 cm -3 、10 15 cm -3 、10 16 cm -3 、10 17 cm -3 etc.; the doping concentration of the n-type gallium oxide nanorods is 10 14 cm -3 、10 15 cm -3 、10 16 cm -3 、10 17 cm -3 etc.; the doping concentration of the n-type gallium oxide nanorods is 10 19 cm -3 、10 20 cm -3 、10 21 cm -3 etc.

[0037] In some embodiments of the present invention, the heterojunction diode includes a diamond ohmic contact metal layer, a p-type diamond substrate layer, p-type diamond nanorods, an n-type gallium oxide buffer layer, a first n-type gallium oxide nanorod, a second n-type gallium oxide nanorod, and a gallium oxide ohmic contact metal layer stacked in sequence. Thus, the heterojunction diode of the present invention has excellent performance. The morphological structure of the heterojunction diode of the present invention is as Figure 1 shown.

[0038] In some embodiments of the present invention, the heterojunction diode satisfies at least one of the following: (1) The doping concentration of the p-type diamond substrate layer is 10 19 ~10 21 cm -3, the doping element includes boron; (2) the diamond ohmic contact metal layer includes at least one of Au, Al, Cu, N, and Ag; (3) the gallium oxide ohmic contact metal layer includes at least one of Au, Al, Cu, N, and Ag. Thus, the heterojunction diode of the present invention has excellent performance.

[0039] As an example, the doping concentration of the p-type diamond substrate layer is 10 19 cm -3 , 10 20 cm -3 , 10 21 cm -3 and so on.

[0040] In the second aspect of the embodiments of the present invention, the present invention provides a method for preparing the heterojunction diode of the first aspect, including the following steps: growing a p-type diamond epitaxial layer on a p-type diamond substrate layer; covering the p-type diamond epitaxial layer with a patterned metal mask, etching the exposed area of the metal mask to form p-type diamond nanorods; growing an n-type gallium oxide buffer layer on the p-type diamond nanorods; growing a first n-type gallium oxide nanorod and a second n-type gallium oxide nanorod in sequence on the n-type gallium oxide buffer layer; forming a gallium oxide ohmic contact metal layer on one side of the sample, forming a diamond ohmic contact metal layer on the other side of the sample, and annealing to form an ohmic contact, thereby obtaining a heterojunction diode.

[0041] The preparation method proposed by the present invention realizes the efficient integration of p-type diamond and n-type gallium oxide heterojunction diodes through step-by-step epitaxial growth and nanorod patterning processes. The preparation process of the heterojunction diode of the present invention is as Figure 2 shown. A patterned metal mask is used to cover the p-type diamond epitaxial layer, and then the p-type diamond epitaxial layer is etched by etching technology to form a nanorod array. At the same time, the stress transition design of the gallium oxide buffer layer effectively alleviates the problem of the difference in thermal expansion coefficients between diamond and gallium oxide. The preparation method of the present invention realizes the high-performance and high-reliability manufacturing of diamond / gallium oxide heterojunction diodes through a three-step strategy of nanorod patterning etching - buffer layer stress regulation - gradient doping epitaxy. Thus, the heterojunction diode of the present invention has excellent carrier transport and separation efficiency and thermal conduction performance.

[0042] In some embodiments of the present invention, the method for growing a p-type diamond epitaxial layer on a p-type diamond substrate layer includes using MPCVD (microwave plasma chemical vapor deposition) to grow a layer with a thickness of 5 - 10 μm.

[0043] The present invention uses MPCVD technology to grow a p-type diamond epitaxial layer on a p-type diamond substrate, and can prepare a p-type diamond epitaxial layer with low defects and high uniformity and a thickness of 5-10 μm, laying a good foundation for subsequent nanowire etching and heterojunction integration. Thus, a heterojunction diode with excellent performance can be obtained.

[0044] As an example, the growth thicknesses are 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, etc.

[0045] In some embodiments of the present invention, in the step of covering the p-type diamond epitaxial layer with a patterned metal mask, the metal mask includes one of Al, Au, Cr, and Ni. Thus, a heterojunction diode with excellent performance can be obtained.

[0046] In some embodiments of the present invention, in the step of etching the exposed area of the metal mask, it includes: performing RIE etching (reactive ion etching) on the exposed area of the metal mask; removing the remaining metal mask after RIE etching with an acidic solution.

[0047] In some embodiments of the present invention, the steps of forming p-type diamond nanowires include: spin-coating a photoresist on the surface of the p-type diamond epitaxial layer with a thickness of 1-5 μm, and using the photoresist to define the metal mask covering area through photolithography and development processes; magnetron sputtering the metal mask; removing the remaining photoresist; performing RIE etching on the sample surface of the p-type diamond epitaxial layer, and the part without the protection of the metal mask is etched; then removing the remaining metal mask after RIE etching with an acidic solution. Thus, the present invention can obtain a heterojunction diode with excellent performance.

[0048] In some specific embodiments of the present invention, the metal mask includes any one of Al, Au, Cr, and Ni, and the thickness of the metal mask is 1-3 μm.

[0049] In some specific embodiments of the present invention, the acidic solution includes any one of hydrochloric acid, sulfuric acid, and nitric acid.

[0050] In some embodiments of the present invention, the method of growing an n-type gallium oxide buffer layer on the p-type diamond nanowires includes using magnetron sputtering; and / or, the method of sequentially growing a first n-type gallium oxide nanowire and a second n-type gallium oxide nanowire on the n-type gallium oxide buffer layer includes using MOCVD (metalorganic chemical vapor deposition).

[0051] In some embodiments of the present invention, the method of forming a gallium oxide ohmic contact metal layer on one side of the sample includes using magnetron sputtering, and the thickness of the gallium oxide ohmic contact metal layer is 1-5 μm; and / or, the method of forming a diamond ohmic contact metal layer on the other side of the sample includes using magnetron sputtering, and the thickness of the diamond ohmic contact metal layer is 1-5 μm.

[0052] As an example, the thickness of the gallium oxide ohmic contact metal layer is 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, etc.; the thickness of the diamond ohmic contact metal layer is 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, etc.

[0053] In some embodiments of the present invention, the ohmic contact metal layer includes at least one of Au, A, Cu, Ni, and Ag.

[0054] In some embodiments of the present invention, in the step of annealing to form an ohmic contact, the annealing temperature is 400 - 800 °C.

[0055] As an example, the annealing temperature is 400 °C, 500 °C, 600 °C, 700 °C, 800 °C, etc.

[0056] The solution of the present invention will be explained below in conjunction with embodiments. Those skilled in the art will understand that the following embodiments are only used to illustrate the present invention and should not be regarded as limiting the scope of the present invention. For those not specified in the embodiments regarding specific technologies or conditions, they shall be carried out according to the technologies or conditions described in the literature in this field or according to the product specifications. For reagents or instruments not specified as to the manufacturer, they are all conventional products that can be obtained through commercial purchase.

[0057] Example 1:

[0058] Step 1: Grow a p-type boron-doped diamond substrate layer ( Figure 3a ) by MPCVD, with a doping concentration of 10 20 cm -3 . The growth thickness is 8 μm.

[0059] Step 2: Deposit a p-type boron-doped diamond epitaxial layer ( Figure 3b ) on the p-type boron-doped diamond substrate layer, with a doping concentration of 10 15 cm -3 , and the growth thickness is 8 μm.

[0060] Step 3: Spin-coat a photoresist ( Figure 3c ) on the surface of the p-type boron-doped diamond epitaxial layer, with a coating thickness of 3 μm. Through photolithography and development processes, use the photoresist to define the covered area of the metal mask ( Figure 3d ). Magnetron sputter a metal mask layer (Au layer) ( Figure 3e ), with a thickness of 2 μm. Remove the remaining photoresist ( Figure 3f ). Perform RIE etching on the sample surface of the p-type diamond epitaxial layer, and the part without metal mask protection is etched ( Figure 3g ), and then use hydrochloric acid solution to remove the remaining metal mask after RIE etching to form p-type diamond nanorods ( Figure 3h ).

[0061] Step 4: On the surface of the diamond nanocolumns, a buffer layer of n-type gallium oxide doped with Si at a doping concentration of 10 15 cm -3 is sputtered using magnetron sputtering technology, and rapid thermal annealing is performed to obtain a buffer layer of n-type gallium oxide on the surface of the diamond nanocolumns( Figure 3i ).

[0062] Step 5: On the buffer layer of n-type gallium oxide, the first n-type gallium oxide nanocolumns( Figure 3j ) are successively grown using MOCVD, doped with Si at a doping concentration of 10 15 cm -3 ; the second n-type gallium oxide nanocolumns( Figure 3k ) are doped with Si at a doping concentration of 10 20 cm -3 .

[0063] Step 6: On one side of the sample, a gallium oxide ohmic contact metal layer (Cu layer)( Figure 3l ) is magnetron sputtered and deposited with a thickness of 3 μm, and annealed at 500 °C to form an ohmic contact. On the other side of the sample, a diamond ohmic contact metal layer (Cu layer)( Figure 3m ) is magnetron sputtered and deposited with a thickness of 3 μm, and annealed at 500 °C to form an ohmic contact.

[0064] Example 2:

[0065] Step 1: A p-type boron-doped diamond substrate layer( Figure 3a ) is grown by MPCVD at a doping concentration of 10 19 cm -3 . The growth thickness is 8 μm.

[0066] Step 2: A p-type boron-doped diamond epitaxial layer( Figure 3b ) is deposited on the p-type boron-doped diamond substrate layer at a doping concentration of 10 14 cm -3 , and the growth thickness is 8 μm.

[0067] Step 3: Photoresist is spin-coated on the surface of the p-type boron-doped diamond epitaxial layer( Figure 3c ) with a coating thickness of 3 μm. Through photolithography and development processes, the metal mask coverage area is defined using the photoresist( Figure 3d ). A metal mask layer (Al layer)( Figure 3e ) is magnetron sputtered with a thickness of 2 μm. The remaining photoresist is removed( Figure 3f ). The sample surface of the p-type diamond epitaxial layer is etched by RIE, and the part without metal mask protection is etched( Figure 3g), and then use hydrochloric acid solution to remove the remaining metal mask after RIE etching to form p-type diamond nanocolumns ( Figure 3h ).

[0068] Step 4: On the surface of the diamond nanocolumns, sputter a layer of n-type gallium oxide buffer layer by magnetron sputtering technology. The doping element is Si, and the doping concentration is 10 14 cm -3 . Perform rapid thermal annealing to obtain an n-type gallium oxide buffer layer on the surface of the diamond nanocolumns ( Figure 3i ).

[0069] Step 5: Use MOCVD to grow the first n-type gallium oxide nanocolumns ( Figure 3j ) on the n-type gallium oxide buffer layer. The doping element is Si, and the doping concentration is 10 14 cm -3 ; the second n-type gallium oxide nanocolumns ( Figure 3k ), the doping element is Si, and its doping concentration is 10 19 cm -3 .

[0070] Step 6: Magnetron sputter and deposit a gallium oxide ohmic contact metal layer (Cu layer) ( Figure 3l ) on one side of the sample, with a thickness of 3 μm, and anneal at 500 °C to form an ohmic contact. Magnetron sputter and deposit a diamond ohmic contact metal layer (Cu layer) ( Figure 3m ) on the other side of the sample, with a thickness of 3 μm, and anneal at 500 °C to form an ohmic contact.

[0071] Example 3:

[0072] Step 1: Grow a p-type boron-doped diamond substrate layer ( Figure 3a ) by MPCVD, and the doping concentration is 10 21 cm -3 . The growth thickness is 8 μm.

[0073] Step 2: Deposit a p-type boron-doped diamond epitaxial layer ( Figure 3b ) on the p-type boron-doped diamond substrate layer, and the doping concentration is 10 17 cm -3 . The growth thickness is 8 μm.

[0074] Step 3: Spin-coat photoresist ( Figure 3c ) on the surface of the p-type boron-doped diamond epitaxial layer, with a coating thickness of 3 μm. Through photolithography and development processes, use the photoresist to define the metal mask coverage area ( Figure 3d ). Magnetron sputter the metal mask layer (Cr layer) ( Figure 3e ), with a thickness of 2 μm. Remove the remaining photoresist ( Figure 3f)。The sample surface of the p-type diamond epitaxial layer is subjected to RIE etching, and the part without metal mask protection is etched ( Figure 3g ) and then the remaining metal mask after RIE etching is removed with hydrochloric acid solution to form p-type diamond nanocolumns ( Figure 3h )。

[0075] Step 4: On the surface of the diamond nanocolumns, a layer of n-type gallium oxide buffer layer is sputtered by magnetron sputtering technology. The doping element is Si, and the doping concentration is 10 17 cm -3 . Then rapid thermal annealing is carried out to obtain an n-type gallium oxide buffer layer on the surface of the diamond nanocolumns ( Figure 3i )。

[0076] Step 5: On the n-type gallium oxide buffer layer, the first n-type gallium oxide nanocolumns ( Figure 3j ) are successively grown by MOCVD. The doping element is Si, and the doping concentration is 10 17 cm -3 ; the second n-type gallium oxide nanocolumns ( Figure 3k ) are grown, the doping element is Si, and its doping concentration is 10 21 cm -3 .

[0077] Step 6: On one side of the sample, a gallium oxide ohmic contact metal layer (Cu layer) is magnetron sputtered and deposited ( Figure 3l ), with a thickness of 3 μm, and annealed at 500 °C to form an ohmic contact. On the other side of the sample, a diamond ohmic contact metal layer (Cu layer) is magnetron sputtered and deposited ( Figure 3m ), with a thickness of 3 μm, and annealed at 500 °C to form an ohmic contact.

[0078] The performance of the heterojunction diode in the above embodiment is tested, and the test results are shown in Table 1.

[0079] Table 1 Performance test results of the heterojunction diodes in Examples 1-3

[0080] Number Electron mobility Thermal conductivity Specific surface area Example 1 <![CDATA[159.4cm 2 / V·s]]> <![CDATA[118Wm -1 K -1 > <![CDATA[2.1×10 7 m -1 > Example 2 <![CDATA[148.7cm 2 / V·s]]> <![CDATA[114Wm -1 K -1 > <![CDATA[2.4×10 7 m -1 > Example 3 <![CDATA[155.3cm 2 / V·s]]> <![CDATA[123Wm -1 K -1 > <![CDATA[1.6×10 7 m -1 >

[0081] It can be seen from the performance test results in Table 1 that the heterojunction diode of the present invention has excellent carrier transport and separation efficiency and thermal conduction performance.

[0082] In the description of this specification, the descriptions referring to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0083] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention.

Claims

1. A heterojunction diode, characterized in that, Including: p-type diamond nanorods, n-type gallium oxide buffer layer, first n-type gallium oxide nanorods, second n-type gallium oxide nanorods.

2. The heterojunction diode according to claim 1, wherein The heterojunction diode satisfies at least one of the following: (1) The doping concentration of the p-type diamond nanocolumns is 10 14 ~10 17 cm -3 , and the doping element includes boron; (2) The doping concentration of the n-type gallium oxide buffer layer is 10 14 ~10 17 cm -3 , and the doping elements include silicon; (3) The doping concentration of the first n-type gallium oxide nanorods is 10 14 ~10 17 cm -3 , and the doping elements include silicon; (4) The doping concentration of the second n-type gallium oxide nanorods is 10 19 ~10 21 cm -3 , and the doping elements include silicon.

3. The heterojunction diode according to claim 1 or 2, characterized in that, The heterojunction diode includes a diamond ohmic contact metal layer, a p-type diamond substrate layer, p-type diamond nanorods, an n-type gallium oxide buffer layer, first n-type gallium oxide nanorods, second n-type gallium oxide nanorods, and a gallium oxide ohmic contact metal layer that are stacked in sequence.

4. The heterojunction diode according to claim 3, characterized in that, The heterojunction diode satisfies at least one of the following: (1) The doping concentration of the p-type diamond substrate layer is 10 19 ~10 21 cm -3 , and the doping element includes boron; (2) The diamond ohmic contact metal layer includes at least one of Au, Al, Cu, N, and Ag; (3) The gallium oxide ohmic contact metal layer includes at least one of Au, Al, Cu, N, and Ag.

5. A method for preparing the heterojunction diode according to any one of claims 1 to 4, characterized in that, Including the following steps: Growing a p-type diamond epitaxial layer on a p-type diamond substrate layer; Covering the p-type diamond epitaxial layer with a patterned metal mask, etching the exposed area of the metal mask to form p-type diamond nanorods; Growing an n-type gallium oxide buffer layer on the p-type diamond nanorods; Growing first n-type gallium oxide nanorods and second n-type gallium oxide nanorods in sequence on the n-type gallium oxide buffer layer; Forming a gallium oxide ohmic contact metal layer on one side of the sample and a diamond ohmic contact metal layer on the other side of the sample, and annealing to form an ohmic contact to obtain a heterojunction diode.

6. The preparation method according to claim 5, characterized in that, The method of growing the p-type diamond epitaxial layer on the p-type diamond substrate layer includes using MPCVD, and the growth thickness is 5 - 10 μm.

7. The preparation method according to claim 5 or 6, characterized in that, In the step of covering the p-type diamond epitaxial layer with a patterned metal mask, the metal mask includes one of Al, Au, Cr, and Ni.

8. The preparation method according to any one of claims 5 to 7, characterized in that, In the step of etching the exposed area of the metal mask, it includes: Performing RIE etching on the exposed area of the metal mask; Removing the remaining metal mask after RIE etching with an acidic solution.

9. The preparation method according to any one of claims 5 to 8, characterized in that, The method of growing the n-type gallium oxide buffer layer on the p-type diamond nanorods includes using magnetron sputtering; and / or, the method of growing first n-type gallium oxide nanorods and second n-type gallium oxide nanorods in sequence on the n-type gallium oxide buffer layer includes using MOCVD.

10. The preparation method according to any one of claims 5 to 9, characterized in that, The method of forming the gallium oxide ohmic contact metal layer on one side of the sample includes using magnetron sputtering, and the thickness of the gallium oxide ohmic contact metal layer is 1 - 5 μm; and / or, the method of forming the diamond ohmic contact metal layer on the other side of the sample includes using magnetron sputtering, and the thickness of the diamond ohmic contact metal layer is 1 - 5 μm.

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