TOPCon battery with improved minority carrier lifetime and preparation method thereof

Abstract

The invention discloses a TOPCon battery capable of improving minority carrier lifetime and a preparation method thereof, and belongs to the field of TOPCon batteries, and the preparation method comprises the following steps: sequentially carrying out pre-cleaning, two times of phosphorus diffusion, surface PSG removal, texturing treatment, boron diffusion and other post-treatments on a silicon wafer to prepare the TOPCon battery. The method has the beneficial effects that deposition gettering is carried out on the silicon wafer through two times of phosphorus diffusion and gradient temperature rise propulsion, and the method has a better gettering effect for the silicon wafer with seriously low minority carrier lifetime. In addition, the concentration of chemicals in the texturing cleaning and rough polishing tank is reduced, the silicon wafer can be prevented from being seriously thinned due to secondary rough polishing, the concentration of the chemical liquid in the texturing tank is adjusted, the concentration of the additive is increased, the texturing rate is controlled, and the damage to the silicon wafer is reduced to the minimum.

Description

Technical Field

[0001] The present invention relates to the field of TOPCon batteries, and in particular to a TOPCon battery with improved minority carrier lifetime and a preparation method thereof. Background Art

[0002] With the rapid development of TOPCon cells, improving efficiency and reducing costs have always been the main themes of solar cell development. However, the mass production efficiency of TOPCon cells is far from reaching the theoretical efficiency of the laboratory. Due to the influence of raw materials, the minority carrier lifetime of some silicon wafers is seriously lower than the actual production requirements. The source of the wafer contains a large number of impurities, which seriously affects the conversion efficiency of solar cells. In particular, metal impurities such as Fe, Cu, Ni, and Mn generate energy levels in the PN junction region, causing serious defect recombination, greatly reducing the minority carrier lifetime, and ultimately reducing the efficiency of silicon solar cells. If not removed, these impurities will be a strong channel for efficiency loss in silicon solar cell devices. Therefore, silicon wafer gettering technology is often used to remove metal impurities to less harmful areas of the device.

[0003] In TOPCon cells, the phosphorus-doped amorphous silicon / silicon oxide layer structure is key to silicon wafer gettering. This process aims to attract as many metal impurities from the wafer as possible into the phosphorus-doped polysilicon layer, reducing defect recombination within the wafer and improving minority carrier lifetime. However, existing gettering processes are insufficient for wafers with extremely low minority carrier lifetimes. Therefore, process optimization is urgently needed to address the severely low minority carrier lifetimes found in some wafers.

[0004] In view of this, the inventor conducted in-depth research on this demand, and thus came up with this case. Summary of the Invention

[0005] To address the problem in the prior art that the minority carrier lifetime of some silicon wafers is seriously low and the existing process cannot improve the minority carrier lifetime, the present invention provides a TOPCon cell with improved minority carrier lifetime and a preparation method thereof. The technical solution is as follows:

[0006] A method for preparing a TOPCon battery with improved minority carrier lifetime comprises the following steps:

[0007] Step 1: Select a silicon wafer with a low minority carrier lifetime;

[0008] Step 2: pre-cleaning the silicon wafers in sequence;

[0009] Step 3, performing phosphorus diffusion twice on the silicon wafer;

[0010] Step 4, removing PSG on the surface of the silicon wafer;

[0011] Step 5, performing texturing treatment on the silicon wafer;

[0012] Step 6: Perform post-treatments such as boron diffusion on the silicon wafer to fabricate a TOPCon cell.

[0013] Preferably, the silicon wafer selected in Step 1 is a single-crystalline silicon wafer with a minority carrier lifetime of 1000 - 2000 μs. With the rapid development of TOPCon cells, cost reduction and efficiency improvement have always been the main themes in the development of solar cells. By adding silicon wafers with severely low minority carrier lifetimes and adopting the preparation method with the above-optimized process, the photoelectric conversion efficiency of silicon materials with low minority carrier lifetimes can be significantly improved, thus achieving the effect of cost reduction and efficiency improvement.

[0014] Preferably, the two phosphorus diffusions on the silicon wafer in Step 3 specifically include: Under a vacuum condition with a temperature of 600°C - 800°C, using POCl3 as the diffusion source, introducing nitrogen and pure oxygen, and performing the first phosphorus diffusion on the silicon wafer; subsequently, raising the temperature to a vacuum condition of 800 - 1000°C, introducing oxygen for oxidation promotion, and then using POCl3 as the diffusion source, introducing nitrogen and pure oxygen, and performing the second phosphorus diffusion on the silicon wafer. In this application, impurities in the silicon wafer are removed by phosphorus diffusion. After adding an oxide layer by introducing oxygen, gradient heating is carried out for secondary phosphorus diffusion and gettering, which can better precipitate the remaining impurities inside the silicon wafer to the PSG layer on the surface, improving the minority carrier lifetime of the silicon wafer.

[0015] Preferably, the flow rate of nitrogen introduced during the two phosphorus diffusions in Step 3 is 2500 - 3000 sccm / min, and the flow rate of pure oxygen is 1000 - 2000 sccm / min.

[0016] Preferably, removing the PSG on the surface of the silicon wafer in Step 3 specifically includes: Preparing a chemical solution with a concentration ratio of HF:H2O = 1:4.2, and etching the silicon wafer at room temperature for 120 s.

[0017] Preferably, the texturing treatment of the silicon wafer in Step 5 specifically includes: Setting the concentration ratio of the chemicals in the texturing cleaning and rough polishing tank as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, and setting the concentration ratio of the chemicals in the texturing tank as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and performing texturing treatment on the silicon wafer.

[0018] By reducing the concentration of 10% NaOH chemicals in the texturing cleaning and rough polishing tank, reducing the corrosion of the silicon wafer by NaOH, preventing the silicon wafer from becoming severely thinner due to secondary rough polishing, and adjusting the concentration of the chemicals in the texturing tank, reducing the 5% NaOH concentration and increasing the 5% additive concentration, the flocking surface rate of the silicon wafer is controlled.

[0019] Preferably, the pre-cleaning in the second step is successively alkali cleaning, rough polishing, and acid cleaning. By pre-cleaning the silicon wafers, alkali cleaning and rough polishing are used to remove contaminants such as residual organic matter and wire marks on the surface of the slices, and acid cleaning is used to remove residual metal ions on the surface and form Si-F hydrophobic bonds for easy drying. The above operations also contribute to the subsequent processes.

[0020] Preferably, the alkali cleaning is specifically to place the silicon wafers in a solution with a volume concentration ratio of NaOH:H2O2:H2O = 1:(5.5~6):(90~100), and clean them at 60~70°C for 140~160 s.

[0021] Preferably, the rough polishing is specifically to place the silicon wafers in a solution with a volume concentration ratio of NaOH:H2O = 1:(75~100), and clean them at 70~80°C for 100~140 s.

[0022] Preferably, the acid cleaning is specifically to place the silicon wafers in a solution with a volume concentration ratio of HF:HCl:H2O = 1:(0.6~0.8):(8~9), and clean them at 20~30°C for 100~140 s.

[0023] Preferably, the post-treatment in the sixth step includes successively performing boron diffusion, etching, tunneling oxidation, doping amorphous silicon, annealing, de-warping, and depositing a front polysilicon layer, depositing front-side alumina, front-side silicon nitride, and back-side silicon nitride, as well as screen printing on the silicon wafers.

[0024] The present application also provides a TOPCon battery for improving minority carrier lifetime, which is prepared by the preparation method of the above TOPCon battery.

[0025] The beneficial effects produced by adopting the technical solution of the present invention are as follows:

[0026] The present invention performs two phosphorus diffusions with gradient temperature rise to deposit and absorb impurities on the silicon wafers, and has a better impurity absorption effect on silicon wafers with severely low minority carrier lifetime. In addition, the present application reduces the concentrations of chemicals in the texturing cleaning and rough polishing tanks, can prevent the silicon wafers from being severely thinned due to secondary rough polishing, and adjusts the concentration of the chemical solution in the texturing tank, increases the additive concentration, controls the surface area ratio of the etched surface, and minimizes the damage to the silicon wafers. Specific embodiments

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. Therefore, the detailed description of the embodiments of the present invention below is not intended to limit the scope of the claimed invention, but merely represents the selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0028] In this embodiment, two phosphorus diffusions are carried out with gradient temperature increase to deposit and absorb impurities on the silicon wafer, which has a better impurity absorption effect for silicon wafers with severely low minority carrier lifetimes. In addition, this application reduces the concentrations of chemicals in the texturing cleaning and rough polishing tanks, which can prevent the silicon wafers from being severely thinned due to secondary rough polishing. Moreover, the concentration of the chemical solution in the texturing tank is adjusted, the concentration of the additive is increased, and the surface roughness rate is controlled to minimize the damage to the silicon wafers. The specific implementation methods are as follows:

[0029] A method for preparing a TOPCon battery for improving the minority carrier lifetime, comprising the following steps:

[0030] Step 1: Select a silicon wafer with a low minority carrier lifetime;

[0031] Step 2: Pre-clean the silicon wafer in sequence;

[0032] Step 3: Perform two phosphorus diffusions on the silicon wafer;

[0033] Step 4: Remove the PSG on the surface of the silicon wafer;

[0034] Step 5: Perform texturing treatment on the silicon wafer;

[0035] Step 6: Perform post-treatments such as boron diffusion on the silicon wafer to fabricate a TOPCon battery.

[0036] As a preferred embodiment, the silicon wafer selected in Step 1 is a single-crystalline silicon wafer with a minority carrier lifetime of 1000 - 2000 μs.

[0037] As a preferred embodiment, the two phosphorus diffusions performed on the silicon wafer in Step 3 specifically include: placing the cleaned silicon wafer under a vacuum condition at a temperature of 600°C - 800°C, using POCl3 as the diffusion source, introducing nitrogen and pure oxygen, and performing the first phosphorus diffusion on the silicon wafer; then raising the temperature to a vacuum condition of 800 - 1000°C, introducing oxygen for oxidation promotion, and then using POCl3 as the diffusion source, introducing nitrogen and pure oxygen, and performing the second phosphorus diffusion on the silicon wafer.

[0038] As a preferred embodiment, in the third step, the flow rate of nitrogen introduced during the two phosphorus diffusions is 2500 - 3000 sccm / min, and the flow rate of pure oxygen is 1000 - 2000 sccm / min.

[0039] As a preferred embodiment, in the third step, removing the PSG on the surface of the silicon wafer specifically includes: preparing a chemical solution with a concentration ratio of HF:H2O = 1:4.2, and etching the silicon wafer at room temperature for 120 s.

[0040] As a preferred embodiment, in the fifth step, the texturing treatment of the silicon wafer specifically includes: setting the chemical solution concentration ratio in the texturing cleaning and rough polishing tank as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, setting the chemical solution concentration ratio in the texturing tank as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and performing texturing treatment on the silicon wafer.

[0041] By reducing the chemical concentration of 10% NaOH in the texturing cleaning and rough polishing tank, reducing the corrosion of the silicon wafer by NaOH, preventing the silicon wafer from becoming too thin due to secondary rough polishing, and adjusting the chemical solution concentration in the texturing tank, reducing the 5% NaOH concentration and increasing the 5% additive concentration to control the fuzz surface rate of the silicon wafer.

[0042] As a preferred embodiment, in the second step, the pre - cleaning is sequentially alkali cleaning, rough polishing, and acid cleaning.

[0043] As a preferred embodiment, the alkali cleaning is specifically to place the silicon wafer in a volume concentration ratio of NaOH:H2O2:H2O = 1:(5.5 - 6):(90 - 100), and clean it at 60 - 70 °C for 140 - 160 s.

[0044] As a preferred embodiment, the rough polishing is specifically to place the silicon wafer in a volume concentration ratio of NaOH:H2O = 1:(75 - 100), and clean it at 70 - 80 °C for 100 - 140 s.

[0045] As a preferred embodiment, the acid cleaning is specifically to place the silicon wafer in a volume concentration ratio of HF:HCl:H2O = 1:(0.6 - 0.8):(8 - 9), and clean it at 20 - 30 °C for 100 - 140 s.

[0046] As a preferred embodiment, the post - treatment in the sixth step includes sequentially performing boron diffusion, etching, tunneling oxidation, doping amorphous silicon, annealing, removing the winding degree and the front - side polysilicon layer, depositing front - side alumina, front - side silicon nitride and back - side silicon nitride, and screen printing on the silicon wafer.

[0047] As a preferred embodiment, the post-treatment in step six specifically includes: placing the silicon wafer in a boron diffusion tube, introducing a boron source at a temperature of 900 °C for 500 s, and then performing a drive-in at a temperature of 1000 °C for 1000 s; etching the silicon wafer on a chain acid etching machine table, where the etching tank contains HNO3 with a volume concentration of 15% and HF with a volume concentration of 10%; thermally oxidizing the silicon wafer to form a tunneling oxide layer on the back of the silicon wafer at a temperature of 600 °C; in-situ doping amorphous silicon on the silicon wafer, and the gas introduced is a mixed gas of PH3 and SiH4, with a process temperature of 600 °C; annealing the silicon wafer at 850 °C for 60 min to convert the doped amorphous silicon into phosphorus-doped polycrystalline silicon; growing silicon oxide on the back of the annealed silicon wafer, washing off the silicon oxide in the front wrap-around plating area with HF having a volume concentration of 20%, and then placing it in an alkali polishing tank (KOH volume concentration 10%, temperature 50 °C, alkali polishing additive 10 L) for alkali polishing to remove the front polycrystalline silicon wrap-around; depositing front-side alumina on the silicon wafer by thermal atomic deposition, with a process temperature of 250 °C; depositing front-side and back-side silicon nitride films on the silicon wafer surface by plasma-enhanced chemical vapor deposition, introducing NH3 and SiH4 gases during deposition, with a process temperature of 500 °C and a pressure of 200 Pa; performing screen printing on the silicon wafer to obtain a TOPCon cell.

[0048] The present application also provides a TOPCon cell for improving minority carrier lifetime, which is obtained by the preparation method of the above TOPCon cell.

[0049] The beneficial effects of a preparation method of a TOPCon cell for improving minority carrier lifetime in the present invention are further reviewed through several sets of examples below.

[0050] Example 1:

[0051] In this example, a preparation method of a TOPCon cell for improving minority carrier lifetime includes the following steps:

[0052] Step 1, take a silicon wafer with a minority carrier lifetime of 1000 μs and a size of 210*210 mm;

[0053] Step 2, perform pre-cleaning on the silicon wafer in sequence, including alkali cleaning, rough polishing, and acid cleaning: specifically, first place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O2:H2O = 1:5.5:90 and clean it at 60 °C for 140 s; then place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O = 1:75 and clean it at 70 °C for 100 s; then place the silicon wafer in a solution with a volume concentration ratio of HF:HCl:H2O = 1:0.6:8 and clean it at 20 °C for 100 s;

[0054] Step 3: Perform two phosphorus diffusions on the silicon wafer. Specifically, place the cleaned silicon wafer under vacuum at a temperature of 600°C, use POCl3 as the diffusion source, introduce nitrogen and pure oxygen, and perform the first phosphorus diffusion on the silicon wafer. Subsequently, raise the temperature to 800°C under vacuum, introduce oxygen for oxidation promotion, and then use POCl3 as the diffusion source, introduce nitrogen and pure oxygen, and perform the second phosphorus diffusion on the silicon wafer. The flow rate of nitrogen is 2500 sccm / min and the flow rate of pure oxygen is 1000 sccm / min for both diffusions.

[0055] Step 4: Use HF acid to remove the PSG layer on the silicon wafer surface. Specifically, prepare a chemical solution with a concentration ratio of HF:H2O = 1:4.2, and etch the silicon wafer at room temperature for 120 s.

[0056] Step 5: Perform texturing treatment on the silicon wafer. Specifically, set the concentration ratio of the chemical solution in the texturing cleaning and rough polishing tank as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, and set the concentration ratio of the chemical solution in the texturing tank as NaOH:additive:H2O = 1:0.44:102 to prepare the solution, and perform texturing on the silicon wafer.

[0057] Step 6: Perform post-treatments such as boron diffusion on the silicon wafer to fabricate a TOPCon cell.

[0058] Example 2:

[0059] A method for fabricating a TOPCon cell with improved minority carrier lifetime in this example includes the following steps:

[0060] Step 1: Take a silicon wafer with a minority carrier lifetime of 1500 μs and a size of 210*210 mm.

[0061] Step 2: Perform pre-cleaning on the silicon wafer successively by alkali cleaning, rough polishing, and acid cleaning. Specifically, first place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O2:H2O = 1:5.5:95 and clean it at 65°C for 150 s. Subsequently, place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O = 1:85 and clean it at 75°C for 110 s. Then place the silicon wafer in a solution with a volume concentration ratio of HF:HCl:H2O = 1:0.7:8.5 and clean it at 25°C for 110 s.

[0062] Step 3: Perform two phosphorus diffusions on the silicon wafer. Specifically, place the cleaned silicon wafer under vacuum at a temperature of 700°C, use POCl3 as the diffusion source, introduce nitrogen and pure oxygen, and perform the first phosphorus diffusion on the silicon wafer. Subsequently, raise the temperature to 900°C under vacuum, introduce oxygen for oxidation promotion, and then use POCl3 as the diffusion source, introduce nitrogen and pure oxygen, and perform the second phosphorus diffusion on the silicon wafer. The flow rate of nitrogen is 2800 sccm / min and the flow rate of pure oxygen is 1200 sccm / min for both diffusions.

[0063] Step 4, use HF acid to remove the PSG layer on the silicon wafer surface: specifically, prepare a chemical solution with a concentration ratio of HF:H2O = 1:4.2, and etch the silicon wafer at room temperature for 120 s;

[0064] Step 5, perform texturing treatment on the silicon wafer: specifically, set the chemical solution concentration ratio in the texturing cleaning and rough polishing tank as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, and set the chemical solution concentration ratio in the texturing tank as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and perform texturing on the silicon wafer;

[0065] Step 6, perform post-treatments such as boron diffusion on the silicon wafer to fabricate a TOPCon cell.

[0066] Example 3:

[0067] A preparation method of a TOPCon cell for improving minority carrier lifetime in this example includes the following steps:

[0068] Step 1, take a silicon wafer with a minority carrier lifetime of 1800 μs and a size of 210*210 mm;

[0069] Step 2, perform pre-cleaning on the silicon wafer successively by alkali cleaning, rough polishing and acid cleaning: specifically, first place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O2:H2O = 1:5.5:95 and clean it at 65 °C for 150 s; then place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O = 1:95 and clean it at 75 °C for 130 s; then place the silicon wafer in a solution with a volume concentration ratio of HF:HCl:H2O = 1:0.7:8.5 and clean it at 25 °C for 120 s;

[0070] Step 3, perform two phosphorus diffusions on the silicon wafer: specifically, place the cleaned silicon wafer under vacuum conditions at a temperature of 700 °C, use POCl3 as the diffusion source, introduce nitrogen and pure oxygen, and perform the first phosphorus diffusion on the silicon wafer; then raise the temperature to 900 °C under vacuum conditions, introduce oxygen for oxidation and diffusion, and then use POCl3 as the diffusion source, introduce nitrogen and pure oxygen, and perform the second phosphorus diffusion on the silicon wafer; where the flow rate of nitrogen is 2900 sccm / min and the flow rate of pure oxygen is 1500 sccm / min;

[0071] Step 4, use HF acid to remove the PSG layer on the silicon wafer surface: specifically, prepare a chemical solution with a concentration ratio of HF:H2O = 1:4.2, and etch the silicon wafer at room temperature for 120 s;

[0072] Step 5, perform texturing treatment on the silicon wafer: Specifically, set the concentration ratio of the chemicals in the texturing cleaning and rough polishing tank as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, and set the concentration ratio of the chemicals in the texturing tank as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and perform texturing on the silicon wafer;

[0073] Step 6, perform post-treatments such as boron diffusion on the silicon wafer to fabricate a TOPCon cell.

[0074] Example 4:

[0075] In this example, a method for fabricating a TOPCon cell with improved minority carrier lifetime includes the following steps:

[0076] Step 1, take a silicon wafer with a minority carrier lifetime of 2000 μs and a size of 210*210 mm;

[0077] Step 2, perform pre-cleaning on the silicon wafer in sequence, including alkali cleaning, rough polishing, and acid cleaning: Specifically, first place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O2:H2O = 1:6:100 and clean it at 70 °C for 160 s; then place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O = 1:100 and clean it at 80 °C for 140 s; then place the silicon wafer in a solution with a volume concentration ratio of HF:HCl:H2O = 1:0.8:9 and clean it at 30 °C for 140 s;

[0078] Step 3, perform two phosphorus diffusions on the silicon wafer: Specifically, place the cleaned silicon wafer under vacuum conditions at a temperature of 800 °C, use POCl3 as the diffusion source, introduce nitrogen and pure oxygen, and perform the first phosphorus diffusion on the silicon wafer; then raise the temperature to 1000 °C under vacuum conditions, introduce oxygen for oxidation push, and then use POCl3 as the diffusion source, introduce nitrogen and pure oxygen, and perform the second phosphorus diffusion on the silicon wafer; where the flow rate of nitrogen is 3000 sccm / min and the flow rate of pure oxygen is 2000 sccm / min;

[0079] Step 4, use HF acid to remove the PSG layer on the surface of the silicon wafer: Specifically, prepare a solution with a concentration ratio of HF:H2O = 1:4.2, and etch the silicon wafer at room temperature for 120 s;

[0080] Step 5, perform texturing treatment on the silicon wafer: Specifically, set the concentration ratio of the chemicals in the texturing cleaning and rough polishing tank as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, and set the concentration ratio of the chemicals in the texturing tank as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and perform texturing on the silicon wafer;

[0081] Step 6, perform post-treatments such as boron diffusion on the silicon wafer to fabricate a TOPCon cell.

[0082] Comparative Example 1:

[0083] The preparation method in this Comparative Example 1 includes the following steps:

[0084] Step 1: Select a silicon wafer with a minority carrier lifetime of 4000 μs and a size of 210*210 mm;

[0085] Step 2: Perform pre-cleaning on the silicon wafer in sequence, including alkali cleaning, rough polishing, and acid cleaning: Specifically, first place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O2:H2O = 1:5.5:90 and clean it at 60 °C for 140 s; then place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O = 1:75 and clean it at 70 °C for 100 s; then place the silicon wafer in a solution with a volume concentration ratio of HF:HCl:H2O = 1:0.6:8 and clean it at 20 °C for 100 s;

[0086] Step 3: Perform texturing treatment on the silicon wafer: Specifically, set the concentration ratio of the texturing cleaning and rough polishing tank solution as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, and set the concentration ratio of the texturing tank solution as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and perform texturing on the silicon wafer;

[0087] Step 4: Perform post-treatments such as boron diffusion on the silicon wafer to fabricate a TOPCon cell.

[0088] Comparative Example 2:

[0089] The preparation method in this Comparative Example 2 includes the following steps:

[0090] Step 1: Take a silicon wafer with a minority carrier lifetime of 3000 μs and a size of 210*210 mm;

[0091] Step 2: Perform pre-cleaning on the silicon wafer in sequence, including alkali cleaning, rough polishing, and acid cleaning: Specifically, first place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O2:H2O = 1:5.5:95 and clean it at 65 °C for 150 s; then place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O = 1:85 and clean it at 75 °C for 110 s; then place the silicon wafer in a solution with a volume concentration ratio of HF:HCl:H2O = 1:0.7:8.5 and clean it at 25 °C for 110 s;

[0092] Step 3: Perform texturing treatment on the silicon wafer: Specifically, set the concentration ratio of the texturing cleaning and rough polishing tank solution as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, and set the concentration ratio of the texturing tank solution as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and perform texturing on the silicon wafer;

[0093] Step 4: Perform post-treatments such as boron diffusion on the silicon wafer to fabricate a TOPCon cell.

[0094] Comparative Example 3:

[0095] The preparation method in this Comparative Example 3 includes the following steps:

[0096] Step 1: Take a silicon wafer with a minority carrier lifetime of 3000 μs, and the size is 210 * 210 mm;

[0097] Step 2: Perform pre-cleaning on the silicon wafer successively, including alkali cleaning, rough polishing, and acid cleaning: Specifically, first place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O2:H2O = 1:5.5:95 and clean it at 65 °C for 150 s; then place the silicon wafer in a solution with a volume concentration ratio of NaOH:H2O = 1:95 and clean it at 75 °C for 130 s; then place the silicon wafer in a solution with a volume concentration ratio of HF:HCl:H2O = 1:0.7:8.5 and clean it at 25 °C for 120 s;

[0098] Step 3: Perform a first phosphorus diffusion on the silicon wafer: Specifically, place the cleaned silicon wafer under vacuum conditions at a temperature of 700 °C, use POCl3 as the diffusion source, and introduce nitrogen and pure oxygen to perform the first phosphorus diffusion on the silicon wafer; the flow rate of nitrogen is 2900 sccm / min, and the flow rate of pure oxygen is 1500 sccm / min;

[0099] Step 4: Use HF acid to remove the PSG layer on the surface of the silicon wafer: Specifically, prepare a solution with a concentration ratio of HF:H2O = 1:4.2, and etch the silicon wafer at room temperature for 120 s;

[0100] Step 5: Perform texturing treatment on the silicon wafer: Specifically, set the concentration ratio of the texturing cleaning and rough polishing tank solution as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, and set the concentration ratio of the texturing tank solution as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and perform texturing on the silicon wafer;

[0101] Step 6: Perform post-treatments such as boron diffusion on the silicon wafer to fabricate a TOPCon cell.

[0102] Comparative Example 4:

[0103] The preparation method in this Comparative Example 4 includes the following steps:

[0104] Step 1: Take a silicon wafer with a minority carrier lifetime of 2000 μs, and the size is 210 * 210 mm;

[0105] Step 2: The silicon wafers are pre-cleaned in sequence, including alkali cleaning, rough polishing, and acid cleaning: Specifically, first place the silicon wafers in a solution with a volume concentration ratio of NaOH:H2O2:H2O = 1:6:100 and clean at 70°C for 160 s; then place the silicon wafers in a solution with a volume concentration ratio of NaOH:H2O = 1:100 and clean at 80°C for 140 s; then place the silicon wafers in a solution with a volume concentration ratio of HF:HCl:H2O = 1:0.8:9 and clean at 30°C for 140 s;

[0106] Step 3: The silicon wafers are subjected to texturing treatment: Specifically, set the concentration ratio of the texturing cleaning and rough polishing tank solution as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, and set the concentration ratio of the texturing tank solution as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and then perform texturing treatment on the silicon wafers;

[0107] Step 4: The silicon wafers are subjected to post-treatments such as boron diffusion to fabricate TOPCon cells.

[0108] Next, the TOPCon solar cells obtained in the above examples and comparative examples are subjected to performance tests, and the results are as follows:

[0109] Table 1 Performance test results of TOPCon solar cells in Example 1 and Comparative Example 1

[0110] Example Minority carrier lifetime / μs Eta Uoc / mV Isc / mA FF Example 1 1000 25.836 728.9 14.002 84.32 Comparative Example 1 4000 25.872 730.0 13.985 84.82 Difference rate -0.036 -1.1 0.017 -0.50 Example 2 1500 26.449 734.0 18.403 86.339 Comparative Example 2 3000 26.416 733.0 18.424 86.259 Difference rate 0.033 1.1 -0.020 0.08 Example 3 1800 26.661 736.9 18.520 86.143 Comparative Example 3 3000 26.660 736.0 18.535 86.173 Difference rate 0.001 0.9 -0.015 -0.03 Example 4 2000 26.661 736.91 18.520 86.14 Comparative Example 4 2000 23.065 730.20 16.504 84.11 Difference rate 3.596 6.71 2.016 2.03

[0111] As can be seen from Table 1, in Example 1, the silicon wafers with a minority carrier lifetime of only 1000 μs are prepared by secondary phosphorus diffusion gettering + texturing, while in Comparative Example 1, the silicon wafers with 4000 μs are directly textured. The efficiency of the TOPCon cells prepared in Example 1 is basically close to the difference rate compared with the efficiency of the TOPCon cells prepared from the silicon wafers with a high minority carrier lifetime in Comparative Example 1. Similarly, when comparing Example 2 with Comparative Example 2, the efficiency of the TOPCon cells prepared from the silicon wafers with a low minority carrier lifetime in Example 2 is even higher than that in Comparative Example 2, which can significantly reduce the cost of silicon wafers for solar cells.

[0112] In Example 3, the silicon wafers with a minority carrier lifetime of only 1800 μs are prepared by secondary phosphorus diffusion gettering + texturing, while in Comparative Example 3, the silicon wafers with 3000 μs are prepared by single phosphorus diffusion gettering + texturing. The difference rate of the efficiency of the TOPCon cells prepared from the silicon wafers with secondary phosphorus diffusion gettering in Example 3 is basically close to that in Comparative Example 3. The silicon wafers with a severely low minority carrier lifetime can be fully applied in the subsequent production line, which can significantly reduce the cost of silicon wafers for solar cells.

[0113] In Comparative Example 4, a silicon wafer with a low minority carrier lifetime was directly textured. In Example 4, a silicon wafer with the same minority carrier lifetime as that in Comparative Example 4 was prepared by secondary phosphorus diffusion gettering + texturing. Compared with each other, Example 4 has a better battery conversion efficiency.

[0114] In summary, when the TOPCon solar cells prepared in Examples 1-4 of the present application are compared with the TOPCon solar cells prepared from the normal silicon wafers selected in Comparative Examples 1-4 respectively, there is no significant difference in performance, and even the performance is better than that of the TOPCon solar cells prepared from the normal silicon wafers.

[0115] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A preparation method of a TOPCon battery for improving minority carrier lifetime, characterized in that, It includes the following steps: Step 1: Select silicon wafers with low minority carrier lifetime; Step 2: Perform pre-cleaning on the silicon wafers in sequence; Step 3: Perform two phosphorus diffusions on the silicon wafers; Step 4: Remove the PSG on the surface of the silicon wafers; Step 5: Perform texturing treatment on the silicon wafers; Step 6: Perform post-treatments such as boron diffusion on the silicon wafers to fabricate TOPCon cells.

2. The preparation method of the TOPCon battery according to claim 1, wherein, The silicon wafers selected in Step 1 are single-crystalline silicon wafers with a minority carrier lifetime of 1000 - 2000 μs.

3. The preparation method of the TOPCon battery according to claim 1, wherein, The two phosphorus diffusions on the silicon wafers in Step 3 specifically include: placing the cleaned silicon wafers under vacuum conditions at a temperature of 600°C - 800°C, using POCl3 as the diffusion source, introducing nitrogen and pure oxygen, and performing the first phosphorus diffusion on the silicon wafers; then raising the temperature to a vacuum condition of 800 - 1000°C, introducing oxygen for oxidation push, and then using POCl3 as the diffusion source, introducing nitrogen and pure oxygen, and performing the second phosphorus diffusion on the silicon wafers. The flow rate of nitrogen is 2500 - 3000 sccm / min, and the flow rate of pure oxygen is 1000 - 2000 sccm / min.

4. The preparation method of the TOPCon battery according to claim 1, wherein, The texturing treatment on the silicon wafers in Step 5 specifically includes: setting the concentration ratio of the chemicals in the texturing cleaning and rough polishing tank as NaOH:H2O2:cleaning agent:H2O = 1:44:22:2481, setting the concentration ratio of the chemicals in the texturing tank as NaOH:additive:H2O = 1:0.44:102 for liquid preparation, and performing texturing treatment on the silicon wafers.

5. The preparation method of the TOPCon battery according to claim 1, wherein, The pre-cleaning in Step 2 is alkali cleaning, rough polishing, and acid cleaning in sequence.

6. The preparation method of the TOPCon battery according to claim 5, wherein, The alkali cleaning is specifically to place the silicon wafers in a volume concentration ratio of NaOH:H2O2:H2O = 1:(5.5 - 6):(90 - 100), with a cleaning time of 140 - 160 s and a temperature of 60 - 70°C.

7. The manufacturing method of the TOPCon battery according to claim 5, wherein, The rough polishing is specifically to place the silicon wafers in a volume concentration ratio of NaOH:H2O = 1:(75 - 100), with a cleaning time of 100 - 140 s and a temperature of 70 - 80°C.

8. The preparation method of the TOPCon battery according to claim 5, characterized in that, The acid cleaning is specifically to place the silicon wafers in a volume concentration ratio of HF:HCl:H2O = 1:(0.6 - 0.8):(8 - 9), with a cleaning time of 100 - 140 s and a temperature of 20 - 30°C.

9. The preparation method of the TOPCon battery according to claim 5, characterized in that, The post-treatment in Step 6 includes performing boron diffusion, etching, tunneling oxidation, doping amorphous silicon, annealing, removing the bypass plating and the front polysilicon layer, depositing front alumina, front silicon nitride, and back silicon nitride, and screen printing on the silicon wafers in sequence.

10. A TOPCon battery for improving minority carrier lifetime, characterized in that, It is obtained by the preparation method of the TOPCon cell according to any one of Claims 1 - 9.