Encoding and decoding method and device of memory, electronic equipment and storage medium
By introducing known strings in persistent memory together with data blocks for error correction encoding and decoding, the problems of read amplification, write amplification and space waste are solved, and error correction capabilities are enhanced and memory access granularity is optimized.
Patent Information
- Application Number
- CN202410190479.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-20
- Publication Date
- 2025-08-22
AI Technical Summary
The prior art has the problems of read and write amplification due to the update of error-corrected codewords in persistent memory, and the waste of reserved space has not been effectively solved.
By introducing a known string outside the data block and the data block for error correction encoding, error correction information is generated, and the data block and error correction information are spliced into error correction code words and written into memory. During decoding, the known strings are used for error correction decoding to enhance error correction capabilities.
The problems of read and write amplification are reduced, while the error correction ability of error-correcting codewords is improved, and memory space utilization is optimized.
Smart Images
Figure CN120526833A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of storage devices, and in particular to a memory encoding and decoding method, device, electronic device, and storage medium. Background Art
[0002] Persistent Memory (PM) provides low-latency access while also having the ability to persist data. Therefore, the use of persistent memory occupies an important position in the storage field. In order to obtain sufficiently powerful error correction capabilities and ensure data accuracy, persistent memory usually uses error correction codewords with a code length greater than the basic access unit of persistent memory, such as a cache line. Therefore, currently, multiple basic access units are placed in the same error correction codeword to improve the error correction capability. For example, K data blocks are used as user data of the error correction code, and each data block is a basic access unit. These K data blocks are error correctingly encoded (ECC) to generate redundant information for error correction, and then the K data blocks and the redundant information are spliced into an error correction codeword.
[0003] However, when one or more of the K data blocks need to be updated, error correction encoding must be performed again, which not only requires updating the corresponding data blocks but also the redundant information, which will lead to write amplification. In addition, when reading any part of the entire error correction code word, the entire error correction code code word needs to be read and decoded, which will also lead to read amplification. Summary of the Invention
[0004] The purpose of this application is to propose a memory encoding and decoding method, device, electronic device and storage medium to address the deficiencies of the above-mentioned prior art, and this purpose is achieved through the following technical solutions.
[0005] A first aspect of the present application provides a memory encoding method, the method comprising:
[0006] Obtaining a data block to be written and a known string corresponding to the data block;
[0007] performing error correction coding on the data block and the known word string to obtain the error correction information;
[0008] splicing the data block and the error correction information to obtain an error correction codeword;
[0009] The error correction code word is stored in a memory.
[0010] The memory encoding method described in the first aspect above has at least the following beneficial effects or advantages:
[0011] Outside the data block, a known string corresponding to the data block is introduced for error correction encoding along with the data block to generate error correction information. This increases the length of the encoded data and ensures the protection capability of the error correction codeword. The data block and error correction information are then concatenated to generate the error correction codeword and written into memory. Because the known string is included for error correction encoding, the error correction codeword protects a data block while still ensuring the strong error correction capability of the long error correction codeword. Memory access granularity is reduced to a basic access unit. This overcomes read and write amplification issues when updating data blocks, mitigating the conflict between the length of the error correction codeword and memory access granularity.
[0012] A second aspect of the present application provides a memory decoding method, the method further comprising:
[0013] Read the error correction codeword to be decoded from the memory;
[0014] Obtaining a known word string corresponding to the error correction code word;
[0015] The error correction codeword is subjected to error correction decoding based on the known word string to obtain an error-corrected data block.
[0016] The memory decoding method described in the second aspect above has at least the following beneficial effects or advantages:
[0017] By introducing a known string corresponding to the error-correcting codeword, the known string and the error-correcting codeword are combined for error correction decoding. Since the known string is known data and is noise-free and correct, it can be used during error correction decoding to strengthen the protection of the user data (i.e., data block) in the error-correcting codeword using the noise-free partial codeword. This narrows the range of erroneous codewords and corrects more additional erroneous codewords, thereby enhancing the error correction capability of the error-correcting codeword. Furthermore, since the known string is known to normal users but unknown to abnormal users, even if abnormal users obtain the error-correcting codeword, they will not be able to correctly decode it due to the lack of the known string. Therefore, the known string can enhance data security.
[0018] A third aspect of the present application provides a memory encoding device, the device comprising:
[0019] An acquisition module, configured to acquire a data block to be written and a known string corresponding to the data block;
[0020] an encoding module, configured to perform error correction encoding on the data block and the known word string to obtain the error correction information;
[0021] The writing module is used to splice the data block and the error correction information to obtain an error correction code word, and store the error correction code word into a memory.
[0022] A fourth aspect of the present application provides a memory decoding device, the device comprising:
[0023] A codeword reading module, used for reading the error correction codeword to be decoded from the memory;
[0024] An acquisition module, configured to acquire a known word string corresponding to the error correction code word;
[0025] A decoding module is used to perform error correction decoding on the error correction codeword based on the known word string to obtain an error-corrected data block.
[0026] The fifth aspect of the present application proposes an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method described in the first aspect above.
[0027] A sixth aspect of the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the program is executed by a processor to implement the method described in the first aspect above.
[0028] The above description is only an overview of the technical solution of this application. In order to more clearly understand the technical means of this application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of this application more obvious and easy to understand, the specific implementation methods of this application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0030] Figure 1 It is a schematic diagram of an application scenario in the prior art;
[0031] Figure 2 is a flow chart of an embodiment of a memory encoding method according to an exemplary embodiment;
[0032] Figure 3A 1 is a schematic diagram of error correction coding according to an exemplary embodiment;
[0033] Figure 3B 1 is a schematic diagram of known word string and data block permutation modulation according to an exemplary embodiment;
[0034] Figure 3C FIG1 is a schematic diagram showing a defective medium replacement according to an exemplary embodiment;
[0035] Figure 41 is a flow chart of an embodiment of a memory decoding method according to an exemplary embodiment;
[0036] Figure 5A 1 is a schematic diagram of error correction decoding according to an exemplary embodiment;
[0037] Figure 5B 1 is a schematic diagram illustrating erasure-enabled decoding of a known word string according to an exemplary embodiment;
[0038] Figure 6 FIG1 is a flowchart of an overall process of memory encoding and memory decoding according to an exemplary embodiment;
[0039] Figure 7 1 is a schematic structural diagram of a memory encoding device according to an exemplary embodiment;
[0040] Figure 8 1 is a schematic structural diagram of a memory decoding device according to an exemplary embodiment;
[0041] Figure 9 is a schematic diagram of a hardware structure of an electronic device according to an exemplary embodiment;
[0042] Figure 10 The figure is a schematic structural diagram of a storage medium according to an exemplary embodiment. DETAILED DESCRIPTION
[0043] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
[0044] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. As used in this application and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
[0045] It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".
[0046] As mentioned above, currently multiple basic access units are placed in the same error correction codeword to construct a codeword with a long code length and improve the error correction capability.
[0047] like Figure 1 As shown in the figure, one error correction code word protects two basic access units of data blocks, represented by user1 and user2 respectively. By using the ECC encoder to perform error correction encoding on user1 and user2, redundant information parity for error correction is obtained. Then, the protected data user1, user2, and parity are written together as an error correction code word into the persistent memory.
[0048] When user2 is updated, the entire error correction code word of the corresponding data needs to be read out. After the error correction code word is decoded using the ECC decoder, an error-free error correction code word is obtained. The user2 part is replaced with user2(n). User1 and user2(n) are error-corrected and encoded using the ECC encoder to obtain redundant information parity(n). Then, user1, user2(n), and parity(n) are written together as an error correction code word into the persistent memory in an overwritten manner.
[0049] As can be seen from this, when part of the data in an ECC codeword is updated, in addition to updating the corresponding data itself, the redundant information also needs to be updated. Therefore, the entire ECC codeword must be read and decoded, resulting in read amplification. Furthermore, after the remaining data in the read ECC codeword is used to update the redundant information, it must be written to persistent memory, causing write amplification. Furthermore, when some memory space is freed up, if the cleared data is distributed across multiple ECC codewords, the remaining data must be reassembled for error correction encoding, which also causes write amplification.
[0050] In addition, if Figure 1As shown, the prior art provides a reserved space (OP, Over-Provisioning) in the persistent memory for replacing defective media, that is, when it is detected that the medium storing user3 is defective, user3 is written from the defective medium to the medium in the OP space, and the new physical address is used to replace the defective physical address in the logical address and physical address mapping table.
[0051] Because the reserved space cannot be used for other operations except for replacing defective media, in actual applications, most of the media in the reserved space are not used throughout their entire life cycle, resulting in space waste.
[0052] Based on this, the present application proposes a memory encoding and decoding method. During encoding, a known word string corresponding to the data block is introduced outside the data block to perform error correction encoding together with the data block to obtain error correction information, thereby increasing the length of the encoded data and ensuring the protection capability of the error correction codeword. The data block and the error correction information are then concatenated to obtain the error correction codeword and written into the memory. Because the known word string is introduced for error correction encoding, the error correction codeword protects a data block while still ensuring the strong error correction capability of the long-code error correction codeword. This overcomes the problems of read amplification and write amplification when updating the data block, thereby reducing the contradiction between the codeword length of the error correction code and the granularity of memory access.
[0053] The above-mentioned known word string is known data. In addition to participating in encoding, it also participates in decoding, but does not need to be stored. During decoding, the known word string is combined with the error correction codeword for error correction decoding. Because the known word string is noise-free and correct data, during error correction decoding, it can play a role in strengthening the protection of the user data (i.e., data block) in the error correction codeword with the noise-free partial codeword. In other words, it can narrow the range of erroneous codewords and correct more additional erroneous codewords, thereby enhancing the error correction capability of the error correction codeword. In addition, because the known word string is known to normal users but unknown to abnormal users, even if the abnormal user obtains the error correction codeword, they cannot correctly decode it due to the lack of the known word string. Therefore, the known word string can enhance data security.
[0054] The following describes in detail the technical solution of this application and how it solves the aforementioned technical problems using specific embodiments. The several specific embodiments listed can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments. The following describes the embodiments of this application in detail with reference to the accompanying drawings.
[0055] Example 1:
[0056] Figure 2This is a flowchart of an embodiment of a memory encoding method according to an exemplary embodiment. The method is applied to memory installed in an electronic device. The memory involved in the embodiment of the present application may be persistent memory. To obtain strong error correction capabilities and ensure the accuracy of stored data, it is necessary to use a high-code-length error correction encoding method to encode the data to be written. The electronic device may be a computer device, a terminal device, or a server device.
[0057] like Figure 2 As shown, the process includes the following steps 201 to 204:
[0058] Step 201: Obtain a data block to be written and a known string corresponding to the data block.
[0059] Step 202: Perform error correction coding on the data block and the known word string to obtain error correction information.
[0060] Step 203: Concatenate the data block and the error correction information to obtain an error correction codeword.
[0061] Step 204: Store the error correction codeword into the memory.
[0062] In the embodiment of the present application, the data block may be a basic access unit of the memory, such as a cache line. That is, one error correction codeword protects one basic access unit of data block.
[0063] The above-mentioned known word string is the known data of the corresponding data block, which is used to perform error correction coding after being spliced with the data block to increase the length of the encoded data. The length of the known word string is the difference between the coding length required by the error correction coding and the length of the data block. Figure 1 In the scenario shown, the error correction coding requires a code length of 2 basic access units, while the length of the data block is 1 basic access unit. Therefore, the length of the known string is 1 basic access unit.
[0064] The above-mentioned error correction information is redundant information. During decoding, the error correction information should be used to correct the data block and the known word string. Since the known word string is known correct data and does not require error correction, only the data block needs to be corrected, which narrows the range of error codewords and can correct more additional error codewords, thereby enhancing the error correction capability of the error correction codeword.
[0065] For example, see Figure 3AAs shown, both data blocks user1 and user2 need to be written to persistent memory. For data block user1 corresponding to known string 1, the ECC encoder performs error correction encoding on known string 1 and user1 to obtain error correction information parity1. User1 and parity1 are then written together as an error correction codeword to persistent memory. For data block user2 corresponding to known string 2, the ECC encoder performs error correction encoding on known string 2 and user2 to obtain error correction information parity2. User2 and parity2 are then written together as an error correction codeword to persistent memory.
[0066] The above Figure 1 and Figure 3A By comparison, we can see that both of them write two data blocks and occupy the same amount of memory space, but Figure 1 is written in the form of an error correction code word, and Figure 3A It is written in the form of two error correction code words, and it can be guaranteed to be the same as Figure 1 The strong error correction capability of the same high code length and the memory access granularity are also the basic access unit, so even if the data is updated, there will be no read amplification or write amplification problems.
[0067] Therefore, when a data block is updated, error correction encoding is performed on the new data block and the corresponding known string to obtain new error correction information. The new data block and the new error correction information are then written to the same location in persistent memory, completing the update. The entire update process is read-write amplification-free. Accordingly, when some memory space is freed up, the physical addresses occupied by the cleared data blocks can be directly used to write new error correction codewords, eliminating the need to reassemble the data for error correction encoding.
[0068] At this point, the above is completed Figure 2 In the illustrated encoding process, a known string corresponding to the data block is introduced outside the data block for error correction encoding. This is then used to generate error correction information, increasing the length of the encoded data and ensuring the protection capability of the error correction codeword. The data block and the error correction information are then concatenated to generate the error correction codeword and written into memory. Because the known string is used for error correction encoding, the error correction codeword protects a data block while still ensuring the strong error correction capability of the long error correction codeword. Memory access granularity is reduced to a basic access unit. This overcomes read and write amplification issues when updating data blocks, mitigating the conflict between the length of the error correction codeword and memory access granularity.
[0069] In some embodiments of the present application, the process of obtaining the known string corresponding to the data block can be carried out by obtaining at least one attribute information of the data block and then splicing the obtained at least one attribute information to obtain the known string.
[0070] In this embodiment, the at least one attribute information obtained is a composition of a known string, which can be one or more of the logical address, physical address, identification information of a preset modulation method, private key information or custom information of the data block in the memory.
[0071] The logical address is provided by the application when writing data, while the physical address can be obtained by looking up the address mapping table. The preset modulation method is the modulation method of the encoded data designed for the error correction codeword, and its identification information is pre-set. The private key information and custom information are strings pre-set by the user. For example, all user data can use the same private key information and custom information. Therefore, all components of the known string are known data and can be obtained by obtaining the various attributes and splicing them together when needed, without the need to record the corresponding data blocks separately.
[0072] In some embodiments of the present application, the process of performing error correction encoding on the data block and the known word string to obtain error correction information can generate the data to be encoded based on the data block and the known word string, and then perform error correction encoding on the data to be encoded to obtain error correction information.
[0073] In this embodiment, the data to be encoded is generated by a data block and a known word string, which contains components of the data block and the known word string, and the length of the data to be encoded determines the length of the error correction information. Therefore, by using the known word string and the data block to generate the data to be encoded, the codeword requirement of high code length can be ensured to ensure strong error correction capability.
[0074] In a specific implementation, the data to be encoded may be input into an ECC encoder, and the ECC encoder may perform function conversion using the data to be encoded to obtain error correction information output.
[0075] Among them, the error correction coding process of the ECC encoder can be implemented using relevant technologies. Taking the error correction code word as LDPC (Low Density Parity Check Code) code as an example, in the ECC encoder, a preset generator matrix is used to perform an XOR operation with the data to be encoded, and then error correction information is output according to the operation result.
[0076] The above-mentioned generator matrix is a pre-designed matrix, and the matrix size is set according to the actual error correction requirements. Assume that the data to be encoded s = (c1, c2, c3), 3 bits, LDPC code C (s) = (c1, c2, c3, c4, c5, c6), where c4, c5, c6 are error correction information, 3 bits, the function conversion relationship is C (s) = sG, G is the generator matrix, and it can be concluded that the size of the generator matrix G is (3 * 6). The element values in the generator matrix are determined by the design formula of each error correction bit in the error correction information. The setting process of the generator matrix used for error correction coding can be implemented using related technologies, and this application does not specifically limit this.
[0077] In a specific embodiment, in the process of generating the data to be encoded based on the data block and the known word string, the data block and the known word string are spliced to obtain spliced data, and then the data belonging to the data block and the data belonging to the known word string in the spliced data are adjusted in position according to a preset modulation method to obtain the data to be encoded.
[0078] In this embodiment, the preset modulation method can pre-set a position mapping table to insert the various data contained in the known string into different positions of the data block, rather than simply splicing the data block and the known string into the data to be encoded. Therefore, by using the preset modulation method to generate the data to be encoded, it can play a role in enhancing encryption.
[0079] like Figure 3B As shown, the known string contains private key information A, custom information B and identification information C of the preset modulation mode. After the data position of the known string and the data block user is scrambled according to the position mapping table corresponding to the preset modulation mode, the data to be encoded is obtained. Figure 3B It can be seen that each bit of the private key information A, custom information B and identification information C in the known string is inserted into a different position of the data block.
[0080] In other embodiments of the present application, before generating the data to be encoded based on the data block and the known string, a cyclic redundancy check (CRC) signature of the data block can also be calculated, and the cyclic redundancy check signature of the data block can be saved for use in verifying whether the codeword is the codeword when written after error correction decoding.
[0081] In other embodiments of the present application, after the error correction code word is stored in the memory, if it is detected that the medium corresponding to the physical address of the data block is defective, the error correction code word corresponding to the physical address is read from the memory, and the currently available physical address in the memory is obtained, and then the error correction code word is written to the medium corresponding to the obtained physical address, and the obtained physical address is used to update the physical address of the data block in the address mapping table.
[0082] In this embodiment, the currently available physical address may be the physical address currently indicated by the write pointer in the memory, that is, the address currently allocated for use. By following the position of the write pointer to replace the defective medium, the reserved space can be released to expand the available capacity of the memory.
[0083] The address mapping table is stored in the memory controller and is used to manage memory usage. It records the mapping relationship between the logical address and the physical address of the memory space.
[0084] For example, Figure 3C As shown, when it is detected that the medium storing the data block user1 is defective, the error correction code word corresponding to user1 is read out, and the read error correction code word is written to the medium corresponding to the physical address indicated by the write pointer in the memory, and the address mapping table is updated with the physical address, thereby completing the replacement of the defective medium.
[0085] Example 2:
[0086] Figure 4 This is a flow chart of an embodiment of a memory decoding method according to an exemplary embodiment. The decoding process provided by the decoding method is the same as the above Figure 2 、 Figures 3A to 3C The encoding process shown corresponds to .
[0087] like Figure 4 As shown, the process includes the following steps 401 to 403:
[0088] Step 401: Read the error correction codeword to be decoded from the memory.
[0089] Step 402: Obtain a known string corresponding to the error correction codeword.
[0090] Step 403: Error correction decoding is performed on the error correction codeword based on the known word string to obtain an error-corrected data block.
[0091] In an embodiment of the present application, the error correction code word can be read according to the logical address provided by the application. Due to the interference of the memory storage channel, the error correction code word read from the memory may contain noise, so error correction decoding is required to obtain the same data block as when it was written.
[0092] According to the description of the known word string in the above embodiment, the known word string used in decoding is the known word string corresponding to the data block used in encoding, which belongs to known data, and the length of the known word string is the difference between the coding length required by the error correction coding and the length of the data block.
[0093] According to the aforementioned encoding process, the error correction information in the error correction codeword is generated based on the known word string and the data block. Therefore, the known word string is also required to participate in the error correction decoding.
[0094] like Figure 5A As shown, a noisy error correction codeword is read from persistent memory, including a data block portion useri and error correction information parity i. Then, a corresponding known string i is obtained. The known string i consists of several segments of custom data, such as the logical address, physical address, private key information, modulation method identification information, custom information, etc. of the data block to be read in the memory. The ECC decoder performs error correction decoding on the error correction codeword consisting of user i and parity i based on the known string i, and outputs the noise-free error correction codewords user i and parity i.
[0095] Based on the above-mentioned second embodiment, by introducing a known word string corresponding to the error correction codeword, the known word string and the error correction codeword are error-corrected and decoded together. Since the known word string is known data and is noise-free and correct data, during error correction decoding, it can play a role in strengthening the protection of the user data (i.e., data block) in the error correction codeword with the noise-free partial codeword. That is, it can narrow the range of error codewords and correct more additional error codewords, thereby enhancing the error correction capability of the error correction codeword. In addition, since the known word string is known to normal users but unknown to abnormal users, even if the abnormal user obtains the error correction codeword, it cannot be correctly decoded due to the lack of the known word string. Therefore, the known word string can enhance data security.
[0096] In some embodiments of the present application, the process of obtaining a known word string corresponding to the error correction code word can be performed by obtaining at least one attribute information of the error correction code word and then splicing the obtained at least one attribute information to obtain the known word string.
[0097] In this embodiment, the at least one attribute information includes one or more of the logical address, physical address, identification information of a preset modulation mode, private key information or user-defined information of the data block to be read in the memory.
[0098] The logical address is provided by the application when reading data, and the physical address can be obtained by looking up the address mapping table. For the explanation of the identification information, private key information, and custom information of the preset modulation method, please refer to the relevant description in the above encoding process embodiment, which will not be repeated here.
[0099] In some embodiments of the present application, for error correction decoding of the error correction code word based on the known word string to obtain the error-corrected data block, the process is carried out by splicing the data belonging to the data block portion in the error correction code word and the known word string to obtain spliced data, and according to a preset modulation method, the data belonging to the data block portion and the data belonging to the known word string in the spliced data are position-adjusted, and the position-adjusted spliced data is spliced with the error correction information belonging to the error correction portion in the error correction code word to obtain the data to be decoded, and then the error-corrected data block is obtained based on the data to be decoded.
[0100] In this embodiment, since the error correction codeword is written into memory after being concatenated with error correction information and a data block, the data belonging to the data block may be obtained in the read error correction codeword. This data may contain noise and require error correction. Since the error correction information in the error correction codeword is generated based on the data block and a known word string using a preset modulation method, the concatenated data of the data block and the known word string in the read error correction codeword also needs to be permuted using the preset modulation method before error correction decoding.
[0101] In some embodiments of the present application, in the process of obtaining an error-corrected data block based on the data to be decoded, error correction decoding is performed on the data to be decoded to obtain decoded data, and then data other than the error correction information is obtained from the decoded data as error-corrected spliced data, and the error-corrected data block is obtained from the error-corrected spliced data according to a demodulation method corresponding to a preset modulation method.
[0102] In a specific implementation, the data to be decoded may be input into an ECC decoder, and the ECC decoder uses a check matrix to perform error correction decoding on the data to be decoded and outputs decoded data.
[0103] Among them, the error correction decoding process of the ECC decoder can be implemented using relevant technologies. Taking the LDPC code as an example, in the ECC decoder, the check matrix is used to calculate the check vector with the data to be decoded. If the check vector is a zero vector, it is determined that the data to be decoded conforms to the check matrix, and no error correction is required. The data to be decoded can be directly used as the decoded data; otherwise, the suspected error data in the data to be decoded is located according to the position of the elements that are not 0 in the check vector, and the data that does not belong to the known string or error correction information in the suspected error data is set to 0 to obtain the modified data to be decoded, and then the check matrix and the check vector of the modified data to be decoded are calculated, and it is continued to be determined whether the check vector is a zero vector. If not, return to the process of locating the suspected error data in the data to be decoded according to the position of the elements that are not 0 in the check vector until the check vector is a zero vector, and the final modified data to be decoded is used as the decoded data after error correction.
[0104] It is worth noting that if the number of error correction iterations reaches the maximum number of iterations and the calculated check vector still does not meet the zero vector condition, the ECC decoder will output a notification of error correction failure.
[0105] The above check matrix is used to detect and correct errors in the decoded data. It corresponds one-to-one with the generator matrix used in the encoding process. The check matrix H and the generator matrix G satisfy GH T = 0. Therefore, the check matrix can also be regarded as a pre-designed matrix. Assuming that the data to be decoded is C(s), the calculation formula for calculating the check vector A with the check matrix is: A = HC T (s), that is, the check matrix is multiplied by the transpose of the data to be decoded.
[0106] The above-mentioned suspected error data refers to the code bits that may be erroneous in the data to be decoded, and the known word string is the deterministic correct data. The error correction information is also regarded as known data. Therefore, the code bits belonging to the known word string or error correction information are retained among these code bits, and the remaining code bits are set to 0. In this way, the known word string can be used to expand the error correction capability, narrow the range of erroneous code words, correct more additional erroneous code bits, accelerate the decoding convergence speed, and increase the error correction success rate.
[0107] For example, the data to be decoded C(s) = (c1, c2, c3, c4, c5, c6) has 6 bits, of which c4, c5, and c6 are error correction information, which has 3 bits. The size of the check matrix H is (3*6), so the check vector calculated by the check matrix and the data to be decoded has 3 bits, indicating that there are 3 corresponding check formulas.
[0108] Assume that the check matrix Through A=HC T After (s), the following three check equations are obtained (the addition between elements is modulo 2 addition, i.e., XOR):
[0109] c1⊕c2⊕c4=a1
[0110] c2⊕c3⊕c5=a2
[0111] c1⊕c2⊕c3⊕c6=a3
[0112] From the three check equations above, we can see that in check vector A, the value of element a1 is determined by code points c1, c2, and c4 in the data to be decoded; the value of element a2 is determined by code points c2, c3, and c5 in the data to be decoded; and the value of element a3 is determined by code points c1, c2, c3, and c6 in the data to be decoded. Therefore, if element a1 is not 0, the suspected erroneous data in the data to be decoded are c1, c2, and c4.
[0113] Based on the above example, it can be seen that for the check matrix, each row can correspond to an element in the check vector, and each column can correspond to a code bit in the data to be decoded. If there is an element that is not 0 in the calculated check vector, then the row corresponding to the non-zero element in the check matrix is located, and the code bit in the data to be decoded corresponding to the element with a value of 1 in the row is used as suspected error data.
[0114] like Figure 5B As shown, the elements ai and aj in the check vector calculated by the data to be decoded and the check matrix are not 0. The code bits corresponding to the elements with a value of 1 in the row corresponding to element ai in the check matrix are U and V. Code bit U belongs to the known string and remains unchanged. Code bit V is set to 0. The code bits corresponding to the elements with a value of 1 in the row corresponding to element aj in the check matrix are X, Y, and Z. Code bit X belongs to the known string and code bit Y belongs to error correction information. Both remain unchanged. Code bit Z is set to 0.
[0115] In other embodiments of the present application, after error correction decoding of the error correction code codeword based on the known word string to obtain the corrected data block, the cyclic redundancy check signature of the corrected data block can also be calculated, and the cyclic redundancy check signature is compared with the cyclic redundancy check signature saved during the encoding process. If the comparison is consistent, the decoding is determined to be successful; if the comparison is inconsistent, the decoding is determined to have failed.
[0116] In this embodiment, the data block after error correction only meets the check condition of the check matrix, but it does not mean that it is the data block when it was written. The cyclic redundancy check signature is calculated and compared with the saved cyclic redundancy check signature to determine that the data block after error correction is the data block when it was written.
[0117] Based on the above Figure 2 、 Figure 3A-3C and Figure 4 、 Figure 5A-5B The encoding and decoding processes of the memory shown, Figure 6 This is an overall processing flow chart of memory encoding and memory decoding according to an exemplary embodiment. On the write path, the data block to be written is encoded by a CRC encoder to generate a cyclic redundancy check signature, and the cyclic redundancy check signature is saved. The known word string of the data block and the data block are then input into the modulator for modulation to generate the data to be encoded. Finally, the data to be encoded is passed through an ECC encoder to generate an error correction code word, and the error correction code word is written to the persistent memory.
[0118] On the read path, the noisy error correction codeword is read from the persistent memory, and the error correction codeword and the corresponding known word string are input into the modulator for modulation to generate the data to be decoded. The data to be decoded is then corrected by the ECC decoder to generate the decoded data. The decoded data is then input into the demodulator for demodulation to generate the error-corrected data block. Finally, the error-corrected data block is cyclically redundancy checked by the CRC decoder and a notification of decoding success or failure is output.
[0119] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.
[0120] Corresponding to the aforementioned embodiment of the memory encoding method, the present application also provides an embodiment of the memory encoding device.
[0121] Figure 7 FIG. 1 is a schematic diagram of a memory encoding device according to an exemplary embodiment, wherein the device is used to execute the memory encoding method provided in any of the above embodiments, such as Figure 7 As shown, the memory encoding device includes:
[0122] An acquisition module 710 is configured to acquire a data block to be written and a known string corresponding to the data block;
[0123] an encoding module 720, configured to perform error correction encoding on the data block and the known word string to obtain the error correction information;
[0124] The writing module 730 is configured to concatenate the data block and the error correction information to obtain an error correction code word, and store the error correction code word into a memory.
[0125] In an optional implementation, the acquisition module 710 is specifically used to obtain at least one attribute information of the data block in the process of obtaining a known string corresponding to the data block; the at least one attribute information includes one or more of the logical address, physical address, identification information of a preset modulation method, private key information or custom information of the data block in the memory; the at least one attribute information is spliced to obtain a known string; wherein the length of the known string is the difference between the coding length required by the error correction coding and the length of the data block.
[0126] In an optional implementation, the encoding module 720 is specifically configured to generate data to be encoded based on the data block and the known word string; and perform error correction encoding on the data to be encoded to obtain the error correction information.
[0127] In an optional implementation, the encoding module 720 is specifically used to splice the data block and the known word string to obtain spliced data in the process of generating the data to be encoded based on the data block and the known word string; and adjust the position of the data belonging to the data block and the data belonging to the known word string in the spliced data according to a preset modulation method to obtain the data to be encoded.
[0128] In an optional implementation, the device further includes ( Figure 7 Not shown):
[0129] The verification module is used to calculate the cyclic redundancy check signature of the data block before the encoding module 720 generates the data to be encoded based on the data block and the known string; and save the cyclic redundancy check signature of the data block.
[0130] In an optional implementation, the device further includes ( Figure 7 Not shown):
[0131] A medium replacement module is used to read the error correction code word corresponding to the physical address from the memory after the write module 730 stores the error correction code word into the memory, if it is detected that the medium corresponding to the physical address of the data block is defective; obtain the currently available physical address in the memory; write the error correction code word to the medium corresponding to the obtained physical address, and use the obtained physical address to update the physical address of the data block in the address mapping table.
[0132] Corresponding to the aforementioned embodiment of the memory decoding method, the present application also provides an embodiment of a memory decoding device.
[0133] Figure 8 FIG. 1 is a schematic diagram showing a structure of a memory decoding device according to an exemplary embodiment, wherein the device is used to execute the memory decoding method provided in any of the above embodiments, such as Figure 8 As shown, the memory decoding device includes:
[0134] The codeword reading module 810 is used to read the error correction codeword to be decoded from the memory;
[0135] An acquisition module 820 is configured to acquire a known word string corresponding to the error correction code word;
[0136] The decoding module 830 is configured to perform error correction decoding on the error correction codeword based on the known word string to obtain an error-corrected data block.
[0137] In an optional implementation, the acquisition module 820 is specifically used to obtain at least one attribute information of the error correction code codeword; the at least one attribute information includes one or more of the logical address, physical address, identification information of the preset modulation method, private key information or user-defined information of the data block to be read in the memory; the at least one attribute information is spliced to obtain a known string; wherein the length of the known string is the difference between the coding length required by the error correction code and the length of the data block to be read.
[0138] In an optional implementation, the decoding module 830 is specifically configured to splice the data belonging to the data block portion in the error correction code codeword and the known word string to obtain spliced data; adjust the positions of the data belonging to the data block portion and the data belonging to the known word string in the spliced data according to a preset modulation method; splice the position-adjusted spliced data with the error correction information belonging to the error correction portion in the error correction code codeword to obtain data to be decoded; and obtain a corrected data block based on the data to be decoded.
[0139] In an optional implementation, the decoding module 830 is specifically configured to, in the process of obtaining an error-corrected data block based on the data to be decoded, perform error correction decoding on the data to be decoded to obtain decoded data; obtain data other than the error correction information from the decoded data as error-corrected spliced data; and obtain an error-corrected data block from the error-corrected spliced data according to a demodulation method corresponding to the preset modulation method.
[0140] In an optional implementation, the device further includes ( Figure 8 Not shown):
[0141] a verification module configured to calculate a cyclic redundancy check signature of the corrected data block after the decoding module 830 performs error correction decoding on the error correction codeword based on the known word string; determine that the decoding is successful if the cyclic redundancy check signature is consistent with the cyclic redundancy check signature saved during the encoding process; and determine that the decoding fails if the cyclic redundancy check signature is inconsistent with the cyclic redundancy check signature saved during the encoding process.
[0142] The implementation process of the functions and effects of each unit in the above-mentioned device is specifically described in the implementation process of the corresponding steps in the above-mentioned method, and will not be repeated here.
[0143] For the device embodiments, since they basically correspond to the method embodiments, the relevant parts can be referred to the partial description of the method embodiments. The device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present application scheme. A person of ordinary skill in the art can understand and implement it without paying any creative work.
[0144] The embodiments of the present application further provide an electronic device corresponding to the memory encoding and decoding method provided in the aforementioned embodiments, so as to execute the aforementioned memory encoding and decoding method.
[0145] Figure 9 This is a hardware structure diagram of an electronic device according to an exemplary embodiment. The electronic device includes: a communication interface 601, a processor 602, a memory 603, and a bus 604. The communication interface 601, the processor 602, and the memory 603 communicate with each other via the bus 604. The processor 602 can execute the memory encoding and decoding method described above by reading and executing machine-executable instructions corresponding to the control logic of the memory encoding and decoding method in the memory 603. The details of this method are described in the above embodiments and will not be repeated here.
[0146] The memory 603 mentioned in this application can be any electronic, magnetic, optical or other physical storage device, which can contain stored information, such as executable instructions, data, etc. Specifically, the memory 603 can be RAM (Random Access Memory), flash memory, a storage drive (such as a hard disk drive), any type of storage disk (such as an optical disk, DVD, etc.), or a similar storage medium, or a combination thereof. The communication connection between the system network element and at least one other network element is realized through at least one communication interface 601 (which can be wired or wireless), and the Internet, wide area network, local area network, metropolitan area network, etc. can be used.
[0147] The bus 604 may be an ISA bus, a PCI bus, or an EISA bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc. The memory 603 is used to store programs, and the processor 602 executes the programs after receiving an execution instruction.
[0148] The processor 602 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by an integrated logic circuit of the hardware in the processor 602 or an instruction in the form of software. The above-mentioned processor 602 can be a general-purpose processor, including a network processor (NP), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The various methods, steps and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in conjunction with the embodiments of the present application can be directly embodied as a hardware decoding processor for execution, or can be completed by a combination of hardware and software modules in the decoding processor.
[0149] The electronic device provided in the embodiment of the present application and the memory encoding and decoding method provided in the embodiment of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, operated or implemented therein.
[0150] The present application also provides a computer-readable storage medium corresponding to the memory encoding and decoding method provided in the above embodiment. Figure 10 As shown, the computer-readable storage medium is a CD 30 on which a computer program (ie, a program product) is stored. When the computer program is run by a processor, the memory encoding and decoding method provided by any of the aforementioned embodiments is executed.
[0151] It should be noted that examples of the computer-readable storage medium may also include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other optical or magnetic storage media, which are not listed here one by one.
[0152] The computer-readable storage medium provided in the above-mentioned embodiments of the present application and the memory encoding and decoding method provided in the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented by the application programs stored therein.
[0153] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present application are indicated by the following claims.
[0154] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.
[0155] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.
Claims
1. A memory encoding method, characterized in that: The method comprises: Obtaining a data block to be written and a known string corresponding to the data block; performing error correction coding on the data block and the known word string to obtain error correction information; splicing the data block and the error correction information to obtain an error correction codeword; The error correction code word is stored in a memory.
2. The method according to claim 1, characterized in that Obtaining a known string corresponding to the data block, including: Acquire at least one attribute information of the data block; the at least one attribute information includes one or more of a logical address, a physical address, identification information of a preset modulation mode, private key information, or custom information of the data block in a memory; splicing the at least one attribute information to obtain a known string; The length of the known word string is the difference between the coding length required by the error correction coding and the length of the data block.
3. The method according to claim 1, characterized in that The performing error correction coding on the data block and the known word string to obtain error correction information includes: generating data to be encoded based on the data block and the known string; Error correction coding is performed on the data to be encoded to obtain the error correction information.
4. The method according to claim 3, characterized in that The generating the data to be encoded based on the data block and the known string includes: splicing the data block and the known string to obtain spliced data; According to a preset modulation mode, the positions of the data belonging to the data block and the data belonging to the known word string in the spliced data are adjusted to obtain data to be encoded.
5. The method according to claim 3, characterized in that Before generating the data to be encoded based on the data block and the known string, the method further includes: Calculating a cyclic redundancy check signature for the data block; A cyclic redundancy check signature of the data block is saved.
6. The method according to any one of claims 1 to 5, characterized in that After storing the error correction codeword into the memory, the method further includes: When detecting that the medium corresponding to the physical address of the data block is defective, reading the error correction codeword corresponding to the physical address from the memory; Obtaining a currently available physical address in the memory; The error correction codeword is written into a medium corresponding to the obtained physical address, and the physical address of the data block in the address mapping table is updated using the obtained physical address.
7. A memory decoding method, characterized in that: The method further comprises: Read the error correction codeword to be decoded from the memory; Obtaining a known word string corresponding to the error correction code word; The error correction codeword is subjected to error correction decoding based on the known word string to obtain an error-corrected data block.
8. The method according to claim 7, characterized in that The obtaining of a known word string corresponding to the error correction codeword includes: Obtain at least one attribute information of the error correction codeword; the at least one attribute information includes one or more of a logical address, a physical address, identification information of a preset modulation mode, private key information, or user-defined information of the data block to be read in the memory; splicing the at least one attribute information to obtain a known string; The length of the known word string is the difference between the coding length required by the error correction coding and the length of the data block to be read.
9. The method according to claim 7, characterized in that The step of performing error correction decoding on the error correction codeword based on the known word string to obtain an error-corrected data block includes: splicing the data belonging to the data block portion in the error correction code word and the known word string to obtain spliced data; Adjusting the positions of the data belonging to the data block portion and the data belonging to the known word string in the spliced data according to a preset modulation mode; splicing the position-adjusted spliced data with the error correction information belonging to the error correction part of the error correction codeword to obtain data to be decoded; Obtain an error-corrected data block according to the data to be decoded.
10. The method according to claim 9, characterized in that The step of obtaining an error-corrected data block according to the to-be-decoded data includes: Performing error correction decoding on the data to be decoded to obtain decoded data; Acquire data other than the error correction information from the decoded data as error-corrected spliced data; According to a demodulation mode corresponding to the preset modulation mode, an error-corrected data block is obtained from the error-corrected spliced data.
11. The method according to any one of claims 7 to 10, characterized in that: After performing error correction decoding on the error correction codeword based on the known word string, the method further includes: Calculate the cyclic redundancy check signature of the error-corrected data block; If the cyclic redundancy check signature is consistent with the cyclic redundancy check signature saved during the encoding process, determining that the decoding is successful; In a case where the cyclic redundancy check signature is inconsistent with the cyclic redundancy check signature stored during the encoding process, it is determined that decoding has failed.
12. A memory encoding device, characterized in that: The device comprises: An acquisition module, configured to acquire a data block to be written and a known string corresponding to the data block; an encoding module, configured to perform error correction encoding on the data block and the known word string to obtain the error correction information; The writing module is used to splice the data block and the error correction information to obtain an error correction code word, and store the error correction code word into a memory.
13. A memory decoding device, characterized in that: The device comprises: A codeword reading module, used for reading the error correction codeword to be decoded from the memory; An acquisition module, configured to acquire a known word string corresponding to the error correction code word; A decoding module is used to perform error correction decoding on the error correction codeword based on the known word string to obtain an error-corrected data block.
14. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: The processor executes the program to implement the method according to any one of claims 1 to 11.
15. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the method according to any one of claims 1 to 11.