Capacitive element driver and method for driving capacitive element

Abstract

The invention relates to a capacitive element driver and a method for driving a capacitive element. A circuit for driving an output of a capacitive element between two voltage levels has at least one driver unit having a first pair of switches connected in series between a first voltage source terminal and the capacitive element and a second pair of switches connected in series between a second voltage source terminal and the capacitive element. One or more non-dissipative elements may be connected between a first common node of the first switch pair and a second common node of the second switch pair. A combination of driver cell switches is sequentially activated and deactivated to provide a stepwise transfer of energy to the capacitive element, subtracted from, bypassed to the input voltage, and added to the input voltage. The switching stages that achieve the high voltage output may be the same as the switching stages that achieve the low voltage output, but are organized in an opposite order.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is a continuation-in-part of U.S. patent application Ser. No. 18 / 090,469, filed on December 28, 2022, entitled “ARRANGEMENTS OF NON-DISSIPATIVE ELEMENTS IN NON-DISSIPATIVE ELEMENT-ENABLED CAPACITIVE ELEMENT DRIVERS” (Attorney Docket No. N03-P01-05US), which is a continuation-in-part of U.S. patent application Ser. No. 17 / 032,409, filed on September 25, 2020, entitled “IMPROVEMENTS IN NON-DISSIPATIVE ELEMENT-ENABLED CAPACITIVE ELEMENT DRIVING,” which published on February 7, 2023 as U.S. Patent No. 11,575,376 (Attorney Docket No. N03-P01-04US). This application claims the following priority:

[0003] U.S. patent application No. 62 / 907,530, entitled “IMPROVEMENTS IN NON-DISSIPATIVE ELEMENT-ENABLED CAPACITIVE ELEMENT DRIVING,” filed on September 27, 2019 (Attorney Docket No. N03-P01-00US);

[0004] U.S. patent application No. 63 / 075,083, entitled “IMPROVEMENTS IN NON-DISSIPATIVE ELEMENT-ENABLED CAPACITIVE ELEMENT DRIVING,” filed on September 4, 2020 (Attorney Docket No. N03-P01-01US);

[0005] U.S. patent application No. 63 / 082,556, entitled “IMPROVEMENTS IN NON-DISSIPATIVE ELEMENT-ENABLED CAPACITIVE ELEMENT DRIVING,” filed on September 24, 2020 (Attorney Docket No. N03-P01-03US);

[0006] U.S. Patent Application No. 17 / 032,409, entitled “IMPROVEMENTS IN NON-DISSIPATIVE ELEMENT-ENABLED CAPACITIVE ELEMENT DRIVING,” filed on September 25, 2020 (Attorney Docket No. N03-P01-04US), which issued on February 7, 2023 as U.S. Patent No. 11,575,376; and

[0007] U.S. patent application Ser. No. 18 / 090,469, filed on December 28, 2022, entitled “ARRANGEMENTS OF NON-DISSIPATIVE ELEMENTS IN NON-DISSIPATIVE ELEMENT-ENABLED CAPACITIVE ELEMENT DRIVERS” (Attorney Docket No. N03-P01-05US);

[0008] The disclosures of all five of these patents are incorporated by reference in their entirety. Technical Field

[0009] The present invention relates to the field of circuits, and in particular to circuits and systems for capacitive driving. Background Art

[0010] The present invention relates to a method and system for driving the voltage of a capacitive element between two voltage levels (eg, ground voltage and power supply voltage). Non-dissipative elements such as capacitors can be used to improve the energy efficiency of driving the capacitive element.

[0011] Control of an electronic or electrical device is typically performed by applying a voltage to its control terminal, for example, to activate or deactivate the device. The control terminal can be the control gate of any type of transistor, including but not limited to a metal oxide semiconductor field effect transistor (MOSFET), a gallium nitride field effect transistor (GaN-FET), a silicon carbide field effect transistor (SiC-FET), a junction field effect transistor (JFET), or an insulated gate bipolar transistor (IGBT). The control terminal can also be the control input of another electronic or electrical device, including but not limited to an electrostatic actuator or other systems such as micromotors, micromirrors, and microswitches based on microelectromechanical systems (MEMS) technology, memories and logic circuits based on multiferroic / magnetoelectric materials, ultrasonic transducers, piezoelectric actuators, electronic paper displays (E-paper), and actuators based on electroactive polymers.

[0012] In electronic or electrical systems where devices have control terminals with capacitive elements, drivers (also referred to herein as drive circuits) are used to drive the voltage of those control terminals between two voltage levels to activate or deactivate those devices. Systems that employ drivers include switch-mode power converters, motor drives, electrostatic actuators, electroactive polymer actuators, and multiferroic / magnetoelectric devices. Periodic switching helps maintain the average voltage of these storage capacitors at a constant level.

[0013] In the conventional method of driving capacitor elements, such as Figure 1A The circuit 100 shown utilizes Figure 1B The operation of the circuit 100 shown in the waveforms may have two switches SW 1[1] , SW 1[2] , where the switch SW 1[1] Connected to the capacitor element C O1 and voltage source V DD1 between one terminal and the switch SW 1[2] Connected to the capacitor element C O1 and voltage source V DD1 between the other terminal, which is alternately turned on and off to switch between two levels (for example, 0V and V DD1 ) between the driving capacitor element C O1 However, this driving method is not energy-efficient.

[0014] Figure 1B The waveforms illustrate the operation of the circuit 100, wherein when the capacitor element voltage (V O1 ) is driven from ground (or power supply voltage) to the power supply voltage (or ground) of the driving circuit, a transient current flows through the switch SW 1[1] (or SW 1[2] ), until the voltage V O1 Stable. Then the energy E CAP1 = 1 / 2C O1 V DD1 2 Stored in capacitor element C O1 (or from the capacitor element C O1 When the transient current I SW1[1] (or I SW1[2] ) flows through switch SW 1[1] (or SW 1[2] ), a voltage difference appears across the switch and energy is absorbed. Switch SW 1[1] (or SW 1[2] ) is a dissipative element that absorbs the energy E DISS1 = 1 / 2C O1 V DD12 is dissipated. Energy loss per drive cycle (E LOSS1 ) is CV DD1 2 .

[0015] One way to avoid energy dissipation in the circuit 100 is to introduce a resonant capacitor element driver, where an inductor is added to the input of the capacitor element and the capacitor element is periodically driven between two voltage levels. A circuit 200 for resonant capacitor element driving is shown in FIG. Figure 2A , wherein the operation of the circuit 200 is Figure 2B The waveform is shown in FIG.

[0016] like Figure 2A As shown, the switch SW 2[1] and SW 2[2] In series with the voltage source V DD2 Between the terminals of the diode D 2[1] and D 2[4] Also connected in series with the voltage source V DD2 between the terminals of the diode D 2[3] and D 2[2] Also connected in series with the voltage source V DD2 Between the terminals of the switch SW 2[1] , diode D 2[4] and diode D 2[2] share a common node 202, which is electrically connected to a voltage source V DD2 The positive terminal of the switch SW 2[1] , diode D 2[1] and diode D 2[3] share a common node 204, which is electrically connected to a voltage source V DD2 The negative terminal of the switch SW 2[1] , SW 2[2] , diode D 2[4] and diode D 2[1] The inductor L2 can be provided at the common node 206 and connected to the diode D 2[2] and D2[3] and the capacitance element C O2 shared common nodes 208 between them.

[0017] In operation, the circuit 200 converts the energy E DISS2 The use of a non-dissipative element such as inductor L2 in circuit 200 allows energy to be stored in the non-dissipative element rather than dissipated as heat in a resistive element. 2[1] and D 2[2] (or D 2[3] and D 2[4]) The capacitor voltage V O2The power supply voltage V driven from ground to the driver circuit DD2 (or from the power supply voltage V DD2 Driven to ground) after the stored energy E DISS2 Return voltage source V DD2 .

[0018] Therefore, including inductor L2 in circuit 200 reduces the energy E stored in the non-dissipative components. CAP2 = 1 / 2C O2 V DD2 2 dissipation, thereby making the circuit 200 more energy-efficient. However, at V O2 There is a trade-off between the ramp rate and the peak inductor current. The inductor L2 and the capacitor C O2 The resonant network is formed, and its resonant period and characteristic impedance are proportional to the square root of L2. O2 The ramp rate allows for the use of an inductor with a smaller value than inductor L2, but replacing it with circuit 200 also introduces a higher peak inductor current. Furthermore, including an additional component (inductor L2) in circuit 200 introduces additional current and, therefore, conduction losses due to resonant behavior, making circuit 200 bulky and expensive.

[0019] Networks with capacitors and inductors can also be used as resonant capacitive element drivers in circuits to avoid dissipating energy. Figure 3A A circuit 300 for driving a resonant capacitor element using an LC network is shown in FIG. Figure 3B The waveform is shown in FIG.

[0020] like Figure 3A As shown, an inductor and capacitor (LC) network LC3 is inserted between the switch SW 3[1] and SW 3[2] between the common node 310 and the ground. Once the voltage V O3 From the power supply voltage V DD3 Change to ground, energy E CAP3 The capacitance element C O3 Transfer to LC network LC3; when the voltage V O3 When the voltage changes from ground to the power supply voltage of the driving circuit, the current is transferred from the LC network LC3 back to the capacitor element C O3 .

[0021] As with circuit 200, the incorporation of the LC network LC3 into circuit 300 makes circuit 300 more energy efficient because it prevents the storage of O3 The energy E CAP3 = 1 / 2C O3 V DD32 dissipation, but there is still V O2 Furthermore, the additional component (LC network LC3) still introduces additional current into circuit 300 and thus conduction losses due to resonant behavior, making circuit 300 even bulkier and more expensive than circuit 200.

[0022] This application claims priority to U.S. Patent No. 11,575,376 (Agent Docket No. N03-P01-04US), entitled “IMPROVEMENTS IN NON-DISSIPATIVEELEMENT-ENABLED CAPACITIVE ELEMENT DRIVING,” issued on February 7, 2023, which discloses a capacitive element driver for driving a capacitive element between voltage levels, wherein the capacitive element has a capacitive function and wherein a voltage source supplies voltage to the capacitive element driver.

[0023] U.S. Patent 11,575,376 discloses that the capacitor element driver has a plurality of switches, wherein a first switch is electrically connected in series directly or indirectly between a first terminal of the voltage source and an input terminal of the capacitor element, and a second switch is electrically connected in series directly or indirectly between a second terminal of the voltage source and an input terminal of the capacitor element. The capacitor element driver also has a non-dissipative element that is arranged to store and transfer energy for driving the capacitor element between voltage levels. The non-dissipative element may be electrically connected at a first end directly or indirectly to a first node between a first terminal of the voltage source and an input terminal of the capacitor element, and may be electrically connected at a second end directly or indirectly to a second node between a second terminal of the voltage source and an input terminal of the capacitor element. The plurality of switches are arranged to be opened or closed in combination in a switching stage sequence to gradually transfer energy to the capacitor element. In U.S. Patent 11,575,376, a selected sequence of voltages for driving a capacitor element between two voltage levels is described, wherein the sequence of switching stages further includes a switching pattern having a voltage variation portion arranged to cause a change in the output voltage of the capacitor element driver during the period during which the voltage variation portion is applied to the capacitor element driver.

[0024] It is desirable to improve switching sequences used in methods, circuits, devices, and systems for sequential operation of switching non-dissipative elements in a capacitor element drive system. It is desirable to define sequenced switching in a capacitor element driver so that sequential operation of non-dissipative elements in the capacitor element driver is simpler, more convenient, and more energy-efficient for driving a capacitor element that simply and efficiently stores energy in at least one non-dissipative element that transfers energy to drive the capacitor element between two voltage levels, and the capacitor element can transfer energy in a series of steps. In addition, it may be desirable to develop simple, convenient, and energy-efficient methods, circuits, and systems for driving a capacitor element, wherein the non-dissipative elements are operated sequentially. It is also desirable to have a selectable switching sequence for operating the non-dissipative elements in the capacitor element driver, wherein the switching sequence is selected based on the desired operating mode of the capacitor element driver. Summary of the Invention

[0025] Disclosed are methods, circuits, and systems for driving the voltage of a capacitive element between two voltage levels, such as ground and a power supply voltage, wherein a capacitive element driver, also referred to as a driver or circuit, simply and efficiently stores energy in at least one non-dissipative element, transfers the energy to drive the capacitive element between the two voltage levels, and can transfer the energy in a series of steps by operating a stage sequence of the at least one non-dissipative element, alternately turning switches on and off in a sequence order to drive the voltage of the capacitive element in a stepwise manner between the two levels.

[0026] The capacitive element driver may include a first switch electrically connected between an input terminal of the capacitive element and a negative terminal of a voltage source, and a last switch electrically connected between an input terminal of the capacitive element and a positive terminal of the voltage source. In some embodiments, one or more non-dissipative elements may be connected in series between the terminals of the voltage source, and one end of two or more switches may be connected to the input of the capacitive element. The other end of the first switch may be electrically connected to a common node between the negative terminal of the voltage source and the first non-dissipative element, while the other end of the last switch may be electrically connected to a common node between the positive terminal of the voltage source and the last non-dissipative element.

[0027] Furthermore, the driver may have one or more driver units arranged to provide a stepwise transfer of energy by operation of their own stage sequence, such that the switches in the units are opened and closed in combination in sequences of switching stages to shift the output voltage of the capacitive element driver between two voltage levels while keeping the average voltage level value of the non-dissipative element constant over time.

[0028] In certain embodiments, switching may be applied to the capacitive element driver to reduce energy losses when the capacitive element is driven from one voltage to another by activating and deactivating selected switches of a plurality of switches.

[0029] In another embodiment, switches can be applied to the capacitive element driver by activating and deactivating selected switches in a sequence of switching stages defined to ensure that the average value of the storage capacitor voltage remains constant over time. The switching sequence can be further defined to form a capacitive element voltage drive cycle such that the combined operation of the switch activations maintains the average value of the storage capacitor(s) voltage constant over time.

[0030] In certain embodiments, a capacitive element driver for driving a capacitive element between voltage levels is disclosed, wherein the capacitive element is an element having a capacitive function, and the capacitive element driver is configured to drive the capacitive element from a high voltage level to a low voltage level, or from a low voltage level to a high voltage level. The capacitive element driver may have a plurality of switches, wherein a first pair of switches may be electrically connected in series between a first input terminal of the capacitive element driver and an output terminal of the capacitive element driver, the first input terminal of the capacitive element driver may be electrically connected directly or indirectly to a first terminal of a voltage source for providing a selected voltage to the capacitive element driver, and the output terminal of the capacitive element driver may be electrically connected directly or indirectly to an input of the capacitive element.

[0031] The plurality of switches may further include a second pair of switches electrically connectable in series between a second terminal of the voltage source and an output terminal of the capacitive element driver; and a non-dissipative element configured to store and transfer energy to drive the capacitive element between voltage levels, wherein the non-dissipative element may be electrically connectable between a common node of the first pair of switches and a common node of the second pair of switches. The plurality of switches may be configured to open and close in combination during a sequence of switching stages to maintain an average voltage level of the non-dissipative element constant over time.

[0032] In further embodiments, the controller may be electrically connected to the plurality of switches to control the operation of the switches to open and close in combination in a sequence of switching stages configured to provide a gradual transfer of energy to the capacitive element, and the capacitive element driver may be configured to drive the capacitive element from a high voltage level to a low voltage level, or from a low voltage level to a high voltage level.

[0033] In other embodiments, the capacitive element driver may be a first driver unit in a capacitive element driving circuit, which may have a second driver unit electrically connectable between the first driver unit and the capacitive element. The second driver unit may have a second unit first input terminal electrically connectable to the first unit output terminal, a second unit output terminal electrically connectable directly or indirectly to the capacitive element, and a second plurality of switches including a second unit first pair of switches electrically connectable in series between the second unit first input terminal and the second unit output terminal, and a second unit second pair of switches electrically connectable in series between the first unit output terminal and the second unit output terminal. The second driver unit may also have a second non-dissipative element for storing and transferring additional energy used to drive the capacitive element between two voltage levels, wherein the second non-dissipative element may be electrically connectable between a common node of the second unit first pair of switches and a common node of the second unit second pair of switches.

[0034] In a further embodiment, the switching stage sequence is a first stage sequence; and the second plurality of switches are configured to open or close in combination in a second switching stage sequence to maintain an average voltage level value of the second non-dissipative element constant over time.

[0035] In another embodiment, a circuit-wide switching sequence for providing a stepwise transfer of energy to a capacitive element is disclosed, wherein a first plurality of switches and a second plurality of switches are selectively opened or closed to drive the capacitive element from a high voltage level to a low voltage level or from a low voltage level to a high voltage level. A controller may also be electrically connected to the second plurality of switches to control the opening or closing of the second plurality of switches based on the circuit-wide switching sequence.

[0036] In other embodiments, methods and systems for driving the voltage of a capacitive element between two voltage levels, such as ground and a power supply voltage, are disclosed. In the disclosed methods and systems, a first pair of multiple switches may be connected in series between a first terminal of a voltage source and an input of the capacitive element; and a second pair of multiple switches may be connected in series between a second terminal of the voltage source and the input of the capacitive element. In addition, a non-dissipative element, such as a storage capacitor, may be configured to store and transfer energy when the capacitive element is driven between the two voltage levels, wherein the non-dissipative element is connected between a common node of the first pair of switches and a common node of the second pair of switches.

[0037] In other embodiments, a process for driving a capacitive element between two voltage levels is disclosed, wherein a first input terminal of a first capacitive element driver can be electrically connected directly or indirectly to a first terminal of a voltage source, an output terminal of the first capacitive element driver can be electrically connected directly or indirectly to an input of the capacitive element, and a second input terminal of the first capacitive element driver can be electrically connected directly or indirectly to a second terminal of the voltage source.

[0038] In further embodiments, in a process for driving a capacitive element between two voltage levels, an average voltage level value of the non-dissipative element may remain constant over time as a first capacitive element driver operates through a first stage sequence.

[0039] The additional energy can be stored in a non-dissipative element of a first capacitive element driver, wherein the non-dissipative element is electrically connected between the first input terminal and the output terminal, and electrically connected between the second input terminal and the output terminal. The first capacitive element driver can operate through a first stage sequence, wherein the first sequence is configured to transfer energy in a first set of voltage steps from a first high voltage level to a first low voltage level or from a first low voltage level to a first high voltage level directly or indirectly to the capacitive element. In a further embodiment, in a process for driving the capacitive element between two voltage levels, when the first capacitive element driver operates through the first stage sequence, an average voltage level value of the non-dissipative element can remain constant over time.

[0040] In other embodiments, the first capacitive element driver may be a first driver unit, and the second driver unit may be electrically connected between the first driver unit and the capacitive element. The second driver unit may have:

[0041] a first input terminal of the second unit, electrically connected directly or indirectly to a first terminal of a voltage source via the first driver unit,

[0042] The second unit output terminal is directly or indirectly electrically connected to the input of the capacitive element,

[0043] a second input terminal of the second unit electrically connected directly or indirectly to a second terminal of the voltage source via the first driver unit, and

[0044] A non-dissipative element electrically connected between the second cell first input terminal and the second cell output terminal, and between the second cell second input terminal and the second cell output terminal.

[0045] Additional energy can be stored in the non-dissipative element of the second capacitive element driver, and the second driver unit can be operated through the second stage sequence to transfer the additional energy in the second set of voltage steps from the second high voltage level to the second low voltage level or from the second low voltage level to the second high voltage level directly or indirectly to the capacitive element. Furthermore, when the first driver unit is operated through the first stage sequence, the second driver unit can be combined and cooperatively operated with the first driver unit through the second stage sequence, the cooperation also including maintaining application of the first portion of the first activation mode of the first driver unit during application of the second activation mode of the second driver unit.

[0046] The disclosed devices, methods, and systems improve the energy efficiency of driving capacitive elements because they allow non-dissipative elements to store and transfer energy when the capacitive elements are driven between two voltage levels. In other embodiments, energy efficiency is further improved by a switching method in which, during a drive cycle, selected switches are activated and deactivated in a sequence of switching stages defined to maintain the average value of the voltage across the non-dissipative elements constant over time.

[0047] Therefore, the disclosed non-dissipative element enables the capacitive element to drive E LOSS The non-dissipative element(s) used in the disclosed apparatus, methods, and systems (in certain embodiments, the storage capacitor(s) and the switch(es)) are relatively area-efficient and inexpensive compared to the inductors used in conventional resonant capacitive element drivers.

[0048] Additional purposes and advantages of the present invention will be explained in part in the following description, and in part will be obvious from the description, or can be understood through practice of the present invention. The purposes and advantages of the present invention will be realized and obtained by the elements and combinations particularly pointed out in the appended claims.

[0049] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.

[0050] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate one or more embodiments of the present invention and, together with the description, serve to explain the principles of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1A is a diagram of a conventional circuit 100 for driving the voltage of a capacitive element between two voltage levels, such as ground and a power supply voltage, and Figure 1B is a diagram illustrating waveforms associated with the operation of circuit 100;

[0052] Figure 2A is a circuit diagram of a conventional circuit 200 for driving a resonant capacitor element between two voltage levels, and Figure 2B is a diagram illustrating waveforms associated with the operation of circuit 200;

[0053] Figure 3A is a circuit diagram of a conventional circuit 300 using an inductor and capacitor (LC) network LC3 for driving a capacitive element between two voltage levels, and Figure 3B is a diagram illustrating waveforms associated with the operation of circuit 300;

[0054] Figure 4 FIG. 4 is a circuit diagram of a capacitive element driver 400 according to an embodiment of a storage capacitor-enabled capacitive element driver of the present invention;

[0055] Figures 5A to 5F is shown by switching method 500 through the complete V O4 A circuit diagram of a capacitive element driver 400 for driving a cycle operation;

[0056] Figure 5G is shown in the full V O4 a diagram of a switching sequence in a switching method 500 for a capacitive element driver 400 during a stage of a drive cycle;

[0057] Figure 5H Is in full V O4 During the drive cycle, when the switch SW 4[3] , SW 4[1] Close (and switch SW 4[0] , SW 4[2] A circuit diagram of a capacitive element driver 400 operating when the capacitor is kept disconnected;

[0058] Figure 5I Is in full V O4 During the drive cycle, when the switch SW 4[0] , SW 4[2] Close (and switch SW 4[3] , SW 4[1] A circuit diagram of a capacitive element driver 400 operating when the capacitor is kept disconnected;

[0059] Figure 6A is shown in the complete V O4 The voltage V input to the capacitor 430 during the driving cycle O4 A graph 600 of a waveform 602;

[0060] Figure 6B is shown with more detailed y-axis labeling Figure 6A A graph 650 of waveform 602;

[0061] Figure 7A is a circuit diagram of a capacitive element driver 700A constituting a more generalized embodiment of the driver 400, wherein more than one non-dissipative element (NDE) is electrically connected in series, wherein one terminal of a first NDE in the series is electrically connected to one terminal of the voltage source at a first node, wherein one terminal of a last NDE in the series is electrically connected to another terminal of the voltage source at a last node, and wherein a switch SW 7A[0] and SW 7A[n+2]are respectively arranged between the first node and the negative terminal of the voltage source and between the last node and the positive terminal of the voltage source;

[0062] Figure 7B is a circuit diagram of a capacitive element driver 780, which is a three NDE embodiment of driver 700A;

[0063] Figure 7C-1 is a circuit diagram of the capacitor element driver 700C-1, which closes or removes its switch SW 7A[0] and SW 7A[n+2] Modification of the driver 700A;

[0064] Figure 7C-2 is a circuit diagram of a capacitive element driver 700C-2, which is a three NDE embodiment of the driver 700C-1;

[0065] Figure 7D and Figure 7E is a circuit diagram of another embodiment of a driver 700A, wherein the NDEs are electrically connected in parallel, one terminal of each NDE is directly electrically connected to one terminal of a voltage source, and the other terminal is indirectly electrically connected to the other terminal of the voltage source, and wherein:

[0066] · Figure 7D is a circuit diagram of a capacitive element driver 700D, wherein one terminal of a selected non-dissipative element is directly connected to a negative terminal of a voltage source and the other terminal is indirectly electrically connected to a positive terminal of the voltage source; and

[0067] · Figure 7E is a circuit diagram of a capacitive element driver 700E, in which one terminal of a selected non-dissipative element is directly connected to the positive terminal of a voltage source, and the other terminal is indirectly electrically connected to the negative terminal of the voltage source.

[0068] Figure 7F is similar to Figure 7C-2 Circuit diagram of the capacitive element driver 700F of the driver 700C-2:

[0069] removing the interconnection between the positive terminal of the voltage source and the final node,

[0070] adding an interconnection between the positive terminal of the voltage source and a switch arranged between the terminal of the last NDE in series and the output terminal, and

[0071] Final switch SW 7F-5 Set in increased interconnection;

[0072] Figure 7G 、 Figure 7H They are Figure 7D 、 Figure 7E Circuit diagrams of capacitive element drivers of three NDE embodiments;

[0073] Figure 8A is shown in Figure 2 for the complete V O7A The voltage V input to the capacitor element 730A during the driving cycle O7A A graph 800 of a waveform 802;

[0074] Figure 8B-1 is shown at full V O7A a diagram 850 of an illustrative switching sequence method 80 for the capacitive element driver 700A during a stage of a drive cycle;

[0075] Figures 8B-2A to 8B-2B2 shows the full V 07C Method 86 of operating driver 700C-2 during a stage of a drive cycle, wherein:

[0076] Figure 8B- Figure 2A is a graphical representation 860 illustrating the method 86 for opening and closing the switch of the driver 700C-2, and

[0077] · Figure 8B-2B1 、 Figure 8B-2B2 are diagrams 868 , 869 detailing levels 861 - 866 of method 86 ;

[0078] Figure 8C is shown in full V O7B Diagram 880 of method 88 defining a switching sequence for a capacitive element driver 780 during a stage of a drive cycle;

[0079] Figure 8D-A to Figure 8D-B2 shows the full V 07G Method 8600 of operating a driver 700G during a stage of a drive cycle, wherein:

[0080] · Figure 8D-A is a graphical representation 8650 illustrating a method 8600 for opening and closing a switch of driver 700G, and

[0081] · Figure 8D-B1 、 Figure 8D-B2 are Tables 8660 , 8665 detailing levels 8601 - 8608 of method 8600 ;

[0082] Figure 8E-A to Figure 8E-B2 shows the full V 07H Method 8700 of operating a driver 700H during a stage of a drive cycle, wherein:

[0083] · Figure 8E-Ais a graphical representation 8750 illustrating a method 8700 for opening and closing a switch of a driver 700H, and

[0084] · Figure 8E-B1 、 Figure 8E-B2 are Tables 8760 , 8765 detailing levels 8701 - 8708 of method 8700 ;

[0085] Figure 8F is Table 8769 comparing the levels of methods 8600 and 8700 and the output voltages resulting from their application to drivers 700G and 700H, respectively;

[0086] Figures 9A to 9G is a circuit diagram illustrating an embodiment of a switch that may be deployed in capacitive element driver 700A;

[0087] Figures 10 to 12 is a circuit diagram illustrating an electrical system according to an embodiment of the present invention, wherein a capacitor driving circuit is electrically connected to an electrical device / network having a capacitor function, wherein:

[0088] · Figure 10 A capacitive element driver 1000 is shown having a voltage source 1020 and a capacitive drive circuit 1010 electrically connected to an electrical device / network 1030 via an impedance to a node 1004 of the driver 1000 and via a node 1006 of the driver 1000, wherein the node 1006 is electrically connected to a voltage source V of the driver 1000. DD10 (also referred to as voltage source 1020) has a positive terminal 1026,

[0089] · Figure 11 A capacitive element driver 1100 is shown having a voltage source and a capacitive drive circuit 1110 electrically connected to an n-terminal device / network 1130 through one terminal to a node 1104 of the driver 1100 and through a node 1108 of the driver 1100, wherein the node 1108 of the capacitive drive circuit 1110 is electrically connected to the voltage source V of the driver 1100. DD11 The negative terminal 1128, and

[0090] · Figure 12 A capacitive element driver 1200 is shown having a voltage source and a capacitive drive circuit 1210 electrically connected to an n-terminal device / network 1230 through one terminal to a node 1204 of the driver 1200 and through a node 1206 of the driver 1200, wherein the node 1206 is electrically connected to a voltage source V of the capacitive element driver 1200. DD12 The positive terminal 1226;

[0091] Figures 13 to 16 is a circuit diagram of an electrical system in which capacitor driving circuits 1310, 1410, 1510, 1610 are electrically connected to gate terminals of transistors, wherein:

[0092] · Figure 13 A voltage source V is shown connected to the capacitor driving circuit 1310 via the source terminal. DD13 The negative terminal of transistor 1330,

[0093] · Figure 14 A voltage source V is shown connected to the capacitor driving circuit 1410 via the source terminal. DD14 The positive terminal of transistor 1430,

[0094] · Figure 15 A voltage source V is shown connected to the capacitor driving circuit 1510 via the drain terminal. DD15 the positive terminal of transistor 1530, and

[0095] · Figure 16 A voltage source V is shown connected to the capacitor driving circuit 1610 via the drain terminal. DD16 the negative terminal of transistor 1630;

[0096] Figures 17 and 18 is a circuit diagram of an electrical system in which components 1740 , 1840 may be driven by capacitor drive circuits 1710 , 1810 , respectively, through transistors 1730 , 1830 , respectively, with capacitor drive circuits 1710 , 1810 electrically connected to gate terminals of transistors 1730 , 1830 , and wherein:

[0097] · Figure 17 The source terminal of the transistor 1730 is shown connected to the circuit 1710 through the terminal and the voltage source V DD17 element 1740 between the positive and negative terminals, and

[0098] · Figure 18 The drain terminal of the transistor 1830 is shown connected to the circuit 1810 through the terminal and the voltage source V DD18 Component 1840 between the positive and negative terminals;

[0099] Figure 19A and Figure 19B is a circuit diagram illustrating a high-efficiency switching system 1900a, 1900b, wherein capacitive drive elements 1910a, 1910b may be electrically connected to the gates of power switches such as high-frequency power switches 1930a, 1930b;

[0100] Figure 20is a circuit diagram showing a capacitor element driver unit 2000, which can be combined with other capacitor element driver units to construct a capacitor element driving circuit for further reducing the total energy dissipation of each output voltage driving cycle of the capacitor element driver;

[0101] Figure 21 is a circuit diagram illustrating one embodiment of a 2-driver unit capacitive element driving circuit 2100, wherein units 2101-1, 2101-2 are electrically connected with an input terminal of driver unit 2101-2 connected to an output terminal of driver unit 2101-1;

[0102] Figures 22A to 22J is a circuit diagram of the dual-cell capacitor element driver circuit 2100 in operation, showing the full V O21 An embodiment of a switch that may be deployed in the driver circuit 2100 during a stage of a drive cycle;

[0103] Figure 22K It shows Figures 22A to 22J A diagram of an embodiment of a switching sequence method 2200 as shown in a circuit diagram of FIG.

[0104] Figures 22L-1 to 22L-3 is a diagram illustrating the voltage distribution function of a closed switch group in an embodiment of a switching sequence of a driver unit in a selected drive circuit, wherein:

[0105] · Figure 22L-1 shows the voltage distribution function 2001-1 of a closed switch group in a driver unit x with one non-dissipative element (and four switches),

[0106] · Figure 22L-2 shows the voltage distribution function 2001-2 of a closed switch group in driver unit y with two non-dissipative elements (and five switches), and

[0107] · Figure 22L-3 shows the voltage distribution function 2001-q of a closed switch group in a generalized driver unit k having q non-dissipative elements (and q+3 switches);

[0108] Figures 22M-1A to 22M-5B is a diagram showing a switching sequence method for a selected drive circuit, showing the use of Figure 22L-1 、 Figure 22L-2 、 Figure 22L-3 The voltage distribution functions 2001-1, 2001-2, 2001-q are shown as symbols of the switching levels and modes of operation of the closed switch group outlined, wherein,

[0109] · Figure 22M-1A Shown by Figure 22KA more detailed description of the voltages allocated to each stage of the switching sequence method 2200 for operating the driver circuit 2100 in stages of a complete output voltage drive cycle, wherein Figure 22M-1B The stages and switching patterns in method 2200 are shown;

[0110] · Figure 22M-2A1(A1) to Figure 22M-2A2 A switching sequence method 2220 is shown for driving the stages of a circuit [wxy] through a complete output voltage drive cycle, wherein the circuit [wxy] has three driver units, each having a non-dissipative element, wherein:

[0111] o Figures 22M-2A1(A1) and 22M-2A1(A2) respectively show switching diagrams 2222(a) and 2222(b), detailing the stages 2221(1)-2221 in the switching sequence method 2220.

[0112] The closed switch of the circuit and the output voltage [xyz] during the application of (54),

[0113] o Figures 22M-2A1(B) show a sequential pattern diagram 2225 detailing the set of switches closed on circuit [xyz] and the output voltage of the circuit during application of stages 2221(1)-2221(54), and

[0114] o Figure 22M-2A2 The phases and switching patterns in method 2220 are shown;

[0115] · Figure 22M-2B1 shows a switching sequence method 2240 of a driver circuit [vwxy] in stages of a complete output voltage drive cycle, wherein the circuit [vwxy] has four driver units, each having a non-dissipative element, and Figure 22M-2B2 The stages and switching patterns in method 2240 are shown;

[0116] · Figure 22M-3A A method 2260 is shown of a switching sequence of a driving circuit [ab] in stages of a complete output voltage driving cycle, wherein the circuit [ab] includes a first unit [a] having one non-dissipative element and a second unit [b] having two non-dissipative elements, and Figure 22M-3B The stages and switching patterns in method 2260 are shown;

[0117] · Figure 22M-4A A method 2270 is shown of a switching sequence of a driving circuit [mn] at stages of a complete output voltage driving cycle, wherein the circuit [mn] includes a first unit [m] having two non-dissipative elements and a second unit [n] having a non-dissipative element, and Figure 22M-4B The stages and switching patterns of method 2270 are shown; and

[0118] · Figure 22M-5A1 、 Figure 22M-5A2 and Figure 22M-5B A switching sequence method 2280 of a driver circuit [mnp] in stages of a complete output voltage drive cycle is shown, wherein the driver circuit [mnp] includes a first cell [m] and a second cell [n] each having two non-dissipative elements, and a third cell [p] having three non-dissipative elements, and wherein:

[0119] o Figure 22M-5A1 shows a method 2280 of driving a circuit [mnp] from ground voltage to its peak voltage,

[0120] o Figure 22M-5A2 shows a method 2280 of driving a circuit [mnp] from its peak voltage to ground, and

[0121] o Figure 22M-5B The stages and switching patterns in method 2280 are shown;

[0122] Figure 23A is a circuit diagram illustrating one embodiment of a capacitive element driver circuit 2300 constituting a more general embodiment of the storage capacitor-enabled capacitive element driver 2100, wherein the circuit 2300 has K cells, each cell having at least one non-dissipative element (this embodiment is also referred to as a K-cell driver circuit 2300);

[0123] Figure 23B is a circuit diagram illustrating one embodiment of a cell 2301-i (2≤i≤(k-1)) for a K-cell driver circuit 2300;

[0124] Figure 24A to Figure 24B-3 is shown for the V O23 A diagram of a portion of a switching sequence method 2400 of a generalized driver circuit 2300 for stage operation of a drive cycle, wherein the multi-cell circuit 2300 drives its output voltage from ground voltage to its peak voltage, wherein:

[0125] · Figure 24A shows the method stages and cell switching pattern for driving cell 2301-1 from ground voltage to its peak voltage, i.e., a portion of the start cell [1] stage 2412[1]-1 and the peak cell [1] stage 2414[1], and

[0126] · Figure 24B-1 、 Figure 24B-2 and Figure 24B-3 The method phases and cell switching patterns for driving the remaining cells 2301-z (2≤z≤K) from ground voltage to their peak voltage are shown, where Figure 24B-1The starting unit [z] stage 2412[z]-1 is shown, Figure 24B-2 Execution unit [z] stage 2413[z]-1 is shown, and Figure 24B-3 A portion of the peak unit [z] stage 2414[z] is shown;

[0127] Figure 25A 、 Figure 25B 、 Figure 25C is a summary of certain methods, circuits, apparatus, and systems for sequential operation of switching non-dissipative elements in a capacitive element drive system, summarizing certain circuit / circuit switching method combinations previously disclosed in U.S. Patent No. 11,575,376 and U.S. Patent Application No. 18 / 090,469 or disclosed below;

[0128] Figure 26A to Figure 26B-2 shows the full V 7F Method 2600 of operating the driver 700F during phases 2601-2608 of the drive cycle, wherein: Figure 26A is a graphical representation 2650 of the operation of circuit 700F at each stage of the method, Figure 26B-1 、 Figure 26B-2 are tables 2660 , 2665 detailing the stages of method 2600 ;

[0129] Figure 26C is a table 2669 comparing the levels of methods 86, 2600 and the output voltages resulting from their application to drivers 700C-2, 700F, respectively;

[0130] Figure 27A to Figure 27B-2 、 Figures 28A to 28C-3 shows the full V O7B Methods 2700, 2800 of operating a driver 780 during a stage of a drive cycle, wherein:

[0131] · Figure 27A 、 Figure 28A are graphical representations 2750, 2850, respectively, of the operation of circuit 780 at each stage of the method,

[0132] · Figure 27B-1 、 Figure 27B-2 are tables 2760, 2765 detailing levels 2701-2714 of method 2700, and Figure 28B-1 、 Figure 28B-2 are tables 2860, 2865 detailing levels 2801-2014 of method 2800,

[0133] · Figure 27B-1 to Figure 27B-2 and Figures 28C-1 to 28C-3 are screenshots of simulation results relating to the application of methods 2700 and 2800 to driver 780, respectively;

[0134] Figure 28D is a table 2869 comparing the levels of methods 2700, 2800 and the output voltages resulting from their application to driver 780;

[0135] Figure 29 is a circuit diagram of a capacitive element driver 2900 constituting an alternative embodiment of a capacitive element driver supporting a storage capacitor having three non-dissipative elements and seven switches connected in series;

[0136] Figure 30A to Figure 30C-3 、 Figure 31A to Figure 31C-3 、 Figure 32A to Figure 32C-3 、 Figure 33A to Figure 33C-3 are shown for the full V 29 Methods 3000, 3100, 3200, 3300 of operating the driver 2900 during a stage of a drive cycle, wherein:

[0137] · Figure 30A 、 Figure 31A 、 Figure 32A 、 Figure 33A are graphical representations 3050, 3150, 3250, 3350, respectively, of the operation of circuit 2900 at each stage of the method,

[0138] · Figure 30B-1 to Figure 30B-2 、 Figure 31B-1 to Figure 31B-2 、 Figure 32B-1 to Figure 32B-2 、 Figure 33B-1 to Figure 33B-2 are tables detailing the levels of methods 3000, 3100, 3200, and 3300, respectively, wherein:

[0139] o Tables 3060, 3065 detailing levels 3001-3014 of method 3000 ( Figure 30B-1 to Figure 30B-2 ),

[0140] o Tables 3160, 3165 (FIGS. 31B1-1 to 31B2) detailing stages 3101-3114 of method 3100 Figure 31B-2 ),

[0141] o Tables 3260, 3265 detailing stages 3201-3214 of method 3200 ( Figure 32B-1 to Figure 32B-2 ),as well as

[0142] o Tables 3360, 3365 detailing levels 3301-3314 of method 3300 ( Figure 33B-1 to Level 33B-2), and

[0143] · Figures 30C-1 to 30C-3 、 Figures 31C-1 to 31C-3 、 Figures 32C-1 to 32C-3 and Figures 33C-1 to 33C-3are screen shots of simulation results relating to the application of methods 3000 , 3100 , 3200 , and 3300 to driver 2900 , respectively;

[0144] Figure 33D-1 、 Figure 33D-2 are tables 3369a, 3369b comparing methods 3000, 3100, 3200, 3300 and the output voltages resulting from their application to driver 2900;

[0145] Figure 34 is a circuit diagram of a capacitive element driver 3400 constituting an embodiment of a capacitive element driver supporting a storage capacitor having three non-dissipative elements and nine switches connected in series;

[0146] Figure 35A to Figure 35C-3 、 Figure 36A to Figure 36C-3 are shown for the full V 34 Methods 3500, 3600 of operating the driver 2400 during a stage of a drive cycle, wherein:

[0147] · Figure 35A 、 Figure 36A are graphical representations 3550, 3650 of the operation of circuit 3400 at each stage of methods 3500, 3600, respectively,

[0148] · Figure 35B-1 、 Figure 35B-2 Tables 3560, 3565 respectively detailing stages 3501-3514 of method 3500, and Figure 36B-1 、 Figure 36B-2 Tables 3660, 3665, respectively, detailing levels 3601-3616 of method 3600, and

[0149] · Figures 35C-1 to 35C-3 、 Figures 36C-1 to 36C-3 are screenshots of simulation results relating to the application of methods 3500 and 3600 to driver 3400, respectively;

[0150] Figure 36D is a table 3669 comparing the levels of methods 3500 , 3600 and the output voltages resulting from their application to driver 3400 ;

[0151] Figure 37 is a circuit diagram of a capacitive element driver 3700 constituting an embodiment of a capacitive element driver supporting a storage capacitor having three non-dissipative elements and thirteen switches connected in series;

[0152] Figures 38A-1 to 38C-3 shows the full V O37Method 3800 of operating a driver 3700 during a stage of a drive cycle, wherein:

[0153] · Figure 38A-1 、 Figure 38A-2 are graphical representations 3850a, 3850b of the operation of circuit 3700 at each stage of method 3800, respectively,

[0154] · Figure 38B-1A 、 Figure 38B-1B are tables 3860a, 3860b, respectively, detailing the closed switches and output voltages of circuit 3700 during stages 3801-3826 of applying method 3800 on circuit 3700.

[0155] · Figure 38B-2 is a table 3865 detailing the set of switches opened on circuit 3700 and the output voltage of the circuit during application of stages 3801-3826 of method 3800 on circuit 3700; and

[0156] · Figures 38C-1 to 38C-3 is a screenshot of simulation results associated with application of method 3800 on driver 3700;

[0157] Figures 39A-1 to 39C-3 Shown for completing V O37 Method 3900 of operating a driver 3700 during a stage of a drive cycle, wherein:

[0158] · Figure 39A-1 、 Figure 39A-2 are graphical representations 3950a, 3950b of the operation of circuit 3700 at each stage of method 3900, respectively,

[0159] · Figure 39B-1A 、 Figure 39B-1B are tables 3960a, 3960b, respectively, detailing the closed switches and output voltages of circuit 3700 during stages 3901-3930 of applying method 3900 on circuit 3700.

[0160] · Figure 39B-2 is a table 3965 detailing the set of switches opened on circuit 3700 and the output voltage of the circuit during application of stages 3901-3930 of method 3900 on circuit 3700, and

[0161] · Figures 39C-1 to 39C-3 is a screen shot of simulation results associated with application of method 3900 on driver 3700;

[0162] Figure 39D is a table 3969 comparing the levels of methods 3800, 3900 on driver 3700 and the output voltages resulting from their application on driver 3700;

[0163] Figure 40 is a circuit diagram of a capacitive element driver system 4000, which constitutes an embodiment of a capacitive element driver system supporting a storage capacitor formed by a series of three 1-NDE unit drivers [w], [x], [y];

[0164] Figures 41A-1 to 41B-1D shows the full V [wxy] Method 4100 of operating a 3-unit driver system 4000 during a stage of a drive cycle, wherein:

[0165] · Figures 41A-1 to 41A-4 are graphical representations 4155a through 4155d of the operation of circuit 4000 at each stage of methods 2220, 4100, respectively.

[0166] · Figure 41B-1A 、 Figure 41B-1B Tables 4160a, 4160b, and

[0167] · Figure 41B-1C is table 4165 detailing the set of switches opened on circuit 4000 and the output voltage of the circuit during application of stages 4101 - 4154 of method 4100 on method 4000 ;

[0168] Figure 41C is a table 4169 comparing the levels of methods 2220 , 4100 and the output voltages resulting from their application to the driver system 4000 . DETAILED DESCRIPTION

[0169] Reference will now be made in detail to the present exemplary embodiments, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or like parts.

[0170] 1. A basic non-dissipative element-enabled capacitive element driver

[0171] Capacitor element driver 400

[0172] Figure 4 One embodiment of the invention shown has a capacitor element driver 400, also known as a non-dissipative element enabled capacitor element driver (or, in an illustrative but not necessarily preferred embodiment, the non-dissipative element can be a storage capacitor, a storage capacitor enabled capacitor element driver), which can also be called a fractional capacitor element driver or a green capacitor element driver, for driving the voltage of the capacitor element 430 between two voltage levels such as ground voltage and a power supply voltage.

[0173] The capacitor element driver 400 may have a series connection and be provided at a voltage source 420 (also referred to as a power supply and voltage source V DD4 , used to provide a value V to the capacitor element driver 400 DD4 voltage) and capacitor element 430 (also referred to as capacitor element C O4 , or component C O4 ) between the first pair of 445 switches SW 4[0] and SW 4[1] , which is sized to hold the value V at its ends O4 The voltage. Figure 4 In the embodiment, the voltage source V DD4 is a component of the capacitive element driver 400 , but in other embodiments, it may be a unit separate from the capacitive driving circuit of the capacitive element driver 400 and electrically connectable to the circuit.

[0174] Capacitive element 430 may be a capacitor or any element that can be positioned at the output of a circuit and function as a capacitor therein. It should also be understood that the non-dissipative elements in the driver circuit 400 discussed herein may be any type of non-dissipative element, such as a capacitor, and that for simplicity of describing the circuit 400 and other circuits described herein, the non-dissipative elements may also be referred to herein as "capacitor elements," "capacitors," or with a capital C.

[0175] For example, the capacitive element 430 may be one or more capacitive loading elements. Figure 4 In the embodiment, the capacitor element 430 is a unit separate from the capacitor driving circuit of the capacitor element driver 400 and electrically connectable to the circuit, but in other embodiments, it can be a component of the capacitor element driver 400.

[0176] Switch SW 4[0] electrically connected to the negative terminal 428 of the voltage source 420 and the switch SW 4[0] With SW 4[1] A common node 416 between the switch SW 4[1] Electrically connected to the common node 416 and the terminal 432 (a terminal may also be referred to as an input or node) of the capacitor element 430. The capacitor element C O4 The other terminal 438 can be connected to ground or the negative terminal 428 of the voltage source.

[0177] The capacitive element driver 400 may have a second pair 440 of switches SW connected in series and disposed between the voltage source 420 and the capacitive element 430. 4[2] and SW 4[3] Switch SW 4[3]is provided to and electrically connected to the positive terminal 426 of the voltage source 420 and the switch SW 4[3] , SW 4[2] A common node 446 between the switch SW 4[2] The common node 446 and the input terminal 432 of the capacitor 430 are directly connected to the common node 446 and the input terminal 432 of the capacitor 430 .

[0178] The capacitive element driver 400 may also have a non-dissipative element 450, which (in an illustrative but not necessarily preferred embodiment) may be a storage capacitor C disposed between and electrically connected to the common nodes 416, 446. S4 When a transient current flows through capacitive element 430 , energy may be stored in or transferred from storage capacitor 450 .

[0179] The capacitor element driver 400 may further include or be electrically connected to a controller 460 for controlling the switch SW 4[0] , SW 4[1] , SW 4[2] , SW 4[3] The activation and deactivation of O4 The switching stage sequence within the driving cycle (defined to ensure that the voltage VC of the storage capacitor 450 S4 The controller 460 can be electrically connected to the switch SW through paths 470, 471, 472, and 473 respectively. 4[0] , SW 4[1] , SW 4[2] , SW 4[3] (exist Figure 4 ), to provide a control signal to signal the capacitive element driver 400 to start or stop the switching sequence method, as described below.

[0180] Switching sequence

[0181] The controller 460 controls the switch SW 4[0] , SW 4[1] , SW 4[2] , SW 4[3] Activation and deactivation of Figure 5A-5G The set of stages shown in the full V O4 Driving the capacitor element driver 400 in the driving cycle:

[0182] In stage 501(1), switch SW 4[0] , SW 4[1] Close (and switch SW 4[2] , SW 4[3] disconnect) to reduce the voltage V O4Drive to ground voltage ( Figure 5A );

[0183] In stage 501(2), switch SW 4[0] , SW 4[2] Close (and switch SW 4[1] , SW 4[3] disconnect) to turn V o4 Drive to VC S4 ( Figure 5B );

[0184] In stage 501(3), switch SW 4[1] , SW 4[3] Close (and switch SW 4[0] , SW 4[2] disconnect) to V o4 Drive to (V DD4 -VC S4 )( Figure 5C );

[0185] In stage 501(4), switch SW 4[2] , SW 4[3] Close (and switch SW 4[0] , SW 4[1] disconnect) to V O4 Drive to V DD4 ( Figure 5D );

[0186] In stage 501(5), switch SW 4[1] , SW 4[3] Close (and switch SW 4[0] , SW 4[2] disconnect) to V O4 Drive to (V DD4 -VC S4 )( Figure 5E );as well as

[0187] In stage 501(6), switch SW 4[0] , SW 4[2] Close (and switch SW 4[1] , SW 4[3] disconnect) to V O4 Drive to VC S4 ( Figure 5F ).

[0188] The controller 460 may then return to stage 501 ( 1 ) to repeat the switching sequence. Figure 5G is a diagram illustrating a method 500 including its switching sequence and a complete V O4 During the drive cycle, the voltage across the capacitor element 430 is driven to its VO4 The result value of . Figure 5G The standard switch convention for indicating switching patterns is used by identifying switches that are closed with the term "closed". Switches not marked "closed" are open unless otherwise specified in the following descriptions of phases and stages. In subsequent diagrams herein, the term "closed" may be abbreviated to "C".

[0189] Figure 5H When the switch SW 4[3] , SW 4[1] Close (and switch SW 4[0] , SW 4[2] When the capacitor element driver 400 is kept disconnected, as in stages 501(3) and 501(5), the capacitor element driver 400 operates. Figure 5H , through the switch SW 4[3] , SW 4[1] The storage capacitor C S4 In series with the capacitor element C O4 and voltage source V DD4 When the transient current flows through the capacitor element C O4 When the energy is stored in the storage capacitor C S4 middle.

[0190] Figure 5I When the switch SW 4[0] , SW 4[2] Close (and switch SW 4[3] , SW 4[1] When the capacitor element driver 400 is operated (maintained disconnected), as in stages 501(2) and 501(6), see FIG. Figure 5I , through the switch SW 4[0] and SW 4[2] The storage capacitor C S4 With the capacitor C O4 In parallel. Stored in storage capacitor C S4 The energy in the capacitor is transferred to the capacitor element C O4 .

[0191] The switching sequence applied in stages 501(1) to 501(6) maintains the average current on the storage capacitor 450 at zero and maintains the average current on the storage capacitor 450 at zero over the full V O4 While driving the cycle, the average value of the voltage on the storage capacitor 450 is kept constant. Figure 6A is a graph showing the voltage V input to the capacitor 430 according to the stages 501(1)-501(6) corresponding to the operation of the capacitor driver 400. O4 Graph 600 of waveform 602 of V is shown. Graph 600 shows the V provided by the operation of stages 501(1)-501(6). O4drive cycle, which makes the voltage V O4 Gradually increase to the peak voltage V DD4 (voltage provided by voltage source 420), and then voltage V O4 Gradually reduce to ground voltage.

[0192] This switching sequence of stages 501(1)-501(6) ensures that the storage capacitor C S4 The average current (and therefore the net charge) remains zero. O4 The net charge entering the storage capacitor 450 during the drive cycle is equal to zero, and VC can be calculated as follows S4 The average value of (Equation 2):

[0193] Net charge C S4 =[-C O4 VC S4 +C O4 (V DD4 -2VC S4 )-C O4 VC S4 +C O4 (V DD4 -2VC S4 )](1),

[0194] Make the net charge C S4 =0

[0195] [-C O4 VC S4 +C O4 (V DD4 -2VC S4 )-C O4 VC S4 +C O4 (V DD4 -2VC S4 )]=0→VC S4 =V DD4 / 3. (2).

[0196] Therefore, the voltage V O4 Each level is V DD4 The energy dissipated in each switch can be expressed in the algorithm as Equation 3:

[0197]

[0198] Figure 6B It shows Figure 6A Graph 650 of waveform 602 is shown, with the y-axis labeling modified accordingly.

[0199] like Figure 5A-5G As shown, a complete VO4 The six-stage switching sequence in the drive cycle is used to achieve the total energy dissipation (Equation 4):

[0200]

[0201] In conventional driver devices, systems, and processes implemented in circuit 100, a complete V O1 The total energy dissipated in the drive cycle is E t_circuit_100 =C O1 V DD1 2 Therefore, the capacitor element driver 400 ( Figure 4 ) implemented in the capacitor element driving device, system and process to each V O4 The total energy dissipation of the drive cycle is reduced by a factor of 3. Furthermore, the drive apparatus, system, and process implemented in capacitor element driver 400 do not introduce additional current, and therefore do not introduce additional conduction losses, caused by including an inductor in a conventional resonant capacitor element driver, such as in circuit 200 ( Figure 2A ) and circuit 300( Figure 3A ) in the drive device, system, and process implemented in FIG. Furthermore, unlike conventional resonant capacitor element drivers shown in circuits 200 and 300 , the switches used in capacitor element driver 400 can be constructed on the same substrate (e.g., silicon), thereby further minimizing the cost and size of the capacitor element driver.

[0202] Since the storage capacitor voltage VC S4 The average value of VC is maintained between the power supply voltage and ground voltage, thus resulting in energy savings provided by using a storage capacitor in the capacitive element driver 400. S4 When VC is equal to the power supply voltage or the voltage to ground, no energy saving is achieved. S4 Average value = power supply voltage V DD4 When the power consumption is 1 / 3 of that, the energy saving is optimal.

[0203] 2. Capacitive element driver enabled by generalized non-dissipative elements

[0204] Capacitor driver 700A

[0205] although Figure 4 An embodiment of an improved capacitive element driver is shown, wherein a single non-dissipative element 450 and four switches are included in the capacitive element driver 400. Figure 7A A generalized embodiment of a non-dissipative element enabled capacitive element driver is shown, wherein the capacitive element driver 700A has n non-dissipative elements (which may be storage capacitors in an illustrative but not necessarily preferred embodiment) (CS7A[1] ,C S7A[2] ,C S7A[3] ,…,C S7A[n-1] ,C S7A[n] ), n+3 switches (SW 7A[0] ,SW 7A[1] ,SW 7A[2] ,…,SW 7A[n] ,SW 7A[n+1] ,SW 7A[n+2] ); Voltage source 720A is used to provide voltage V DD7A , and the capacitor element 730A (also referred to as the capacitor element C O7A , or component C O7A ) is included in the capacitive element driver 700A. The number n can be any positive integer. As described above with respect to the capacitive element 430, the capacitive element 730A can be a capacitor or any element that can be positioned at the output terminal of the circuit and used as a capacitor. For example, the capacitive element 730A can be one or more capacitive loading elements.

[0206] Like the capacitor element driver 400, the capacitor element driver 700A may have a voltage source 720A (also referred to as a voltage source V DD7A ), for providing a voltage having a value that is a component of the capacitor element driver 700A, but in other embodiments, it may be a unit that is separate from and electrically connectable to the capacitor driving circuit of the capacitor element driver 700A. Furthermore, like the capacitor element 430, the capacitor element 730A is a unit that is separate from and electrically connectable to the capacitor driving circuit of the capacitor element driver 700A, but in other embodiments, it may be a component of the capacitor element driver 700A.

[0207] Switch SW 7A[0] , SW 7A[1] connected in series and electrically connected to a voltage source 720A (for providing a voltage V DD7A ) and one terminal 732A of the capacitor element 730A, and is provided between them for maintaining the voltage V O7A Switch SW 7A[N+1] , SW 7A[N+2] is also connected in series and is electrically connected to and disposed between the positive terminal 726A of the voltage source 720A and the input terminal 732A of the capacitive element 730A. O7A The other terminal 738A may be electrically connected to ground or the negative terminal 728A of the voltage source 720A.

[0208] Switch SW 7A[0] The negative terminal 728A of the voltage source 720A and the switch SW can be set 7A[0] , SW7A[1] The switch SW is electrically connected to the common node 705A (1) between them. 7A[n+2] A positive terminal 726A of the voltage source 720A and a switch SW may be provided. 7A[n+1] , SW 7A[n+2] The common node 705A(n+1) therebetween is electrically connected to them.

[0209] n storage capacitors may be electrically connected in series and disposed between common nodes 705A(1) and 705A(n+1), wherein the storage capacitor C S7A[x] (where x ranges from 1 to n) is provided between and electrically connected to nodes 705A(x), 705A(x+1). In addition, a switch SW 7A[x] , (where x ranges from 1 to n+1) can be set between node 705A(x) and capacitive element C O7A Specifically,

[0210] Switch SW 7A[1] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the switch SW 7A[0] and SW 7A[1] 's public node 705A(1);

[0211] Switch SW 7A[2] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the storage capacitor CS can be electrically connected to the other terminal. 7A[1] and CS 7A[2] 's public node 705A(2);

[0212] Switch SW 7A[3] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the storage capacitor CS can be electrically connected to the other terminal. 7A[2] and CS 7A[3] (not shown) a public node 705A (3);

[0213] Switch SW 7A[n-1] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the storage capacitor CS can be electrically connected to the other terminal. 7A[n-2] (not shown) and CS 7A[n-1] Public node 705A(n-1);

[0214] Switch SW 7A[n] One terminal can be electrically connected to the capacitive element CO7A The input terminal 732A of the storage capacitor CS can be electrically connected to the other terminal. 7A[n-1] and CS 7A[n] public node 705A(n); and

[0215] Switch SW 7A[n+1] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the switch SW 7A[n+1] , SW 7A[n+2] 's public node 705A(n+1).

[0216] The capacitive element driver 700A also has a controller 760A or is electrically connected to the controller 760A via a path system 770A, which is arranged to provide a control signal to send a signal to the capacitive element driver 700A to start or stop the switching sequence method. The path system 770A electrically connects the controller 760A to the switch to allow the controller 760A to operate within a full V O7A The storage capacitor, voltage source 720A and the capacitive element are selectively connected in stages during the drive cycle, wherein the switch is switched on for a full V O7A The stages are switched on and off in combination in a sequence within a drive cycle. The stages can be implemented in a sequencing method with multiple phases; this method is defined to ensure that the average value of the voltage of the storage capacitor does not change over time.

[0217] Switching sequence

[0218] Reference Figure 8A , the graph 800 shows the voltage V input to the capacitor element 730A O7A The waveform 802 corresponds to the operation of the capacitive element driver 700A according to the stages 801(1)-801(4n+2) and the switching sequence method disclosed herein. O7A drive cycle, which makes the voltage V O7A Gradually increase to the peak voltage V DD7A (voltage provided by voltage source 720A), then voltage V O7A Gradually reduce to ground voltage.

[0219] The switching sequence method 80 requires a full V O7A The switches are activated in combination within the drive cycle to ensure that the voltage V CS7A[1] ,V CS7A[2] ,V CS7A[3] ,…,V CS7A[n-1] , and V CS7A[n] The average value of does not change over time. Figure 8B-1, graph 850 shows the available O7A The stage controlling the n+3 switches in the drive cycle includes the phase of the switching method associated with the selected stage, the switches activated during the selected state, the V across the capacitive element 730A, and the V O7A The voltage to which the selected stage is driven.

[0220] Figure 8B-2B1 A closed switch is identified by the term "C," which, as mentioned above, is an abbreviation for "closed." Unless otherwise specified in the description of the stages and phases below, switches not marked with a "C" are open.

[0221] Switching sequence phase 810 of stages 801(1) to 801(n+1): Phase 810 constitutes the first phase of the switching sequence method 80, wherein the switch SW 7A[0] (electrically connected to a voltage source V DD7A The switch SW is closed and remains closed at the negative terminal 728A. 7A[n+2] (electrically connected to a voltage source V DD7A of just The switch at terminal 726A) is open until stage 801(n+1) is completed.

[0222] o Switching sequence sub-stage 811 of stage 801(1): Switch SW 7A[1] Close until V O7A is driven to ground (eg, 0V).

[0223] o Switching sequence sub-phase 812 of stages 801(2) to 801(n+1): Switch SW 7A[2] To SW 7A[n+1] These stages operate sequentially, and during stage 801(s) (s from 2 to n+1) switch SW 7A[w] (w also closes from 2 to n+1) until V O7A Driven to

[0224] It can be seen that the value of w increases as s increases through sub-phase 812. To illustrate the capacitive element driver 700A:

[0225] In stage 801(2), switch SW 7A[2] First closed, it drives V O7A To VC S7A[1] .

[0226] In stage 801(3), switch SW 7A[3] Closed, it drives V O7A arrive

[0227] In stage 801(4), switch SW 7A[4] Closed, it drives VO7A arrive

[0228] The switching sequence in sub-phase 812 continues until switch SW 7A[n+1] Closed, it drives V O7A arrive

[0229] Switching sequence phase 820 of stages 801(n+2) to 801(3n+2): Phase 820 constitutes the second phase of the switching sequence method 80, wherein the switch SW 7A[0] Open, and switch SW 7A[n+2] Closed until the end of stage 801 (3n+2). For this and the switch activation transitions described later, the conventional practice of opening the currently closed switch and then closing the currently open switch is described; first open the currently closed switch SW 7A[n+2] , and then closes the currently open switch SW 7A[0] , preventing current from flowing from the voltage source through all non-dissipative components during the switch activation transition. Switching sequence sub-phase 821 and switching sequence sub-phase 822 constitute a first sub-phase of the second phase 820 , and switching sequence sub-phase 823 constitutes a second sub-phase of the second phase 820 .

[0230] o Switching sequence sub-phase 821 for stages 801(n+2) to 801(2n+1): During a stage within the stage range [specifically, stage 801(s), where s is (n+2) to (2n+1)], switches within the switch range (SW 7A[1] To SW 7A[n] ), or more generally, the switch SW 7A[x] (x is 1 to n) closed sequentially until V O7A Driven to until.

[0231] It can be seen that the value of x increases as s increases through the sub-stage 821. In summary, for the selected switch SW 7A[x] :

[0232] x=a+(sb), where

[0233] a is the first switch in the switch range in the selected subphase,

[0234] s is the current level, and

[0235] b is the first level in the sub-stage.

[0236] In the switching sequence sub-phase 821, where a=1 and b=n+2:

[0237] x=1+[s-(n+2)]

[0238] =1+sn-2

[0239] =s-n+1-2

[0240] =s-(n+1)

[0241] →SSW 7A[x] =SW 7A[s-(n+1)] .

[0242] To illustrate the capacitive element driver 700A:

[0243] In stage 801(n+2), switch SW 7A[1] Closed, it drives V O7A arrive

[0244] In stage 801(n+3), switch SW 7A[2] Closed, it drives V O7A arrive

[0245] In stage 801(n+4), switch SW 7A[3] Closed, it drives V O7A arrive

[0246] The switching sequence in sub-phase 821 continues until switch SW 7A[n] Close to drive V O7A to (V DD7A -V C7A[n] ).

[0247] o Switching sequence sub-stage 822 of stage 801(2n+2): During stage 801(2n+2), switch SW 7A[0] Open, and switch SW 7A[n+1] Close until V O7A The power supply voltage V driven to the driver circuit DD7A .

[0248] o Switching sequence sub-stage 823 of stage 801(2n+3) to 801(3n+2) : During a stage within the stage range [specifically, stage 801(s), s from (2n+3) to (3n+2)], switches within the switch range (SW 7A[n] To SW 7A[i] ), or more generally switch SW 7A[y] (where y is n to 1) is closed in a switching mode to achieve a voltage from the supply voltage V DD7A The switching pattern for achieving the step-down is the reverse of the order of steps in the switching sequence of sub-stage 821. Stage 801(s) operates so that the associated switches SW 7A[y] Close until V O7A Driven to Continuing forward, the practice of adding a step-down to a switch pattern showing a step-up in voltage may be referred to as operating the switch pattern "in reverse order." Additionally, herein, a "switch pattern" may also be referred to as a "switched pattern," a "switch-activated pattern," and a "switch-activated pattern."

[0249] It can be seen that, through sub-stage 823, the value of y decreases as s increases. In summary, for the selected switch SW 7A[y] :

[0250] y = a - (sb), where:

[0251] a is the first switch in the switch range in the selected subphase,

[0252] s is the current level, and

[0253] b is the first level in the selected sub-stage.

[0254] In the switching sequence sub-phase 821, where a=n and b=(2n+3):

[0255] y=n-[s-(2n+3)]

[0256] =n-s+2n+3

[0257] =3n+3-s→SW 7A[y] =SW 7A[3n+3-s] .

[0258] To illustrate the capacitive element driver 700A:

[0259] In stage 801(2n+3), switch SW 7A[n] First closed, it will V O7A Drive to (V DD7A -V CS7A[n] ).

[0260] In stage 801(2n+4), switch SW 7A[n-1] Closed, it will V O7A Drive to

[0261] In stage 801(2n+5), switch SW 7A[n-2] Closed, it will V O7A Drive to

[0262] The switching sequence in sub-phase 823 continues until SW 7A[1] Close to V O7A Drive to

[0263] Switching sequence phase 830 of stage 801(3n+3) to 801(4n+2):Phase 830 constitutes the third phase of the switching sequence method 80, wherein the switch SW 7A[n+2] Open, and switch SW 7A[0] closure.

[0264] During the stages within the stage range of the switching sequence phase 830 [specifically, stage 801(s), s from (3n+3) to (4n+2)], the switches within the switching range are switched from SW 7A[n+1] To SW 7A[2] , or more generally, the switch SW 7A[z] (z from (n+1) to 2) are closed in reverse order compared to sub-stage 812. Stage 801(s) operates so that the associated switches SW 7A[z] Close until V O7A Driven to

[0265] It can be seen that, through stage 830, the value of z decreases as s increases. In summary, for the selected switch SW 7A[Z] :

[0266] z = a - (sb), where:

[0267] a is the first switch in the switching range in the selected phase,

[0268] s is the current level, and

[0269] b is the first level in the stage.

[0270] In the switching sequence phase 830, where a=n+1 and b=(3n+3):

[0271] z=(n+1)-[s-(3n+3)]

[0272] =n+1-S+3n+3

[0273] =4n+4-s→SW 7A[z] =SW 7A[4n+4-s)] .

[0274] To illustrate the capacitive element driver 700A:

[0275] In stage 801(3n+3), switch SW 7A[n+1] Closed, it will V O7A Drive to

[0276] In stage 801(3n+4), switch SW 7A[n] Closed, it will V O7A Drive to

[0277] In stage 801(3n+5), switch SW 7A[n-1] Closed, it will V O7A Drive to

[0278] The switching sequence in stage 830 continues until SW 7A[2] Close to V O7A Drive to VC S7A[1] .

[0279] Switching sequence stage 840: Phase 840 , which constitutes the fourth phase of the switching sequence method 80 , wherein the switch may return to the switching sequence phase 810 to restart the sequence.

[0280] In summary, the switching sequence phase approaches a complete V O7A There are 2(2n+1) stages in the driving cycle to ensure that the storage capacitor C S7A[u] The average current, so the net charge Q remains zero (e.g., QC S7A[u] =0), where u is any integer from 1 to n. Under the above 2(2n+1) level, V O7A The corresponding waveform is as follows Figure 8A shown.

[0281] When Q CS7A[u] = 0 at a full V O7A When the driving cycle is equal, V CS7A[u] The average value of can be calculated as follows:

[0282] ·

[0283]

[0284] ·

[0285] in Independent of u;

[0286] =V CS7A[v] , for u≠v, where u and v are any integers from 1 to n.

[0287] When V CS7A[u] =V CS7A ,{V DD7A -2nV CS7A -V CS7A}=0.

[0288]

[0289] Therefore, it can be seen that the voltage V O7A The increment of change in each level is V DD7A / [2n+1]; and the energy dissipated by the switch in each stage is shown in equation (5):

[0290]

[0291] Each complete V O7A The driving cycle has 2 (2n+1) stages, and the total energy dissipation is:

[0292]

[0293] In conventional drive schemes (e.g. Figure 1A circuit 100), a complete V O1 The total energy dissipated in the drive cycle is E circuit1 =C O1 V DD1 2 In the case of n storage capacitors and the switching sequence disclosed herein, the capacitive element driver 700A converts each V O7A The total energy dissipation of the drive cycle is reduced by a factor of (2n+1).

[0294] 3. Other generalized non-dissipative component-enabled capacitive component drivers

[0295] As mentioned above, Figure 7A A generalized embodiment of a capacitive element driver is shown, wherein the capacitive element driver 700A has a capacitive element 730A (also referred to as C O7A ), n non-dissipative elements (storage capacitors in an illustrative but not necessarily preferred embodiment), and n+3 switches. The number n can be any positive integer.

[0296] Capacitor element driver 400

[0297] The previously described Figure 4 An embodiment of a capacitive element driver is shown, wherein a single storage capacitor 450 (n=1) and four (n+3) switches SW are included in the capacitive element driver 400. 4[0] , SW 4[1] , SW 4[2] , SW 4[3] The capacitive element drives 400 by the full V O4 During operation of a drive cycle, the embodiment of the capacitive element driver 400 undergoes the stages and switching sequence phases and sub-phases disclosed with reference to the capacitive element driver 700A. For example, with reference to Figure 5G, the capacitive element driver 400 switches in six stages, which corresponds to 2(2n+1) stages of the switching sequence phase outlined for the capacitive element driver 700A. Furthermore, the stages that the capacitive element driver 400 goes through when switching correspond to the switching sequence phase outlined for the capacitive element driver 700A. Assuming n=1 for the capacitive element driver 400:

[0298] • Level 501(1) corresponds to level 801(1) (stages 811, 840).

[0299] • Stage 501(2) corresponds to stages 801(2) and 801(n+1) (the first and last stages of phase 812, respectively).

[0300] • Stage 501(3) corresponds to stages 801(n+2) and 801(2n+1) (the first and last stages of phase 821, respectively).

[0301] • Stage 501(4) corresponds to stage 801(2n+2) (stage 822).

[0302] • Stage 501(5) corresponds to stages 801(2n+3) and 801(3n+2) (the first and last stages of phase 823, respectively).

[0303] • Stage 501(6) corresponds to stages 801(3n+3) and 801(4n+2) (the first and last stages of phase 830, respectively).

[0304] Capacitor element driver 780

[0305] Figure 7B Another embodiment of a capacitive element driver for instantiation (n=3) is shown, wherein the capacitive element driver 780 has a capacitive element 790 (also referred to as C O7B ), three (n=3) storage capacitors C 7B[1] 、C 7B[2] 、C 7B[3] and six (n+3=6) switches SW 7B[0] , SW 7B[1] , SW7B[2], SW 7B[3] , SW 7B[4] and SW 7B[5] , where the switch SW 7B[0] , SW 7B[1] There is a common node 785(1) between them; capacitor C 7B[1] 、C 7B[2] and the common node 785(2) between switch SW7B[2]; capacitor C 7B[2] 、C 7B[3] and switch SW 7B[3]common node 785(3) between them; and at the switch SW 7B[4] , SW 7B[5] The common node 785 (4) between them. The capacitor element 790 has one terminal 792 and another terminal 798, and the switch SW 7B[1] , SW7B[2], SW 7B[3] and SW 7B[4] Can be connected to one terminal 792 and the other terminal 798 can be electrically connected to the negative terminal 788 of the voltage source 787.

[0306] The connection of capacitive element 790 to driver 780 does not change method 88. Conceptually, a capacitor is a symmetrical device (meaning that terminals 792, 798 are indistinguishable), so there are two possible connections of capacitive element 790 to driver 780. The first option is to electrically connect terminal 792 to positive terminal 786 of voltage source 787 and terminal 798 to driver output terminal 704B of driver 780). Figure 7B A second option is shown in , where terminal 792 is electrically connected to driver output 704B of driver 780 and terminal 798 is electrically connected to negative terminal 788 of voltage source 787 .

[0307] Capacitive element driver 780 has or is electrically connected to controller 781 via path system 783 for electrically connecting controller 781 to the switch to allow controller 781 to operate at a full V O7B The storage capacitor and the positive terminal 786 and the negative terminal 788 of the voltage source 787 are selectively connected in the order of the switching stages in the driving cycle so that the voltage V 7B[1] 、V 7B[2] 、V 7B[3] The average value does not change over time.

[0308] Capacitive element driver 780 has been Figure 7B In order to meet the Figure 7A The generalized capacitive element driver 700A thereof, including its components and terminology, is described herein and therefore will not be described in detail. Figure 8C A diagram 880 is shown illustrating a method 88 that defines a method that can be used to define a method for performing a O7B The stages controlling n+3=6 switches in a drive cycle include the phase of the switching method associated with the selected stage, the switches activated during the selected state, the V driven to at the capacitive element 790 during the selected stage, and the V driven to at the capacitive element 790 during the selected stage. O7B voltage.

[0309] The capacitive element drives 780 by the full V O7BDuring operation of the drive cycle, the embodiment of the capacitive element driver 780 undergoes the same stage and switching sequence phases and sub-phases as disclosed with reference to the capacitive element driver 700A. For example, with reference to Figure 8C , capacitive element driver 780 switches in fourteen stages, which correspond to the 2(2n+1) stages of the switching sequence phases outlined for capacitive element driver 700A, and are provided with the same reference numerals for ease of presentation. Furthermore, the stages that capacitive element driver 780 goes through when switching correspond to the switching sequence phases outlined for capacitive element driver 700A, and therefore the reference numerals for the stages and switching sequence phases and sub-phases of capacitive element driver 700A are used herein for capacitive element driver 780. Assuming n=3 for capacitive element driver 780:

[0310] · V of capacitor driver 780 O7B The drive cycle begins at stage 801 ( 1 ) (phase 811 ).

[0311] • Capacitive element driver 780 goes through stage 812 in stages 801(2)-801(4).

[0312] • Capacitive element driver 780 goes through stage 821 in stages 801(5)-801(7).

[0313] • Capacitive element driver 780 undergoes stage 822 in stage 801(8).

[0314] • Capacitive element driver 780 goes through stage 823 in stages 801(9)-801(11).

[0315] • Capacitive element driver 780 goes through stage 830 in stages 801(12)-801(14).

[0316] • Capacitive element driver 780 returns to stage 801 ( 1 ) at stage 840 .

[0317] Capacitor element drivers 700C-1, 700C-2

[0318] Figure 7C-1 A generalized embodiment of a non-dissipative element enabled capacitive element driver 700C-1 is shown, which differs from the capacitive element driver 700A in that the first and last switches of the driver (which would be switches SW 7C[0] and SW 7C[n+2] ) is closed or replaced with a hardwired connection. 7C[1] ,SW 7C[2] ,…,SW 7C[n+1] ) can be arranged in sequence (SW 7C[1] ,SW 7C[2] ,…,SW 7C[n+1]) are opened and closed one at a time to change the capacitance element C O7C The voltage rises from ground (0V) to V DD7C The switches can be arranged to operate in reverse sequence (SW 7A[n+1] ,SW 7C[n] ,…,SW 7C[1] ) open and close one at a time, and 07C The voltage from V DD7C Lower to ground (0V).

[0319] Like the capacitive element driver 700A, the non-dissipative element enabled capacitive element driver 700C-1 uses E LOSS The energy loss per drive cycle (E LOSS[7C] )

[0320] E loss[7C] =C 07C *(V DD7C ) 2 / (n).

[0321] Capacitive element driver 700C-1 has n non-dissipative elements (which may be storage capacitors in an illustrative but not necessarily preferred embodiment) (C 7C[1] ,C 7C[2] ,C 7C[3] ,…,C 7C[n-1] ,C 7C[n] ); n+1 switches (SW 7C[1] ,SW 7C[2] ,…,SW 7C[n] ,SW 7C[n+1] ); used to provide voltage V DD7C The voltage source 720C and the capacitor element 730C (also referred to as the capacitor element C O7C , or component C O7C ) is included in the capacitive element driver 700C. The number n can be any positive integer. The capacitive element 730C can be a capacitor or any element that can be positioned at the output terminal of the circuit and used as a capacitor there. For example, the capacitive element 730C can be one or more capacitive loading elements.

[0322] Therefore, in the driver 700C-1, one or more non-dissipative elements are connected in series between the terminals of the voltage source, and one end of two or more switches is connected to the input terminal of the capacitive element. 7C[1] The other end of the negative terminal 728C of the voltage source 720C and the first non-dissipative element C 7C[1]The common node 705C(1) between the two switches, and the last switch SW 7C[n+1] The other end can be electrically connected to the positive terminal 726C of the voltage source and the last non-dissipative element C 7C[n] The common node 705C(n+1) between them.

[0323] The capacitive element driver 700C-1 may include a voltage source 720C (also referred to as a voltage source V DD7C ), which is used to provide a voltage having a value that is a component of the capacitor element driver 700C-1, but in other embodiments, it can be a unit that is separate from the capacitor driving circuit of the capacitor element driver 700C-1 and can be electrically connected to them. In addition, the capacitor element 730C can be a unit that is separate from the capacitor driving circuit of the capacitor element driver 700C-1 and can be electrically connected to them, but in other embodiments, it can be a component of the capacitor element driver 700C-1.

[0324] Switch SW 7C[1] Electrically connected to a voltage source 720C (for providing a voltage V DD7C ) between the negative terminal 728C and one terminal 732C of the capacitor element 730C and is provided between them for maintaining the voltage V O7C Switch SW 7C[n+1] is electrically connected to the positive terminal 726C of the voltage source 720C and the input 732C of the capacitive element 730C and disposed therebetween. O7C The other terminal 738C may be electrically connected to ground or the negative terminal 728C of the voltage source 720C.

[0325] The negative terminal 728C of the voltage source 720C may be electrically connected to the non-dissipative element C 7C[1] and switch SW 7C[1] The common node 705C(1) between the positive terminal 726C of the voltage source 720C can be electrically connected to the non-dissipative element C 7C[n] and switch SW 7C[n+1] The common node 705C(n+1) between them.

[0326] n storage capacitors may be electrically connected in series and disposed between common nodes 705C(1) and 705C(n+1), wherein the storage capacitor C 7C[x] (where x ranges from 1 to n) is provided between and electrically connected to nodes 705C(x), 705C(x+1). In addition, a switch SW 7C[x] (where x is between 1 and n+1) can be set at the node 705C(x) and the capacitive element C O7CThe operation of the driver 700C-1 allows the voltage of the capacitive element to be driven between two voltage levels, such as a ground voltage and a power supply voltage, by transferring the energy stored in the non-dissipative element of the driver to the capacitive element in a stepwise manner and alternately turning on and off two or more switches of the driver in a sequence to drive the voltage of the capacitive element between the two voltage levels. Specifically,

[0327] Switch SW 7C[1] One terminal can be electrically connected to the capacitive element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element C 7C[1] The common node 705C(1) of the voltage source 720C and the negative terminal 728C of the voltage source 720C are connected to the switch SW when the other switches are open. 7C[1] The closing of causes the non-dissipative components of driver 700C-1 to be "bypassed," transferring the ground voltage of negative terminal 728C to capacitive element C O7C Input 732C;

[0328] Switch SW 7C[2] One terminal can be electrically connected to the capacitive element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element C 7C[1] and C 7C[2] The common node 705C (2) of the switch SW is open when the other switches are open. 7C[2] The closure of the 7C[1] The voltage is transferred to the capacitor element C O7C Input;

[0329] Switch SW 7C[3] One terminal (not shown) may be electrically connected to the capacitive element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element C 7C[2] 、C 7C[3] (not shown) of the common node 705C (3), when the other open switches are open, the switch SW 7C[3] The closure of the S7C[1] +V S7C[2] The voltage is transferred to the capacitor element C O7C Input;

[0330] Switch SW 7C[n] One terminal can be electrically connected to the capacitive element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element CS 7C[n-1] (not shown) CS 7C[n] The common node 705C(n) of the switch SW is open when the other switches are open.7C[n] The closure of The voltage level is transferred from the non-dissipative component to the capacitive component C O7C Input;

[0331] Switch SW 7C[n+1] One terminal can be electrically connected to the non-dissipative element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element CS 7C[n+1] and the common node 705C(n+1) of the positive terminal 726C of the voltage source 720C. When the other switches are open, the switch SW 7C[n+1] The closing of causes the non-dissipative components of driver 700C-1 to be "bypassed," transferring the supply voltage at positive terminal 726C to capacitive element C O7C Input 732C; and

[0332] After the peak voltage is obtained through this switch activation sequence, switch SW 7C[1] To SW 7C[n+1] Can be in reverse order (SW 7C[n+1] To SW 7C[1] ) are closed one at a time to drive V O7C Return to the ground voltage level of the negative terminal 728C.

[0333] The capacitor element driver 700C-1 also has a controller (not shown) or is electrically connected to a controller (not shown) via a path system (not shown), which is configured to provide a control signal to the capacitor element driver 700C-1 to start or stop the switching sequence method. The path system electrically connects the controller to the switch to allow the controller to operate within a full V O7C The storage capacitor, the voltage source 720C and the capacitive element are selectively connected in stages within the driving cycle, wherein a full V O7C The switches are turned on and off in a sequence of stages within a drive cycle. As with driver 700A, the stages can be implemented in a sequencing approach with multiple phases; the approach is defined to ensure that the average value of the voltage across the storage capacitor remains constant over time.

[0334] In a circuit with a single non-dissipative element and two switches, the other end of the first switch can be electrically connected to one end of the single non-dissipative element, and the other end of the last switch can be electrically connected to the other end of the single non-dissipative element. In a circuit with n non-dissipative elements and n+1 switches, for the remaining switches SW [i] (1≤i≤n), switch SW [i] One end of the capacitor can be electrically connected to the input terminal of the capacitor element, while the other end can be electrically connected to the non-dissipative element c [i-1] 、c [i] The common nodes between them.

[0335] The Capacitor Element Driver 700C-2 is a 3-non-dissipative element (NDE) version of the Universal Capacitor Element Driver 700C-1. Driver 700C-2 has been Figure 7C-2 Shown in accordance with Figure 7C-1 The driver 700C-1, including its components and names, will therefore not be described in detail here. Figure 8B-2A 、 Figure 8B-2B1 and Figure 8B-2B2 Graphs 860, 868, and 869 are shown, respectively, illustrating a method 86 that defines a method that can be used to determine the V O7C The stages of the control of (n+1)=4 switches in a driving cycle include the phase of the switching method associated with the selected stage, the switches activated during the selected state, the switches in the capacitive element C during the selected stage, O7C The voltage V O7C .

[0336] Method 86, which is a 3-NDE version of the generalized switching method for driver 700C-1 disclosed above, can be applied to the three NDEs in driver 700C-2. Method 86 outlines the 3-NDEs in the entire V O7C The switching of the capacitor element driver 700C-2 during the stage of the voltage drive cycle, the switch SW 7C[1] To SW 7C[4] Close, once, in sequence (SW 7C[1] To SW 7C[4] ), and after achieving the peak voltage with this switch activation sequence, the switch SW 7C[1] To SW 7C[3] Closable, in stages 865, 866, respectively in stages 865, 866 in reverse order (SW 7C[3] To SW 7C[1] ), return to stage 861 to set V O7C Driven to the ground voltage level at the negative terminal 728C:

[0337] At stage 861, switch SW 7C[1] can be closed while the other switches are open to cause a “bypass” of the NDE of driver 700C-2, transferring the ground voltage at negative terminal 728C to output terminal 704C, where V O7C =0 is in a stable state;

[0338] At stages 862, 866, switch SW 7C[2] can be closed while the other switches are open so that will equal V 7C[1] The voltage is transmitted to the output terminal 704C, where V O7C =-1 / 3V DD7Cin a stable state;

[0339] At stages 863 and 865, switch SW 7C[3] can be closed while the other switches are open, to cause a voltage equal to V 7C[1] +V 7C[2] The voltage is transmitted to the output terminal 704C, where V O7C =(2 / 3)V DD7C is in a stable state; and

[0340] At stage 864, switch SW 7C[4] can be closed while the other switches are open to cause another "bypass" of the non-dissipative components of driver 700C-2, so that the voltage source V DD7C The voltage at is transferred to the output terminal 704C, where V O7C =V DD7C In a stable state.

[0341] Figure 8B-2B2 Shows the NDEC 7C[3] In method 86, no contribution is made to the change in voltage VO7C, essentially showing NDE C 7C[3] It is redundant in drive 700C-2.

[0342] Capacitor Driver 700F: Adding Switches to Circuits

[0343] Capacitor element driver 700F is similar to Figure 7C-2 Driver 700C-2. Driver 700F is already in Figure 7F To align with the driver 700C-2, including its components and nomenclature, the reference numerals have been modified to refer to 700F rather than 700C-2, and therefore many details of the switch 700F will not be repeated. Similarities between the driver 700F and the driver 700C-2 include:

[0344] Removing the positive interconnection between node 705C(4) and the positive terminal 726C of the voltage source in driver 700C-2;

[0345] Figure 700F adds a positive interconnect 716F between the positive terminal 726F and the circuit output terminal 704F;

[0346] · In Figure 700F, the switch SW is added. 7F-4 Node 754F on positive interconnect 716F at the output of ; and

[0347] Diagram 700F adds a fifth switch SW arranged on positive interconnect 716F between positive terminal 726F and node 754F 7F-5 .

[0348] A description of method 700F associated with circuit 700F and a comparison of methods 86, 2600 is presented in FIG. 26D and in Section 9, Circuit / Switching Sequence Method Variants, described in detail below.

[0349] Capacitor Element Driver 700D / 700E

[0350] Figure 7D and Figure 7E Other embodiments of the capacitive element driver of the present invention are shown. In capacitive element drivers 700D and 700E, the storage capacitors (non-dissipative elements) are not limited to having their terminals connected together with one terminal of the first non-dissipative element (in series, electrically and directly connected to one terminal of the voltage source) and one terminal of the last non-dissipative element (in series, electrically and directly connected to another terminal of the voltage source). In drivers 700D and 700E, the NDE terminals can be connected to other nodes. For example, they can be electrically connected to the negative terminal of the voltage source (ground), or the positive terminal of the voltage source, or any number of other connections or combinations thereof. The terminals of the non-dissipative elements of the driver can be electrically connected to the ground, the voltage source, or any number of other nodes in the circuit, such as low-impedance voltage nodes. In addition, as one of ordinary skill in the art of circuit design will appreciate, the terminals of some non-dissipative elements can be connected in series, while others are connected to other common nodes. Typically, the terminals of the non-dissipative elements of the driver can be electrically connected directly or indirectly between the terminals of the voltage source.

[0351] In the earlier described embodiments of the driver having two or more non-dissipative elements and three or more switches, the switches may be electrically connected at one end to the input terminal of the capacitive element, while the first and last switches may be electrically connected at their other ends to the negative and positive terminals of the voltage source, respectively. The n NDEs of the driver 700D, 700E disclosed herein may be electrically connected in parallel, and the driver 700D, 700E differs from the previously disclosed embodiments in that:

[0352] one or more non-dissipative elements are not arranged in series between the terminals of the voltage source;

[0353] The first and last switches of the driver may be directly electrically connected at one of their ends to one of the terminals of the voltage source and may be directly electrically connected at their other ends to an output terminal of the driver;

[0354] The remaining switches (number n) may be associated with and electrically connected to the n NDEs to form a set of switch / NDE combinations, with one end of a selected switch / NDE combination electrically connected to the other switch / NDE combinations at the NDE common node, and the other end of the selected switch / NDE combination also electrically connected to the other switch / NDE combinations at the switch common node;

[0355] One of the first and last switches may be electrically connected between the NDE common and the input of the driven capacitive element, and the other of the first and last switches may be electrically connected between the switch common and one of the terminals of the source voltage.

[0356] Additionally, as described in further detail below in the detailed description of variants E, F, G, and H, a driver / method combination can be constructed to access the driver's NDE in any desired order. As an example, an alternative method may have one of five other options for toggling the switch in the switch / NDE combination, in any of the mathematically possible combinations.

[0357] exist Figure 7D In the drive 700D shown in:

[0358] First switch SW 7D[1] can be provided on the negative interconnect of driver 700D, which is connected at one end to a capacitive element C O7D and connected at its other end to an NDE node 705D(0), which links a set of common nodes 705D(1), ..., 705D(n); and

[0359] The final switch SW 7D[n+2] may be provided on the positive interconnect of driver 700D, which has one end connected to switch node 705D(n+1), which links the electrically connected switch end of the switch / NDE combination to the positive interconnect and has its other end connected to the positive terminal 726D of the voltage source.

[0360] In driver 700D, the switches in the switch / NDE combination are arranged between the positive terminal of the NDE and a positive common node 705D(n+1), which is itself arranged between the last switch (connected to the positive terminal of the voltage source) and the driver output terminal; the switches in the switch / NDE combination are arranged to disconnect the positive common node 705D(n+1) from its associated NDE. In other embodiments of driver 700D, the switches in the switch / NDE combination may be placed between the negative terminal of the NDE and a negative common node 705D(0), which is itself placed between the first switch (connected to the negative terminal of the voltage source) and the driver output terminal.

[0361] In fact, in Figure 7D Placing the switch in the switch / NDE combination at the negative terminal of the NDE allows NMOS technology to be used to construct the driver 700D so that all control signals can be referenced to ground, thereby simplifying the semiconductor design of the driver 700D.

[0362] The operation of driver 700D allows the voltage of the capacitive element to be driven between two voltage levels, such as a ground voltage and a power supply voltage, by transferring the energy stored in the non-dissipative element to the capacitive element in a step-wise transfer manner by alternately turning on and off two or more switches in a sequence to drive the voltage of the capacitive element between the two levels. Driver 700D may need to initially operate over multiple switching cycles / sequences in order for the n non-dissipative elements of driver 700D to reach steady-state (equilibrium) values ​​that are similar to those reached by the non-dissipative elements of driver 700A from the start of driver operation. During the initial switching operation of driver 700D, charge will be redistributed from the capacitive elements to the n non-dissipative elements of driver 700D until the n non-dissipative elements reach their steady-state (equilibrium) values. When the n non-dissipative elements of driver 700D reach their steady-state (equilibrium) values, the voltage they can provide becomes voltage V DD7D Integer multiples, specifically, V CS7D[i] =V DD7D *i / (n+1), where i is the i-th non-dissipative component in the group of n non-dissipative components of driver 700D.

[0363] After initial operation of several switching cycles / sequences, the switching method of driver 700D may produce the following results:

[0364] When the switch SW 7D[1] When closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700D results in the ground voltage at negative terminal 728D being transferred to the capacitive element C O7D Input 732D;

[0365] When the switch SW 7D[2] When closed and other switches are open, it is equal to V CS7D[1] The voltage is transferred to the capacitor element C O7D Input;

[0366] When the switch SW 7D[3] (not shown) is closed and the other switches are open, equal to V CS7D[2] The voltage is transferred to the capacitor element C O7D input; and

[0367] When the switch SW 7D[n+1]When closed and other switches are open, it is equal to V CS7D[n] The voltage is transferred to the capacitor element C O7D input; and

[0368] When the switch SW 7D[n+2] When the switch is closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700D causes the supply voltage V at positive terminal 726D to DD7D Transfer to capacitor element C O7D Input terminal 732D.

[0369] The switching method for driver 700D may include a reverse switching process to drive the voltage of the capacitive element back to the initial level. Specifically:

[0370] When the switch SW 7D[n+1] When one switch is closed and the other is open, it is equal to V CS7D[n] The voltage is transferred to the capacitor element C O7D Input;

[0371] When the switch SW 7D[3] (not shown) is closed and the other switches are open, equal to V CS7D[2] The voltage is transferred to the capacitor element C O7D Input;

[0372] When the switch SW 7D[2] When closed and other switches are open, it is equal to V CS7D[1] The voltage is transferred to the capacitor element C O7D input; and

[0373] When the switch SW 7D[1] When closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700D results in the ground voltage at negative terminal 728D being transferred to the capacitive element C O7D Input 732D.

[0374] As described above, in driver 700D, the initial operation of the repeated cycles of the switching sequence will redistribute the charge among the non-dissipative elements until the steady-state average voltage across the non-dissipative elements is given by:

[0375] V CS7D[i] =V DD7D *i / (n+1).

[0376] exist Figure 7E Drive 700E:

[0377] First switch SW 7E[1]may be provided on the negative interconnect of driver 700E, connected at one end to the negative terminal 728E of voltage source 720E and at the other end to the switch common node 705E(n+1), which switches switch SW 7E[2] , SW 7E[3] ......SW 7E[n+1 ] connected to the outlet of drive 700E; and

[0378] The final switch SW 7E[n+2] It can be set on the positive interconnection of driver 700E, with one end connected to the capacitive element C O7E The other end of the input 732E is connected to the NDE C S7E[1] 、C S7E[2] ......C S7E[n] Link to the public node of the NDE being interconnected.

[0379] Similar to driver 700D, in driver 700E, the switches in the switch / NDE combination are arranged between the negative terminal of the NDE and the negative common node 705E(n+1), which is itself arranged between the first switch (connected to the negative terminal of the voltage source) and the driver output terminal; the switches in the switch / NDE combination are arranged to disconnect the negative common node 705E(n+1) from its associated NDE. In other embodiments of driver 700E, the switches in the switch / NDE combination may be arranged between the positive terminal of the NDE and the positive common node 705E(0), which is itself arranged between the last switch (connected to the positive terminal of the voltage source) and the driver output terminal.

[0380] In fact, in Figure 7E Placing the switch / NDE combination at the positive terminal of the NDE allows the construction of FIG. 700D using PMOS technology so that all control signals can be referenced to V DD7E , thereby simplifying the semiconductor design of the driver 700E.

[0381] Like the operation of driver 700D, driver 700D allows the voltage of the capacitive element to be driven between two voltage levels (e.g., ground and a power supply voltage) by transferring the energy stored in the non-dissipative element to the capacitive element in a stepwise transfer manner by alternately turning on and off two or more switches in a sequence. Like driver 700D, driver 700E may need to initially operate over multiple switching cycles / sequences in order for the n non-dissipative elements of driver 700E to reach steady-state (equilibrium) values ​​that are similar to those reached by the non-dissipative elements of driver 700A from the start of driver operation. During the initial switching operation of driver 700E, charge will be redistributed from the capacitive elements to the n non-dissipative elements of driver 700E until the n non-dissipative elements reach their steady-state (equilibrium) values. When the n non-dissipative elements of driver 700E reach their steady-state (equilibrium) values, the voltage they can provide becomes voltage V DD7E Integer multiples, specifically V CS7E[i] =V DD7E *(n+1-i) / (n+1), where i is the i-th non-dissipative component in the group of n non-dissipative components of the driver 700E.

[0382] After initial operation of several switching cycles / sequences, the switching method of the driver 700E may produce the following results:

[0383] When the switch SW 7E[1] When closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700E results in the ground voltage at negative terminal 728E being transferred to the capacitive element C O7E Input 732E;

[0384] When the switch SW 7E[2] When closed and the other switches are open, it will be equal to V DD7E Subtract V CS7E[1] The voltage is transferred to the capacitor element C O7E Input;

[0385] When the switch SW 7E[3] (not shown) is closed and the other switches are open, it will be equal to V DD7E Subtract V CS7E[2] The voltage is transferred to the capacitor element C O7E Input;

[0386] When the switch SW 7E[n+1] When one switch is closed and the other is open, it will be equal to V DD7E Subtract V CS7E[n] The voltage is transferred to the capacitor element C O7E Input;

[0387] When the switch SW 7E[n+2] When the switch is closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700E causes the supply voltage V at positive terminal 726E to DD7E Transfer to capacitor element C O7E Input 732E.

[0388] As in the switching method for driver 700D, the switching method for driver 700E may include a reverse switching process to drive the voltage of the capacitive element back to the initial level. Specifically:

[0389] When the switch SW 7E[n+1] When closed and the other switches are open, it will be equal to V DD7E Subtract V CS7E[n] The voltage is transferred to the capacitor element C O7E Input;

[0390] When the switch SW 7E[3] (not shown) is closed and the other switches are open, it will be equal to V DD7E Subtract V CS7E[2] The voltage is transferred to the capacitor element C O7E Input;

[0391] When the switch SW 7E[2] When closed and the other switches are open, it will be equal to V DD7E Subtract V CS7E[1] The voltage is transferred to the capacitor element C O7E input; and

[0392] When the switch SW 7E[1] When the switch is closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700D results in the ground voltage at negative terminal 728E being transferred to the capacitive element C O7E Input 732E;

[0393] As with the driver 700E, the initial operation of repeated cycles of the switching sequence will redistribute the charge among the non-dissipative elements until the steady-state average voltage across the non-dissipative elements is given by:

[0394] V CS7E[i] =V DD7E *(n+1-i) / (n+1)

[0395] =V DD7E -V DD7E *(i) / (n+1).

[0396] During operation of the capacitive element drivers 700D, 700E, through their complete drive cycles, embodiments of the capacitive element drivers 700D, 700E may undergo the same stage and switching sequence phases and sub-phases as disclosed with reference to the capacitive element driver 700A, wherein the average voltage level value of the non-dissipative element may remain constant over time as the first capacitive element driver operates through the first stage sequence.

[0397] For example, as with driver 700A, the stage sequence for driver 700D can have a switch activation mode with a bypass portion, wherein the capacitor element driver is bypassed during application of the bypass portion to the capacitor element driver; and an additional portion, which can be applied to the capacitor element driver after the bypass portion is applied to the capacitor element driver, and wherein a voltage is added to the input voltage of the capacitor element driver during application of the additional portion to the capacitor element driver. In addition, the switch activation mode can have a second additional portion, which is applied to the capacitor element driver before the bypass portion is applied to the capacitor element driver and is configured to increase the input voltage of the capacitor element driver by another voltage during application of the additional portion to the capacitor element driver.

[0398] Furthermore, as with driver 700A, the switching stage sequence may include a switching pattern in the capacitor element driver, wherein a subtraction section may be applied to the driver to subtract a voltage from an input voltage of the capacitor element driver during application to the capacitor element driver; and a bypass section is configured to be applied to the capacitor element driver after the subtraction section is applied to the capacitor element driver, and to bypass the capacitor element of the capacitor element driver during application to the capacitor element driver. Furthermore, the switching pattern may include a second subtraction section, which is configured to be applied to the capacitor element driver after the bypass section is applied to the capacitor element driver, and is configured to cause another voltage to be subtracted from the input voltage of the capacitor element driver during application to the capacitor element driver.

[0399] When drivers 700A, 700C-1, 700C-2 are matched with appropriately sized components (which would be readily accomplished by a circuit designer of ordinary skill in the art), the "series" configuration of the non-dissipative elements in drivers 700A, 700C allows for the following to be achieved whenever the supply voltage (V DD7A 、V DD7C ) changes, the voltages on their respective storage capacitors (non-dissipative elements) immediately settle to their respective steady-state values. Alternatively, the independently connected or independently referenced (sometimes referred to as "nested" or "parallel") configuration of the non-dissipative elements in drivers 700D, 700E requires the drivers to operate through multiple switching cycles to transfer charge between their non-dissipative elements before they reach their steady-state voltages.

[0400] Capacitor Component Driver 700G / 700H

[0401] Figure 7G and Figure 7H Capacitive element drivers 700G and 700H are shown, which are three non-dissipative element (NDE) versions of the generic capacitive element drivers 700D and 700E, respectively. Drivers 700G and 700H have three (3) NDEs and five (5) switches. In capacitive element drivers 700G and 700H, as in capacitive element drivers 700D and 700E, the terminals of the non-dissipative elements can be arranged in parallel between a common node.

[0402] As described below, although NDEs can be arranged in parallel, topologically, they should not be accessed together in any single phase; otherwise, charge sharing between the NDEs and the capacitive elements of the circuit driving them could cause the average NDE voltage to vary over time. The NDEs can be isolated (with no connections for charge sharing) or connected individually to the output terminals of a driver, which itself is connected to the capacitive elements. Alternatively, the NDEs can be connected in series with other NDEs at the output of the driver.

[0403] Drives 700G and 700H are already Figure 7G 、 Figure 7H In order to meet the Figure 7D Driver 700D, Figure 7H The drive 700H, including their components and nomenclature, the reference numerals of the components of the drives 700D, 700E are modified to refer to their corresponding components in the drives 700G, 700H and therefore will not be described in detail here.

[0404] 4. Capacitor element driver assembly

[0405] Since capacitor element drivers 400, 780 are embodiments of capacitor element driver 700A, for purposes of describing the components of the capacitor element driver of the present invention herein, the components of capacitor element driver 700A will be used herein to represent the components in capacitor element drivers 400, 780 and any other capacitor element drivers encompassed by the present invention.

[0406] Non-dissipative components

[0407] The embodiment shown in capacitive element driver 700A does not require and / or constrain the relationship between the value of one non-dissipative element and the value of another, different, non-dissipative element. For example, the value of one non-dissipative element may be equal to the value of another, different, non-dissipative element; or the value of one non-dissipative element may be different from the value of another, different, non-dissipative element, and the two different values ​​may be close or not close at all.

[0408] Furthermore, the embodiment shown in capacitive element driver 700A does not require and / or constrain the use of one non-dissipative element and a different type of non-dissipative element. In illustrative, but not necessarily preferred, embodiments, one non-dissipative element may be a storage capacitor. In these embodiments, the other non-dissipative element may also be a storage capacitor or another type of non-dissipative element, such as a rechargeable battery, a reverse-biased semiconductor PN junction, or a capacitor whose capacitance is changed by a transformer.

[0409] The storage capacitor in the capacitive element driver 700A can be of any suitable type. For example, but not limited to, the storage capacitor can be a transistor; it can be ceramic or electrolytic, or it can be manufactured using any known method, including but not limited to poly-insulator-poly (PIP), metal-insulator-metal (MIM), metal-oxide-metal (MOM), or metal-oxide-semiconductor (MOS). The storage capacitors do not have to be of the same type; one storage capacitor can be the same, similar, or a different type than another storage capacitor.

[0410] switch

[0411] There are no requirements and / or limitations on the implementation of the switches and / or the configuration of the switches in the capacitive element driver 700A. Figures 9A-9G Examples of suitable switches for use in capacitive element driver 700A are shown without limitation in FIG. Although certain figures shown herein and the disclosure herein describe certain transistors as n-channel or p-channel, it should be understood that any suitable transistor may be used. For example, an n-channel or p-channel field effect transistor (FET) may be used in place of an n-channel or p-channel transistor. An NPN or PNP bipolar junction transistor (BJT) may be used in place of an n-channel or p-channel transistor, wherein the BJT has an emitter instead of a source and a collector instead of a drain.

[0412] Figure 9A Shown with terminal a 9a and b 9a Switch SW 9a (910) configuration.

[0413] Figure 9B Two configurations are shown: n-channel transistor SW 9b1 (920), where terminal a 9b1 Located at its source, and terminal b 9b1 at its drain; and an n-channel transistor SW 9b2 (925), where terminal a 9b2 Located at its drain, and terminal b 9b2 At its source.

[0414] Figure 9C Two configurations are shown: p-channel transistor SW 9c1 (930), where terminal a 9c1 Located at its source, and terminal b 9c1 at its drain; and a p-channel transistor SW 9c2 (935), where terminal a 9c2 Located at its drain, and terminal b 9c2 At its source.

[0415] Figure 9D Two configurations of switches formed by parallel connection of n-channel and p-channel transistors are shown:

[0416] Switch SW 9d1 (940) n-channel transistor SW 9b2 The drain of (925) is at its terminal a 9d1 is electrically connected to the p-channel transistor SW 9c1 (930) source, and wherein the n-channel transistor SW 9b2 The source of (925) is at its terminal b 9d1 is electrically connected to the p-channel transistor SW 9c1 (930) drain.

[0417] Switch SW 9d2 (945) n-channel transistor SW 9b1 The source of (920) is at its terminal a 9d2 is electrically connected to the p-channel transistor SW 9c2 (935) drain, and wherein the n-channel transistor SW 9b1 The drain of (920) is at its terminal b 9d2 is electrically connected to the p-channel transistor SW 9c2 (935) source.

[0418] Figure 9E Two configurations of switches formed by two n-channel transistors in series are shown.

[0419] Switch SW 9e1 (950) has an n-channel transistor SW 9b2 (925), whose drain is electrically connected to the switch terminal a 9e1 , whose source is electrically connected to the n-channel transistor SW 9b1 (920) (its drain is located at the switch terminal b 9e1 ) source.

[0420] Switch SW 9e2 (955) has an n-channel transistor SW 9b1(920), whose source is electrically connected to the switch terminal a 9e2 , whose drain is electrically connected to the n-channel transistor SW 9b2 (925) (whose source is located at switch terminal b 9e2 ) of the drain.

[0421] Figure 9F Shown is the configuration of a switch formed by two p-channel transistors connected in series.

[0422] Switch SW 9f1 (960) has a p-channel transistor SW 9c2 (935), whose drain is electrically connected to the switch terminal a 9f1 , whose source is electrically connected to the p-channel transistor SW 9c1 (930) (its drain is located at the switch terminal b 9f1 ) source.

[0423] Switch SW 9f2 (965) has a p-channel transistor SW 9c1 (930), whose source is electrically connected to the switch terminal a 9f2 , whose drain is electrically connected to the p-channel transistor SW 9c2 (935) (whose source is at switch terminal b 9f2 ) of the drain.

[0424] Figure 9G Four configurations of switches formed from two n-channel and two p-channel transistors are shown.

[0425] Switch SW 9g1 (970) and switch SW 9g2 (975) shows two configurations of switches formed by connecting two switches in parallel, one switch having two n-channel transistors in series and the other switch having two p-channel transistors in series.

[0426] Switch SW 9g1 (970) with switch SW 9e1 (950), its switch terminal a 9e1 Electrically connected to switch SW 9g1 (970) switch terminal a 9g1 and switch SW 9f2 (965) switch terminal a 9f2 ; and its switch terminal b 9e1 Electrically connected to switch SW 9g1 (970) switch terminal b 9g1 and switch SW 9f2 (965) switch terminal b 9g2 .

[0427] Switch SW 9g2 (975) with switch SW 9e2 (955), its switch terminal a 9e2 Electrically connected to switch SW 9g2 (975) switch terminal a 9g2 and switch SW 9f1 (960) switch terminal a 9f1 ; and its switch terminal b 9e2 Electrically connected to switch SW 9g2 (975) switch terminal b 9g2 and switch SW 9f1 (960) switch terminal b 9g1 .

[0428] Switch SW 9g3 (980) and switch SW 9g4 (985) shows two configurations of switches formed by two switches in series, where each switch has an n-channel and a p-channel transistor in parallel.

[0429] Switch SW 9g3 (980) with switch SW 9d1 (940), its switch terminal a 9d1 Electrically connected to switch SW 9g3 (980) switch terminal a 9g3 ; and its switch terminal b 9d1 Electrically connected to switch SW 9d2 (945) switch terminal a 9d2 , so that its switch terminal b 9d2 Electrically connected to switch SW 9g3 (980) switch terminal b 9g3 .

[0430] Switch SW 9g4 (985) with switch SW 9d2 (945), its switch terminal a 9d2 Electrically connected to switch SW 9g4 (985) switch terminal a 9g4 ; and its switch terminal b 9d2 Electrically connected to switch SW 9d1 (940) switch terminal a 9d1 , so that its switch terminal b 9d1 Electrically connected to switch SW 9g4 (985) switch terminal b 9g4 .

[0431] Capacitor components

[0432] As described above, the capacitive element can be a capacitor or any element that can be positioned at the output terminal of a circuit and function as a capacitor therein. For example, the capacitive element can be one or more capacitive loading elements. Furthermore, as with capacitive elements 430 and 730A, the capacitive element can be a unit separate from and electrically connectable to the capacitive drive circuitry of a capacitive element driver, but in other embodiments, it can be a component of the capacitive element driver.

[0433] There is no limitation on the type of capacitor element to be driven in the capacitor element driver 700A. Figures 10-18 The impedance (Z) between any two terminals shows the capacitance function in the electrical device / network, and the capacitance element driver 700A can be used to reduce the capacitance of each complete V O7A The total energy dissipated in the drive cycle to power the electrical device / network.

[0434] In operation, the electrical device / network 1030 can be operated by changing its impedance Z 10 Terminal 1034 is electrically connected to first node 1004 (also referred to as V O10 node) to connect to Figure 10 Driver 1000, node 1004 is electrically connected to the switch SW of the drive circuit 1010 10[1] To SW 10[n+1] The common node 1014 is connected to the terminal 1036 (which has the same impedance Z in this illustrative but not necessarily preferred embodiment) 10 ) is electrically connected to a node 1006, which is electrically connected to a voltage source 1020 (eg, a voltage source V DD10 )'s positive terminal 1026.

[0435] Figure 11 Another embodiment of a capacitive element driver is shown in FIG. 1 , wherein an n-terminal device / network 1130 has a capacitor present at terminal X. 11 and terminal Y 11 The impedance between XY11 ) and illustrates the function of capacitance in electrical devices / networks. The driver 1100 has a capacitance drive circuit 1110 that can be used to reduce the capacitance of each complete V O11 The total energy dissipated by the drive cycle to drive the electrical device / network 1130. Figure 11 As shown, the terminal X of the n-terminal electrical device / network 1130 11 Can be connected to the V of the driver 1100 O11 Node 1104, which is electrically connected to the switch SW of the capacitor driving circuit 1110 11[1] To SW11[n+1] The common node 1114 and the terminal Y of the n-terminal electrical device / network 1130 11 can be connected to node 1108, which is electrically connected to the voltage source V of the driver 1100 DD11 The negative terminal 1128.

[0436] Figure 12 Another embodiment of a capacitive element driver is shown in FIG. 1 , wherein an n-terminal device / network 1230 has a capacitor present at terminal X. 12 and terminal Y 12 The impedance between XY12 ) and illustrates the function of capacitance in an electrical device / network. The driver 1200 has a capacitance drive circuit 1210 that can be used to reduce the capacitance of each complete V O12 The total energy dissipated by the drive cycle to drive the electrical device / network 1230. Figure 12 As shown, the terminal X of the n-terminal electrical device / network 1230 12 Can be connected to the driver 1200 V O12 Node 1204, which is electrically connected to the switch SW of the capacitor driving circuit 1210 12[1] To SW 12[n+1] The common node 1214 and the terminal Y of the n-terminal electrical device / network 1230 12 can be connected to node 1206, which is electrically connected to a voltage source V DD12 The positive terminal 1226.

[0437] The n-terminal device / network may be of any suitable type, including but not limited to a transistor, which may have an impedance (Z) present between its gate and source terminals and may exhibit a capacitive function; thus, a capacitive drive circuit such as those described herein may be used to drive the transistor in a manner that reduces the total energy dissipation per complete output voltage drive cycle. Such a transistor may be of any suitable type, including a MOSFET, GaN-FET, SiC-FET, JFET, or IGBT, and may be formed from a single transistor or a plurality of transistors.

[0438] Figure 13-16 Four such embodiments are shown in FIG. 1 , wherein the gate terminals of transistors 1330 , 1430 , 1530 , and 1630 are electrically connected to V of the capacitor driving circuit 1310 , respectively. O13 Node 1314, V of capacitor driving circuit 1410 O14 Node 1414, V of capacitor driving circuit 1510 O15 Node 1514, V of capacitor driving circuit 1610 O16 Node 1614.

[0439] ·exist Figure 13 , the source terminal 1337 of transistor 1330 is electrically connected to a voltage source V DD13 Negative terminal 1328 (electrically connected to circuit 1310).

[0440] ·exist Figure 14 , the source terminal 1437 of transistor 1430 is electrically connected to a voltage source V DD14 Positive terminal 1426 (electrically connected to circuit 1410).

[0441] ·exist Figure 15 , the drain terminal 1539 of transistor 1530 is electrically connected to a voltage source V DD15 Positive terminal 1526 (electrically connected to circuit 1510).

[0442] ·exist Figure 16 , the drain terminal 1639 of transistor 1630 is electrically connected to a voltage source V DD16 Negative terminal 1628 (electrically connected to circuit 1610).

[0443] exist Figure 13-16 In the circuit of , for simplicity, the source and drain terminals are shown as unconnected. It is obvious to one of ordinary skill in the art of circuits that such terminals can be electrically connected to another component such as a power source (e.g., a voltage source).

[0444] exist Figure 17-18 Two further embodiments of capacitive element drivers are shown in FIG, wherein elements such as devices / networks 1740, 1840 can be driven by capacitive drive circuits 1710, 1810, respectively, through capacitive elements 1730, 1830, respectively. Devices / networks 1740, 1840 can be one or more transistors or devices / networks formed by any combination of different passive elements (e.g., resistors, capacitors, inductors) and / or active elements (e.g., transistors). Devices / networks 1740, 1840 can have more than two terminals and can have an impedance (Z) across the terminals; thus, devices / networks 1740, 1840 can exhibit capacitive functionality and can be driven by capacitive drive circuits, such as capacitive drive circuits 1710, 1810, respectively, to reduce the total energy dissipation per complete output voltage drive cycle.

[0445] Figure 17 and Figure 18Capacitive drive circuits 1710, 1810 are shown electrically connected to capacitive elements 1730, 1830, which are in turn electrically connected to devices / networks 1740, 1840, respectively. Devices / networks 1740, 1840 are electrically connected to the capacitive drive circuits 1710, 1810 via voltage sources 1720, 1820, terminals 1746, 1846 of devices / networks 1740, 1840 are electrically connected to positive terminals 1726, 1826 of voltage sources 1720, 1820, respectively; and terminals 1748, 1848 are electrically connected to voltage sources V DD17 、V DD18 Negative terminals 1728, 1828.

[0446] exist Figure 17 、 Figure 18 In an illustrative but not necessarily preferred embodiment, the capacitive elements 1730 , 1830 are transistors, but it should be understood that any suitable electrical device or network having a capacitive function may be used as the capacitive elements 1730 , 1830 . Figure 17 、 Figure 18 1710 are shown electrically connected to the V O17 Node 1714 and V of capacitor drive circuit 1810 O18 Transistors 1730 , 1830 at node 1814 .

[0447] Figure 17 shows source terminal 1737 of transistor 1730 connected to node 1744 of device / network 1740; and Figure 18 The drain terminal 1839 of transistor 1830 is shown connected to node 1844 of device / network 1840. Figure 17 In other embodiments, the drain terminal 1739 of the transistor 1730 may be connected to an additional terminal of the device / network 1740; and Figure 18 In other embodiments, the source 1837 of the transistor 1830 can be connected to an additional terminal of the device / network 1840 .

[0448] In operation, the capacitor driving circuits 1710 and 1810 respectively pass through the capacitor elements 1730 and 1830 in a complete V O17 、V O18 The drive cycle is hierarchically driven by the device / network 1740, 1840, wherein the switches of the capacitor drive circuits 1710, 1810 are switched from ground to V DD17 、V DD18 A complete V O17 、V O18The switching stages are combined in a sequence of closing and opening within a drive cycle. The stages may be those described herein and implemented as a switching sequence method, defined to ensure that the average value of the voltage of the storage capacitor remains constant over time.

[0449] exist Figure 17 、 Figure 18 , a device / network 1740, 1840 having three terminals is shown. When the device / network 1740, 1840 is a two-terminal system, one of the network / device terminals is connected to the drain or source terminal of the transistor 1730, 1830, and the other of the network / device terminals is electrically connected to a voltage source V DD17 、V DD18 In other embodiments, another of the network / device terminals can be connected between the device / network 1740, 1840 and the voltage source V DD17 、V DD18 Any one of the multiple terminals of the "black box" electrically connected between is electrically connected to a voltage source V DD17 、V DD18 positive or negative terminal.

[0450] 5. Application of switch sequence

[0451] Although the switching sequence method described herein is contemplated to be repeatable over a plurality of output voltage drive cycles to provide periodic charging of a capacitive element or a device / system serving as a capacitive element, it will be appreciated that the capacitive element driver and switching sequence method described herein may be used to provide periodic drive for a selected number of output voltage drive cycles or a selected period, followed by inactivity.

[0452] It is also understood that the switching sequence method described herein can be implemented in a discontinuous manner without limiting the stage at which the switching sequence method should begin. Figure 8A , the capacitive element driver can be started at any stage from stage 801(1) to stage 801(4n+2). The capacitive element driver can then be switched by following a switching sequence method such as that disclosed herein and can be stopped at any stage that is subsequently inactive.

[0453] It will be appreciated that while the capacitive driver and switching sequence method described herein may be used in applications where periodic switching is used to maintain the voltage of a storage capacitor in a driver, the capacitive driver and switching sequence method may also be used to reduce energy losses in applications involving one-time actuation of a capacitive element. While periodic switching may be used to maintain the voltage of a storage capacitor in a driver, it will be appreciated that once the voltage of the storage capacitor in the driver is maintained, a one-time actuation of the capacitive element may be performed with reduced energy losses.

[0454] 6. High-frequency switching capacitor element drive circuit

[0455] Apparatus, methods, and systems for driving the voltage of a capacitive element between two voltage levels, such as ground and a power supply voltage, may be used to provide efficient high frequency switching.

[0456] The capacitive elements disclosed herein can be combined with power switches to produce high efficiency switches. Figure 19A is a circuit diagram illustrating a high-efficiency switching system 1900a, in which a capacitive element driver 1910a can be electrically connected to the gate of a power switch 1930a (which can be a circuit, but in this illustrative, but not necessarily preferred, embodiment is a transistor, and can be switched at very high frequencies). The drain and source of the power switch 1930a can be accessed by a user via terminals 1915a, 1914a, respectively, and can be connected as needed for the application. To control the gate of the power switch 1930a, the high-efficiency switching system 1900a can have a switch controller 1960a electrically connected to the capacitive element driver 1910a to provide a control signal to signal the capacitive element driver 1910a to start or stop a switching sequence method such as one of the ones disclosed herein (e.g., Figure 8A ). Similarly, Figure 19B is a circuit diagram illustrating a high-efficiency switching system 1900b, wherein a capacitive element driver 1910b may be electrically connected to the gate of a power switch 1930b; and the drain and source of the power switch 1930b may be accessible via terminals 1915b and 1914b. The high-efficiency switching system 1900b may include a switch controller 1960b electrically connected to the capacitive element driver 1910b via terminal 1912b.

[0457] The high efficiency switching system 1900a can have a dual voltage source V DD19a and V SS19a .like Figure 19A As shown, the voltage source V DD19a The positive terminal of can be connected to the system 1900a through the terminal 1911a; the voltage source V SS19a The negative terminal of the voltage source V DD19a The negative terminal and voltage source V SS19a The positive terminals of can be connected to system 1900a via terminal 1916a. Figure 19B As shown, the voltage source V DD19b The positive terminal of can be connected to the system 1900b through the terminal 1911b; the voltage source V SS19b The negative terminal of the voltage source V DD19b The negative terminal and voltage source V SS19bThe positive terminals of can be connected to system 1900b via terminal 1916b.

[0458] although Figure 19A Not shown, but reference Figure 7A Capacitive element driver 700A or Figure 16 From the capacitor driving circuit 1610 shown in FIG. 1 , it can be seen that:

[0459] Voltage source V DD19a The positive terminal of the capacitor element driver 1910a can be electrically connected to the last switch SW through the terminal 1911a. 19[n+2] (not shown) (similar to the voltage source V DD7A The positive terminal can be electrically connected to the last switch SW of the capacitor element driver 700A. 7[n+2] And the voltage source V DD16 The positive terminal of the capacitor driving circuit 1610 can be electrically connected to the last switch SW 16[n+2] ), and

[0460] Voltage source V SS19a The negative terminal of the capacitor can be electrically connected to the first switch SW of the capacitor element driver 1910a through the terminal 1913a. 19[0] (not shown) (similar to the voltage source V DD7A The negative terminal of the capacitor element driver 700A can be electrically connected to the first switch SW 7[0] And the voltage source V DD16 The negative terminal of the capacitor driving circuit 1610 can be electrically connected to the first switch SW 16[0] method).

[0461] Terminal V GREF The two terminals (specifically, terminal 1916a and source terminal 1914a of power switch 1930a) can be electrically connected. SS19a Remove the capacitor element driver 1910a and electrically connect the terminal 1913a to the terminal 1916a, and the circuit design of the capacitor element driver 1910a will be almost the same as Figure 16 The circuit design of the capacitor driving circuit 1610 is the same except that the source and drain of the power switch 1930a and the power switch 1630 are connected to the driver 1910a and 1610 respectively. Figure 13 ,because Figure 19A Shown in the removal Figure 19A The voltage source V SS19a Afterwards Figure 13 The circuit shown is the same circuit.

[0462] In the switch sequence method 2200 (which is Figure 8A 、 Figure 8B-1 80), method 2200 reflects the number of non-dissipative components and switches in system 1900a, and the gate of power switch 1930a can be controlled according to the switch SW from controller 1960a (which can be electrically connected to capacitor element driver 1910a via terminal 1917a). 19[0] To SW 19[n+2] ) signal, from V GREF -V SS19a Drive to V GREF +V DD19a， Then from V GREF +V DD19a Drive to V GREF -V SS19a In embodiments where the capacitor element driver 1910a has more than one driver unit, such as the dual-unit capacitor element driver circuit 2100 disclosed below, a circuit such as Figures 22K to 22M-5B or Figure 24A-24B-3 Those switch sequence methods shown in .

[0463] It may be noted that in the previously described embodiments, e.g. Figure 4 In the embodiment shown, the voltage source is part of the disclosed system and is Figure 19A 、 Figure 19B In the embodiment shown, the voltage source V DD19a 、V SS19a 、V DD19b 、V SS19b Located external to the systems 1900a, 1900b. Either positioning is acceptable, and the choice of voltage source location is a designer's choice, regardless of whether one or more voltage sources are used in the system.

[0464] Similarly, in Figure 19A In some embodiments shown, the switch controller 1960a is external to the system 1900a and is electrically connected to the system 1900a via the terminal 1917a, but is not located in a manner such as Figure 19B In other embodiments shown, the switch controller 1960b is part of the system 1900b and is connected to a control path system (not shown) via terminal 1917b to receive instructions such as enabling triggering the switch controller 1960b to signal circuits and components of the system 1900b.

[0465] Additionally, in certain embodiments, capacitive elements, e.g. Figure 10 The electrical device / network 1030 is shown as being external to the system 1000 and not directly connected to the switch controller. In other embodiments, the capacitive elements, such as capacitive elements 1930a and 1930b (e.g., as shown in FIG. 1 ) are connected to the switch controller 1000 and are not directly connected to the switch controller 1000. Figure 19A 、 Figure 19B ) is part of the systems 1900a, 1900b and can be directly connected to the switch controllers 1960a, 1960b.

[0466] Thus, it can be seen that the capacitive element drivers 1910a, 1910b and the capacitive elements 1930a, 1930b (one or both of which may be transistors) may be packaged together to form a highly efficient switching system 1900a, 1900b.

[0467] 7. Multi-driver unit capacitor element driving circuit

[0468] Capacitor element driver unit

[0469] Figure 20 A capacitive element driver unit (also referred to as a "driver unit" or simply a "unit") 2000 is shown, which can be combined with other driver units to construct a capacitive element driving circuit (which can be used to further reduce the total energy dissipation of each output voltage driving cycle of the capacitive element driver). The driver unit 2000 can be similar to Figure 7A The capacitive element driver 700A is constructed with n non-dissipative elements, which can be respectively capable of storing and releasing voltage V CS20[1] ,V CS20[2] ,V CS20[3] ,...,V CS20[n-1] ,V CS20[n] The storage capacitor (C S20[1] ,C S20[2] ,C S20[3] ,…,C S20[n-1] ,C S20[n] The driver unit 2000 may also have n+3 switches (SW ) connected as n storage capacitors, with the following exceptions: 20[0] , SW 20[1] , SW 20[2] ,…,SW 20[n+2] ) and n+3 switches of driver 700A, switch SW 20[0] , SW 20[1] There is a common node 2005[1] between them, switch SW 20[n+1] , SW 20[n+2] They have a common node 2005(n+1), but with the following exceptions:

[0470] Switch SW 20[0] One terminal (similar to a switch SW 7A[0] The connection to the voltage source V DD7A The negative terminal 728A of the drive unit 2000 operates as the terminal V DOWN20 ;

[0471] Switch SW 20[n+2] One terminal (similar to a switch SW 20[n+2] The connection to the voltage source V DD7A The positive terminal 726A of the drive unit 2000 operates as the terminal V UP20 ;as well as

[0472] For each switch SW 20[y] , where y is from 1 to n+1, switch SW 20[y] One terminal (similar to a switch SW 7A[y] The terminal connected to the terminal 732A of the capacitor element 730A (eg, C O7A )) as the terminal V of the driver unit 2000 X20 2004 operation, the terminal is electrically connected to the switch SW 20[1] With SW 20[n+1] The common node 2014 between the switches.

[0473] In an illustrative, but not necessarily preferred, embodiment, the non-dissipative element may be a storage capacitor. In other embodiments, the non-dissipative element may be another type of non-dissipative element, such as a rechargeable battery, a reverse-biased semiconductor PN junction, or a capacitor whose capacitance is changed by a transformer. Furthermore, in some embodiments, the non-dissipative elements may all be of the same type, and in other embodiments, the non-dissipative elements may all be a combination of multiple types of non-dissipative elements.

[0474] Figure 21 :Basic multi-unit drive circuit

[0475] The driver unit 2000 can be connected in series with one or more driver units 2000 to form a capacitor element multi-unit driving circuit 2100, which can further reduce the energy dissipation of the capacitor element driver with a smaller number of non-dissipative components.

[0476] Figure 21 A basic embodiment of a capacitor element driving circuit 2100 (also referred to as a "driving system" or "circuit") is shown. Figure 21 In the illustrated K-unit driver circuit, K equals 2. Circuit 2100 includes two driver units 2101-1 and 2101-2, each with a single non-dissipative element to further reduce energy dissipation in the capacitive element driver. In an illustrative, but not necessarily preferred, embodiment, both non-dissipative elements are storage capacitors. In other embodiments, both non-dissipative elements can be of different types, or at least one of the non-dissipative elements can be of a different type.

[0477] In addition, although Figure 21The K unit driver circuit 2100 shown in the figure is shown as being formed by two driver units 2000 (which, as described above, can be constructed similarly to the capacitor element driver 700A), but it should be understood that any capacitor element driver disclosed herein (including but not limited to 780, 700C-1, 700C-2, 700D, 700E, 700G, 700H) can be used as the first driver unit 2101-1 in the multi-driver circuit 2100 and in any other embodiments of the multi-driver circuit disclosed below.

[0478] Figures 22A-22J Circuit 2100 is shown in operation.

[0479] Reference Figure 21 and Figures 22A-22J , driver units 2101-1 and 2101-2 are connected in series, wherein unit 2101-1 has:

[0480] Positive input terminal 2111, electrically connected to its switch SW[3],

[0481] Negative input terminal 2113, electrically connected to its switch SW[0], and

[0482] • An output terminal 2104 electrically connected to a common node 2114 of its switches SW[1] and SW[2].

[0483] Voltage source V DD 21 is connected to unit 2101-1, voltage source V DD The positive terminal 2126 of 21 is electrically connected to the positive input terminal 2111, and the voltage source V DD The negative terminal 2128 of the driver unit 2101 is electrically connected to the negative input terminal 2113. The output terminal 2104 is electrically connected to a common node 2115 between the positive input terminal 2121 and the negative input terminal 2123 of the driver unit 2101-2, wherein:

[0484] The positive input terminal 2121 is electrically connected to the switch SW[3] of the unit 2101-2;

[0485] The negative input terminal 2123 is electrically connected to the switch SW[0] of the unit 2101-2;

[0486] Output terminal 2124 is electrically connected to a common node 2134 of switches SW[1] and SW[2] of cell 2101-2, and output terminal 2124 is electrically connected to input terminal 2132 of capacitor element 2130 (e.g., C O21 ).

[0487] In a K-cell driver circuit, when terminal 2104 of one driver cell is electrically connected to a common node between the input terminals of another driver cell, the two cells may be referred to as "adjacent" to each other. Furthermore, when one cell is electrically connected between the other cell and a voltage source of the circuit, the one cell may be referred to as "upstream" of the other cell; and when the other cell is electrically connected between the one cell and an output terminal of the circuit, the other cell may be referred to as "downstream" of a cell in the circuit. Thus, cell 2101-1 may be considered upstream of its neighboring cell 2101-2, and cell 2101-2 may be considered downstream of its neighboring cell 2101-1. Furthermore, driver cells connected in this manner may be referred to as "chained" or "cascaded" driver cells, and the combination of common node 2115, positive input terminal 2121, and negative input terminal 2123 of downstream driver cell 2101-2 may be referred to as a single input terminal of downstream driver cell 2101-2.

[0488] As previously shown in the discussion of circuit 400, circuit 400 has a single storage capacitor and switches in accordance with the switching sequence of stages 501(1)-501(6), the storage capacitor C s The average current (and therefore the net charge) remains zero and the average value is VC S4 =V DD4 / 3. Using the same reasoning, V CS21[1] =V DD21 / 3.

[0489] During the operation of the units 2101-1 and 2101-2, the output V of the unit 2101-1 CS21[1] operates as the input to unit 2101-2. Therefore, using the same reasoning as above, V CS21[2] The average value is equal to V CS21[1] / 3=(V DD21 / 3) / 3=V DD21 / 9Therefore, V DD21 =3V CS21[1] =9V CS21[2] .

[0490] In the operation of the circuit 2100, the 18-stage with a full V O21 drive cycle is associated, and in a complete V O21 Each of the 18 stages of the drive cycle generates a V DD21 / 9 changes.

[0491] As with the capacitor element driver 700A, the driver circuit 2100 has a controller 2160 or is electrically connected to the controller 2160 via a path system, and the controller 2160 is configured to provide a control signal to signal the capacitor element driver circuit 2100 to start or stop the switching sequence method. The switch controller 2160 controls the activation and deactivation of the switches in the driver units 2101-1 and 2101-2 to pass the full V O21 Drive cycle driving circuit 2100, wherein V O21 Drive from ground to V DD21 , and then returns to ground voltage and uses Figures 22A-22J A set of levels is shown:

[0492] ·exist Figure 22A In stage 2201(1), the switch group (SW[0], SW[1]) of unit 2101-1 and the switch group (SW[0], SW[1]) of unit 2101-2 are closed, and V O21 Driven to ground level (e.g., 0V);

[0493] ·exist Figure 22B In stage 2201(2), the switch group (SW[0], SW[1]) of unit 2101-1 and the switch group (SW[0], SW[2]) of unit 2101-2 are closed, and V O21 is driven to V CS21[2] .

[0494] ·exist Figure 22C In stage 2201(3), the switch group (SW[0], SW[2]) of unit 2101-1 and the switch group (SW[1], SW[3]) of unit 2101-2 are closed, and V O21 is driven to (V CS21[1] -V CS21[2] =2V CS21[2] ).

[0495] ·exist Figure 22D In stage 2201(4), the switch group (SW[0], SW[2]) of unit 2101-1 and the switch group (SW[2], SW[3]) of unit 2101-2 are closed, and V O21 is driven to (V CS21[1] =3V CS21[2] ).

[0496] ·exist Figure 22E In stage 2201(5), the switch group (SW[0], SW[2]) of unit 2101-1 and the switch group (SW[0], SW[2]) of unit 2101-2 are closed, and V O21 is driven to (VCS21[1] +V CS21[2] =4V CS21[2] ).

[0497] ·exist Figure 22F In stage 2201(6), the switch group (SW[1], SW[3]) of unit 2101-1 and the switch group (SW[1], SW[3]) of unit 2101-2 are closed, and V O21 is driven to (V DD21 -V CS21[1] -V CS21[2] =5V CS21[2] ).

[0498] ·exist Figure 22G In stage 2201(7), the switch group (SW[1], SW[3]) of unit 2101-1 and the switch group (SW[2], SW[3]) of unit 2101-2 are closed, and V O21 is driven to (V DD21 -V CS21[1] =6V CS21[2] ).

[0499] ·exist Figure 22H In stage 2201(8), the switch group (SW[1], SW[3]) of unit 2101-1 and the switch group (SW[0], SW[2]) of unit 2101-2 are closed, and V O21 is driven to (V DD21 -V CS21[1] +V CS21[2] =7V CS21[2] ).

[0500] ·exist Figure 22I In stage 2201(9), the switch group (SW[2], SW[3]) of unit 2101-1 and the switch group (SW[1], SW[3]) of unit 2101-2 are closed, and V O21 is driven to (V DD21 -V CS21[2] =8V CS21[2] ).

[0501] ·exist Figure 22J In stage 2201(10), the switch group (SW[2], SW[3]) of unit 2101-1 and the switch group (SW[2], SW[3]) of unit 2101-2 are closed, and V O21 is driven to (9V CS21[2] =V DD21 ).

[0502] ·exist Figure 22IIn stage 2201(11), the operation of the switch is the same as stage 2201(9), and V O21 is driven to 8V CS21[2] .

[0503] ·exist Figure 22H In stage 2201(12), the operation of the switch is the same as stage 2201(8), and V O21 is driven to 7V CS21[2] .

[0504] ·exist Figure 22G In stage 2201(13), the operation of the switch is the same as stage 2201(7), and V O21 is driven to 6V CS21[2] .

[0505] ·exist Figure 22F In stage 2201(14), the operation of the switch is the same as stage 2201(6), and V O21 is driven to 5V CS21[2] .

[0506] ·exist Figure 22E In stage 2201(15), the operation of the switch is the same as stage 2201(5), and V O21 is driven to 4V CS21[2] .

[0507] ·exist Figure 22D In stage 2201(16), the operation of the switch is the same as stage 2201(4), and V O21 is driven to 3V CS21[2] .

[0508] ·exist Figure 22C In stage 2201(17), the operation of the switch is the same as stage 2201(3), and V O21 is driven to 2V CS21[2] .

[0509] ·exist Figure 22B In stage 2201(18), the operation of the switch is the same as stage 2201(2), and V O21 is driven to V CS21[2] .

[0510] The controller 2160 may then return to stage 2201(1) (at Figure 22A ) to drive the output voltage of circuit 2100 to ground. Thus, it can be seen that the incremental and selective closing and opening of switches in the cells of the multi-cell driver circuit can provide a step-wise increase from ground to a peak voltage for a selected cell, with each switch group providing a decrease or increase in the output voltage by a selected voltage amount, or no change in the output voltage. Figure 22K is shown at a full V O21 The voltage across the capacitor element 2130 during the drive cycle is driven to the switching sequence and V O21 . It can be seen that the stage and phase in which the driver circuit operates to drive the voltage from ground to the power supply voltage are mirrored in the stage and phase in which the driver circuit operates to drive the voltage from the power supply voltage to ground. Therefore, the stage after stage 2201 (10) can be known by referring to stage 2201 (1) to stage 2201 (10), where V O21 is driven to ground.

[0511] exist Figure 22K It can also be seen that stage 2201 (18) constitutes the final stage of the output voltage drive cycle for circuit 2100. In stage 2201 (18), cell 2101-1 is bypassed to provide ground voltage to the input of cell 2101-2, and cell 2101-2 is driven to provide V CS21[2] To ground the output voltage of cell 2100 after stage 2201 (18) is completed, the switching sequence method 2200 may connect stage 2201 (1) (e.g. Figure 22A A switching operation (as shown) is applied to circuit 2100 so as to bypass cell 2101-1, electrically connect the negative terminal 2128 of the voltage source of circuit 2100 to ground in such a manner that the input of cell 2101-2 is grounded, and bypass cell 2101-2 so that the output of cell 2101-2 (and therefore the output of circuit 2100) is grounded.

[0512] When the driver circuit 2100 is configured to cease operation after one application of an output voltage drive cycle, the final stage of the switching sequence method 2200 may constitute a repeating stage 2201(1) operation to ground the output of the circuit 2100. When the driver circuit is configured to continue operation, the final stage of the switching sequence method 2200 may constitute the first stage of the next iteration of the output voltage drive cycle of the circuit 2100.

[0513] Continuing, it should be understood that future references to completing the output voltage drive cycle of the capacitor element driving circuit include: grounding the output of the capacitor element driving circuit by applying the first stage of the switching sequence method after the last stage of the switching sequence method; and future references to applying the first stage of the switching sequence method consider applying any of the above methods to ground the output of the capacitor element driving circuit.

[0514] Voltage distribution function

[0515] Figures 22L-1 to 22L-3is a graph of the voltage distribution function of a closed switch group in an embodiment specifying the switching sequence of a driver unit in a selected driver circuit. In this embodiment, for ease of calculation, the non-dissipative elements are assumed to have the same voltage storage capacity, but it should be understood that the selection of the voltage storage capacity of any non-dissipative element in any driver unit of the driver circuit will be a designer's choice.

[0516] In certain embodiments where a cell has more than one non-dissipative element and the voltages of any two such elements are not equal to each other, e.g. Figures 22A to 22J As disclosed, switching may occur to produce a step-wise increase in voltage from ground to the supply voltage and then back to ground, but the step size (voltage change) may not be uniform.

[0517] Figure 22L-1 : 1-Non-dissipative element driver unit

[0518] Specifically, Figure 22L-1 The voltage distribution function 2001-1 of a driver unit x having one non-dissipative element and four switches is shown. The driver unit x can be operated as Figures 22A-22J The cell 2101-2 in the embodiment has a voltage output and a voltage input electrically connectable to the output of the cell 2101-1 and to the voltage inputs of switches SW[0] and SW[3] of the cell 2101-2.

[0519] exist Figures 22A-22J , it can be seen that in cell 2101-1, when the switch group (SW[0], SW[1]) or (SW[2], SW[3]) is closed, the non-dissipative element of cell 2101-1 is bypassed, the switch group (SW[0], SW[1]) electrically connects the negative terminal of the voltage source to the output of cell 2101-1, and provides ground as the output of cell 2101-1. The switch group (SW[2], SW[3]) of cell 2101-1 also operates to bypass the non-dissipative element, electrically connects the positive terminal of the voltage source to the output of cell 2101-1, and provides the voltage output V of the voltage source. DD As the output of cell 2101-1. In cell 2101-2, since the voltage input of the cell operates as the voltage input of the two switches SW[0] and SW[3] of cell 2101-2, the two switch groups (SW[0], SW[1]) and (SW[2], SW[3]) both act as non-dissipative elements that bypass cell 2101-2, electrically connecting the input of cell 2101-2 to the output of cell 2101-2.

[0520] Therefore, the unit can be operated as unit 2101-2 and has a voltage output V out[x] and voltage input V in[x]In cell x (which can be electrically connected to the output of its upstream adjacent cell and electrically connected to the two switches SW[0] and SW[3] of cell x), the switch groups (SW[0], SW[1]) and (SW[2], SW[3]) both act as non-dissipative elements that bypass cell x. Figure 22L-1 The function of the switch group (SW[0], SW[1]), (SW[2], SW[3]) of the driver unit x to electrically connect the input of the driver unit x to its output is shown. Figure 22L-1 Also shown is the switch group (SW[0], SW[2]) releasing V[x] (the voltage storage capacity of the non-dissipative components) to add to V In[x] function; and the switch group (SW[1], SW[3]) from V In[x] The function of subtracting V[x] from .

[0521] Figure 22L-2 : 2-Non-dissipative element driver unit

[0522] Figure 22L-2 The voltage distribution function 2001-2 of driver unit y (which can also operate as unit 2101-2) is shown. Driver unit y has two non-dissipative components and five switches, and the switch groups (SW[0], SW[1]) and (SW[3], SW[4]) operate to bypass the non-dissipative components. The switch groups (SW[0], SW[2]), (SW[0], SW[3]) add a selected voltage amount to the input voltage V In[y] ; and the switch groups (SW[1], SW[4]), (SW[2], SW[4]) are from V In[y] When non-dissipative components have the same voltage storage capacity, for example voltage V[y]:

[0523] The switch group (SW[0], SW[2]) adds V[y] to the input voltage V In[y] ,

[0524] The switch group (SW[0], SW[3]) adds twice V[y] to V In[y] superior,

[0525] · Switch group (SW[1], SW[4]) from V In[y] Subtract twice V[y] from

[0526] ·Switch group (SW[2], SW[4]) from V In[y] Subtract V[y] from .

[0527] Figure 22L-3 : Generalized driver unit

[0528] Figure 22L-3The voltage distribution function 2001-q of the closed switch group in the generalized driver unit k (which can also be operated as unit 2101-2) is shown. The driver unit k has q non-dissipative elements and q+3 switches. Figure 22L-1 and Figure 22L-2 As in the embodiment of FIG. 1 , the switch groups (SW[0], SW[1]) and (SW[q+1], SW[q+2]) operate to bypass the input voltage V In[k] A non-dissipative element transferred to the output of cell k; the switch group (SW[0], SW[2]) to (SW[0], SW[q+1]) adds the selected voltage amount to the input voltage V In[k] ; and the switch group (SW[1], SW[q+2]) to (SW[q], SW[q+2]) from V In[k] When non-dissipative components have the same voltage storage capacity, for example voltage V[k]:

[0529] The switch group (SW[0], SW[2]) adds V[k] to V In[k] ;

[0530] · The switch groups (SW[0], SW[3]) to (SW[0], SW[q+1]) are connected to V In[k] Add 2V[k] to qV[k]; and

[0531] · The switch groups (SW[1], SW[q+2]) to (SW[q-1], SW[q+2]) are respectively from V In[k] Subtract qV[k] from the equation to get 2V[k].

[0532] The switch group (SW[q], SW[q+2]) is connected from V In[k] Subtract V[k] from the Figure 22L-3 The voltage distribution function of 2001-q and Figure 22L-1 and Figure 22L-2 Comparison of the switch activations in voltage distribution functions 2001-1 and 2001-2 shows that increasing the number of non-dissipative elements in the driver unit allows for increasing the number of steps in the stepwise process and reducing the difference between the voltage amounts transferred per step. Consequently, the voltage transition to the driver circuit output can be smoother.

[0533] 8. Switch Sequence Method

[0534] Figures 22M-1A to 22M-5B is a diagram showing a method for selecting a switching sequence of a driving circuit when the non-dissipative elements of the cells in the driving circuit have the same voltage storage capacity, using Figures 22L-1 to 22L-3 The voltage distribution function is shown in the symbol for the operation of the closed switch group.

[0535] · Figure 22M-1A 、 Figure 22M-1B Shown in Figure 22K A more detailed description of the voltage provided at each stage of the switching sequence method 2200 is provided, as described above, wherein the switches in the first unit 2101-1 and the second unit 2101-2 are opened and closed in a sequence to increase the voltage provided to V in a stepwise manner. DD21 , and then opens and closes in sequence to step down the supplied voltage to ground. The entire switching sequence defines a V O21 Drive cycle.

[0536] · Figure 22M-2A1(A1)-Figure 22M-2A2 A method 2220 is shown for switching a driver circuit [wxy], also referred to herein as a driver or circuit 4000, having three driver units [w], [x], [y], each having a non-dissipative element, wherein:

[0537] o Figure 22M-2A1(A1) and Figure 22M-2A1(A2) are switching diagrams 2222(a) and 2222(b), respectively, and

[0538] o Figure 22M-2A1(B) is a sequential pattern diagram 2222c detailing the set of switches closed on circuit [xyz] and the output voltage of the circuit during application of stages 2221(1)-2221(54); and

[0539] · Figure 22M-2B1 、 Figure 22M-2B2 A switching sequence method 2240 is shown for a driver circuit [vwxy] having four driver units [v], [w], [x], [y], each having a non-dissipative element.

[0540] · Figure 22M-3A 、 Figure 22M-3B A switching sequence method 2260 is shown for a driver circuit [ab] having two driver units, a first unit [a] having one non-dissipative element and four switches, and a second unit [b] having two non-dissipative elements and five switches.

[0541] · Figure 22M-4A 、 Figure 22M-4B A switching sequence method 2270 is shown for a driver circuit [mn] having two driver cells, a first cell [m] having two non-dissipative elements and five switches, and a second cell [n] having one non-dissipative element and four switches.

[0542] · Figure 22M-5A1 、 Figure 22M-5A2 、 Figure 22M-5BA switching sequence method 2280 is shown for a driver circuit [mnp] having a first cell [m] and a second cell [n], each having two non-dissipative elements, and a third cell [p] having three non-dissipative elements.

[0543] As described above, in the illustrative, but not necessarily preferred, embodiments described herein, a switching sequence method can be defined to operate a multi-cell circuit to produce a stepwise change in the circuit's output voltage. The circuit's switching sequence method can be formed from a set of cell switching methods that define a sequence for activating a switch set within a cell in the circuit. By simultaneously and synchronously applying the cell switching methods to their associated cells in the circuit, the circuit can be operated according to the circuit's switching sequence method. The cells in the multi-cell circuit are arranged in series, with the output voltage of one cell providing the input voltage of its downstream neighbor, such that incremental changes in an upstream cell affect the voltage generation of other cells downstream in the circuit.

[0544] In the selective closing and opening of switches in a cell of a multi-cell drive circuit, incremental changes in the upstream and downstream cells can be seen. The switches can provide a step-wise increase from ground to peak voltage for a selected cell, with each switch group providing a decrease or increase in the output voltage by a selected voltage amount, or no change in the output voltage. Figure 22M-1A and Figure 22M-1B The increase from level 2201(1) to 2201(10) can be seen in Figure 22M-1A and Figure 22M-1B A reduction from stage 2201(10) to 2201(1) can be seen in FIG, the first stage of applying the switching sequence method 2200 on the circuit 2100.

[0545] Figures 22M-1A to 22M-5B Several examples of switching sequence methods for operating multi-cell circuits are shown. It can be seen that the methods described below are defined by an ordered set of phases, where the phases are defined by an ordered set of cell activation patterns, and the cell activation patterns are defined by an ordered set of levels, which are applied in a time-sequential manner to activate groups of switches in the cells to produce a range of desired output voltage results. When these methods are operated simultaneously and synchronously, the desired result of incremental changes in the cell output voltages can be achieved.

[0546] It can be seen that the method shown has common operating stages, wherein these stages activate the switch groups according to a common switching pattern to produce a gradual increase in the output voltage of the multi-cell circuit 2100 up to its peak voltage, and, if necessary, provide the operation of the stages and switching patterns in a reverse order to produce a gradual decrease in the output voltage of the multi-cell circuit 2100 from its peak voltage to near ground.

[0547] Proceeding further, reverse sequential operation of a method shall mean reverse sequential operation of its constituent stages, a stage operating in reverse sequence shall mean operating its constituent switching patterns in reverse sequence, and operating a switching pattern in reverse sequence shall mean that its defined constituent stages are also operated in reverse chronological order. Furthermore, proceeding further, a stage operating in reverse sequence shall be referred to as a "reverse stage," and a switching pattern operating in reverse sequence shall be referred to as a "reverse switching pattern."

[0548] Except for the cell electrically connected to the voltage source (herein referred to as the “first cell”), the stepwise driving method of the cells in the multi-cell driving circuit has the following phases that apply the following stepwise cell switching pattern to cell [i] (where 2≤i≤k):

[0549] The Start Unit [i] stage applies the Start Unit [i] switch pattern on the selected unit [i], which is set to:

[0550] o providing the input voltage of cell [i] as its output voltage (bypassing cell [i]) by closing one of the switch groups (switch group (SW[0], SW[1]) or switch group (SW[n[i]+2], SW[n[i]+1]) (bypassing)), and

[0551] o Then, by selectively activating cell [i] the output voltage V O[i] The switch group (where there is more than one such group) incrementally increases the output voltage of unit [i] by the voltage V provided by the non-dissipative components of unit [i] CS[i] , wherein the switch activation is performed to produce an increased output voltage increase.

[0552] The execute unit [i] stage may be performed after the initiation unit [i] stage is completed. The execute unit [i] stage may implement a series of execute unit [i] switching patterns on unit [i], wherein the application of the execute unit switching patterns is set to:

[0553] o First, incrementally reducing the output voltage of cell [i] by selectively activating a switch group (wherein there is more than one such group) in cell [i] that subtracts the voltage storage capacity of the non-dissipative element from the input voltage of cell [i], wherein the switch activation is performed to produce a decreasing amount of reduction in the output voltage, and wherein, when cell [i] includes a single non-dissipative element, the reduction in input voltage is V CS[i] , or when unit [i] contains multiple non-dissipative components, it is reduced to V [i] or multiples thereof.

[0554] It should be noted here that during the execution of the first stage of the switching mode of cell [i], V is subtracted from the input voltage of cell [i].[i] or a multiple thereof does not result in a decrease in the output voltage of cell [i]. While subtracting a voltage from the input voltage of cell [i] during the switching mode of cell [i], the switching mode operation at one or more cells upstream of cell [i] increases the input voltage of cell [i] by a selected voltage amount for at least the duration of the switching mode of cell [i] at cell [i]. Thus, when the subtraction operation reduces the input voltage of cell [i] by an amount, the increase in the input voltage of cell [i] is greater than the amount of voltage subtracted from the input voltage, resulting in a net increase in the amount of voltage available at the output of cell [i].

[0555] o then bypassing cell [i] by selectively activating a set of switches of cell [i] that provide the input voltage of cell [i] as its output voltage; and

[0556] o The output voltage of cell [i] is then incrementally increased by selectively activating a set of switches in cell [i] that increase the output voltage, wherein the switches are commanded to activate to produce the increased amount of output voltage.

[0557] The Peak Unit [i] stage applies the Peak Unit [i] switching mode to Unit [i], which is set to:

[0558] o first, incrementally reducing the output voltage of cell [i] by selectively activating groups of switches in cell [i] that reduce the output voltage (where there is more than one such group), wherein the switch activations are commanded to produce decreasing amounts of output voltage reduction; and

[0559] o Cell [i] is then bypassed by selectively activating its switch bank that provides the input voltage of cell [i] as its output voltage.

[0560] When the driver circuit is arranged to cease operation when its output voltage reaches its peak voltage, the Peak Cell [i] phase may end, and with it, the method.

[0561] If the drive circuit is arranged to operate through a complete output voltage drive cycle from ground to peak and then back to near ground, the method can continue on cell [i] to step the output voltage of the cell down from the peak voltage back to ground using the following phase of applying a stepwise switching pattern to cell [i].

[0562] After cell[i+1] reaches its peak output voltage, the peak cell[i] stage applies the remainder of the peak cell[i] switching pattern to cell[i], which is set to:

[0563] o maintaining bypass of cell [i] for the duration of one stage of the switching pattern of cell [i] when cell [i] is the cell having an output terminal that is electrically connected to the output terminal of the driver circuit or an output terminal that is electrically connected to the output terminal of the driver circuit (hereinafter referred to as the “last cell”), or otherwise until the remainder of the peak cell [i+1] switching pattern on cell [i+1] is completed, and

[0564] o Incrementally reducing the output voltage of cell [i] by selectively activating groups of switches in cell [i] that reduce the output voltage (where there is more than one such group), wherein the switches are commanded to activate to produce increasing amounts of output voltage reduction.

[0565] A reverse execution unit [i] phase (wherein a series of reverse execution unit switch patterns may be implemented in reverse order) may begin upon completion of the peak unit [i] phase. The reverse execution unit [i] phase may implement a series of reverse execution unit [i] switch patterns, where the stages of the execution unit [i] switch patterns are implemented in reverse order. The application of the reverse execution unit [i] switch patterns may be configured as:

[0566] o incrementally increasing the output voltage of cell [i] first by selectively activating a switch group(s) of cell [i] that increases the output voltage VO[i], wherein there are more than one such groups sequenced to produce decreasing amounts of output voltage increase; and

[0567] o Cell [i] is then bypassed by selectively activating a set of switches of cell [i] that provide the input voltage of cell [i] as its output voltage

[0568] pressure; and

[0569] oThen, the output voltage of cell [i] is incrementally reduced as the switches are activated by selectively activating a set (or sets) of switches in cell [i] that reduce the output voltage, wherein there is more than one such set and the sets are sequenced to produce increasing amounts of output voltage reduction.

[0570] Similar to the voltage subtraction operation in the execution unit [i] switching mode, during the first phase of the reverse execution unit [i] switching mode, V [i]The addition of a voltage or a multiple thereof to the input voltage of cell [i] does not result in an increase in the output voltage of cell [i]. While the voltage is added to the input voltage of cell [i] during the reverse cell [i] switching pattern, the switching pattern operated on one or more cells upstream of cell [i] reduces the input voltage of cell [i] by a selected voltage amount for at least the duration of the reverse cell [i] switching pattern on cell [i]. Thus, when the adding operation increases the amount of the input voltage of cell [i], the reduction in the input voltage of cell [i] is greater than the amount of the voltage added to the input voltage, resulting in a net reduction in the amount of voltage available at the output of cell [i].

[0571] Upon completion of the reverse execution of cell [i] phase, the reverse activation of cell [i] phase is executed. In the reverse activation of cell [i] phase, the reverse activation of cell [i] switching pattern is applied to cell [i], wherein the phases of the activation of cell [i] switching pattern are implemented in reverse order to:

[0572] o First increase the output voltage V by selectively activating the cell [i] with the switch activation O[i] to incrementally increase the output voltage of said cell [i] by switching said set(s) of switches, wherein there is more than one such set, said sets being ordered to produce

[0573] The output voltage increases by a decreasing amount; and

[0574] o The output voltage of cell [i] is then incrementally reduced by selectively activating groups of switches in cell [i] that reduce the output voltage (where there is more than one such group), wherein the switches are commanded to activate to produce increasing amounts of output voltage reduction.

[0575] At the last stage of the output voltage drive cycle, cell [i] (2≤i≤(K-1)) is bypassed to provide ground to the input of cell [K], allowing cell [K] to be driven to provide V CS[K] In order to ground the output voltage of unit [K], the switching sequence method can be applied in its first stage. As mentioned above, when the output voltage of the driver circuit reaches V CS[K] , and the drive circuit is arranged to cease operation after one application of the output voltage drive cycle, the last stage of the reverse initiation cell [i] phase may require subjecting cell [i] to a single application of the first stage of the output voltage drive cycle to bypass cell [i]. When the drive circuit is arranged to continue operation, the last stage of the reverse initiation cell [i] phase may require subjecting cell [i] to the first stage of the output voltage drive cycle to bypass cell [i].

[0576] It can be seen that the first cell in the multi-cell driving circuit (cell [1]) operates in the above-mentioned starting cell [i] phase and then operates in the above-mentioned peak cell [i] phase, where i=1 and the bypass operation of the starting cell [1] phase is achieved by selectively activating the switch group of cell [1], which switches the voltage of the negative terminal of the voltage source of the circuit 2100 (at Figure 21 The voltage source in the circuit is shown as grounded) is provided to the input of unit [2]. Similarly, bypass operation of the unit during the peak phase can be achieved by selectively activating the switch group of unit [1] that provides the supply voltage of the circuit voltage source to the input of unit [2].

[0577] After the output voltage drive cycle is completed, the output voltage of the drive circuit is V CS[K] , one step away from ground. When the drive circuit is arranged to cease operation after applying one output voltage drive cycle, cell [1] can be subjected to the application of a first stage of the output voltage drive cycle to bypass cell [1] in such a way that the negative terminal of the voltage source providing the circuit with ground is electrically connected to the output of cell [1] so that the input of cell [2] is also grounded. If the drive circuit is arranged to continue operating to drive the circuit through repeated output voltage drive cycles, the method can continue after applying the last stage of the drive cycle to apply the first stage of the next iteration of the drive cycle. The first stage also bypasses cell [1], causing the output voltage of cell [1] to be grounded and returning the method to its starting cell [1] stage to begin the step-by-step driving of the output of the circuit from ground to peak and back to ground.

[0578] In embodiments disclosed herein, the number of levels of switched group activation maintained on a selected cell (cell [i]) that is not the last cell ("cell [K]") may be based on the number of non-dissipative elements in its adjacent downstream cell (hereinafter "cell [i+1]") in the K-cell circuit. As described in more detail in the distinguished, but not necessarily preferred, embodiments disclosed above and below, switched group activation may be maintained in selected cell [i] for the duration of a method switching pattern simultaneously performed on cell [i+1]. When the selected cell (cell [i]) is the last cell (cell [K]) of the K-cell circuit, cell [i+1] is not present, and switched group activation may be maintained in cell [i] for the duration of one level of the method switching pattern.

[0579] Furthermore, as described in more detail below, the number of steps in which the cell switching pattern operates on a selected cell is also based on the number of non-dissipative elements in the selected cell. For example, a cell with one non-dissipative element has only one switch group that can be closed to increase its output voltage, while a cell with three non-dissipative elements has three switch groups that can be closed to increase its output voltage. The same is true for the number of switch groups in cell [i] that can be closed to decrease its output voltage. Thus, the number of step-by-step voltage changes in the cell switching pattern for the selected cell will be based on the number of non-dissipative elements in the cell.

[0580] In order to understand how cells of a multi-cell driver circuit operating simultaneously and synchronously to close and open switches provide incremental increases followed by decreases in the output voltages of the cells, which in turn drive incremental increases followed by decreases in the total output voltage of the driver circuit, attention is now turned to Figures 22M-1A to 22M-5B , to describe examples of cell switching methods for circuits having varying numbers of cells and for cells having varying numbers of non-dissipative elements.

[0581] The initiation unit phase and switching pattern, the execution unit phase and switching pattern, and the peak unit phase and switching pattern are referred to in the figures as "Initial" or "I," "Execution" or "E," and "Peak" or "P," respectively.

[0582] 8.1.K unit driving circuit, each unit has a non-dissipative element

[0583] Figure 22M-1A : 2 unit drive circuit

[0584] Figure 22K 、 Figure 22M-1A and Figure 22M-1B An illustrative, but not necessarily preferred, embodiment of a method 2200 for opening and closing switches in a driver unit to increase the voltage output in a stepwise manner from a driver circuit having two units, each having one non-dissipative element, is shown. Method 2200 begins at stage 2201(1), in which the switches (SW[0], SW[1]) of both driver units are activated to drive the output of the driver circuit to ground. In stage 2201(2), the switches (SW[0], SW[1]) of driver unit 2101-1 remain activated to drive the output of the unit to ground (thereby preventing driver unit 2101-1 from contributing voltage to the output of the driver circuit), while the switches (SW[0], SW[2]) of driver unit 2101-2 (the switches in the circuit closest to the output terminal) are activated to release the voltage storage capacity V from one of its non-dissipative elements. CS21[2] , making V CS21[2] It becomes the output of the driving circuit 2100.

[0585] Once VCS21[2] , in stages 2201(3) to 2201(5), the switches (SW[0], SW[2]) of driver unit 2101-1 may be activated to release its voltage storage capacity V from its non-dissipative elements CS21[1] , thus providing V CS21[1] As the voltage output of unit 2101-1.

[0586] In stage 2201(3), the switches (SW[1], SW[3]) of driver unit 2101-2 are operated to set V CS21[1] Reduce V CS21[2] .

[0587] In stage 2201(4), the switches (SW[2], SW[3]) of driver unit 2101-2 are operated to bypass the non-dissipative components of driver unit 2101-2, raising the output voltage to V CS21[1] , which is equal to the output voltage V CS21[2] In other equally illustrative but not necessarily preferred embodiments, the bypass in unit 2101-2 can be achieved by operating the switches (SW[0], SW[1]) of unit 2101-2 instead of the switches (SW[2], SW[3]).

[0588] In stage 2201(5), the switches (SW[0], SW[2]) of driver unit 2101-2 are operated so that both driver units contribute their available voltage storage capacity to increase the voltage from V CS21[1] The output voltage to V CS21[1] +V CS21[2] =4V CS21[2] .

[0589] In stages 2201(6) to 2201(8), the switch group (SW[1], SW[3]) of driver unit 2101-1 is activated to raise the input of unit 2101-1 to the power supply voltage V DD21 , then V DD21 Reduce the voltage storage capacity V of unit 2101-1 CS21[1] , in order to provide V DD21 -V CS21[1] As the voltage output of unit 2101-1.

[0590] In stage 2201 (6), the switch group (SW[1], SW[3]) of driver unit 2101-2 is activated to subtract the voltage storage capacity V of unit 2101-2 from the voltage output of unit 2101-1. CS21[2] , generates a voltage output 5V for driving the circuit CS21[2] .

[0591] In stage 2201 (7), cell 2101-2 is bypassed by activating the switch group (SW[2], SW[3]) or the switch group (SW[0], SW[1]) as described above to provide the voltage output of cell 2101-1, i.e., V DD21 -V CS21[1] or 6V CS21[2]

[0592] In stage 2201(8), the switch group (SW[0], SW[2]) of unit 2101-2 is activated to turn V CS21[2] added to the voltage output of unit 2101-1, thus providing 7V CS21[2] As the voltage output of the driving circuit.

[0593] In stages 2201(9) and 2201(10), the switch group (SW[2], SW[3]) or the switch group (SW[0], SW[1]) of the driver unit 2101-1 is activated to bypass the non-dissipative elements of the unit 2101-1, thereby diverting the supply voltage V DD21 As the voltage output of unit 2101-1.

[0594] In stage 2201(9), the switch group (SW[1], SW[3]) of unit 2101-2 is activated to switch from V DD21 Subtract V from CS21[2] , providing voltage output 8V for the driving circuit CS21[2] ;as well as

[0595] In stage 2201 (10), the switch group (SW[2], SW[3]) of unit 2101-2 or the switch group (SW[0], SW[1]) as described above is activated to bypass the non-dissipative components of unit 2101-2 and provide a voltage output V to the driver circuit. DD21 =9V CS21[2] .

[0596] Switch activation according to method 2200 continues to provide a gradual increase in the voltage output of the driver circuit from ground to the maximum voltage that circuit 2100 can deliver, i.e., to V DD21 In stages 2201(11) to 2201(18), the switch activation according to method 2200 may continue in reverse to start from V DD21 to V CS21[2] The output voltage of the circuit is lowered from V by using stage 2201(1) as a standalone stage or as the first stage of the next operation of the output voltage drive cycle. CS21[2] Driven to ground, the output voltage of the circuit is gradually increased and driven back to V DD21 , and then gradually reduce the output voltage to drive it back to V CS21[2] .

[0597] As described above, in some embodiments, in any selected cell that is not the first cell in the drive circuit (i.e., in a cell that does not have an input terminal electrically connected to the voltage source of the drive circuit), the pass switch groups (SW[0], SW[1]) and (SW[2], SW[3]) can be interchanged because, when closed, these two groups of switches electrically connect the input of the selected cell to its output.

[0598] Figure 22M-1A and Figure 22M-1B The phases and patterns in the switching sequence are shown, and the switching sequence can be applied to enable the method 2200 to provide a step-by-step increase and then decrease of the output voltage during a complete drive cycle. Specifically:

[0599] In the start cell [2] stage 2212-1 of cell 2101-2, a two-stage start cell [2] switching pattern 2202-1 may be applied to cell 2101-2 in stages 2201-1 to 2201-2 to operate the switch of the second cell 2101-2 to bypass cell 2101-2 in one stage and then provide V to the output voltage of the driver circuit 2100 in another stage. CS21[2] .

[0600] The execution unit [2] stage 2213-1 of the cell 2101-2 may begin after the start unit [2] stage 2212-1 is completed. In the execution unit [2] stage 2213-1, the three-level execution unit [2] switching pattern 2203-1 may be simultaneously applied to the switches in the cell 2101-2 while the start unit [1] stage 2215-1 (described below) operates on the cell 2101-1 to increase the input voltage of the cell 2101-2 by V CS21[1] , so that the application of the switching mode 2203-1 of the execution unit [2] drives the output voltage of the circuit 2100 to 4V CS21[2] The switches in cell 2101-2 are operated to first subtract V from the input voltage of cell 2101-2. CS21[2] , then bypass unit 2101-2, and then V CS21[2] Output voltage provided to unit 2101-2.

[0601] As described above, during the first stage of switching mode 2203-1, V is subtracted from the output voltage of cell 2101-2. CS21[2]This does not result in a decrease in the output voltage of cell 2101-2 (and thus the output voltage of circuit 2100). While the subtraction of switch pattern 2203-1 is occurring, a start cell [1] stage 2215-1 (described below) operates on cell 2101-1 to increase the input voltage of cell 2101-2 by V for the duration of the cell [2] switch pattern 2203-1 being executed on cell 2101-2. CS21[1] Therefore, when the subtraction operation on cell 2101-2 causes the newly added input voltage of cell 2101-2 to decrease, the output voltage of cell 2101-2 is V CS21[1] -V CS21[2] =2V CS21[2] .

[0602] In the next stage of execution unit [2] switch pattern 2203-1 on unit 2101-2, unit 2101-2 is bypassed, allowing the output voltage of unit 2101-2 to reach V CS21[1] =3V CS21[2] ; and the next level of execution unit [2] switch mode 2203-1 will V CS21[2] The output voltage supplied to unit 2101-2 causes V CS21[1] +V CS21[2] =4V CS21[2] output voltage.

[0603] In stage 2213-1, the execution unit [2] switching pattern 2203-1 may be repeated on cell 2101-2 while the peak unit [1] stage 2217 (described below) operates on cell 2101-1 to increase the input voltage of cell 2101-2 by V DD21 -V CS21[1] , thereby executing unit [2] switching mode 2203-1 repeatedly drives the output voltage of circuit 2100 to 5V CS21[2] , then to 6V CS21[2] , then to 7V CS21[2] .

[0604] Peak Cell [2] Stage 2214 may begin after Execute Cell [2] Stage 2213-1 is completed. In Peak Cell [2] Stage 2214, the input voltage of Cell 2101-2 is first subtracted from the input voltage of Cell 2101-2 in Stage 2201(9). CS21[2] , then bypassing cell 2101-2 in stage 2201(10), two levels of peak cell [2] switching mode 2204 can be applied to the second cell 2101-2 to achieve 9V CS21[2] The peak output voltage.

[0605] At the same time, the switch of unit 2101-1 can be activated as follows:

[0606] In the start cell [1] stage 2215-1, a five-level start cell [1] switch pattern 2205-1 may be applied to cell 2101-1. The start cell [1] switch pattern 2205-1 may begin by first operating the switches of cell 2101-1 to ground the input of cell 2101-2 during the application of two levels of the start cell [2] switch pattern 2202-1 in stages 2201-1 to cell 2101-2, and then providing V to cell 2101-2 during the first application of the three-level execution cell [2] switch pattern 2203-1 to cell 2101-2. CS21[1] Throughout the start cell [1] phase 2215-1, in cell 2101-1, switch SW[0] (electrically connected to the negative terminal of the voltage source) remains closed, and switch SW[3] (electrically connected to the positive terminal of the voltage source) of cell 2101-1 remains open.

[0607] Peak cell [1] phase 2217 (in which switch SW[0] remains open and switch SW[3] (electrically connected to the positive terminal of the voltage source) remains closed) may begin after the start cell [1] phase 2215-1 is completed. In peak cell [1] phase 2217, during stages 2201(6)-2201(10), a five-level peak cell [1] switching pattern 2207 may be applied to cell 2101-1 to drive cell 2101-1 to its peak output voltage, first during a second application of the execution cell [2] switching pattern 2203-1 to cell 2101-2, activating the switch in cell 2101-1 in stages 2201(6)-2201(8) to provide V to cell 2101-2. DD21 Subtract V CS21[1] as its input voltage, and then in stages 2201(9)-2201(10), during the application of peak cell [2] switching pattern 2204 on cell 2101-2, the supply voltage V DD21 (In effect, cell 2101-1 is bypassed.) In the peak cell [1] phase 2217 of cell 2101-1, switch SW[0] remains open, and switch SW[3] remains closed.

[0608] Thus, V is achieved for the driver circuit 2100 when stage 2201(10) is completed. DD21 The switching method 2200 of the peak output can then be applied to the circuit 2100 in reverse order to operate a complete drive cycle in which V has been increased in a stepwise manner to V DD21The output voltage of the unit 2100 can be returned to ground in a step-down manner. The unit switching will include activation of switches through stages 2201(11)-2201(18) to achieve a step-down of the circuit output voltage to V CS21[2] .

[0609] The drive cycle is completed at stage 2201 (18) and the next operation of the drive cycle can drive the output voltage to ground in its first stage. This cycle can be repeated in a step-by-step manner to drive the output voltage to V DD21 , then returns to V CS21[2] .

[0610] The cell switching pattern for driving cell 2101-2 in reverse order through stages 2201(11)-2201(18) is varied as follows:

[0611] In the Peak Cell [2] Switching Phase 2214, the output voltage of the circuit 2100 is increased to V when the second stage of the Peak Cell [2] Phase 2214 is completed at stage 2201 (10). DD21 =9V CS21[2] Thereafter, stage 2214 may continue at stage 2201(11) to activate the switch bank activated in stage 2201(9), thereby increasing the power consumption from V DD21 Subtract the input voltage V of unit 2101-2 CS21[2] .

[0612] After the peak cell [2] stage 2214 on cell 2101-2 is completed, the reverse execution cell [2] stage 2213-2 may begin. The reverse execution cell [2] stage 2213-2 may constitute the execution cell [2] stage 2213-1 operating on cell 2101-2 in reverse order. In the reverse execution cell [2] stage 2213-2, the three-level reverse execution cell [2] switch pattern 2203-2 may be applied twice to the switches in cell 2101-2. The reverse execution cell [2] switch pattern 2203-2 (wherein the levels of the execution cell [2] switch pattern 2203-1 may be implemented in reverse order) may be applied to activate the switch group in cell 2101-2 to convert V CS21[2] The output voltage provided to the unit 2101-2 then bypasses the unit 2101-2, and then the input voltage V DD21 Subtract V from CS21[2] The second application of the reverse execution unit [2] switch pattern 2203-2 causes the output voltage of the circuit 2100 to reach V when stage 2201 (17) is completed. CS21[1] Subtract V CS21[2] , or 2V CS21[2] .

[0613] After stage 2201(17) completes reverse execution unit [2] stage 2213-2, reverse start unit [2] stage 2212-2 can be started on unit 2101-2. Reverse start unit [2] stage 2212-2 (which can be configured as a start unit [2] stage 2212-1 operating in reverse order) has two stages of reverse start unit [2] switch patterns 2202-2, wherein the stages of start unit [2] switch patterns 2202-1 can operate in reverse order. Reverse start unit [2] switch patterns 2202-2 can be applied to switches in unit 2101-2, first by switching V to V in stage 2201(18). CS21[2] Provided to the output voltage, then in a repetition of stage 2201(1), to bypass cell 2101-2 to return the output voltage of circuit 2100 to ground.

[0614] The phases and switching patterns of the method 2200 for driving the cells 2101-1 in reverse order are changed as follows:

[0615] Peak Unit [1] stage 2217 can be performed when the first two stages 2201 (10) of Peak Unit [2] stage 2214 are completed. Peak Unit [1] switching pattern 2207 of stage 2217:

[0616] o Continue to maintain the power supply voltage V on the input of unit 2101-2 DD21 , while cell 2101-2 is still experiencing peak cell [2] switching mode 2204, and

[0617] o Then, during stages 2201(12)-2201(14), operations are performed to again provide V to the input of cell 2101-2 while cell 2101-2 is undergoing the first application of reverse execution cell [2] switching pattern 2203-2. DD21 Subtract V CS21[1] .

[0618] After the peak cell [1] stage 2217 of cell 2101-1 is completed, the reverse start cell [1] stage 2215-2 begins. The reverse start cell [1] stage 2215-2, which can be configured to operate the start cell [1] stage 2215-1 in a reverse sequence, can be applied to cell 2101-1. The reverse start cell [1] stage 2215-2 has a five-stage reverse start cell [1] switch pattern 2205-2, wherein the stages of the start cell [1] switch pattern 2205-1 can operate in a reverse sequence. The reverse start cell [1] switch pattern 2205-2 can be applied to the switches in cell 2101-1:

[0619] o First operates during stages 2201(15)-2201(17) to provide V to the input of cell 2101-2CS21[1] , while unit 2101-2 is undergoing a second application of reverse execution unit [2] switch pattern 2203-2, and

[0620] o Then, during stages 2201(18)-2201(1), with stage 2201(1) constituting the first stage of the next operation of the drive cycle of circuit 2100, ground is provided to the input of cell 2101-2 while cell 2101-2 is undergoing application of the reverse start cell [2] switching pattern 2202-2 to return the output voltage of circuit 2100 to ground in the manner described above.

[0621] Figure 22M-2A1(A1)-Figure 22M-2A2 : 3-unit drive circuit

[0622] Switching method switching diagrams 2222a, 2222b (Figures 22M-2A1(A1), 22M-2A1(A2), respectively) and switching pattern diagram 2225 [Figure 22M-2A1(B)] detail method 2220 and identify switch activations for operating a drive circuit [wxy] having three driver units [w], [x], [y], each having a non-dissipative element and four switches.

[0623] The switching sequence diagram of method 2200 ( Figure 22M-1A ) is compared with the switching sequence diagram 2225 [FIG. 22M-2A1(B)] of method 2220, and the phase diagram ( Figure 22M-1B ) and the stage diagram of method 2220 ( Figure 22M-2A2 ) by comparison, it can be seen that the switching pattern that can be used to control the output voltage of a two-unit drive circuit can be modified to control a three-unit drive circuit. As in switching method 2200, the units in a drive circuit having three driver units can be electrically bypassed by closing the first pair of switches (SW[0], SW[1]) in the series of switches in the unit and by closing the last pair of switches in the series of switches in the unit. Other switch groups can be operated to release the voltage storage capacity (and multiples thereof) of the non-dissipative elements, or to reduce the output voltage by the voltage storage capacity (and multiples thereof) of the non-dissipative elements to provide a step-by-step change in the voltage output of the drive circuit. In further stages, the non-dissipative elements of another unit can be bypassed, and the previously bypassed unit can then be activated with or without other units in the drive circuit to extend the step-by-step switching pattern to release and discharge different amounts of voltage.

[0624] Continuing, it should be understood that references to the first switch group (SW[0], SW[1]) and the last switch group (in a non-dissipative element cell, group (SW[2], SW[3])) both identify cell bypass operations and may be used interchangeably when describing the switching method for all cells except the first cell in a multi-cell drive circuit, regardless of which of the bypass switch groups is described herein, shown in the figures, or selected for implementation in a system according to the present invention.

[0625] Now looking in more detail at FIG. 22M-2A1(B), a switching sequence method 2220 is shown for a driver circuit having three driver units, unit [w], unit [x], unit [y], each unit having a non-dissipative element and four switches. Figure 22K and Figure 22M-1A The selective and sequential switch opening and closing patterns disclosed in FIG. 22M-2A1(B) and FIG. Figure 22M-2A2 As seen in FIG, the voltage output increases in a stepwise manner by opening and closing selected switches to release the voltage from the selected cell while preventing other cells from contributing voltage to the driver circuit output, and once the voltage output from the circuit equals the supply voltage (V DD[wxy] ), the stages of the process can be performed in reverse order to reduce the voltage output back to the output voltage of V[y] again in a step-wise manner at stage 2221 (54). As with the exemplary drive cycle of circuit 2100, the output voltage of circuit [wxy] can be reduced by applying V O[wxy] The first stage of the drive cycle (stage 2221 ( 1 )) is driven to ground.

[0626] Figure 22M-1A 、 Figure 22M-1B Many patterns of switch closures and resulting voltage outputs of stages 2201(1) through 2201(18) of method 2200 can be seen in FIGs. 22M-2A1(B), Figure 22M-2A2 This is seen in the pattern of switch closures and resulting voltage outputs of stages 2221(1) to 2221(54) in method 2220.

[0627] Furthermore, as in the embodiments disclosed above, the number of stages for which switched group activation is maintained on a selected cell of a multi-cell circuit can be based on its position in the circuit. For cell [w] or [x] in circuit [wxy], the number of stages for which switched group activation is maintained can be based on the number of non-dissipative elements in its adjacent downstream cell in circuit [wxy]. The switched group activation can be maintained on the selected cell for the duration of the method switching pattern (which is also executed on its adjacent downstream cells). When the selected cell is cell [y] (the last cell), the switched group activation can be maintained in the selected cell for the duration of one stage of the method switching pattern.

[0628] For the last cell (cell [y]) of circuit [wxy]:

[0629] In the start cell [y] stage 2232-1, in stages 2221(1) to 2221(2), a two-stage start cell [y] switch pattern 2202-1 (which is the same switch pattern as the start cell [2] switch pattern 2202-1 in the above-described method 2200) may be operated on cell [y] (previously defined as the last cell electrically connected to the output terminal of the driver circuit [wxy]) to bypass it and then add V[y] to the input voltage of cell [y].

[0630] Then, in the execution phase 2233-1, a three-level execution cell [y] switch pattern 2203-1 may be applied to first subtract V[y] from the input voltage of cell [y], then bypass cell [y], and then add V[y] to the input voltage of cell [y]. The execution cell [y] switch pattern 2203-1 (which is the same switch pattern as the execution cell [2] switch pattern 2203-1 in the method 2200 described above) may apply seven more applications to cell [y] (for a total of eight applications of the switch pattern 2203-1) to bring the output voltage of cell [y] to:

[0631] V DD[wxy] –V[x]+V[y]=25V[y].

[0632] Peak cell [y] stage 2234 may begin after execution of cell [y] stage 2233-1 is complete. Peak cell [y] stage 2234 may have a peak cell [y] switching pattern 2204, (which is the same switching pattern as peak cell [2] switching pattern 2204 in method 2200 disclosed above). Peak cell [y] switching pattern 2204 may operate on cell [y] to bring cell [wxy] to a peak output voltage, first by subtracting V[y] from the input voltage of cell [y] in stage 2221 (27), and then by bypassing cell [y] in stage 2221 (28). When driver circuit [wxy] obtains VDD[wxy] As its output voltage is then operated to stop, the peak unit [y] phase 2234 may end at stage 2221 (28).

[0633] Simultaneously and synchronously, unit [x] may be activated as follows:

[0634] The start cell [x] stage 2235-1 may have a start cell [x] switch pattern 2205-1 (which is the same switch pattern as the start cell [1] switch pattern 2205-1 in the method 2200 disclosed above). The switch pattern 2205-1 operates five stages on cell [x], first bypassing cell [x] during the application of the two-stage start cell [y] switch pattern 2202-1 to cell [y], and then providing V[x] to the input of cell [y] during the first application of the three-stage execution cell [y] switch pattern 2203-1 to cell [y].

[0635] Execution unit [x] stage 2236-1 may begin after the start unit [x] stage 2235-1 completes. In execution unit [x] stage 2236-1, nine levels of execution unit [x] switch pattern 2226-1 may be repeated on unit [x] across the three applications of execution unit [y] switch pattern 2203-1 on unit [y].

[0636] o During the entire application of switching pattern 2203-1 on cell [y], first V[x] is subtracted from the voltage input to cell [x] (which is the output voltage of cell [w]),

[0637] o then bypassing cell [x] during another entire application of switching pattern 2203-1 on cell [y], and

[0638] o Then, during another full application of switching pattern 2203-1 on cell [y], V[x] is added to the output voltage of cell [x].

[0639] Then, across three more applications of execution unit [y] switch pattern 2203-1 on unit [y], the nine-stage execution unit [x] switch pattern 2226-1 may be repeated on unit [x].

[0640] Peak cell [x] stage 2237 may begin after execution cell [x] stage 2236-1 is completed. Peak cell [x] stage 2237 may have peak cell [x] switch pattern 2207 (which is the same switch pattern as peak cell [1] switch pattern 2207 in method 2200 disclosed above). Switch pattern 2207 may operate its first three stages on cell [x] to subtract V[x] from the input of cell [x] during the final application of the three-stage execution cell [y] switch pattern 2203-1 on cell [y], and then bypass cell [x] during the first two stages of application of peak cell [y] switch pattern 2204 to cell [y] until the peak voltage V of circuit [wxy] is reached at the output terminal of cell [y]. DD[wxy] When the driving circuit [wxy] obtains V DD[wxy] As its output voltage is then operated to stop, the peak unit [x] stage 2237 may end at stage 2221 (28).

[0641] Simultaneously and synchronously, units [w] can be activated as follows:

[0642] In the start cell [w] phase 2238-1, the fourteen-stage start cell [w] switching pattern 2228-1 may begin by operating on cell [w] to bypass cell [w], thereby applying ground to the input of cell [x] during the application of the start cell [x] phase 2235-1 on cell [x], and then providing V[w] to the input of cell [x] during the first application of the execute cell [x] switching pattern 2226-1 on cell [x]. During the entire start cell [w] phase 2238-1 on circuit [wxy], switch SW[0] in cell [w] remains closed, and switch SW[3] in cell [w] remains open.

[0643] Peak cell [w] phase 2239 may begin after the start cell [w] phase 2238-1 is completed. Throughout phase 2239, switch SW[0] in cell [w] remains open and switch SW[3] in cell [w] remains closed. In peak cell [w] phase 2239, peak cell [w] switch pattern 2229 operates its first nine stages on cell [w] to apply the input voltage of cell [w] (which is the supply voltage V of the voltage source electrically connected to circuit [wxy]) from cell [w] during the second application of execute cell [x] switch pattern 2226-1 on cell [x]. DD[wxy] ) and then during the five-stage peak cell [x] switching mode 2207, V is provided to the input of cell [x] from stages 2221 (24) to 2221 (28). DD[wxy] , until the output of unit [x] also reaches the power supply voltage V DD[wxy] When the driving circuit [wxy] obtains VDD[wxy] As its output voltage is then operated to stop, the peak unit [w] stage 2239 may end at stage 2221 (28).

[0644] Switching method 2220 (thereby achieving V of driving circuit [wxy] DD[wxy] The output of stage 2221 (28) can continue to switch activation according to the stages and switching patterns used for method 2220, operating in reverse order so as to obtain V DD[wxy] Step-by-step reduction of the voltage output to ground.

[0645] For cell [y]:

[0646] As in the switching method 2200, the peak cell [y] phase 2234 may continue with the third stage of the peak cell [y] switching pattern 2204 to increase the output voltage V DD[wxy] Subtract V[y] from .

[0647] After the peak unit [y] phase 2234 is completed, the reverse execution unit [y] phase 2233-2 can begin on unit [y]. The reverse execution unit [y] phase 2233-2 requires the repeated application of the reverse execution unit [y] switching pattern 2203-2 on unit [y]. Figure 22M-2A2 In an embodiment of the present invention, reverse executing cell [y] switch pattern 2203-2 may be applied eight times to switches in cell [y]. Reverse executing cell [y] switch pattern 2203-2 (wherein the stages executing cell [y] switch pattern 2203-1 may be applied to cell [y] in reverse order) is arranged to first add V[y] to the output voltage of cell [y], then bypass cell [y], and then subtract V[y] from the input voltage of cell [y] so that at the end of stage 2221 (53), after eight applications of reverse executing cell [y] switch pattern 2203-2, the output voltage of circuit [wxy] becomes V[x] minus V[y].

[0648] Reverse start cell [y] stage 2232-2 may begin after reverse execution of cell [y] stage 2233-2 is completed. In reverse start cell [y] stage 2232-2, a two-stage reverse start cell [y] switch pattern 2202-2 is performed on cell [y]. Reverse start cell [y] switch pattern 2202-2 (wherein the stages of start cell [y] switch pattern 2202-1 may be implemented in reverse) may operate on cell [y] by first adding V[y] to the input voltage of cell [y] in stage 2221 (54), and then bypassing cell [y] in the application of stage 2221 (1) to return the output voltage of cell [y] to ground.

[0649] For cell [x]:

[0650] Peak Cell [x] Phase 2237 may continue with Stage 2221(29) of Peak Cell [x] Switch Pattern 2207 to bypass Cell [x] to ensure that V is provided to the input of Cell [y] for the duration of Peak Cell [y] Switch Pattern 2204 on Cell [y]. DD[wxy] Then, during the first application of the reverse execution unit [y] switching pattern 2203-2 on unit [y], the voltage input to unit [y] is reduced by V [x] .

[0651] Execute unit [x] reverse phase 2236-2 may begin after peak unit [x] phase 2237 completes. Execute unit [x] reverse phase 2236-2 invokes two applications on unit [x] of the execute unit [x] switch pattern 2226-2 reverse, where the stages of execute unit [x] pattern 2226-1 are implemented in reverse order. During the three applications of the execute unit [y] switch pattern 2203-2 reverse on unit [y], each application of the execute unit [x] switch pattern 2226-2 reverse in phase 2236-2 operates on unit [x]:

[0652] o In applying the reverse-executed unit [y] switching pattern 2203-2 to unit [y] (which in the present embodiment is the second application of the reverse-executed unit [y] switching pattern 2203-2 (which was already applied the first time on unit [y] during the last stage of the peak unit [x] switching pattern 2207)

[0653] During application), V[x] is first added to the input voltage of cell [x];

[0654] o then bypassing cell [x] during an additional application of reverse-executed cell [y] switching pattern 2203-2 to cell [y], which in the present embodiment is a third application of pattern 2203-2 to cell [y]; and

[0655] o Then, during another application of the reverse execution pattern 2203-2 on cell [y] (in the current embodiment, this is the fourth application of the pattern 2203-2 on cell [y]), V[x] is subtracted from the input voltage of cell [y].

[0656] In the current embodiment, the second application of reverse executing cell [x] switch pattern 2226-2 is performed during the fifth, sixth, and seventh applications of switch pattern 2203-2 on cell [y]. The two applications of reverse executing cell [x] switch pattern 2226-2 cause the output voltage of circuit [wxy] to reach V[w] minus V[x] and minus V[y], or 5V[y], upon completion of reverse cell [x] phase 2236-2.

[0657] Reverse Start Cell [x] phase 2235-2 may begin after the reverse execute cell [x] pattern 2236-2 is completed. In phase 2235-2, the five-stage reverse start cell [x] pattern 2205-2 (where the stages of the start cell [x] pattern 2205-1 may be implemented in reverse order) first provides V[x] to the voltage input of cell [y] during the eighth application of reverse execute cell [y] pattern 2203-2 on cell [y], and then bypasses cell [x] during the application of reverse start cell [y] switch pattern 2202-2 on cell [y] so that switch pattern 2202-2 can return the output voltage of circuit [wxy] to ground by applying stage 2221(1).

[0658] For unit [w]:

[0659] ·The peak cell [w] stage 2239 can continue with stage 2221 (29) of the peak cell [w] switch pattern 2229 to provide the supply voltage of circuit [wxy] to the input of cell [x] for the duration of the peak cell [x] switch pattern 2207 on cell [x] and continue the supply voltage bypass of cell [w]; and then, during the first application of the reverse execution cell [x] switch pattern 2226-2, reduce the voltage input to cell [x] by V[w].

[0660] Upon completion of stage 2221 (41), after the peak cell [w] stage 2239 is completed, the reverse start cell [w] stage 2238-2 may commence. In stage 2238-2, a 14-stage reverse start cell [w] switch pattern 2228-2 (where the stages of the start cell [w] switch pattern 2228-1 are implemented in reverse order) may be applied to cell [w], first by adding V[w] to the input voltage of cell [w] during the second application of the reverse execute cell [x] switch pattern 2226-2 to cell [x], and then by ground bypassing cell [w] during the application of the reverse start cell [x] switch pattern 2205-2 to cell [x], returning the input voltage of cell [x] to ground. As with cells [x] and [y], cell [w] may be bypassed after the output voltage drive cycle is complete by applying stage 2221 (1).

[0661] Figure 22M-2B1 : 4-unit drive circuit

[0662] Further summarizing the method 2200, Figure 22M-2B1 、 Figure 22M-2B2 An exemplary switching method 2240 for operating a drive circuit [vwxy] having four driver cells [v], [w], [x], [y], each having one non-dissipative element and four switches, is shown. A fourth driver cell in drive circuit [vwxy] is presented here to illustrate how the same switch activation pattern that results in activation of switches in cells in drive circuit [wxy] can be applied to activate switches in cells in drive circuit [vwxy] and switches in drive circuits having any number of driver cells.

[0663] Figure 22M-2B1 Adopted Figures 22L-1 to 22L-3 The functional representation of the switching activation is shown, which maps the switch groups activated in the method level to the functional results of the switching. For example, in a cell with one non-dissipative element:

[0664] activating a first cell of the multi-cell circuit, specifically a switch group (SW[0], SW[1]) (also referred to as a first switch and a second switch) in the cell that is directly connected to a voltage source of the driver circuit, operating to bypass the non-dissipative elements of the first cell and applying the voltage of the negative terminal of the voltage source (here, ground) to the output terminal of the first cell, Figure 22M-2B1 and subsequent switching diagrams referred to as "b(ground)" or simply "b(g)".

[0665] Activate the last and second to last switches in the first cell of the multi-cell circuit (the switch group (SW[2], SW[3]) in a non-dissipative element driver cell also operates to bypass the cell; it increases the voltage at the positive terminal of the voltage source (here V DD[vwxy] ) is applied to the output terminal of the first unit, in Figure 22M-2B1 and is referred to as "b(V DD[*] )", where * is the identifier of the target circuit.

[0666] As described above, in any cell other than the first cell in the multi-cell circuit, activating the first and second switches or the last and penultimate switches (the switch group (SW[0], SW[1]) or (SW[2], SW[3]) in one non-dissipative element driver cell) also operates to bypass the cell, applying the voltage at the cell input terminal to the cell output terminal, referred to as “b”.

[0667] Activating the first and third switches (one non-dissipative element) in any cell of the multi-cell circuit. The switches (SW[0], SW[2]) in the driver cell operate to activate the non-dissipative element of the cell to add the voltage storage capacity of the non-dissipative element of the cell to the input voltage of the cell, referred to as "+".

[0668] Activating the last switch and the third-to-last switch in any cell of the multi-cell circuit (the switches (SW[1], SW[3]) in a non-dissipative element driver cell operate to activate the non-dissipative element of the cell to subtract an amount of the voltage storage capacity of the non-dissipative element of the cell, referred to as "-", from the input voltage of the cell.

[0669] The symbol change allows the switching pattern to be described in a single line of the diagram, allows fewer lines to be used in the diagram illustrating the switching sequence method, and allows the diagram to more easily show the repetition of the switching pattern. This change also allows the switching sequence method 2220 of Figures 22M-2A1 to be compared with Figure 22M-2B1 A direct comparison of the switching sequence method 2240 shows that although Figures 22M-2A1 show a single stage per row, Figure 22M-2B1 The switching pattern in each row is shown, and although the driving circuits [wxy], [vwxy] have different numbers of cells in the circuit, methods 2220, 2240 (and method 2200) have substantially the same phases of switch activation and switching pattern. Figures 22M-1A to 22M-2B2 It is shown that as the number of cells in the driver circuit increases, the switching phases and switching patterns in a switching sequence method for operating the most basic multi-cell driver circuit can be applied to driver circuits with a larger number of cells to achieve a gradual change in the voltage transferred to the output of the driver circuit.

[0670] To simplify the example, Figure 22M-2B1 In the example, each cell in the driver circuit [vwxy] contains a non-dissipative element, and all non-dissipative elements of the cell will have the same capacitance. The issue of relaxing these restrictions will be discussed below. At the same time, it can be seen that the switching sequence of the driver circuit [vwxy] continues to form a switching pattern with the following functions (subtracting the selected voltage from the output voltage of the cell, bypassing circuit "b", and adding the selected voltage amount to the output voltage "+" of the cell), hereinafter referred to as "(-, b, +)"; and applying a similar switching pattern to the upstream cell in the circuit, applying a switching pattern in either a forward sequence or a reverse sequence to the cell, results in a step-by-step change in the circuit output voltage.

[0671] The last cell in the driver circuit [vwxy] (it is directly connected to the output of the driver circuit and in the driver circuit [vwxy] it is cell [y]) can operate in the following phases and activation modes:

[0672] In the start cell [y] stage 2252-1, the two-stage start last cell switch pattern 2202-1 (which is the same switch pattern as the start cell [2] switch pattern 2202-1 in method 2200 and the start cell [y] switch pattern 2202-1 in method 2220) is shown with a switch activation function symbol (b, +) for bypassing the last cell and then for adding the voltage storage capacity of the non-dissipative element of the last cell (constituting voltage level V[y]) to the input voltage of cell [y]. As described above, in the last cell of the driver circuit, bypassing is achieved by activating either the switch (SW[0], SW[1]) or the switch (SW[2], SW[3]) in cell [y],

[0673] Execution unit [y] phase 2253-1 begins after start unit [y] phase 2252-1 completes. Phase 2253-1 invokes repeated application of a three-level execution unit [y] switching pattern 2203-1 (which is the same switching pattern as execution unit [2] switching pattern 2203-1 in method 2200 and execution unit [y] switching pattern 2203-1 in method 2220). Execution unit [y] switching pattern 2203-1, having function (-, b, +), operates to first subtract voltage step V[y] from the input voltage of the last cell, then bypass the last cell, and then add V[y] to the input voltage of the last cell. In method 2240, pattern 2203-1 may be applied 26 times until the output voltage of circuit [vwxy] is equal to two voltage steps from the supply voltage from the voltage source.

[0674] Peak cell [y] stage 2254 begins after execution of cell [y] stage 2253-1. Peak cell [y] stage 2254 employs a peak cell [y] switch pattern 2204 with (-, b, -) functionality (which is the same switch pattern as peak cell [2] switch pattern 2204 in method 2200 and peak cell [y] switch pattern 2204 in method 2220). The first two stages (-, b) of peak cell [y] switch pattern 2204 subtract V[y] from the input voltage of the last cell and then bypass the last cell to obtain the supply voltage as the output voltage of circuit [vwxy].

[0675] When operation of the drive circuit continues after the output voltage of cell [y] equals the obtained supply voltage, the peak cell [y] stage 2254 can allow the peak cell [y] switch mode 2204 to apply its full (-, b, -) function by operating the last stage of the peak cell [y] switch mode 2204 to again subtract V[y] from the cell [y] input voltage.

[0676] Reverse Execute Cell [y] Phase 2253-2 may begin after Peak Cell [y] Phase 2254 completes. Phase 2253-2 may have Reverse Execute Cell [y] Switch Pattern 2203-2, where the stages of Execute Cell [y] Switch Pattern 2203-1 with the (-, b, +) function are applied to Cell [y] in reverse order, where the switch pattern applies the (+, b, -) function on Cell [y]. Reverse Execute Cell [y] Switch Pattern 2203-2 may be repeated until the output voltage of Circuit [vwxy] is two voltage steps away from ground.

[0677] The reverse start phase 2252-2 may commence after the reverse execution of the cell [y] phase 2253-2 is completed. The reverse start phase 2252-2 has a reverse start cell [y] switch pattern 2202-2, wherein the stages of the start cell [y] switch pattern 2202-1 having the function (b, +) are applied to cell [y] in reverse order, employing a two-stage reverse start pattern 2202-2 having the function (+, b) which may be operated to drive the output voltage of the circuit [vwxy] to ground, wherein the b function is provided after the output voltage drive cycle is completed by the application of stage 2241(1).

[0678] A first cell in a driver circuit (which is directly connected to the voltage source for the driver circuit and is cell [v] in the driver circuit [vwxy]) is located upstream and adjacent to a second cell in the driver circuit. The second cell is also referred to herein as cell [2] and is referred to as cell [w] in the driver circuit [vwxy]. The first cell can operate in the following phases and activation modes:

[0679] In the start cell [v] phase 2218-1, the start cell [v] switch pattern 2208-1 may be operated on a first cell in the circuit, with a switch activation function symbol b (ground) repeated for 14 stages for the duration of the application of the start cell [w] switch pattern 2228-1 on cell [w], and another activation function symbol + repeated for 27 stages for the duration of the first application of the execution cell [w] switch pattern 2241-1 on a second cell [w];

[0680] The peak cell [v] stage 2219 may be after the start cell [v] stage 2218-1 is completed. The peak cell [v] stage 2219 may have a peak cell [v] switching pattern 2209 that first reduces the supply voltage of the voltage source by V[v] during the second application of the execution cell [w] switching pattern 2241-1 to the downstream adjacent cell [w]; and then bypasses cell [v] to ensure that cell [v] provides the voltage source (V[v]) during the application of the peak cell [w] switching pattern 2229 (described below). DD[vwxy]) as the output of unit [v] until unit [w] reaches V DD[vwxy] as its output.

[0681] When method 2240 of driving circuit [vwxy] continues after stage 2241 (82):

[0682] Peak cell [v] switch mode 2209 can continue its bypass of cell [v] (V DD[vwxy] ) until the peak cell [w] switching pattern 2229 is completed on the downstream adjacent cell [w]; then, during the first application on the second cell [w] of the reverse execution cell [w] switching pattern 2241-2, from V DD[vwxy] Subtract V[y] from .

[0683] After the first application of the reverse executing cell [w] switch pattern 2241-2 is completed, the reverse cell [v] switching initiation phase 2218-2 may begin after the completion of the peak cell [v] switching phase 2219. Phase 2218-2 may have a reverse initiation cell [v] switch pattern 2208-2 in which the stages of the initiation cell [v] switch pattern 2208-1 are implemented in reverse order to provide the following functionality (+ represents the duration of the second application of the reverse executing cell [w] switch pattern 2241-2 to cell [w] and b (ground) represents the duration of the reverse initiation cell [w] switch pattern 2228-2) such that after the output voltage drive cycle is completed, the output of cell [w] is driven to ground by the application stage 2241(1).

[0684] refer to Figure 22M-2B1 22M-B2, it can be seen that the method 2240 has the following phases and unit switching patterns:

[0685] The method of unit [w] has:

[0686] o a start cell [w] stage 2258-1 having a start cell [w] switching pattern 2228-1 (which is the same switching pattern as the start cell [w] switching pattern 2228-1 in method 2220);

[0687] o Repeatedly apply the execution unit [w] stage 2251 - 1 of the execution unit [w] switching pattern 2241 - 1;

[0688] o a peak cell [w] stage 2259 having a peak cell [w] switching pattern 2229 (which is the same switching pattern as the peak cell [w] switching pattern 2229 in method 2220);

[0689] o Repeated application of reverse execution unit [w] switching pattern 2241-2 reverse execution unit [w]

[0690] Phase 2251-2; and

[0691] o Reverse start unit [w] stage 2258-2 with reverse start unit [w] switching pattern 2228-2.

[0692] The method of unit [x] has:

[0693] o a starting cell [x] stage 2255-1 having a starting cell [x] switching pattern 2205-1 (which is the same switching pattern as the starting cell [1] switching pattern 2205-1 in method 2200 and the starting cell [x] switching pattern 2205-1 in method 2220);

[0694] o Execution unit [x] stage 2256 - 1 having execution unit [x] switching pattern 2226 - 1 (which is the same switching pattern as execution unit [x] switching pattern 2206 - 1 in method 2220 );

[0695] o a peak cell [x] stage 2257 having a peak cell [x] switching pattern 2207 (which is the same switching pattern as the peak cell [1] switching pattern 2207 in method 2200 and the start cell [x] switching pattern 2207 in method 2220);

[0696] o Reverse execution of reverse unit [x] with reverse unit [x] switching execution mode 2226-2

[0697] Phase 2256-2; and

[0698] o Reverse start unit [x] stage 2255-2 with reverse start unit [x] switching pattern 2205-2.

[0699] It can be seen that the driving circuit [vwxy] is an example of a K-cell driving circuit having four cells, each cell in the driving circuit having a single non-dissipative element and four switches, and causes the cell [v] and the cell [y] of the circuit [vwxy] to operate as the cell [1] and the cell [K] of the multi-cell driving circuit, respectively. Therefore, the above-described method for controlling the cells [v] and [y] can be used as an exemplary embodiment of a method for driving the cells [1] and [K] of a generalized multi-cell circuit having a single non-dissipative element and four switches.

[0700] It can also be seen that cells [w] and [x] are instances of cell [i] in the generalized multi-cell drive circuit defined, where (2≤i≤K-1), and i=2 for cell [w] and i=3 for cell [x] of circuit [vwxy]. The method for controlling cells [w], [x] can be understood in the following description of the method for controlling cell [i] of a multi-cell drive circuit, where each cell in the drive circuit has one non-dissipative element and four switches. Cell [i] can be operated according to a cell switching method with the following phases and switch activation patterns:

[0701] The start unit [i] phase comprises a start unit [i] switching pattern having the following functions: b for the duration of applying the start unit [i+1] switching pattern on unit [i+1], + b for the duration of the first application of the execution unit [i+1] switching pattern on unit [i+1] for a drive cycle.

[0702] The execute unit [i] phase may be performed after the start unit [i] phase is completed. The execute unit [i] phase may operate multiple applications of the execute unit [i] switch pattern on unit [i]. When unit [i] has one non-dissipative element, the execute unit [i] phase may end upon completion of the second last application of the execute unit [i+1] switch pattern in a drive cycle on unit [i+1]. When unit [i] has n non-dissipative elements, the execute unit [i] phase may end upon completion of the n+1th last application of the execute unit [i+1] switch pattern in a drive cycle on unit [i+1].

[0703] Executing unit[i] switch mode on unit[i] can have the following functions:

[0704] o- During the application of execution unit [i+1] switch pattern to unit [i+1],

[0705] ob during another application of the switch mode of executing unit [i+1] to unit [i+1], and

[0706] o+ During another application of the execution unit [i+1] switch mode on unit [i+1].

[0707] The peak unit [i] stage may be performed after the execution unit [i] switching stage is completed. The peak unit [i] stage may have a peak unit [i] switching mode, which has the following functions:

[0708] o- during the last application of the drive cycle that executes the unit [i+1] switching pattern on unit [i+1], and

[0709] ob during the application of the peak cell[i+1] switching pattern on cell[i+1] until cell[i+1] reaches its peak voltage.

[0710] After the driver circuit reaches the power supply voltage as its output voltage, the operation of the driver circuit continues when:

[0711] ·The peak unit [i] switching pattern may continue: (b until the peak unit [i+1] switching pattern is completed on unit [i+1], - the duration of the first application of the drive cycle of the reverse execution unit [i+1] switching pattern on unit (i+1)).

[0712] The reverse actuating unit [i] phase may begin after the peak unit [i] phase is completed. The reverse actuating unit [i] phase may repeat the reverse actuating unit [i] switching pattern. When unit [i] has one non-dissipative element, the reverse actuating unit [i] phase may end upon completion of the second last application of the reverse actuating unit [i+1] switching pattern in a drive cycle on unit [i+1]. When unit [i] has n non-dissipative elements, the reverse actuating unit [i] phase may end upon completion of the (n+1)th last application of the actuating unit [i+1] switching pattern in a drive cycle on unit [i+1].

[0713] The reverse execution unit [i] stage can have the following functions:

[0714] o+ During the application of the reverse execution unit[i+1] switch pattern to unit[i+1],

[0715] ob during another application of the switch pattern of unit [i+1] to unit [i+1], and

[0716] o-During another application of the unit [i+1] switching pattern to unit [i+1] the reverse execution is to be performed.

[0717] The Reverse Start Unit [i] phase can start after the Reverse Execution Unit [i] phase is completed. The Reverse Start Unit [i] phase can have a Reverse Start Unit [i] switch mode, which has the following functions:

[0718] o+ will reverse the execution of the unit [i+1] switch pattern during the last application of the unit [i+1] switch pattern, and

[0719] ob provides b functionality after completing the output voltage drive cycle by application stage 2241(1) during application of the reverse starting cell [i+1] switching pattern on cell [i+1].

[0720] 8.2. K-Cell Driver Circuit with Cells Having Multiple Non-Dissipative Components

[0721] Figure 22M-3A 、 Figure 22M-4A : There are elements with one non-dissipative element and elements with two non-dissipative elements 2-unit drive circuit

[0722] For a drive circuit having a cell with one non-dissipative element and a cell with two non-dissipative elements, Figure 22M-3A 、 Figure 22M-3B as well as Figure 22M-4A 、 Figure 22M-4B Similar switching patterns can also be seen in the switching sequence methods 2260, 2270 in FIG. For simplicity, the capacitances of the non-dissipative elements are assumed to be equivalent, but it should be understood that the drive circuit and switching sequence method can be developed for gradually increasing and decreasing the voltage output of the drive circuit for non-dissipative elements with non-equivalent capacitances.

[0723] As can be seen in switching sequence methods 2260, 2270, the phases and switching patterns of a multi-cell drive circuit having non-dissipative elements distributed differently across the cells of the drive circuit are similar to the switching patterns seen in methods 2200, 2220 and 2240, where the differences are driven by the number of non-dissipative elements in the cells in the drive circuit, resulting in switches in the switch activation set being different due to the number of non-dissipative elements in the cells.

[0724] For example, a cell with a single non-dissipative element has one switch group (SW[0], SW[2]) that, when activated, causes an increase in the output voltage of the driving cell, while a cell with two non-dissipative elements has two switch groups (SW[0], SW[2]) and (SW[0], SW[3]) that, when activated, cause an increase in the output voltage of the driving cell. Activation of the switch group (SW[0], SW[2]) supplies the voltage storage capacity of one non-dissipative element to the output voltage, while activation of the switch group (SW[0], SW[3]) supplies the voltage storage capacity of both non-dissipative elements to the output voltage.

[0725] Furthermore, the unit with a single non-dissipative element has one switch group (SW[1], SW[3]) which, when activated, causes the output voltage of the driving unit to be reduced by the voltage storage capacity of its one non-dissipative element, whereas the unit with two non-dissipative elements has two switch groups (SW[1], SW[4]), (SW[2], SW[4]) which, when activated, (SW[2], SW[4]) cause the output voltage of the driving unit to be reduced. Activation of the switch group (SW[2], SW[4]) reduces the output voltage by the voltage storage capacity of one non-dissipative element, whereas activation of the switch group (SW[1], SW[4]) reduces the output voltage by the voltage storage capacity of two non-dissipative elements.

[0726] Figure 22M-3A : Driving circuit [ab], having a cell with two non-dissipative elements [b]

[0727] Figure 22M-3A 、 Figure 22M-3B 2260 shows a switching sequence method 2260 of a driving circuit [ab] having a non-dissipative element unit [a] electrically connected to a voltage source of the driving circuit and a dual non-dissipative element unit [b] electrically connected to an output terminal of the driving circuit.

[0728] For cell [b] of circuit [ab], method 2260 reflects method 2200 with:

[0729] an initiation cell [b] phase 2262-1 similar to the initiation cell [2] phase 2212-1 of method 2200 and having an initiation cell [b] switching pattern 2242-1 similar to the initiation cell [2] switching pattern 2202-1 used for the initiation cell [2] phase 2212-1, wherein both switching patterns 2242-1, 2202-1 apply a switch activation that causes the output voltage of their respective cells to increase from bypass;

[0730] an execution unit [b] stage 2263-1 similar to the execution unit [2] stage 2213-1 of the method 2200 and having an execution unit [b] switching pattern 2243-1 similar to the execution unit [2] switching pattern 2203-1 of the execution unit [2] stage 2213-1, wherein both switching patterns 2243-1 and 2203-1 apply a switch activation that increases the output voltage of its corresponding cell from a minimum cell voltage to a peak cell voltage;

[0731] a peak cell [b] stage 2264 that is similar to the peak cell [2] stage 2214 of method 2200 and has a peak cell [b] switching pattern 2244 that is similar to the peak cell [2] switching pattern 2204 for the peak cell [2] stage 2214 in that both switching patterns 2244, 2204 apply switching activations that increase the output voltage of their respective cells from a minimum cell voltage to a peak cell voltage and back to the minimum cell voltage;

[0732] a reverse execution unit [b] stage 2263-2 similar to the reverse execution unit [2] stage 2213-2 of the method 2200 and having a reverse execution unit [b] switching pattern 2243-2 similar to the reverse execution unit [2] switching pattern 2203-2, with the stages of the reverse switching patterns 2243-2 and 2203-2 being applied to their respective units in the reverse order of the switching patterns 2243-1 and 2203-1, respectively; and

[0733] · Reverse start unit [b] phase 2262-2, which is similar to the reverse start unit [2] phase 2212-2 of method 2200 and has a reverse start unit [b] switching pattern 2242-2 similar to the reverse start unit [2] switching pattern 2202-2, wherein the phases of the reverse switching patterns 2242-2, 2202-2 are applied to their respective units in the opposite order of the switching patterns 2242-1, 2202-1, respectively, wherein the b function is provided after the application phase 2261(1) completes the output voltage drive cycle.

[0734] Further, the switch closures and resulting output voltages of initial stages 2261(1), 2261(2) of method 2260 mirror the switch closures and resulting voltage outputs of stages 2201(1), 2201(2), respectively, of method 2200, wherein stage 2261(3) is added after stage 2261(2) to allow activation of the set of switches (SW[0], SW[3]) in cell [b], thereby enabling the voltage storage capacity of the two non-dissipative elements in cell [b] to supply voltage to the output of driver circuit [ab]. When the two non-dissipative elements have equal voltage capacity, the driver circuit output is 2V[b].

[0735] The two-stage initialization unit [2] switch pattern 2202-1 for the (b, +) function of the unit 2101-2 can be modified to provide a three-stage initialization unit [b] switch pattern 2242-1 for the (b, +, 2+) function of the two non-dissipative element driver units. By extension, the two-stage combination of the reverse initialization unit [2] switch pattern 2202-2 and the first-stage initialization unit [2] switch pattern 2202-1 for the (+, b) function of the unit 2101-2 can be modified to provide a three-stage combination of the reverse initialization unit [b] switch pattern 2242-2 and the first-stage initialization unit [b] switch pattern 2242-1 for the (2+, +, b) function of the dual non-dissipative element driver unit [b].

[0736] The switch closures and resulting voltage outputs of stages 2261(5), 2261(6), and 2261(7) of method 2260 mirror the switch closures and resulting voltage outputs of stages 2201(3), 2201(4), and 2201(5), respectively, of method 2200, with the addition of the following stages:

[0737] Stage 2261(4) is added before stage 2261(5) to allow activation of the switch group (SW[1], SW[4]) in cell [b] so that the voltage storage capacity of the two non-dissipative elements in cell [b] can contribute to reducing the input voltage (V[a]) of cell [b]. When the two non-dissipative elements have equivalent voltage capacity, the driver circuit output voltage is V[a]-2V[b]=3V[b].

[0738] Stage 2261(8) is added after stage 2261(7) to allow activation of the switch group (SW[0], SW[3]) in cell [b] so that the voltage storage capacity of the two non-dissipative elements in cell [b] can contribute to increasing V[a]. When the two non-dissipative elements have equal voltage capacity, the driver circuit output voltage is:

[0739] V[a]+2V[b]=7V[b].

[0740] The switch closures and resulting voltage outputs of stages 2261(10), 2261(11), and 2261(12) of method 2260 mirror the switch closures and resulting voltage outputs of stages 2201(6), 2201(7), and 2201(8), respectively, of method 2200, with the addition of the following stages:

[0741] Stage 2261(9) is added before stage 2261(10) to allow activation of the switch group (SW[1], SW[4]) in cell [b] so that the voltage storage capacity of the two non-dissipative elements in cell [b] contributes to reducing the input voltage of cell [b], which is (V DD [ab]-V[a]), so when the two non-dissipative components have equivalent voltage capacity, the output voltage of the driver circuit is (V DD [ab]-[V[a])-[2V[b]=-[8V[b]).

[0742] Adding stage 2261(13) after stage 2261(12) to allow activation of the set of switches (SW[0], SW[3]) in cell [b], thereby causing the voltage storage capacity of the two non-dissipative elements in cell [b] to contribute to increasing the input voltage of cell [b], thereby causing the driver circuit output to be (V DD [ab]-V[a])+2V[b]=12V[b].

[0743] Can be modified Figure 22M-1AThe three-level execution unit [2] switching pattern 2203-1 of the three-level execution unit (-, b, +) function of the unit 2101-2 is modified to provide a five-level execution unit [b] switching pattern 2243-1 with a (2-, -, b, +, 2+) function for the dual non-dissipative element driver unit [b]. By extension, the three-level reverse execution unit [2] switching pattern 2203-2 for the (+, b, -) function of the unit 2101-2 can be modified to provide a five-level reverse execution unit [b] pattern 2243-2 with a (2+, +, b, -, -2-) function for two non-dissipative element driver units [b].

[0744] The switch closures of method 2260 and the resulting output voltages of stages 2261(15), 2261(16) reflect the switch closures and resulting output voltages of stages 2201(9), 2201(10), respectively, according to method 2200, with stage 2261(14) added before stage 2261(15) to allow activation of the set of switches (SW[1], SW[4]) in cell [b] so that the voltage storage capacity of the two non-dissipative elements in cell [b] can contribute to reducing the input voltage of cell [b], which is V DD [ab], resulting in the driver circuit output being V when the two non-dissipative components have equivalent voltage capacity. DD [ab]-2V[b]=13V[b].

[0745] The three-level peak cell [2] switching pattern 2204 with (-, b, -) functionality for cell 2101-2 can be modified to provide a five-level peak cell [b] switching pattern 2244 with (2-, -, b, -, 2-) functionality for 2 non-dissipative element driver cells [b].

[0746] For cell [a] of circuit [ab], method 2260 reflects method 2200 in a circuit having:

[0747] an initiate cell [a] phase 2265-1 that is similar to the initiate cell [1] phase 2215-1 of method 2200 and has an initiate cell [a] switching pattern 2245-1 that is similar to the initiate cell [1] switching pattern 2205-1 used for the initiate cell [1] phase 2215-1 in that the switching patterns 2245-1, 2205-1 both apply switch activations that increase the output voltage of their corresponding cells from ground to a peak cell voltage, and in that the patterns 2245-1, 2205-1 both maintain their set of switch activations for the duration of the switching pattern applied to the adjacent, downstream cells in their respective loops;

[0748] a peak cell [a] stage 2267 that is similar to the peak cell [1] stage 2217 of method 2200 and has a peak cell [a] switching pattern 2247 that is similar to the peak cell [1] switching pattern 2207 used for the peak cell [1] stage 2217 in that both patterns 2247, 2207 maintain their set of switch activations for the duration of the cell switching pattern applied to the adjacent downstream cell in its respective circuit; and

[0749] Reverse start cell [a] phase 2265-2, which is similar to the reverse start cell [1] phase 2215-2 of method 2200, and has a reverse start cell [a] switch pattern 2245-2, which is similar to the reverse start cell [1] switch pattern 2205-2 of the reverse start cell [1] phase 2215-2, with the phases of the two switch patterns 2245-2, 2205-2 being applied to their respective cells in the reverse order of the switch patterns 2245-1, 2205-1, respectively.

[0750] Further, to accommodate additional non-dissipative elements in cell [b], the five-level initialization cell [1] switch pattern 2205-1 for cell 2101-1 can be modified to provide an eight-level initialization cell [a] switch pattern 2245-1 for cell [a] having the functionality of (b, b, b, +, +, +, +). By extension, the five-level combination of the reverse initiating cell [1] switch pattern 2205-2 and the first-stage initiating cell [1] switch pattern 2205-1 for cell 2101-1 can be modified to provide an eight-level combination of the reverse initiating cell [a] switch pattern 2245-2 and the first-stage initiating cell [a] switch pattern 2245-1 for cell [a] having the functionality of (+, +, +, +, +, b, b, b).

[0751] The nine-level peak cell [1] switching pattern 2207 for cell 2101-1 having functionality of (-, -, -, b, b, b, -, -) can be modified to provide a fifteen-level peak cell [a] switching pattern 2247 for cell [a] of (5 applications –, 3 applications – (until cell [b] reaches its peak voltage)) followed by (2 more applications –, 5 applications –).

[0752] Figure 22M-4A : a circuit [mn] having a cell [m] with 2 non-dissipative elements;

[0753] Figure 22M-4A 、 Figure 22M-4B A switching sequence method 2270 is shown for a driver circuit [mn] having a dual non-dissipative element unit [m] electrically connected to a voltage source of the driver circuit and a single non-dissipative element unit [n] electrically connected to an output terminal of the driver circuit.

[0754] For unit [n], method 2270 reflects method 2200 with:

[0755] an initiator [n] stage 2272-1 that is identical to the initiator [2] stage 2212-1 of method 2200 and has the same initiator [n] switching pattern 2202-1 as the initiator [2] switching pattern 2202-1 for the initiator [2] stage 2212-1;

[0756] an execution unit [n] stage 2273-1 that is similar to the execution unit [2] stage 2213-1 of method 2200 and has the same execution unit [n] switching pattern 2203-1 as the execution unit [2] switching pattern 2203-1 used for the execution unit [2] stage 2213-1;

[0757] a peak cell [n] stage 2274 that is identical to the peak cell [2] stage 2214 of method 2200 and has the same peak cell [n] switching pattern 2204 as the peak cell [2] switching pattern 2204 used for the peak cell [2] stage 2214,

[0758] a reverse execution unit [n] stage 2273-2 that is similar to the reverse execution unit [2] stage 2213-2 of method 2200 and has the same reverse execution unit [n] switching pattern 2203-2 as the reverse execution unit [2] switching pattern 2203-2 used for the execution unit [2] stage 2213-2; and

[0759] a reverse starting cell [n] stage 2272-2 that is identical to the reverse starting cell [2] stage 2212-2 of the method 2200 and having a reverse starting cell [n] switching pattern 2202-2 that is identical to the reverse starting cell [2] switching pattern 2202-2 used for the reverse starting cell [2] stage 2212-2 for cell [n]; and

[0760] For unit [m], method 2270 reflects method 2200 with:

[0761] an initiate cell [m] phase 2275-1, which is similar to the initiate cell [1] phase 2215-1 of method 2200 and has an initiate cell [m] switching pattern 2248-1, which is similar to the initiate cell [1] switching pattern 2205-1 used for the initiate cell [1] phase 2215-1 in that the switching patterns 2248-1, 2205-1 both apply switch activations that increase the output voltage of their corresponding cells through bypassing, and are characterized in that the patterns 2248-1, 2205-1 both maintain their sets of switch activations for the duration of the switching patterns applied to the adjacent cells, downstream cells in their respective loops;

[0762] a peak cell [m] stage 2277 that is similar to the peak cell [1] stage 2217 of method 2200 and has a peak cell [m] switching pattern 2249 that is similar to the peak cell [1] switching pattern 2207 used for the peak cell [1] stage 2217 in that the switching patterns 2249, 2207 both apply switch activations that increase the output voltage of their corresponding cells from a minimum cell voltage to a peak cell voltage and back to the minimum voltage, and in this pattern 2249, both 2207 maintain their set of switch activations for the duration of the cell switching pattern being applied to the adjacent downstream cells in their respective circuits; and

[0763] Reverse start cell [m] phase 2275-2, which is similar to the reverse start cell [1] phase 2215-2 of method 2200, and has a reverse start cell [m] switch pattern 2248-2, which is similar to the reverse start cell [1] switch pattern 2205-2 used for reverse start cell [1] phase 2215-2, in that the phases of the two switch patterns 2248-2, 2205-2 are applied to their corresponding cells in the reverse order of the switch patterns 2248-1, 2205-1, respectively.

[0764] Further, the switch closures and resulting output voltages of stages 2271(1) to 2271(5) and 2271(12) to 2271(16) of method 2270 reflect the switch closures and resulting voltage outputs of stages 2201(1) to 2201(5) and 2201(6) to 2201(10) of method 2200, respectively.

[0765] Stages 2271(6) to 2271(11) have been added to method 2270 to allow activation of switch sets (SW[0], SW[3]) and (SW[1], SW[4]) in cell [m] so that the voltage storage capacity of the two non-dissipative elements in cell [m] can contribute to the operation of drive circuit [mn].

[0766] To accommodate the two non-dissipative elements of cell [m], the five-level initialization cell [1] switch pattern 2205-1 for cell 2101-1 can be modified to provide an eight-level initialization cell [m] switch pattern 2248-1 having the functionality of (b, b, +, +, +, 2+, 2+, 2+) for the dual non-dissipative element driver cell [m]. Activation of the switch group (SW[0], SW[3]) of cell [m] in switch pattern 2248-1 provides the voltage storage capacity of its two non-dissipative elements, thereby increasing the output voltage of cell [m] to 2V[m] when the voltage storage capacity of both cells is V[m]. By extension, the five-level combination of the reverse starting unit [1] switch mode 2205-2 and the first-level starting unit [1] switch mode 2205-1 for unit 2101-1 can be modified to provide an eight-level combination of the reverse starting unit [m] switch mode 2248-2 and the first-level starting unit [m] switch mode 2248-1 having the functionality of (2+, 2+, 2+, +, +, +, b, b) for two non-dissipative element driver units [m].

[0767] The nine-level peak cell [1] switching pattern 2207 with (-, -,, b, b, b, -,) functionality can be modified to provide a fifteen-level peak cell [m] switching pattern 2249 with (2-, 2-, 2-, -, -, b, b, b, -, -, 2-, 2-, 2-) functionality for the two non-dissipative element driver cells [m]. Activation of the switch group (SW[1], SW[4]) of cell [m] reduces the input voltage of cell [m] by the voltage storage capacity of the two non-dissipative elements of cell [m], thereby reducing the output voltage of cell [m] to V when the voltage storage capacity of both cells is V[m]. DD [mn]-2V[m].

[0768] Figure 22M-5A1 、 Figure 22M-5A2 : A driving circuit with two non-radiating elements [mnp], units [m], [n], with A unit with three non-radiating elements [p]

[0769] Figure 22M-5A1 、 22M-5A2 A switching sequence method 2280 is shown for a drive circuit [mnp] having a dual non-dissipative element unit [m] electrically connected to a voltage source of a drive circuit, a triple non-dissipative element unit [p] electrically connected to an output terminal of the drive circuit, and a dual non-dissipative element unit [n] electrically connected between unit [m] and unit [p]. Figure 22M-5A1 、 22M-5A2 Stage 2281(z) is shown, where 1≤z≤350.

[0770] Method 2280 reflects Figure 22M-2A1(A1)-Figure 22M-2A2As shown in the method 2220, the method is also arranged to control a three-cell drive circuit [wxy]. For cell [p], the method 2280 has:

[0771] Switching the mode to the Originating Cell [y] Phase 2232-1, the Execution [y] Phase 2233-1, the Peak Cell [y] Phase 2234, the Reverse Execution Unit [y] Phase 2233-2, and the Reverse Originating Cell [y] Phase 2232-2 in the same order as and except for the number of phases in the Originating Cell [p] Phase 2292-1, the Execution [p] Phase 2293-1, the Peak Cell [p] Phase 2294, the Reverse Execution Unit [p] Phase 2293-2, and the Reverse Originating Cell [p] Phase 2292-2 of the method 2220, respectively;

[0772] For the cell[n], initiating cell[n] stage 2295-1, executing unit[n] stage 2296-1, peak cell[n] stage 2297, reverse executing unit[n] stage 2296-2, and reverse initiating cell[n] stage 2295-2 of method 2220, the order is the same and, except for the number of stages therein, the switching mode is the same as that of the initiating cell[x] stage 2235-1, executing unit[x] stage 2236-1, peak cell[x] stage 2237, reverse executing unit[x] stage 2236-2, and reverse initiating cell[x] stage 2235-2, respectively.

[0773] For Cell[m], OriginateCell[m] phase 2298-1, PeakCell[m] phase 2299, and Reverse OriginateCell[m] phase 2298-2, the order is the same and, except for the number of phases therein, the mode is switched to OriginateCell[w] phase 2238-1, PeakCell[w] phase 2239, and Reverse OriginateCell[w] phase 2238-2 of method 2220, respectively.

[0774] Furthermore, the switching patterns for cells [m], [n] in method 2280 are similar to their corresponding switching patterns for cells [w], [x] in method 2220 in their respective phases in that these switching patterns maintain their switch activation sets for the duration that these cell switching patterns are applied to adjacent downstream cells in their respective circuits.

[0775] Switching sequence method 2280 is presented here to illustrate how the switching patterns disclosed herein can be modified to accommodate drive circuits created with any number of driver units, each of which can be created with any number of non-dissipative elements.

[0776] Turning first to cell [p], this cell is the last cell in the multi-cell circuit and has three non-dissipative elements:

[0777] The two-stage initiating cell[y] switch pattern 2202-1 for the (b, +) functionality of the initiating cell[y] phase 2232-1 in the method 2220 for cell[y] can be modified to provide a four-stage initiating cell[p] switch pattern 2282-1 with (b, +, 2+, 3+) functionality in the method 2280 for cell[p]. By extension, the two-stage combination of the reverse initiating cell[y] switch pattern 2202-2 in the method 2220 and the first stage of the initiating cell[y] switch pattern 2202-1 for the (+, b) functionality of the reverse initiating cell[y] phase 2232-2 can be modified to provide a four-stage combination of the first stage of the initiating cell[p] switch pattern 2282-1 with (3+, 2+, +, b) functionality in the method 2280 for cell[p].

[0778] The three-stage execution unit [y] switch pattern 2203-1 for executing the ("-, b, +) function of the cell [y] stage 2233-1 in the method 2220 for cell [y] may be modified to provide a seven-stage execution unit [p] switch pattern 2283-1 for executing the (3-, 2-, -, b, +, 2+, 3+) function of the method 2280 for cell [p]. By extension, the three-stage reverse execution switch pattern 2203-2 for executing the (+, b, -) function of the reverse execution cell [y] stage 2233-2 in the method 2220 may be modified to provide a seven-stage reverse execution cell [p] switch pattern 2283-2 for executing the (3+, 2+, +, b, -, -2-, -3-) function of the method 2280 for cell [p].

[0779] The three-level peak cell [y] switching pattern 2204 for the (-, b, -) functionality of the peak cell [y] stage 2234 in the method 2220 for cell [y] may be modified to a seven-level peak cell [p] switching pattern 2284 providing the (3-, 2-, -, b, -, 2-, 3-) functionality of the method 2280 for cell [p].

[0780] Going to cell [n], which is the two non-dissipative element driven cell upstream and adjacent to the last cell with three non-dissipative elements:

[0781] The five-phase initiating cell [x] switching pattern 2205-1 with (b, b, +, +, +) functionality for the initiating cell [x] phase 2235-1 in the method 2220 for cell [x] can be modified to provide an eighteen-phase initiating cell [n] switching pattern 2285-1 with (b phases, 7 phases +, and 7 phases 2+) functionality for cell [n]. By extension, the five-phase combination of the reverse initiating cell [x] switching pattern 2205-2 and the first phase of the initiating cell [x] switching pattern 2205-1 with (+) functionality can be modified to provide an eighteen-phase combination of the reverse initiating cell [x] switching pattern 2285-2 and the first phase of the initiating cell [n] switching pattern 2285-1 with (7 phases 2+, 7 phases +, 4 phases b) in the method 2280 for cell [n].

[0782] The 9-level execution unit [x] switch pattern 2226-1 with functionality of (3-level, 3-level, and 3-level+) for unit [x] in method 2220 can be modified to provide a 35-level execution unit [n] switch pattern 2286-1 with functionality of (7-level, 2-level, 7-level, 7-level, 7-level, 7-level+, and 7-level, 2+) for unit [n]. By extension, the 9-level reverse execution unit [x] switch pattern 2226-2 with functionality of (+, +, +, b, b, b, -, -) of method 2220 can be modified to provide a 35-level reverse execution unit [n] switch pattern 2286-2 with functionality of (7-level of 2+, 7-level of +, 7-level of +, 7-level of b-, and 7-level of 2-) in method 2280 for unit [n].

[0783] ·The nine-level peak cell [x] switching pattern 2207 having the functionality of (-, -, -, , b, b, b, -, -, -) of the peak cell [x] stage 2237 in the method 2220 for cell [x] can be modified to provide a 35-level peak cell [n] switching pattern 2287 having the functionality of (7 stages of 2-, 7 stages of 7-, 7 bypass stages of 7-, 7 stages of 7- and 2 stages of 7-) in the method 2280 for cell [n].

[0784] Turning to cell [m], which is the two non-dissipative elements in the three-driver cell driving circuit, the first cell has two non-dissipative elements, while the third and final cell has three non-dissipative elements:

[0785] The 14-phase initiating cell [w] switching pattern 2228-1 having the functionality of (5 phases of b, 9 phases of 2+) for initiating cell [w] phase 2238-1 in the method 2220 for cell [w] may be modified to provide an 88-phase initiating cell [m] switching pattern 2288-1 having the functionality of (18 phases of b, 35 phases of +, and 35 phases of 2+) for the method 2280 for cell [m]. By extension, the 14-phase combination of the reverse initiating cell [w] switch pattern 2228-2 and the first phase initiating cell [w] switch pattern 2228-1 has the functionality of ±9 phases +, the 5 phases b) of the reverse initiating cell [w] phase 2238-2 in the method 2220 can be modified to provide the 88-phase combination of the first phase of the reverse initiating cell [m] switch pattern 2288-2 and the initiating cell [m] switch pattern 2288-1 (35 phases 2+, 35 phases + and 18 phases [m] of the method 2280 for cells; and

[0786] The 27-level peak cell [w] switching pattern 2229 with the functionality of (9 phase-, 9 phase-b, 9 phase-) of the peak cell [w] phase 2239 in the method 2220 for cell [w] may be modified to provide a 175-level peak cell [m] switching pattern 2289 with the functionality of (35 phase-2-, 35 phase-b, 35 phase-2-) for the method 2280 for cell [m].

[0787] A comparison of the methods presented herein shows for the i-th cell of a K-cell driver circuit:

[0788] When the circuit is repeatedly operated, the startup unit [i] switching pattern and the peak unit [i] switching pattern have the same number of stages:

[0789] o when the i-th cell is the last cell and the drive circuit is set to operate repeatedly through a plurality of drive cycles, the number of stages in the startup and peak cell [i] switching modes is twice the number of non-dissipative elements in the i-th cell plus 1 (when the drive circuit is set to stop operating after only one drive cycle, the number of stages in the startup and peak modes of the i-th cell is the number of non-dissipative elements in the i-th cell + 1); and

[0790] o when the i-th cell is not the last cell and the i-th cell has n non-dissipative elements, the number of stages in the startup and peak cell [i] switching pattern is equal to the number of stages in one application of the startup or peak cell [i+1] switching pattern plus the number of stages in n applications of the execution cell [i+1] switching pattern; and

[0791] When the i-th cell has an execution unit [i] switching pattern (i.e., not the first cell), the execution unit [i] switching pattern has the same order as twice the number of non-dissipative elements in the i-th cell plus one multiplied by twice the number of non-dissipative elements in the (i+1)-th cell plus one.

[0792] In which cell [n] has 2 non-dissipative elements and cell [p] has 3 non-dissipative elements Figure 22M-5A1 、 Figure 22M-5A2 In the circuit [mnp] shown, the execution unit [n] switch pattern 2286-1 has (2n[i]+1)(2n[i+1]+1) stages, where n[i]=2 and n[i+1]=3; the execution unit [p] switch pattern 2283-1 has (2n[i]+1) stages, ni=3.

[0793] In a general embodiment of a K-cell driver circuit, for cell [i], 2≤i≤K, cell [i] has an executing switching pattern and ni non-dissipative elements, and cell [i+1] has n[i+1] non-dissipative elements, and the executing switching pattern of cell [i] has:

[0794] f(i)=N(K) / h(i)

[0795] =(2n[i+1]+1)(2n[i+2]+1)…(2n[K]+1)

[0796] f(i-1)=(2n[i]+1)(2n[i+1]+1)(2n[i+2]+1)…(2n[K]+1)

[0797] =(2·n[i]+1)·f(i); where i ranges from 2 to K.

[0798] It can be seen that f(i) is the number of combinations of activations of the switches of the remaining cells (e.g., cell [i+1], cell [i+2], ..., cell [K-1], and cell [K] in the output voltage drive cycle of the K cell drive circuit).

[0799] 8.3. Figures 23A-23B :Extended to the driving circuit of unit and non-dissipative element number

[0800] Although Figure 21 An exemplary embodiment of a two-unit non-dissipative element enabled capacitive element driving circuit 2100 is shown, wherein two driver units (each having one non-dissipative element) are connected in series. Figure 23A 、 Figure 23B A general embodiment of a non-dissipative element enabled capacitive element driving circuit 2300 is shown, wherein K driver units are connected in series.

[0801] wherein each driver unit 2301-i (i is a positive integer and 1≤i≤K) has a selected number n[i] of non-dissipative elements;

[0802] where N is the maximum number of non-dissipative elements in a cell in the driver circuit 2300, and n[i] is a positive integer with 1≤n[i]≤N, and

[0803] • where j represents the jth non-dissipative element in driver unit 2301 - i , and where j is a positive integer and 1≤j≤n[i]).

[0804] Thus, circuit 2100 is an instantiation of circuit 2300, where K=2; and cell 2000 is an instantiation of cell 2301-i, where n[i]=n. Like capacitive element driving circuit 2100, capacitive element driving circuit 2300 may have a voltage source 2320 (also referred to as voltage source V) for providing a voltage of a selected value. DD23 ) as a component of the capacitor element driving circuit 2300, but in other embodiments, the voltage source can be a unit that is separate from and electronically attachable to the capacitor driving circuit of the capacitor element driving circuit 2300. In addition, like the capacitor element 2130, the capacitor element 2330 can be a unit that is separate from and electronically attachable to the capacitor driving circuit of the capacitor element driving circuit 2300; in other embodiments, it can be a component of the driving circuit 2300.

[0805] Reference Figure 23A , the drive units 2301-1 to 2301-K are designed to be compatible with Figure 20 2000, with its n non-dissipative elements. In some embodiments, all cells may have the same number of non-dissipative elements, and in other embodiments, at least one cell may have a different number of non-dissipative elements. Furthermore, in an illustrative, but not necessarily preferred, embodiment, the non-dissipative elements in one or more cells may be of the same type, such as storage capacitors. In other embodiments, the non-dissipative elements in one or more driver cells may be of different types. Furthermore, in Figure 23A In this embodiment, for ease of calculation, it is assumed that the non-dissipative elements have the same capacitance, but it will be understood that the selection of the voltage storage capacity of any non-dissipative element in any driver unit of the driver circuit will be the choice of the designer.

[0806] like Figure 23A and Figure 23B As shown in and reference Figure 20 and Figure 21, the driver units 2301-1, 2301-2, ..., 2301-K are electrically connected to the voltage source V in the manner disclosed for the units 2101-1, ..., 2101-2, respectively. DD23 And capacitor element 2330:

[0807] Voltage source V DD23 The positive terminal 2326 of is electrically connected to the input terminal 2311-1 of the unit 2301-1;

[0808] Voltage source V DD23 The negative terminal 2328 of is electrically connected to the input terminal 2313-1 of the unit 2301-1;

[0809] wherein the output terminal 2304-1 of the cell 2301-1 is electrically connected to a common node of the switches included between SW[1] and SW[n[1]+1] of the cell 2301-1 ( Figure 22A between the common node 2114) and the common node 2315-2 of the input terminals 2311-2 and 2313-2 of the unit 2301-2;

[0810] The input terminals 2311-K and 2313-K of the unit 2301-K are electrically connected to the unit 2301-(K-1) through the common node 2315-K. Figure 23B The output terminal 2304-(K-1) (shown as the unit 2301-i) is shown in FIG. Figure 23B Shown as terminal 2304-i);

[0811] The input terminals 2311-K and 2313-K of the unit 2301-K are also electrically connected to the switches SW[n[K]+2] and SW[0] of the unit 2301-K, respectively. Figure 23B SW23[n[i]+2], SW23[0]); and

[0812] • An input terminal 2332 of a capacitive element 2330 (eg, CO23) is electrically connected to an output terminal 2304-K of the cell 2301-K.

[0813] like Figure 23B As shown in , unit 2301-i (for 2≤i≤(K–1), and for 1≤j≤n[i]) has:

[0814] Input terminals 2311 - i and 2313 - i electrically connected to switches SW23 [n[i] + 2] and SW23 [0] of unit 2301 - i , respectively;

[0815] Input terminals 2311-i, 2313-i are connected to terminal 2304-(i-1) of driver unit 2301-(i-1) via a common node 2315-i, and

[0816] ·Output terminal 2304-i, electrically connected between a common node 2314-i of the switches included between switches SW23[1] and SW23[n[i]+1] of cell 2301-i and a common node 2315-(i+1) of input terminals 2311-(i+1), 2313-(i+1) (not shown) of cell 2301-(i+1) located downstream of cell 2301-i and adjacent to cell 2301-i.

[0817] The driver circuit 2300 has or is electrically connected via a path system to a controller 2360, which is arranged to provide control signals to signal the capacitive element driver circuit 2300 to start, operate in a mode, switch in a mode, and stop a switching sequence method. The switching controller 2360 controls the activation and deactivation of switches in the K driver units using a set of phases to drive the circuit 2300 via a VO23 drive cycle. The set of phases can be implemented in a sequenced method with multiple phases that are defined to ensure that the average value of the voltage of the storage capacitor remains constant over time.

[0818] 8.3.1. Switching Sequence in a Complete Voltage Drive Cycle

[0819] The driver circuit 2300 can be operated as the driver circuit 2100, having a phase and switching pattern of opening and closing switches, wherein the driver circuit voltage output is increased (or decreased) in a selected stepwise manner, intended to release voltage from the non-dissipative elements (non-dissipative element to non-dissipative element) of one or more selected cells, while selectively preventing other cells from contributing voltage to the driver circuit output or allowing other cells to access the driver circuit's supply voltage to increase the driver circuit output. The method defines a circuit control process for generating a step change provided by a multi-cell driver circuit by allowing an activated driver cell [i] to provide a selected amount of voltage to cell [i+1] to maintain the provided voltage while cell [i+1] produces a step change in its voltage generation; and once the output voltage of the activated driver cell [i+1] reaches a maximum level (or a minimum level when the incremental change is a voltage reduction) that can be obtained from its non-dissipative elements, then changing the selected amount of voltage to be provided to cell [i+1] so as to continue the step change in the voltage that can be released from the driver circuit.

[0820] In the following discussion of a cell method for driving a K-cell circuit through a complete drive cycle, reference will be made to a “first cell” and a “last cell,” “to be defined in the remaining embodiments described,” wherein a cell in a circuit having one input terminal electrically connected to a positive terminal of a voltage source for the circuit and another input terminal electrically connected to a negative terminal of a voltage source for the circuit is known as the first cell (or cell [1]), and the cell in the circuit whose output constitutes or is electrically connected to the output of the circuit is referred to as the last cell (or cell [K]).

[0821] For a cell[i] of a K-cell driver circuit having n[i] non-dissipative elements, method 2400 may begin with an initialize cell[i] phase with initializing the cell[i] switching pattern:

[0822] (1) bypassing the cell [i] to allow the input voltage of the cell [i] to reach its output voltage, and then

[0823] (2) incrementally increasing the output voltage of cell [i] by a multiple of v[i] to start with an increase of V(i) to the output voltage of cell [i] at the beginning of the start-up cell [i] phase, and at the end of the incremental increase of the start-up cell [i] phase, to achieve an overall increase of n[i]V(i) to the output voltage of cell [i] since the beginning of the start-up cell [i] phase.

[0824] Bypassing of cell [i] may be accomplished by selectively activating a set of switches of cell [i] that provide the input voltage of cell [i] as its output voltage, wherein the bypass is maintained for the duration of one phase in the method when cell [i] is the last cell in the circuit, or for the duration of the application of the enabling cell [i+1] switching pattern on cell [i+1].

[0825] When cell [i] is the first cell of the K-cell circuit, initiating bypass operation in the switching mode of cell [i] constitutes grounding of the output of the first cell, and can be achieved by activating the first and second switches (switch group (SW[0], SW[1])) of cell [i] to electrically connect the negative terminal of the voltage source to the output terminal of cell [i]. Grounding occurs because switch SW[0] connects the negative terminal of the voltage source to the output terminal of cell [i], and switch SW[1] is one of the set of n[i] switches in cell 2301-1 that can be electrically connected to the common node of terminal 2314-1, which can also be electrically connected to switch SW[0], without intervening non-dissipative elements therebetween. Therefore, closing the switch group (SW[0], SW[1]) electrically connects the negative terminal of the voltage source to the output terminal of cell [i].

[0826] When cell [i] is any other cell in the K-cell circuit, initiating bypass operation in the cell [i] switching mode may be achieved by activating the switch set (SW[0], SW[1]) or the switch set (SW[n[i]+2], SW[n[i]+1)), which are the sets of the last and second-last switches of cell [i]. Switches SW[0], SW[n[i]+2] are both electrically connected to the output of cell 2301-(i-1), and switches SW[1], SW[n[i]+1] are two switches in the set electrically connected to the n[i] switches in cell 2301-i, with the common node electrically connected to terminal 2314-i, which is also electrically connected to the cell [i] input through one of the switch sets (SW[0], SW[1]) or (SW[n[i]+2], SW[n[i]+1]), with no intervening non-dissipative elements. Therefore, closing the switch set (SW[0], SW[1]) or (SW[n[i]+2], SW[n[i]+1]) electrically connects the input of the cell to the output of cell[i].

[0827] • A gradual increase in the output voltage of cell [i] may be achieved by selectively activating a switch group of cell [i] that increases the output voltage of cell [i].

[0828] o wherein said switch group activation is performed so as to produce increasing amounts of output voltage increase, o wherein said starting unit [i] switching mode ends when said highest amount of said switch group activation resulting in an increase in output voltage of unit [i] is completed, and

[0829] o and activation of the switch group to achieve an increase in the input voltage of unit [i] to one times V(i) maintained on unit [i] for the duration of a phase in the method, when unit [i] is the last unit in the circuit, or otherwise achieve the duration of one application of the execution unit [i+1] switching pattern on unit [i+1].

[0830] Except when cell[i] is the first cell in a multi-cell circuit, upon completion of the Start Cell[i] phase, method 2400 for cell[i] may proceed to the Execute Cell[i] phase. The Execute Cell[i] phase repeats the Execute Cell[i] switching pattern:

[0831] (1) incrementally reducing the output voltage of cell [i] by a multiple of V(i) (starting with a reduction of n[i]V(i) in the output voltage of cell [i] at the start of the switching mode of execution cell [i] and, at the end of the incremental reduction, achieving a total reduction of V(i) in the output voltage of cell [i] since the start of the switching mode of execution cell [i]); then

[0832] (2) bypassing the cell [i] to allow the input voltage of the cell [i] to reach its output voltage, and then

[0833] (3) Incrementally increase the output voltage of unit [i] by multiples of V[i], starting from the increase of V(i) at the beginning of the increase to the output voltage of unit [i], and at the end of the switching mode of the execution unit [i] stage, achieve an overall increase from n[i]V(i) at the beginning of the increase to the output voltage of unit [i].

[0834] an incremental reduction in the output voltage of cell [i] may be achieved by selectively activating a switch group of cell [i] that reduces the output voltage of cell [i],

[0835] o wherein said switch group activation is performed to produce a reduced amount of output voltage reduction, o the incremental reduction ends when the switch group activation is completed, resulting in V[i] (the lowest amount of cells)

[0836] [i] output voltage decreases), and

[0837] o and activation of the switch group to achieve, when said cell [i] is the last cell in said circuit, a reduction in the input voltage of said cell [i] to one times V(i) maintained on said cell [i] for the duration of one phase in said method, or otherwise for the duration of one application of said cell [i+1] mode on said cell [i+1].

[0838] Bypassing cell [i] in executing cell [i] switching mode may be accomplished using the above method in an initiating cell [i] switching mode for bypassing operation on a cell that is not the first cell in cell [i], except that the bypassing in executing cell [i] switching mode may be maintained for the duration of one phase in the method when cell [i] is the last cell in the circuit, or for the duration of one application of the executing cell [i+1] switching mode on cell [i+1].

[0839] ·Incremental increase of the output voltage of unit [i] in the execution unit [i] switching mode (including the order of unit activation and the duration of the incremental increase operation) can be achieved using the method described above in the initiation unit [i] switching mode for incrementally increasing the output voltage of unit [i].

[0840] When cell [i] is the last cell and n is the number of dissipative elements of the last cell, repeatedly applying the execute cell [i] switching pattern until the (n+2)th last stage. When cell [i] is not the last cell and n is the number of dissipative elements of cell [i], repeatedly applying the execute cell [i] switching pattern to cell [i] until the (n+1)th last application of the execute cell [i+1] switching pattern on cell [i+1] is completed. Method 2400 for cell [i] may proceed to the peak cell [i] stage after completion of the start cell [i] stage when cell [i] is the first cell in a multi-cell circuit or after completion of the execute cell [i] stage when cell [i] is any other cell in the multi-cell circuit. The peak cell [i] stage may have a peak cell [i] switching pattern that:

[0841] (1) incrementally reducing the cell[i] input voltage by a multiple of V(i) (starting with a reduction of nV(i) at the start of the peak cell[i] phase and ending with an overall reduction of V(i) in the cell[i] output voltage since the start of the peak cell[i] switching mode at the end of the incremental reduction);

[0842] (2) bypassing the cell [i] to allow the output voltage of the cell [i] to reach its input voltage; and

[0843] (3) performing a second set of incremental reductions in the cell[i] output voltage by multiples of V(i) (starting with a reduction in V(i) at the beginning of the second set of incremental reductions in the peak cell[i] phase and ending at the end of the incremental reductions with a total reduction in the cell[i] output voltage of n[i]V(i) from the beginning of the incremental reductions):

[0844] ·The first set of incremental reductions in the output voltage of cell [i] in the peak cell [i] switching mode (including the order of cell activation and the duration of the incremental reduction operations) can be implemented using the method described above in the execution cell [i] switching mode for incrementally reducing the output voltage of cell [i].

[0845] ·When unit [i] is not the first unit in the circuit, bypassing unit [i] in the peak unit [i] switching mode can be accomplished using the above method in the initiating unit [i] switching mode for bypassing operation of a unit that is not the first unit in unit [i], except that the bypassing in the peak unit [i] switching mode can be maintained for the duration of one stage in the method when unit [i] is the last unit in the circuit, or for the duration of the application of the peak unit [i+1] switching mode on unit [i+1].

[0846] When cell [i] is the first cell of the K-cell circuit, bypass operation in the peak cell [i] switching mode can be achieved by activating the switch group (SW[n[i]+2], SW[n[i]+1]) to electrically connect the positive terminal of the voltage source to the output terminal of cell [i], thereby providing the supply voltage of the voltage source of the circuit to the input of cell [i+1]. Since switch SW[n[i]+2] is electrically connected to the positive terminal of the voltage source of circuit 2300, and switch SW[n[i]+1] is one of the set of n[i] switches in cell 2301-1 that is electrically connected to the common node of terminal 2314-1, which is also electrically connected to switch SW[n[i]+2], there are no non-dissipative elements intervening therebetween, so that supply voltage bypass operation in the peak cell [i] switching mode can be achieved. Therefore, closing the switch set (SW[n[i]+2], SW[n[i]+1]) electrically connects the positive terminal of the voltage source to the output terminal of cell [i].

[0847] a second set of incremental reductions may be achieved by selectively activating a set of switches of cell [i] that reduce the output voltage of cell [i],

[0848] o wherein these switch activations are performed so as to produce increasing amounts of output voltage reduction, o wherein the incremental reduction ends when the switch group activations are complete, resulting in n[i]V[i] (the highest amount of output voltage reduction for cell[i]), and

[0849] o and activation of the switch group to achieve, when said cell [i] is the last cell in said circuit, a reduction in the input voltage of said cell [i] to one times V(i) on said cell [i] for the duration of one phase in said method, or otherwise achieving the duration of one application of the reverse execution cell [i+1] switching pattern on said cell [i+1].

[0850] Except when cell[i] is the first cell in a multi-cell circuit, upon completion of the peak cell[i] phase, method 2400 for cell[i] may proceed to the reverse execution cell[i] phase. The reverse execution cell[i] phase may repeat the following reverse execution cell[i] switching pattern:

[0851] (1) incrementally increasing the output voltage of cell [i] by multiples of V(i) (beginning with an increase of n[i]V(i) in the output voltage of cell [i] at the start of the reverse execution of the switching pattern of cell [i] and ending with an overall increase of V(i) in the output voltage of cell [i] from the start of the reverse execution of the switching pattern of cell [i];

[0852] (2) then bypassing the cell [i] to allow the output voltage of the cell [i] to reach its output voltage; then

[0853] (3) Incrementally reducing the output voltage of the unit [i] by V(i), starting with a reduction of V(i) in the output voltage of the unit [i] at the beginning of the incremental reduction and ending with a reduction of n[i]V(i) in the output voltage when the switching mode of the reverse execution unit [i] is completed at the end of the incremental reduction.

[0854] • A gradual increase in the output voltage of cell [i] may be achieved by selectively activating a switch group of cell [i] that increases the output voltage of cell [i].

[0855] o wherein said switch group activation is performed so as to produce a decreasing amount of output voltage increase, o wherein said gradual increase ends when said switch group activation resulting in a lowest amount of cell [i] output voltage increase is completed, and

[0856] o wherein when cell [i] is the last cell in the circuit, a reverse execution unit is applied to cell [i+1] for the duration of one phase in the method

[0857] The switch group remains activated on said unit [i] for the duration of the [i+1] mode.

[0858] Bypassing unit [i] in the reverse actuating unit [i] switching pattern, including the duration of the bypass operation, can be accomplished using the above-described method in the actuating unit [i] switching pattern for bypassing unit [i].

[0859] ·Incremental reductions in the output voltage of unit [i] in the reverse execution unit [i] switching mode (including the order of unit activation and the duration of the incremental reduction operations) can be implemented using the above-mentioned method to implement a second set of incremental reductions in the peak unit [i] switching mode for incrementally reducing the output voltage of unit [i].

[0860] When cell[i] is the last cell and n is the number of non-dissipative elements of the last cell, repeatedly apply the reverse executed cell[i] switching pattern until the (n+2)th last stage. When cell[i] is not the last cell and n is the number of non-dissipative elements of cell[i], repeatedly apply the reverse executed cell[i] switching pattern to cell[i] until the (n+1)th last application of the executed cell[i+1] switching pattern on cell[i+1].

[0861] The reverse initiation cell[i] phase may commence after completion of the peak cell[i] phase, when cell[i] is the first cell in the multi-cell circuit, or after completion of the reverse execution cell[i] phase, when cell[i] is any other cell in the multi-cell circuit. The reverse initiation cell[i] phase has a reverse initiation cell[i] switching pattern that is:

[0862] (1) incrementally increasing the output voltage of cell [i] by a multiple of V[i] (beginning with an increase of n[i]V(i) in the output voltage of cell [i] at the beginning of the reverse starting cell [i] phase and ending at the end of the incremental increase with an overall increase of V(i) in the output voltage of cell [i] since the beginning of the reverse starting cell [i] phase); and

[0863] (2) The unit [i] is then bypassed to end with the input voltage of the unit [i] being applied to the output terminal of the unit [i] when the reverse starting unit [i] switching mode is completed.

[0864] • The gradual increase in the output voltage of unit [i] during the reverse startup unit [i] phase (including the order of unit activation and the duration of the incremental increase operation) can be implemented using the above method to achieve a gradual increase in the switching pattern of execution unit [i].

[0865] Bypassing cell [i] during the reverse initiation of cell [i] phase (including the duration of the bypass) can be implemented using the above-described method to implement bypassing during the initiation of cell [i] switching phase. As previously described, in the first cell, the bypass operation electrically connects the negative electrode of the voltage source to the output terminal of the first cell, thereby grounding cell [i+1].

[0866] As with the operation of the driver circuit 2300, incremental changes in voltage output are achieved by releasing the voltage capacity of the cell on which the switch activation has been performed and increasing the total voltage output by selectively opening and closing the switches at the terminals of the non-dissipative elements through selective and sequential operation of the non-dissipative elements in the upstream cells. It can be seen that the pattern of switch opening / closing and cell activation / bypassing (which can be used for simpler driver circuits to achieve a step-by-step increase in voltage output) can be adapted to achieve a step-by-step increase in voltage output for more complex driver circuits (having a larger number of cells and non-dissipative elements).

[0867] The general drive circuit 2300 is arranged to allow each of the K driver units in the drive circuit 2300 to have a number n[i] of non-dissipative elements (the number n need not be equal in each unit). In general, in this illustrative, but not necessarily preferred, embodiment, a complete VO23 drive cycle can be

[0868] phase, in which:

[0869] n[i] is the number of non-dissipative elements in the i-th driver unit in the driver circuit 2300; and

[0870] K is the number of driver units in the driver circuit, where 1≤i≤K.

[0871] use Figure 21 and Figures 22A to 22J For the previously described embodiment of the basic two-cell driver circuit 2100 shown in FIG, with one non-dissipative element per cell (K=2 and n[i]=1 for two driver cells), the number of phases in the switching sequence method 2200 can be calculated as:

[0872]

[0873] Therefore, one complete VO21 driving cycle for the basic driving circuit 2100 is completed in 18 phases.

[0874] Figure 22M-3A A switching sequence method 2260 is shown for a dual cell driver circuit having a first driver cell with one non-dissipative element and a second cell with two non-dissipative elements. Figure 22M-3A As shown in the diagram of , K=2; n[1]=1; and n[2]=2, and the number of stages in the switching sequence method 2260 can be calculated as:

[0875]

[0876] Therefore, one complete voltage driving cycle of the driving circuit thus defined is completed in 30 steps.

[0877] Figure 22M-4A A switching sequence method 2270 is shown for another dual-unit driver circuit, where the first driver unit has two non-dissipative elements and the second unit has one non-dissipative element. Figure 22M-4A As shown in the diagram in , K=2; n[1]=2; and n[2]=1, and the number of stages in the switching sequence method 2270 can be calculated as:

[0878]

[0879] Thus, for a 2-unit driver circuit having one driver unit with one non-dissipative storage element and another driver unit with two non-dissipative storage elements, one complete voltage drive cycle will include 30 levels, regardless of the position of the driver units relative to each other in the driver circuit.

[0880] Figure 22M-3A 、 Figure 22M-4A Certain multi-cell drive circuits are shown that have the same number of non-dissipative elements but in which the non-dissipative elements are distributed differently over the cells of the drive circuit (the number of non-dissipative elements varies from cell to cell). Although the positions of the cells in the drive circuit (whether the cells with more non-dissipative elements are positioned first, second, or last in the drive circuit) can have the same total number of stages, drive circuits with different numbers of cells can still have the same number of stages as long as the drive circuits share the same number of non-dissipative elements.

[0881] As an example, Figure 22M-3A 、 Figure 22M-4A The multi-unit drive circuits [ab] and [mn] each have two units and three non-dissipative elements. Drive circuit [ab] has a first unit [a] with one non-dissipative element and four switches, and a second unit [b] with two non-dissipative elements and five switches. Drive circuit [mn] has a first unit [m] and a second unit [n], the first unit [m] having two non-dissipative elements and five switches, and the second unit [n] having one non-dissipative element and four switches. The switching sequence method for operating circuits [ab] and [mn] each has 30 stages:

[0882] On the other hand, other drive circuits having the same overall number of non-dissipative elements may not have the same number of stages in their switching sequence method. As an example, each of the two-unit drive circuits [cd], [ef], [gh] may have four non-dissipative elements overall, where:

[0883] A circuit [cd] comprising a first unit [c] having a non-dissipative element and a second unit [d] having three non-dissipative elements (where K=2; n[c]=1; and n[d]=3);

[0884] a circuit [ef] having a first cell [e] with three non-dissipative elements and a second cell [f] with one non-dissipative element (where K=2; n[e]=3; and n[f]=1);

[0885] • Circuit [gh] having a first cell [g] and a second cell [h], each cell having two non-dissipative elements (K=2; n[g]=2; and n[h]=2).

[0886] Although the switching sequence methods for the operation of the circuits [cd], [ef] both have 42 phases for stepwise operation, among which:

[0887]

[0888] The switching sequence method for operation of the circuit [gh] has:

[0889]

[0890] Furthermore, the switching sequence method is used to operate circuits [pqr], [stuv], both of which also have four non-dissipative elements. It is used to operate a three-unit circuit [pqr], (where K = 3; n[p] = 1, n[q] = 2; n[r] = 1), with:

[0891]

[0892] The switching sequence method is used for the operation of the four-unit circuit [stuv], where (K=-4; n[s]=n[t]=n[u]=n[v]=1), with:

[0893]

[0894] The choice of the number of cells and non-dissipative elements in the driver circuit is the choice of the driver circuit designer, based on the desired operating and functional specifications.

[0895] To summarize, when all K driver units of the driver circuit have the same number n of non-dissipative elements, n[1]=n[2]=n, and the order in the switching sequence method 2400 can be calculated as:

[0896]

[0897] Therefore, a complete voltage drive cycle for a K-unit drive circuit, each unit having the same number n of non-dissipative elements, will include 2*[(2n+1)K] stages. When K=1 (as in Figure 7A In the embodiment of the circuit 700A),

[0898]

[0899] Therefore, as in Figures 8A-8C As identified in , a complete voltage drive cycle for a driver circuit having a driver circuit with n non-dissipative storage elements will include (4n+2) stages.

[0900] 8.3.2. Voltage Levels During a Complete Voltage Drive Cycle

[0901] Returning to the driver circuit 2300, in one illustrative and not necessarily preferred embodiment, and for convenience, within each driver unit 2301-i, VCS23[x]=VCS23[y], x≠y, where x and y are any integers from 1 to n[i]. When VCS23[i]=VCS23[x] (where x is any integer from 1 to n[i]), VCS23[i], which is the voltage level at the driver unit 2301-i, can be expressed by equation (7), where i is any integer ranging from 1 to K:

[0902]

[0903] By setting i=K, the voltage of the storage capacitor at the Kth driver unit (eg, VCS23[K]) can be expressed by equation (8):

[0904]

[0905] Therefore, V CS23[K] Indicates a complete V in the driver circuit 2300 O23 Drive cycle Each level V O23 Therefore,

[0906] At stage 2401(1), V O23 is driven to ground (eg, 0V).

[0907] At stage 2401(2), V O23 is driven to V CS23[K] .

[0908] At stage 2401(3), V O23 is driven to (2·V CS23[K] ).

[0909] At stage 2401(4), V O23 is driven to (3·V CS23[K] ). ...

[0911] At stage 2401(r), where V O23 is driven to (V DD23 -V CS23[K] ).

[0912] At stage 2401(r), where V O23 is driven to V DD23 .

[0913] At stage 2401(r), where V O23 is driven to (V DD23 -V CS23[K] ). ...

[0915] At stage 2401(r), where V O23 is driven to (3·V CS23[K] ).

[0916] At stage 2401(r), where V O23 is driven to (2·V CS23[K] ).

[0917] At stage 2401(r), where V O23 is driven to V CS23[K] , after which another V can be started by returning to the above-mentioned stage 2401(1) O23 Drive cycle.

[0918] It can be seen that:

[0919] From level 2401(2) to level 2401(r), where V O23 From V CS23[K] Drive to V DD23 -V CS23[K] , where V CS23[K] It is V O23 The voltage variation of each level.

[0920] · Slave level 2401(r) (where ) to stage 2401(r), where V O23 From (V DD23 -V CS23[K] ) driven to V CS23[K] , where V CS23[K] It is V O23 The voltage variation of each level.

[0921] Stage 2401(p) is identical in operation and results to stage 2401(q) when

[0922] in

[0923] p is from 2 to Any integer, and

[0924] q is from arrive Any integer.

[0925] For example,

[0926] Stage 2401(2) is identical in operation and results to stage 2401(r) (where ) are the same; and

[0927] Level 2401(r) (wherein ) is identical in operation and results to stage 2401(r), where

[0928] It should be understood that in this embodiment, V CS23[x] =V CS23[y] , but the voltage capacity of each non-dissipative element does not need to be the same. The designer should select the voltage storage capacity of the non-dissipative element in any driver unit in the driver circuit and define a switching sequence method to complete the desired drive cycle, in which the available voltage at the output of the driver circuit is established and then gradually reduced. As mentioned above, the number of stages (and the number of steps) in the switching sequence method depends on the number of driver units and the number of non-dissipative elements in the driver circuit. However, when the voltage capacity of each non-dissipative element in the circuit is not the same, the amount of voltage released or stored in each stage (and the amount of time spent in each stage) is not necessarily the same.

[0929] The energy dissipated by each switch can be calculated as follows:

[0930]

[0931] As mentioned above, each complete voltage drive cycle has level, so at full V O23 The total energy dissipated from circuit 2300 over a drive cycle can be calculated according to equation (10):

[0932]

[0933] In the classic drive scheme, a complete V o The total energy dissipation of the drive cycle E t_classic =C O V DD 2 It can be seen that the circuit 2300 is composed of K capacitor element driver units 2000, each driver unit has n storage capacitors, which can be used to store each V O23 Reduced total energy dissipation of the drive cycle times.

[0934] For example, when the capacitive element drive circuit is composed of K=3 capacitive element driver units, each with n=1 storage capacitors (n[i]=1 for all i ranging from 1 to 3), it can be seen that the total energy dissipation per Vo drive cycle is reduced by a factor of 27.

[0935] 8.3.3. Figure 24A-24B-3 : Switch Sequence Method 2400

[0936] Switch controller 2360 controls activation and deactivation of switches in driver units 2301-1, 2301-2, ..., 2301-K to operate at full V O23 The...

Claims

1. A capacitive element driver for driving a capacitive element between voltage levels, the capacitive element including an element having a capacitance function, wherein a voltage is supplied to the capacitive element driver from a voltage source, the capacitive element driver comprising: Multiple switches with: a first switch capable of being electrically connected in series, directly or indirectly, between the first terminal of the voltage source and the input terminal of the capacitive element, and a second switch capable of being electrically connected in series, directly or indirectly, between the second terminal of the voltage source and the input terminal of the capacitive element; as well as a non-dissipative element arranged to store and transfer energy for driving the capacitive element between the voltage levels, wherein the non-dissipative element is electrically connectable at a first end, directly or indirectly, to a first node between the first terminal of the voltage source and the input terminal of the capacitive element, and is electrically connectable at a second end, directly or indirectly, to a second node between the second terminal of the voltage source and the input terminal of the capacitive element; In which, the multiple switches are arranged to be opened or closed in combination in a switching level sequence to gradually transfer the energy to the capacitor element, and the switching level sequence also includes a switching mode, which has a voltage change part, and the voltage change part is arranged to cause a change in the output voltage of the capacitor element driver during the application of the voltage change part to the capacitor element driver.

2. The capacitive element driver according to claim 1, wherein The non-dissipative element comprises a plurality of non-dissipative elements which are electrically connectable to the first node at a first end, directly or indirectly, in parallel or in series, and to the second node at a second end, directly or indirectly, in parallel or in series.

3. The capacitive element driver according to claim 2, wherein: The non-dissipative element is arranged and electrically connectable in series, directly or indirectly, between the first node and the second node.

4. The capacitive element driver according to claim 2, wherein: The non-dissipative element is arranged and electrically connectable in parallel, directly or indirectly, between the first node and the second node.

5. The capacitive element driver according to claim 1, in, The voltage levels include a first voltage level and a second voltage level, and wherein the switching pattern further includes: a first switching pattern arranged to open and close at least one switch of the plurality of switches in a first combination of the switching stages to drive the capacitive element from the first voltage level to the second voltage level, and A second switching pattern is arranged to open and close at least one switch of the plurality of switches in a second combination of the switching stages to drive the capacitive element from the second voltage level to the first voltage level.

6. The capacitive element driver according to claim 5, wherein The switching stages in the second combination of switching stages are identical to the switching stages in the first combination of switching stages, but are organized in a reverse order.

7. The capacitive element driver according to claim 5, Also includes: a first reference rail path and a second reference rail path, the first reference rail path comprising a path electrically interconnected between the first terminal of the voltage source and the input terminal of the capacitive element through the first node, and the second reference rail path comprising a path electrically interconnected between the second terminal of the voltage source and the input terminal of the capacitive element through the second node; Wherein, the switching pattern is further arranged to open or close the plurality of switches so that the driver electrically connects the non-dissipative element with the first reference rail path or the second reference rail path.

8. The capacitive element driver according to claim 7, wherein: The switch pattern is further arranged to access the first reference rail path or the second reference rail path in a selected reference rail pattern: a reference rail mode arranged to open or close the plurality of switches to cause the driver to electrically connect the non-dissipative element to a first reference rail for a first number of steps; as well as and another reference rail mode arranged to open or close the plurality of switches to cause the driver to electrically connect the non-dissipative element with a second reference rail for a second number of steps.

9. The capacitive element driver according to claim 7, wherein: The reference rail pattern selected in the second switching pattern is the same as the reference rail pattern selected in the first switching pattern, but organized in reverse order.

10. The capacitive element driver according to claim 1, further comprising: a first switching method in which selected switches are activated and deactivated in a first sequence of a first number of switching stages to gradually transfer the energy to the capacitive element in a drive cycle in which the output voltage of the capacitive element driver is driven from a first voltage level to a second voltage level and then back to the first voltage level, a second switching method, wherein selected switches are activated and deactivated in a second sequence of a second number of switching stages different from the first number of switching stages to gradually transfer the energy to the capacitive element in a drive cycle in which the output voltage of the capacitive element driver is driven from a first voltage level to a second voltage level and then back to the first voltage level; Wherein the second switching method is arranged to provide a different amount of energy efficiency than the first switching method.

11. The capacitive element driver according to claim 10, wherein: The capacitive element driver is further arranged to apply the first switching method or the second switching method in the drive cycle to control energy transfer to the capacitive element.

12. The capacitive element driver according to claim 11, wherein The capacitive element driver is further arranged to apply the first switching method for a first number of the drive cycles and to apply the second switching method for a second number of the drive cycles.

13. The capacitive element driver according to claim 12: in, The second number of switching stages is greater than the first number of switching stages, and Wherein the capacitive element driver is further arranged to start operation by applying the first switching method as a driver pre-charger, and to apply the second switching method after the capacitive element driver achieves steady-state operation.

14. The capacitive element driver according to claim 1, in, The voltage varying section of the switching mode further includes an adding section arranged to cause a voltage to be added to an input voltage of the capacitive element driver during application of the adding section to the capacitive element driver; and Wherein, the switch mode further includes a bypass portion: The bypass section is arranged to be applied to the capacitive element driver after the adding section is applied to the capacitive element driver, and The bypass section is arranged to cause bypassing of the capacitive element driver during application of the bypass section to the capacitive element driver.

15. A driver unit in a capacitive element driving circuit, the driver unit being electrically connectable between a capacitive element and a voltage source, the voltage source being arranged to supply a selected voltage to the capacitive element driving circuit, the capacitive element comprising an element having a capacitance function, and the driver unit being arranged to drive the capacitive element between two voltage levels, wherein: The driver unit comprises: a first input terminal electrically connectable directly or indirectly to a first terminal of the voltage source; an output terminal capable of being electrically connected directly or indirectly to an input terminal of the capacitive element; a second input terminal electrically connectable directly or indirectly to a second terminal of the voltage source; Multiple switches, also with a first switch electrically connectable in series between the first input terminal of the driver unit and the output terminal of the driver unit, and a second switch electrically connectable in series between the second input terminal of the driver unit and the output terminal of the driver unit; and a non-dissipative element arranged to store and transfer energy for driving the capacitive element between the two voltage levels, wherein the non-dissipative element is electrically connectable at a first end to a first node between the first input terminal and the output terminal and at a second end to a second node between the second input terminal and the output terminal; In which, the multiple switches are arranged to be opened or closed in a combination of a switching level sequence while keeping the average voltage level value of the non-dissipative element unchanged over time, and the switching level sequence also includes a switching mode, and the switching mode has a voltage change part, and the voltage change part is arranged to cause a change in the output voltage of the capacitor element driver during the application of the voltage change part to the capacitor element driver.

16. The driver unit according to claim 15, wherein The switches are arranged to be opened or closed in a combined manner to gradually transfer the energy to the capacitive element.

17. A capacitive element driver for driving a capacitive element between two voltage levels, the capacitive element including an element having a capacitance function, and comprising a first circuit having: a first voltage receiving connection terminal of the first circuit, directly or indirectly electrically connectable to a first terminal of a voltage source, for receiving a selected voltage from the voltage source; a first circuit voltage output connection terminal capable of being directly or indirectly electrically connected to an input terminal of the capacitive element; a second voltage receiving connection terminal of the first circuit, capable of being directly or indirectly electrically connected to a second terminal of the voltage source; as well as a first circuit non-dissipative element arranged to store and transfer energy for driving the capacitive element between the two voltage levels, wherein the first circuit non-dissipative element is electrically connectable at a first end to a first circuit first node between the first circuit first voltage receiving connection and the first circuit voltage output connection, and is electrically connectable at a second end to a first circuit second node between the first circuit second voltage receiving connection and the first circuit voltage output connection; wherein the first circuit is arranged to gradually transfer energy directly or indirectly from a first high voltage level to a first low voltage level, or from the first low voltage level to the first high voltage level; and wherein the first circuit is arranged to perform a stepwise transfer by operating a first sequence of switching stages on a non-dissipative element of the first circuit, the first sequence of switching stages also comprising a switching pattern having a voltage variation portion arranged to cause a variation in the output voltage of the capacitive element driver during application of the voltage variation portion to the capacitive element driver.

18. The capacitive element driver according to claim 17, in, the voltage varying section further comprising a subtracting section arranged to cause a voltage to be subtracted from an input voltage of the first circuit during application of the subtracting section to the first circuit; and Wherein, the switch mode further includes a bypass portion: The bypass section is arranged to be applied to the first circuit after the subtraction section is applied to the first circuit, and The bypass section is arranged to cause bypassing of the first circuit during application of the subtraction section to the first circuit.

19. The capacitive element driver according to claim 18, wherein The switching mode also has a second subtraction part: The second subtraction section is arranged to be applied to the first circuit after the bypass section is applied to the first circuit, and The second subtraction section is arranged to cause a further voltage to be subtracted from an input voltage of the first circuit during application of the second subtraction section to the first circuit.

20. The capacitive element driver according to claim 17, in, The switching pattern further comprises a bypass portion arranged to cause bypassing of the first circuit during application of the bypass portion to the first circuit; and Wherein, the voltage changing unit of the switching mode further includes an adding unit: The adding section is arranged to be applied to the first circuit after the bypass section is applied to the first circuit, and The adding section is arranged to cause a voltage to be added to an input voltage of the first circuit during application of the adding section to the first circuit.

21. The capacitive element driver according to claim 20, wherein: The switching mode further includes a second adding section: The second adding section is arranged to be applied to the first circuit before the bypass section is applied to the first circuit, and The second adding section is arranged to cause another voltage to be added to the input voltage of the first circuit during application of the second adding section to the capacitive element driver.

22. A method for driving a capacitive element between two voltage levels, the method comprising: Arranging and electrically connecting a non-dissipative element in a capacitive element driver directly or indirectly to a first node between a first terminal of a voltage source of a driver circuit and an input of the capacitive element and to a second node between a second terminal of the voltage source and the input of the capacitive element; storing energy in the non-dissipative element; as well as operating the first capacitive element driver through a sequence of switching stages, Wherein, operating the sequence on the driver comprises: Outputs a set of voltage steps with a selected number of voltage steps, transferring the energy via the set of voltage steps, wherein the transfer occurs directly or indirectly to the capacitive element from a high voltage level to a low voltage level or from the low voltage level to the high voltage level, and During the period in which the voltage changing portion of the switching pattern in the first sequence is applied to the capacitive element driver, a change in the output voltage of the capacitive element driver is caused.

23. The method according to claim 22, in, The non-dissipative element comprises a plurality of non-dissipative elements; and Wherein, storing the energy in the non-dissipative element includes storing the energy in the plurality of non-dissipative elements, wherein the plurality of non-dissipative elements can be electrically connected in parallel or in series at the first node directly or indirectly at the first end and can be electrically connected in parallel or in series at the second node directly or indirectly at the second end.

24. The method of claim 23, further comprising electrically connecting the plurality of non-dissipative elements in series.

25. The method of claim 23, further comprising electrically connecting the plurality of non-dissipative elements in parallel.

26. The method according to claim 22, wherein Operating the capacitive element driver through the sequence of switching stages further includes improving energy efficiency of operation of the capacitive element driver by increasing a selected number of voltage steps in the set of voltage steps.

27. The method of claim 22, further comprising reducing an amount of time for the capacitive element driver to achieve steady-state operation by precharging the capacitive element driver.

28. The method of claim 22, further comprising pre-charging the capacitive element driver by reducing a selected number of the voltage steps in a first set of voltage steps.

29. The method of claim 22, further comprising precharging the capacitive element driver by changing the sequence of switching stages in the set of voltage steps.

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