Automatic batch debugging system and method for distribution automation terminals
Through batch debugging task scheduling, multi-device collaborative control, communication link fault tolerance and test data verification, the problems of insufficient multi-device collaborative control capabilities and rigid communication link fault tolerance strategies in distribution automation terminals have been solved, achieving efficient terminal batch debugging and fault location, and improving debugging efficiency and data verification accuracy.
Patent Information
- Application Number
- CN202511163547.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-20
- Publication Date
- 2025-09-30
- Estimated Expiration
- 2045-08-20
AI Technical Summary
In the existing technology, the distribution automation terminal's multi-device coordinated control capabilities are insufficient, the communication link fault tolerance strategy is rigid, and the intelligent verification of test data is missing, resulting in intensified resource competition, amplified signal time synchronization errors, data verification deviations, and low fault diagnosis efficiency during large-scale terminal batch debugging.
It adopts batch debugging task scheduling unit, multi-device collaborative control unit, communication link fault tolerance unit and test data verification unit, and realizes multi-task concurrent scheduling, signal time consistency, differentiated fault tolerance and high-precision data verification through IP address and physical port binding mapping, clock synchronization calibration, heterogeneous hardware architecture and dynamic interrupt judgment.
It achieves efficient resource utilization for collaborative debugging of multiple devices, improves communication reliability and fault location efficiency, generates structured test reports, and supports closed-loop management of distribution automation terminals.
Smart Images

Figure CN120728879A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of power system automation, and in particular to a system and method for automatic batch debugging of distribution automation terminals. Background Art
[0002] With the rapid increase in distribution automation coverage, the workload for debugging distribution automation terminals has increased exponentially. Traditional debugging relies on manual, unit-by-unit operation, requiring the master station and on-site personnel to repeatedly verify telemetry / telesignaling / remote control signals over the phone. Debugging a single terminal can take up to 2-3 hours. Furthermore, the point table formats, communication protocols, and debugging software of terminals from different manufacturers vary significantly, leading to fragmented debugging processes and delayed data verification, making it difficult to meet the efficiency and accuracy requirements of large-scale centralized terminal debugging. Therefore, achieving multi-device collaborative debugging, dynamic resource scheduling, and rapid fault location have become urgent technical challenges in the field of distribution automation.
[0003] For example, Chinese patent CN202310470219.7 discloses a fully functional adaptive debugging system and method for all types of distribution automation equipment, including a joint debugging device for sending a debugging request to a distribution automation master station, receiving a debugging instruction sent by the distribution automation master station, and sending voltage, current and switching signals to a distribution automation terminal; the distribution automation master station is used to receive a debugging request sent by the joint debugging device, send a debugging instruction to the joint debugging device, receive debugging result information sent by the distribution automation terminal, and send debugging success or debugging failure information to the joint debugging device; the distribution automation terminal is used to receive voltage, current and switching signals, obtain debugging result information, and send the debugging result information to the distribution automation master station. The present invention effectively improves the point-to-point debugging efficiency of the distribution terminal, realizes the early discovery and rapid elimination of distribution network faults, greatly improves the efficiency of on-site operation and maintenance, and ensures the safe and reliable operation of the distribution network. For example, Chinese patent CN202411564831.1 discloses an IEC104 distribution automation terminal debugging system and method, which includes selecting the manufacturer name through the manufacturer selection module, inputting the IP address, port number and channel address of the device as parameters, transmitting the IEC104 message data information through the message communication module, message sending module and message receiving module, and then displaying the original message and the message meaning represented by each byte of each original message through the human-computer interaction interface. Finally, the information value in the parsed IEC104 message can be matched with the substation table to achieve real-time feedback and display of data. The present invention can receive telemetry and telesignaling messages sent by the terminal device and record the debugging log at the same time. It is also compatible with multiple manufacturers, and realizes the use of the same software to debug terminal devices of different manufacturers. It solves the problem of users using multiple sets of software to debug devices from multiple manufacturers and improves daily work efficiency.
[0004] Although the above-mentioned existing technologies have made improvements in optimizing the debugging efficiency of distribution terminals, they still have the following core defects: First, the ability to coordinate and control multiple devices is insufficient: the joint debugging device of CN202310470219.7 adopts a single-device signal output mode, and neither establishes a binding mapping mechanism between IP addresses and physical ports nor introduces a clock synchronization calibration strategy. When multiple terminals are debugged in parallel, conflicts are easily caused due to disordered signal trigger timing; although CN202411564831.1 realizes multi-vendor protocol adaptation, it does not design a multi-task concurrent scheduling algorithm and cannot dynamically allocate hardware channel resources such as analog generation and switch control. Resource competition intensifies during batch debugging of large-scale terminals, and signal time synchronization errors will amplify data verification deviations, resulting in a decrease in the credibility of debugging results; second, the communication link fault tolerance strategy is rigid: CN202310470219.7 only relies on a simple retry mechanism to restore the 4G link, and does not build a dynamic interruption judgment module. It cannot identify the hierarchical characteristics of network delay and packet loss (such as the difference between instantaneous jitter and continuous interruption). Although CN202411564831.1 transmits messages based on the IEC104 protocol, it fails to implement differentiated fault tolerance based on the service priorities of telemetry upload and remote control dispatch. Critical debugging tasks (such as fault addressing logic verification) are easily failed due to sudden link interruptions, resulting in a break in the debugging process and requiring manual intervention and restart, significantly reducing operational efficiency. Third, there is a lack of intelligent verification of test data: the master station of CN202310470219.7 only performs a rough comparison of debugging results and does not introduce a timing correlation verification algorithm to eliminate the time offset between terminal sampling and master station reception. This makes it impossible to distinguish between "true errors" and "timestamp deviations." Although CN202411564831.1 can parse IEC104 messages, it does not build an error interval discrimination model. It cannot automatically identify data anomalies such as telemetry deviations and telesignaling malfunctions, and it also has difficulty locating fault channels (such as failed nodes in topological links). Manual verification of waveforms and point tables is still relied upon, resulting in delayed test report generation, inefficient fault diagnosis, and difficulty supporting closed-loop management of large-scale debugging. In view of this, we propose an automatic batch debugging system and method for distribution automation terminals. Summary of the Invention
[0005] The purpose of the present invention is to provide a distribution automation terminal automatic batch debugging system and method to solve the problems proposed in the above background technology, such as insufficient multi-device collaborative control capability, rigid communication link fault tolerance strategy and lack of intelligent verification of test data.
[0006] To solve the above technical problems, one of the objectives of the present invention is to provide an automatic batch debugging system for distribution automation terminals, comprising:
[0007] A batch debugging task scheduling unit generates a standardized debugging task sequence based on the terminal point table file of the distribution automation master station, distributes the tasks to multiple device collaborative control units via the 4G communication file service protocol, and uses a multi-task concurrent scheduling algorithm to achieve dynamic management of debugging tasks;
[0008] A multi-device collaborative control unit is used to collaboratively drive multiple point-to-point debugging devices to synchronously output analog signals. It parses task instructions through a binding mapping mechanism between IP addresses and physical ports, integrates a clock synchronization and calibration mechanism to ensure the time consistency of the output signals of multiple point-to-point debugging devices, and retrieves voltage, current output, and switch status data of multiple point-to-point debugging devices in real time.
[0009] The analog precision generating unit is used to generate high-precision analog and switching signals that meet the testing requirements of the power distribution terminal. It adopts a heterogeneous hardware architecture module with ARM main control and FPGA signal processing, and realizes multi-interval configuration of the current output channel through the dynamic switching circuit of the relay group;
[0010] A communication link fault-tolerance unit, which is used to ensure the continuous transmission of debugging data for the 4G communication link. It integrates a dynamic interruption discrimination module based on the IEC104 protocol stack and responds to transient signal interruptions by setting a communication interruption tolerance mechanism.
[0011] The test data verification unit is used to compare the data collected by the power distribution master station with the debugging signal reference value, and automatically generate a test report containing fault location based on the timing correlation verification algorithm and error interval discrimination model.
[0012] As a further improvement of this technical solution, the batch debugging task scheduling unit includes a point table parsing module, a task sequence generation module and a resource scheduling module, wherein:
[0013] The point table parsing module is used to parse the terminal point table file of the distribution automation master station, identify the telemetry point, telesignaling point, and remote control point information in the file, and extract the attribute parameters of each point (including point type, range, and communication protocol);
[0014] The task sequence generation module generates a standardized debugging task sequence including test item priorities and test parameter ranges based on the point information extracted by the point table parsing module. The task sequence supports differentiated debugging requirements of multiple types of distribution terminals.
[0015] The resource scheduling module adopts a multi-task concurrent scheduling algorithm, based on the task execution time estimation model and resource conflict detection mechanism, to dynamically adjust the debugging order of multiple distribution terminals to maximize debugging efficiency.
[0016] As a further improvement of this technical solution, the execution of the multi-task concurrent scheduling algorithm includes the following steps:
[0017] S130.1. Obtain historical debugging basic data:
[0018] Query the historical average debugging time of the same type and number of terminals to be debugged from the historical debugging database , as a benchmark value for estimated time.
[0019] S130.2. Obtain historical debugging basic data:
[0020] Count the number of currently available debugging resources (such as analog generation units and communication links) and calculate resource availability ;
[0021] ;
[0022] Determine factors influencing resource availability based on historical reliability data of the commissioned device (e.g., failure rate, repair time) , used to quantify the impact of insufficient resources on debugging time;
[0023] Calculate the impact of resource availability on time: ;
[0024] S130.3. Evaluation of items affecting communication quality:
[0025] Monitor the signal strength and packet loss rate of the 4G network in real time, and generate a communication quality score through a preset algorithm (Value range: 0~1, higher score means better communication quality);
[0026] Determine the factors affecting communication quality based on the historical packet loss rate data of the 4G network , used to quantify the impact of communication fluctuations on debugging time;
[0027] Calculate the impact of communication quality on time: ;
[0028] S130.4. Integrate base time and environmental impacts:
[0029] The impact items of the first two steps and the historical average debugging time Combined, we get the estimated time after preliminary adjustment ;
[0030] ;
[0031] S130.5, Task complexity correction:
[0032] Determine the task complexity correction factor based on the terminal type and number of points (Value range: 0-1), the higher the complexity, the The smaller (such as the typical DTU value is 0.9, TTU is 0.95);
[0033] Divide the weight coefficient by debugging task type (telemetry / telesignaling / remote control / protection logic) (such as telemetry test weight =0.4), and satisfy , used to characterize the importance differences of different task types;
[0034] Extract the historical average time deviation rate of various tasks , used to correct the estimation error of similar tasks;
[0035] ;
[0036] The effect of task complexity on time is corrected by exponential operation to obtain the final estimated time , and complete the debugging time estimate for a single terminal;
[0037]
[0038] S130.6. Calculation of opportunity costs in resource conflict scenarios:
[0039] When multiple tasks compete for the same resource, the priority decision parameters of the tasks are calculated according to the following logic:
[0040] Calculate task priority weights: Generate the priority weights of each competing task through a dynamic adaptive priority optimization algorithm The dynamic adaptive priority optimization algorithm integrates the task importance level (such as the weight of the main change point task is higher than the branch task), the historical failure probability (the weight of the task with frequent failure is increased) and the current resource status (when resources are tight, the key tasks are prioritized) to dynamically derive the weight and quantify the task urgency ( The closer it is to 1, the higher the urgency of the task);
[0041] Calculate resource time difference: obtain the estimated release time of the target resource (derived from the estimated duration of the resource's current occupied task) and the estimated debugging duration of the current task (output from the time estimation model in step S130.5), calculate the time difference between the two :
[0042] ; ( >0 indicates the waiting time for the task; <0 indicates the timeout duration that the task still needs to occupy after the resource is released)
[0043] Define resource importance index: pre-configure resource importance index based on resource type ; (Value range: The larger the value, the more critical the resource is to system debugging. For example, the Usually set to 5, normal communication link =3);
[0044] Deriving the opportunity cost formula: Priority weights of competing tasks , time difference , Resource Importance Index , build an opportunity cost model , quantify the resource waste and debugging efficiency loss caused by task delays:
[0045] ;
[0046] S130.7 Scheduling Decisions Based on Opportunity Costs:
[0047] Comparison of all competing tasks value, giving priority to the task with the highest opportunity cost (i.e. the task with the greatest loss from delay);
[0048] The Markov chain model is used to predict the task scheduling sequence after the current resources are released, and the order of subsequent tasks is dynamically adjusted to achieve conflict resolution.
[0049] As a further improvement to this technical solution, the multi-device collaborative control unit parses task instructions through a binding mapping mechanism between IP addresses and physical ports, specifically including:
[0050] Pre-store the corresponding relationship between the IP address and hardware port of each point-to-point debugging device to form a mapping table;
[0051] Perform CRC check on the IP address and hardware port number of the newly connected peer debugging device, and allow access if the check passes;
[0052] According to the target IP in the task instruction, the corresponding hardware port number is extracted from the mapping table, and a driving signal is generated and sent to the target point-to-point debugging device.
[0053] As a further improvement of this technical solution, the clock synchronization calibration mechanism of the multi-device collaborative control unit specifically includes:
[0054] Designate one peer debugging device as the master clock source, and the remaining peer debugging devices as slave clocks. The master clock sends synchronization pulse signals to the slave clocks through the hardware synchronization line or network synchronization protocol to establish the initial clock alignment relationship.
[0055] The slave clock periodically collects the time difference between itself and the master clock. When the difference exceeds the preset threshold, the slave clock's signal output timing is automatically adjusted (delayed triggering when the time difference is positive, and early triggering when the time difference is negative);
[0056] The system monitors the working status of the master clock in real time. When the master clock has signal transmission anomalies or the time deviation exceeds the set threshold, the master clock is determined to be faulty. The peer debugging device with no synchronization failure record and the highest clock stability score is automatically selected from the remaining slave clocks as the backup master clock, and the master-slave role switching is completed. When the original master clock returns to normal, it is automatically downgraded to a slave clock and rejoins the synchronization queue.
[0057] As a further improvement of this technical solution, the heterogeneous hardware architecture module includes a main control submodule, a signal processing submodule and an analog conversion submodule, wherein:
[0058] The main control submodule uses an ARM processor and runs a real-time operating system. It is used to receive instructions from the host computer, analyze test parameters, and generate signal configuration instructions based on the test parameters, and send them to the signal processing submodule;
[0059] The signal processing submodule uses FPGA logic circuits and generates digital waveform signals through digital frequency synthesis technology based on the signal configuration instructions issued by the main control submodule, and transmits the digital waveform signals to the analog conversion submodule and the switch control submodule;
[0060] The analog conversion submodule integrates a digital-to-analog conversion chip, converts the digital waveform signal output by the signal processing submodule into an analog voltage signal, and adjusts the amplitude and bias of the analog voltage signal through the signal conditioning circuit to output an analog signal that meets the test accuracy requirements.
[0061] As a further improvement of this technical solution, the heterogeneous hardware architecture module further includes a state monitoring submodule and a switch quantity control submodule, wherein:
[0062] The status monitoring submodule is integrated into the collaborative circuit of the main control submodule and the signal processing submodule. It is used to collect the working status parameters of the signal processing submodule and the analog signal output by the analog conversion submodule in real time, and generate an abnormal feedback signal when an abnormal state is detected;
[0063] The switch control submodule is integrated into the logic circuit of the signal processing submodule. It generates switch output instructions based on the digital waveform signal sent by the signal processing submodule, and converts the switch output instructions into physical signals through the drive circuit to control the external switching device.
[0064] As a further improvement of the present technical solution, the dynamic interruption identification module includes a parameter collection submodule, a feature extraction submodule, an interruption classification submodule, a service priority submodule and a fault tolerance strategy submodule, wherein:
[0065] The parameter acquisition submodule is based on the IEC104 protocol stack and collects the physical layer parameters, link layer parameters and application layer parameters of the 4G communication link in real time; the parameters include signal status parameters, message transmission parameters and service response parameters.
[0066] The feature extraction submodule processes the parameters collected by the parameter acquisition submodule to generate a feature vector containing parameter change trend features, statistical features, and parameter correlation features for feature identification of communication interruptions;
[0067] The interruption classification submodule makes a classification judgment on the communication interruption based on the feature vector generated by the feature extraction submodule and the preset multi-level threshold;
[0068] Furthermore, the communication interruption classification specifically includes:
[0069] When the parameter change trend characteristic exceeds the first preset threshold and the message transmission parameter abnormality reaches the second preset threshold, it is determined to be signal degradation;
[0070] When a preset number of heartbeat messages are lost continuously and the interruption duration does not exceed a first preset time length, it is determined to be a momentary interruption event;
[0071] When the cumulative number of momentary interruptions reaches a preset number or the duration of a single interruption exceeds a second preset duration, it is determined to be a permanent interruption.
[0072] The service priority submodule allocates priority queues according to the debug data type and generates priority identifiers corresponding to the data type for generating differentiated interrupt handling strategies;
[0073] The fault-tolerant strategy submodule generates corresponding processing instructions according to the determination result of the interrupt classification submodule and the priority identifier generated by the service priority submodule.
[0074] Furthermore, the processing instructions specifically include:
[0075] Retransmission priority control instructions for transient outage events;
[0076] Switching instructions for standby links that are permanently interrupted;
[0077] Differentiated processing instructions for mixed scenarios.
[0078] As a further improvement of this technical solution, the test data verification unit includes a data synchronization module, a timing correlation module, an error discrimination module, a fault location module and a report generation module, wherein:
[0079] The data synchronization module uses a unified timestamp mechanism to synchronously collect real-time data from the power distribution master station and debug signal benchmark values, and caches the collected data in a time window to ensure consistency in the data time range.
[0080] The time series correlation module builds the time series mapping relationship between the master station collected data and the reference value based on the timestamp, uses the time series correlation verification algorithm to eliminate the time offset, and generates a set of related data pairs;
[0081] The error discrimination module establishes an error interval discrimination model for different types of test data, calculates the error value of the associated data pair, compares it with the preset error threshold, identifies the error characteristics, and grades the test data quality;
[0082] The fault location module is used to construct a topological model of the power terminal signal transmission path, combine the error discrimination results, use the fault tracing method to locate possible fault points, and generate a fault location probability list;
[0083] The report generation module automatically generates a structured test report (including test overview, error statistics, fault location, conclusions and suggestions) based on the error classification results of the error discrimination module and the fault location probability list of the fault location module. It also supports visual display of the report and output in a standard format.
[0084] A second object of the present invention is to provide a method for automatic batch debugging of distribution automation terminals, based on the above-mentioned automatic batch debugging system for distribution automation terminals, comprising the following steps:
[0085] S100, Task Scheduling and Distribution: Parse the terminal point table file of the distribution automation master station and generate a standardized debugging task sequence based on parameter configuration. Distribute tasks to multiple device collaborative control units via the 4G communication protocol and dynamically manage debugging resources using a multi-task concurrent scheduling algorithm.
[0086] S200, multi-device coordinated signal output: parses task instructions through the IP address and physical port binding mapping mechanism, drives multiple point-to-point debugging devices to synchronously output signals, and ensures signal time consistency based on the clock synchronization calibration mechanism, while generating high-precision analog and switch signals;
[0087] S300, communication link interruption fault tolerance processing: real-time monitoring of 4G communication link parameters, hierarchical determination of communication interruptions through a dynamic interruption identification module, and implementation of differentiated fault tolerance strategies based on service priorities;
[0088] S400, test data verification and report generation: Synchronously collect distribution master station data and debugging signal reference values, use a timing correlation verification algorithm to eliminate time offsets, identify data errors and locate fault points through an error interval discrimination model, and automatically generate a structured test report.
[0089] Compared with the prior art, the present invention has the following beneficial effects:
[0090] 1. Through the binding mapping mechanism of IP addresses and physical ports, combined with a multi-task concurrent scheduling algorithm, the present invention enables a multi-device collaborative control unit to accurately parse task instructions and drive multiple point-to-point debugging devices to synchronously output analog and switch signals; the clock synchronization calibration mechanism further ensures signal time consistency, effectively avoids signal conflicts during parallel debugging of multiple terminals, and realizes dynamic allocation and efficient utilization of debugging resources.
[0091] 2. The present invention targets 4G communication links, monitors link parameters in real time through a dynamic interruption identification module, and implements differentiated fault-tolerance strategies based on service priorities: a cache retry mechanism is used for routine tasks such as uploading telemetry data, and a fast reconnection process is triggered for critical tasks such as issuing remote control commands. Link interruption scenarios are handled in a hierarchical manner, thereby improving communication reliability and reducing the probability of interruption of the debugging process due to link anomalies.
[0092] 3. The present invention utilizes a timing correlation verification algorithm to eliminate the data time offset between the distribution master station and the debugging terminal, and combines it with an error interval discrimination model to intelligently identify data anomalies such as telemetry deviation and telesignal malfunction; the fault location module traces the fault channel based on the topology model, and the automatically generated structured test report fully records the debugging process and results, achieving high-precision verification of test data and rapid fault point location, thereby supporting the improvement of the closed-loop management efficiency of distribution automation terminal debugging. BRIEF DESCRIPTION OF THE DRAWINGS
[0093] Figure 1 It is a system framework diagram of the present invention;
[0094] Figure 2 Schematic diagram of the method steps of the present invention;
[0095] The meaning of each number in the figure is:
[0096] 100. Batch debugging task scheduling unit; 110. Point table parsing module; 120. Task sequence generation module; 130. Resource scheduling module;
[0097] 200. Multi-device collaborative control unit;
[0098] 300, analog precision generating unit; 310, heterogeneous hardware architecture module; 311, main control submodule; 312, signal processing submodule; 313, analog conversion submodule; 314, status monitoring submodule; 315, switch control submodule;
[0099] 400, communication link fault tolerance unit; 410, dynamic interruption identification module; 411, parameter acquisition submodule; 412, feature extraction submodule; 413, interruption classification submodule; 414, service priority submodule; 415, fault tolerance strategy submodule;
[0100] 500, test data verification unit; 510, data synchronization module; 520, timing correlation module; 530, error determination module; 540, fault location module; 550, report generation module. DETAILED DESCRIPTION
[0101] The following will provide a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.
[0102] Example 1
[0103] like Figure 1 As shown, this embodiment provides a distribution automation terminal automatic batch debugging system, including:
[0104] The batch debugging task scheduling unit 100 generates a standardized debugging task sequence based on the terminal point table file of the distribution automation master station, distributes the tasks to the multi-device collaborative control unit 200 through the 4G communication file service protocol, and adopts a multi-task concurrent scheduling algorithm to achieve dynamic management of the debugging tasks;
[0105] In this step, the batch debugging task scheduling unit 100 includes a point table parsing module 110, a task sequence generating module 120 and a resource scheduling module 130, wherein:
[0106] The point table parsing module 110 is used to parse the terminal point table file of the distribution automation master station, identify the telemetry point, telesignaling point, and remote control point information in the file, and extract the attribute parameters of each point (including point type, range, and communication protocol);
[0107] The task sequence generation module 120 generates a standardized debugging task sequence including test item priorities and test parameter ranges based on the point information extracted by the point table parsing module 110. The task sequence supports the differentiated debugging requirements of multiple types of distribution terminals.
[0108] The resource scheduling module 130 adopts a multi-task concurrent scheduling algorithm, and dynamically adjusts the debugging order of multiple distribution terminals based on the task execution time estimation model and resource conflict detection mechanism to maximize the debugging efficiency.
[0109] In this step, the execution of the multi-task concurrent scheduling algorithm includes the following steps:
[0110] S130.1. Obtain historical debugging basic data:
[0111] Query the historical average debugging time of the same type and number of terminals to be debugged from the historical debugging database , as a benchmark value for estimated time.
[0112] S130.2. Obtain historical debugging basic data:
[0113] Count the number of currently available debugging resources (such as analog generation units and communication links) and calculate resource availability ;
[0114] ;
[0115] Determine factors influencing resource availability based on historical reliability data of the commissioned device (e.g., failure rate, repair time) , used to quantify the impact of insufficient resources on debugging time;
[0116] Calculate the impact of resource availability on time: ;
[0117] S130.3. Evaluation of items affecting communication quality:
[0118] Monitor the signal strength and packet loss rate of the 4G network in real time, and generate a communication quality score through a preset algorithm (Value range: 0~1, higher score means better communication quality);
[0119] Determine the factors affecting communication quality based on the historical packet loss rate data of the 4G network , used to quantify the impact of communication fluctuations on debugging time;
[0120] Calculate the impact of communication quality on time: ;
[0121] S130.4. Integrate base time and environmental impacts:
[0122] The impact items of the first two steps and the historical average debugging time Combined, we get the estimated time after preliminary adjustment ;
[0123] ;
[0124] S130.5, Task complexity correction:
[0125] Determine the task complexity correction factor based on the terminal type and number of points (Value range: 0-1), the higher the complexity, the The smaller (such as the typical DTU value is 0.9, TTU is 0.95);
[0126] Divide the weight coefficient by debugging task type (telemetry / telesignaling / remote control / protection logic) (such as telemetry test weight =0.4), and satisfy , used to characterize the importance differences of different task types;
[0127] Extract the historical average time deviation rate of various tasks , used to correct the estimation error of similar tasks;
[0128] ;
[0129] The effect of task complexity on time is corrected by exponential operation to obtain the final estimated time , and complete the debugging time estimate for a single terminal;
[0130]
[0131] S130.6. Calculation of opportunity costs in resource conflict scenarios:
[0132] When multiple tasks compete for the same resource, the priority decision parameters of the tasks are calculated according to the following logic:
[0133] Calculate task priority weights: Generate the priority weights of each competing task through a dynamic adaptive priority optimization algorithm The dynamic adaptive priority optimization algorithm integrates the task importance level (such as the main change point task has a higher weight than the branch task), the historical failure probability (the weight of the task with frequent failure is increased) and the current resource status (when resources are tight, the key tasks are prioritized) to dynamically derive the weight and quantify the task urgency ( The closer it is to 1, the higher the urgency of the task);
[0134] Calculate resource time difference: obtain the estimated release time of the target resource (derived from the estimated duration of the resource's current occupied task) and the estimated debugging duration of the current task (output from the time estimation model in step S130.5), calculate the time difference between the two :
[0135] ; ( >0 indicates the waiting time for the task; <0 indicates the timeout duration that the task still needs to occupy after the resource is released)
[0136] Define resource importance index: pre-configure resource importance index based on resource type ; (Value range: The larger the value, the more critical the resource is to system debugging. For example, the Usually set to 5, normal communication link =3);
[0137] Deriving the opportunity cost formula: Priority weights of competing tasks , time difference , Resource Importance Index , build an opportunity cost model , quantify the resource waste and debugging efficiency loss caused by task delays:
[0138] ;
[0139] S130.7 Scheduling Decisions Based on Opportunity Costs:
[0140] Comparison of all competing tasks value, giving priority to the task with the highest opportunity cost (i.e. the task with the greatest loss from delay);
[0141] The Markov chain model is used to predict the task scheduling sequence after the current resources are released, and the order of subsequent tasks is dynamically adjusted to achieve conflict resolution.
[0142] To further illustrate this step, this embodiment uses real-time signal status and transmission quality data collected via the communication link as a dynamic basis for task scheduling. The specific process is as follows: During debugging, the signal strength and packet loss rate of the communication network are monitored at regular intervals, and the signal strength is converted into a quality score ranging from 0 to 1 (higher values indicate better quality). When the quality score falls below a preset threshold or the packet loss rate exceeds a certain limit, a link retransmission or backup link switching mechanism is triggered.
[0143] The impact of communication quality on debugging time is quantified by a preset impact factor, which is determined by fitting historical packet loss rate data. When the packet loss rate is in the range of 0%-10%, the impact factor increases linearly with the packet loss rate; when it exceeds 10%, it takes a fixed value and is used to correct the communication impact item in the debugging time estimation model.
[0144] As a further illustration of this step, when multiple tasks compete for the same resource and cause a conflict, this embodiment dynamically schedules tasks according to the following logic:
[0145] First, conduct a resource availability assessment: calculate the resource availability rate (the ratio of the number of currently unoccupied resources to the total number of resources), and combine the historical failure rate of the equipment to determine the resource availability impact factor (the lower the failure rate, the smaller the impact factor value). This is used to correct the debugging time estimation model. The historical average debugging time is based on the debugging data statistics of the same type of terminals in the past three months, and samples with abnormal time consumption (such as records with actual time consumption far exceeding three times the historical average) are simultaneously eliminated.
[0146] On this basis, the task priority weight is dynamically calculated: the priority is composed of a basic weight and a real-time correction item - the basic weight is determined by the comprehensive task importance level (for example, the weight of tasks at main transformer-related points is higher than that of branch line tasks) and the historical failure probability (the weight of tasks with frequent failures is increased); when the resource availability rate is insufficient, the weight is adjusted in real time according to the availability rate (the lower the availability rate, the greater the increase in weight).
[0147] Final execution resource conflict decision: The system calculates the priority parameter by comprehensively considering the task priority weight, the "time difference between the expected resource release time and the estimated time of the current task", and the resource importance index (for example, the importance index of the analog generation unit is higher than that of the ordinary communication link), and gives priority to executing the task with the highest parameter value; at the same time, based on historical scheduling data, the task sequence after resource release is predicted to ensure the continuity and efficiency of task scheduling after resource release.
[0148] Furthermore, this embodiment divides the resource status into S0 (idle), S1 (occupied ≤ 30% of the estimated time), S2 (occupied > 30% of the estimated time), and the transition probability matrix Based on the historical 1000 dispatch data statistics:
[0149] ;
[0150] For example, when a resource is in state S2, the probability of maintaining S2 at the next moment is 0.6, and the probability of transitioning to S1 is 0.3. This model is used to dynamically adjust the task scheduling order and optimize resource utilization.
[0151] It should be added that in order to clarify the weight The quantitative logic uses a hierarchical mapping + parameter calibration method, integrating task importance, historical failure probability, and resource status for calculation, including the following steps:
[0152] First, quantify the importance of the task :
[0153] The power distribution terminal debugging function is divided into 5 levels according to priority, among which the protection logic test corresponds to =5. Control strategy verification correspondence =4. Status monitoring corresponding =3, remote signal verification corresponding =2, parameter reading corresponds to =1, directly mapped to weight coefficient ;
[0154] Second, quantify the historical failure probability :
[0155] Statistics on the failure data of the same type of equipment in the past 12 months are used to fit the variation of failure probability with operating time using exponential distribution: Where, is the device operation time (unit: month), is the initial failure probability benchmark value, is the failure probability attenuation coefficient, and both can be iteratively optimized by the least squares method;
[0156] right Normalization to eliminate dimensional differences: Where, =0.8, =0.1, covering 90% of failure scenarios, ensuring Normalize to the interval [0,1];
[0157] Then, quantify the resource status :
[0158] By load factor ( , such as the CPU usage of the ARM main control unit) and health ( , when the hardware temperature is ≥80℃ =0, otherwise =1) Weighted calculation: Where, is the load factor impact weight, Health impact weight, set based on hardware resource assessment requirements;
[0159] Finally, the composite scheduling weight :
[0160] We selected 10 typical debugging tasks (covering functions such as protection logic testing and control strategy verification) and tested the scheduling timeout rates of different parameter combinations through orthogonal experiments. Finally, we determined the fusion formula: .
[0161] The multi-device collaborative control unit 200 is used to collaboratively drive multiple point-to-point debugging devices to synchronously output analog signals. It parses task instructions through a binding mapping mechanism between IP addresses and physical ports, integrates a clock synchronization calibration mechanism to ensure the time consistency of the output signals of multiple point-to-point debugging devices, and retrieves voltage, current output, and switch status data of multiple point-to-point debugging devices in real time.
[0162] In this step, the multi-device collaborative control unit 200 parses the task instruction through the binding mapping mechanism between IP address and physical port, specifically including:
[0163] Pre-store the corresponding relationship between the IP address and hardware port of each point-to-point debugging device to form a mapping table;
[0164] Perform CRC check on the IP address and hardware port number of the newly connected peer debugging device, and allow access if the check passes;
[0165] According to the target IP in the task instruction, the corresponding hardware port number is extracted from the mapping table, and a driving signal is generated and sent to the target point-to-point debugging device.
[0166] In this step, the clock synchronization calibration mechanism of the multi-device collaborative control unit 200 specifically includes:
[0167] Designate one peer debugging device as the master clock source, and the remaining peer debugging devices as slave clocks. The master clock sends synchronization pulse signals to the slave clocks through the hardware synchronization line or network synchronization protocol to establish the initial clock alignment relationship.
[0168] The slave clock periodically collects the time difference between itself and the master clock. When the difference exceeds the preset threshold, the slave clock's signal output timing is automatically adjusted (delayed triggering when the time difference is positive, and early triggering when the time difference is negative);
[0169] The system monitors the working status of the master clock in real time. When the master clock has signal transmission anomalies or the time deviation exceeds the set threshold, the master clock is determined to be faulty. The peer debugging device with no synchronization failure record and the highest clock stability score is automatically selected from the remaining slave clocks as the backup master clock, and the master-slave role switching is completed. When the original master clock returns to normal, it is automatically downgraded to a slave clock and rejoins the synchronization queue.
[0170] As a further explanation of this step, the multi-device collaborative control unit 200 parses the task instruction through the IP address and physical port binding mapping mechanism. The specific implementation process is as follows:
[0171] During the system initialization phase, the correspondence between the IP address and the hardware port of each point-to-point debugging device is pre-stored to build a static mapping table;
[0172] When a new peer debugging device is connected, a CRC check is performed on the combined data of its IP address and hardware port number. If the check passes, the peer debugging device is included in the mapping table and communication permissions are opened;
[0173] When the task is executed, the corresponding hardware port number is extracted from the mapping table according to the target IP in the instruction, and a driving signal is generated and sent to the target point-to-point debugging device.
[0174] At the same time, the multi-device collaborative control unit 200 ensures that the output timing of multiple devices is consistent through the clock synchronization calibration mechanism. The specific process is as follows:
[0175] First, designate one point-to-point debugging device as the master clock source, and the remaining point-to-point debugging devices as slave clocks. The master clock sends synchronization pulse signals to the slave clocks through a hardware synchronization line or a network synchronization protocol to establish an initial time alignment relationship. The slave clock periodically collects the time difference between itself and the master clock. When the difference exceeds the preset threshold, it automatically adjusts the signal output timing (a positive time difference delays the trigger, while a negative time difference advances the trigger). The working status of the master clock is continuously monitored. If the master clock has a signal transmission anomaly or the time deviation exceeds the limit, the device with no synchronization failure record and the best clock stability is immediately selected from the remaining slave clocks and switched to the master clock. When the original master clock returns to normal, it is automatically downgraded to a slave clock and rejoins the synchronization queue.
[0176] Based on the above mechanism, the multi-device collaborative control unit 200 can synchronously drive multiple point-to-point debugging devices to output analog signals, and at the same time retrieve the voltage, current output and switch status data of each device in real time, thereby realizing collaborative control and operation status monitoring of multiple devices.
[0177] The analog precision generating unit 300 is used to generate high-precision analog and switching signals that meet the testing requirements of the power distribution terminal. It adopts the heterogeneous hardware architecture module 310 of ARM main control + FPGA signal processing, and realizes multi-interval configuration of the current output channel through the dynamic switching circuit of the relay group;
[0178] In this step, the heterogeneous hardware architecture module 310 includes a main control submodule 311, a signal processing submodule 312 and an analog conversion submodule 313, wherein:
[0179] The main control submodule 311 uses an ARM processor and runs a real-time operating system to receive host computer instructions, analyze test parameters, and generate signal configuration instructions based on the test parameters and send them to the signal processing submodule 312;
[0180] The signal processing submodule 312 uses FPGA logic circuits to generate digital waveform signals through digital frequency synthesis technology based on the signal configuration instructions issued by the main control submodule 311, and transmits the digital waveform signals to the analog conversion submodule 313 and the switch control submodule 315;
[0181] The analog conversion submodule 313 integrates a digital-to-analog conversion chip, converts the digital waveform signal output by the signal processing submodule 312 into an analog voltage signal, and adjusts the amplitude and biases the analog voltage signal through the signal conditioning circuit to output an analog signal that meets the test accuracy requirements.
[0182] In this step, the heterogeneous hardware architecture module 310 further includes a status monitoring submodule 314 and a switch control submodule 315, wherein:
[0183] The state monitoring submodule 314 is integrated into the cooperative circuit of the main control submodule 311 and the signal processing submodule 312, and is used to collect the working state parameters of the signal processing submodule 312 and the analog signal output by the analog conversion submodule 313 in real time, and generate an abnormal feedback signal when an abnormal state is detected;
[0184] The switch control submodule 315 is integrated into the logic circuit of the signal processing submodule 312. It generates a switch output instruction based on the digital waveform signal sent by the signal processing submodule 312, and converts the switch output instruction into a physical signal through the driving circuit to control the external switching device.
[0185] As a further explanation of this step, the status monitoring submodule 314 in this embodiment is embedded in the collaborative circuit of the main control submodule 311 and the signal processing submodule 312, and collects two types of data in real time: one is the operating parameters of the signal processing submodule 312 (such as operating temperature, clock status), and the other is the output signal of the analog conversion submodule 313; when the parameters are abnormal (such as temperature exceeding the limit, signal deviation abnormality), a feedback signal is immediately generated to trigger the protection at this level or upload to the upper computer.
[0186] As a further explanation of this step, the analog precision generating unit 300 in this embodiment realizes the multi-interval configuration of the current output channel through the dynamic switching circuit of the relay group: when the main control sub-module 311 receives the "channel switching" instruction, it controls the relay drive circuit through the GPIO interface to make the target relay energized or disconnected, and switch to the corresponding current output circuit (such as large current, milliampere channel) to match the test scenario requirements of the distribution terminal.
[0187] The communication link fault-tolerant unit 400 is used to ensure the continuous transmission of debugging data of the 4G communication link. It integrates a dynamic interruption judgment module 410 based on the IEC104 protocol stack and responds to signal interruptions by setting a communication interruption tolerance mechanism.
[0188] In this step, the dynamic interruption identification module 410 includes a parameter collection submodule 411, a feature extraction submodule 412, an interruption classification submodule 413, a service priority submodule 414 and a fault tolerance strategy submodule 415, wherein:
[0189] The parameter acquisition submodule 411 is based on the IEC104 protocol stack and collects the physical layer parameters, link layer parameters and application layer parameters of the 4G communication link in real time; the parameters include signal status parameters, message transmission parameters and service response parameters.
[0190] The feature extraction submodule 412 processes the parameters collected by the parameter collection submodule 411 to generate a feature vector containing parameter change trend features, statistical features, and parameter correlation features for feature identification of communication interruption;
[0191] The interruption classification submodule 413 performs a classification judgment on the communication interruption based on the feature vector generated by the feature extraction submodule 412 and the preset multi-level threshold;
[0192] Business priority submodule 414 assigns priority queues according to the debug data type, generates a priority identifier corresponding to the data type, and generates differentiated interrupt handling strategies;
[0193] The fault-tolerance strategy submodule 415 generates corresponding processing instructions according to the determination result of the interrupt classification submodule 413 and the priority identifier generated by the service priority submodule 414 .
[0194] As a further explanation of this step, the parameter collection submodule 411 in this embodiment is based on the IEC104 protocol stack and collects the following three types of parameters in real time according to a layered architecture:
[0195] Physical layer parameters: obtain signal status parameters such as signal strength (RSSI) and signal quality (BER) through the 4G module's AT command interface (such as AT+CSQ);
[0196] Link layer parameters: Analyze the frame structure of the IEC104 protocol and extract message transmission parameters such as message sending time, receiving time, and number of retransmissions;
[0197] Application layer parameters: Based on the debugging service type (such as telemetry and remote control), collect service response parameters such as response timeout times and data anomaly rate.
[0198] As a further explanation of this step, the feature extraction submodule 412 in this embodiment processes the collected multi-dimensional parameters in real time to generate the following three types of feature vectors:
[0199] Parameter change trend characteristics: A sliding window is used to calculate the change rate of parameters such as signal strength and signal quality to capture signal mutation characteristics;
[0200] Statistical features: Calculate statistics such as message retransmission rate and heartbeat loss rate per unit time;
[0201] Parameter association features: The association rules between parameters are trained based on historical data to construct a conditional probability matrix.
[0202] As a further explanation of this step, the interruption classification submodule 413 in this embodiment classifies communication interruptions into three levels based on the feature vector and the preset threshold value:
[0203] Signal degradation: When the parameter change trend exceeds the first preset threshold and the message transmission parameter abnormality reaches the second preset threshold, it is determined to be signal degradation and trigger an early warning;
[0204] Momentary outage event: When a preset number of heartbeat messages are lost continuously and the interruption duration does not exceed the first preset duration, it is determined to be a momentary outage and the retransmission strategy is triggered;
[0205] Permanent interruption: When the cumulative number of momentary interruptions reaches a preset number or the duration of a single interruption exceeds a second preset duration, it is determined to be a permanent interruption and a link switch is triggered.
[0206] As a further explanation of this step, the service priority submodule 414 in this embodiment assigns a priority based on the debug data type, specifically including:
[0207] High priority: remote control commands, giving priority to ensuring transmission reliability;
[0208] Medium priority: telemetry data, which can tolerate a short delay but must ensure integrity;
[0209] Low priority: Remote signaling data, which can tolerate a certain packet loss rate.
[0210] As a further explanation of this step, the fault tolerance strategy submodule 415 in this embodiment generates three types of processing instructions according to the interrupt level and service priority:
[0211] Momentary interruption event processing: Generates fast retransmission instructions for high-priority data, and generates delayed retransmission or selective retransmission instructions for medium and low-priority data;
[0212] Permanent interruption processing: Generates a backup link switching instruction to access the backup network by switching the access point of the communication link or enabling the backup channel;
[0213] Hybrid scenario processing: For scenarios with both signal degradation and momentary outages, differentiated processing instructions are generated (such as preferential link switching for high-priority data, local caching and delayed retransmission of medium and low-priority data).
[0214] Furthermore, the communication link fault tolerance unit 400 in this embodiment realizes communication interruption tolerance through the collaboration of multiple submodules of the dynamic interruption determination module 410 according to the following process:
[0215] First, the parameter collection submodule 411 collects the physical layer, link layer and application layer parameters (such as signal strength and number of message retransmissions) of the communication link at a fixed period (such as 100ms);
[0216] Subsequently, the feature extraction submodule 412 performs trend calculation, statistical analysis, and association rule matching on the collected parameters, generating vectors such as "signal mutation characteristics" and "retransmission rate statistical characteristics" in real time to provide data support for interruption determination;
[0217] Then, the interruption classification submodule 413 compares the feature vectors output by the feature extraction submodule 412 with the preset thresholds (the classification thresholds for signal degradation, momentary interruption, and permanent interruption) one by one at a set period (e.g., 500ms), determines whether the current communication status belongs to "signal degradation", "momentary interruption event", or "permanent interruption", and marks the corresponding interruption level;
[0218] Next, after receiving the interrupt classification result, the fault tolerance strategy submodule 415 combines the debugging data priority output by the service priority submodule 414 (remote control instructions are high priority, telemetry data are medium priority, and telesignaling data are low priority) to dynamically generate processing instructions:
[0219] If it is a momentary outage: trigger "fast retransmission" for high-priority data (shorten retransmission timeout, increase retransmission times), and perform "delayed retransmission" or "selective retransmission" for medium / low priority data;
[0220] If the interruption is permanent: immediately generate a "backup link switch" instruction to connect to the preset backup network by switching the access point of the communication link (such as APN) or activating the backup channel;
[0221] In mixed scenarios (e.g., signal degradation and momentary outages), prioritize link switching for high-priority data, and adopt the "local cache + delayed retransmission" strategy for medium / low-priority data.
[0222] Finally, after switching to the backup link, the fault-tolerant strategy submodule 415 automatically sends an IEC104 protocol test frame (such as an empty frame with a timestamp). If a response frame from the link is received within the set time, the backup link is determined to be available and the data transmission queue is restored. If no response is received, a secondary switch or a fault alarm is triggered to ensure the eventual recovery of the communication link.
[0223] The test data verification unit 500 is used to compare the data collected by the power distribution master station with the debugging signal reference value, and automatically generate a test report containing fault location based on the timing correlation verification algorithm and the error interval discrimination model.
[0224] In this step, the test data verification unit 500 includes a data synchronization module 510, a timing correlation module 520, an error determination module 530, a fault location module 540 and a report generation module 550, wherein:
[0225] The data synchronization module 510 synchronously collects the real-time data and debugging signal reference value of the power distribution master station based on a unified timestamp mechanism, and caches the collected data in a time window to ensure the consistency of the data time range;
[0226] The time series association module 520 constructs a time series mapping relationship between the master station collected data and the reference value based on the timestamp, uses a time series association verification algorithm to eliminate time offset, and generates a set of associated data pairs;
[0227] The error discrimination module 530 establishes an error interval discrimination model for different types of test data, calculates the error value of the associated data pair, compares it with the preset error threshold, identifies the error characteristics, and grades the test data quality;
[0228] The fault location module 540 is used to construct a topological model of the power terminal signal transmission path, combine the error discrimination results, use the fault tracing method to locate possible fault points, and generate a fault location probability list;
[0229] The report generation module 550 automatically generates a structured test report (including a test overview, error statistics, fault location, conclusions and suggestions) based on the error classification results of the error discrimination module 530 and the fault location probability list of the fault location module 540, and supports visual display of the report and output in a standard format.
[0230] As a further explanation of this step, the data synchronization module 510 in this embodiment implements data synchronization based on a unified timestamp mechanism through the following steps:
[0231] Multi-source data acquisition: Data is simultaneously acquired from the distribution master station database (such as historical database, real-time database) and the debugging signal source (such as analog precision generating unit). The master station collects data including telemetry values (voltage, current), telesignaling status (switch position), and debugging signal reference values including standard voltage curve and standard switch action sequence.
[0232] Timestamp unification: Add system timestamps (such as Unix timestamps) to the collected master station data and benchmark values to ensure the consistency of data time identification;
[0233] Time window cache: A sliding time window (e.g., 10 minutes) is used to cache collected data. The window size can be dynamically adjusted based on the debugging task type (e.g., steady-state test, dynamic test) to ensure that the time range of the data involved in the comparison is consistent.
[0234] As a further explanation of this step, the time series association module 520 in this embodiment constructs a time series mapping relationship between data based on the timestamp, specifically including:
[0235] Time series mapping construction: Using the timestamp of the reference value as a reference, search for the corresponding point with the closest timestamp within the time window of the master station's data collection to build a "reference value-collected value" time series mapping pair;
[0236] Time offset elimination: To address time offsets caused by factors such as communication delays and sampling frequency differences, a linear interpolation algorithm (such as Lagrange interpolation) is used to resample the collected data and align its time axis with the time axis of the reference value.
[0237] Generate associated data pairs: Generate a one-to-one corresponding associated data pair set based on the master station data and the reference value after time axis alignment according to the preset sampling interval (e.g., 100ms) for subsequent error calculation.
[0238] As a further explanation of this step, the error discrimination module 530 in this embodiment establishes an error interval discrimination model for different types of test data, including the following steps:
[0239] First, perform the error calculation:
[0240] For a set of associated data pairs, calculate the error value separately according to the data type:
[0241] For telemetry data (such as voltage): calculate the absolute error (|acquired value - reference value|) and relative error (|acquired value - reference value| / reference value);
[0242] For remote signaling data (such as switch status): calculate the status matching degree (match is 0, mismatch is 1);
[0243] Then, perform error interval modeling:
[0244] Based on the statistical characteristics of historical test data (such as mean and standard deviation), dynamic error ranges are set for different types of data:
[0245] Telemetry data: Error interval = ,in is the standard deviation of the historical error;
[0246] Remote signaling data: error interval = [0,0] (i.e., 100% matching required);
[0247] Finally, error classification is performed:
[0248] Compare the calculated error value with the preset error range and classify the test data quality into three levels:
[0249] Pass (Grade A): The error value is within the error range and the data quality meets the standard;
[0250] Abnormal (Grade B): The error value exceeds the error interval but does not exceed 2 times the upper limit of the interval, and the data is slightly abnormal;
[0251] Fault (Grade C): The error value exceeds 2 times the upper limit of the interval, and the data has serious deviations.
[0252] As a further explanation of this step, the fault location module 540 in this embodiment locates the potential fault point based on the topological model of the signal transmission path and the error judgment result, including the following steps:
[0253] First, based on the physical connection relationship of the distribution terminals (such as the transmission link from terminal to communication module to master station) and the communication protocols (such as IEC104 and Modbus), a directed graph topology model of the signal transmission path is constructed. The nodes include terminal devices, communication devices, and master station servers, and the edges map the data flow.
[0254] Next, the Bayesian network algorithm is used to calculate the failure probability of each node based on the abnormal results (such as telemetry data deviation and telesignaling status mismatch) output by the error judgment module 530: If all downstream data of a node are abnormal and the upstream data status is normal, the failure probability of the node is determined to be increased; if only a certain type of data (such as voltage telemetry) is abnormal and other types of data (such as current telemetry) are normal, the failure probability of the acquisition channel associated with this type of data is increased;
[0255] Finally, the fault points are sorted from high to low by fault probability to generate a list, which includes the fault node name, fault probability, and the type of data affected (such as "the voltage acquisition module of terminal A, the associated voltage telemetry data is abnormal"), providing a directional basis for troubleshooting.
[0256] As a further explanation of this step, the report generation module 550 in this embodiment integrates the error identification and fault location results to construct a structured test report layer by layer, including the following steps:
[0257] First, extract the test task name, time range, number of participating terminals, and data collection volume recorded in the data synchronization phase to form a test overview;
[0258] Subsequently, the hierarchical statistical results of the error identification phase are integrated—the number and proportion of A / B / C level data are displayed by telemetry and telesignaling type, and visualization components are used to generate bar charts (such as the terminal-level error level distribution) to achieve graphical presentation of error statistics.
[0259] Next, during the fault location phase, nodes with a failure probability of 50% or higher are screened. Combined with the fault causes inferred from the topology model (e.g., "weak communication module signal" associated with telemetry data fluctuations, "terminal sampling circuit abnormality" associated with telesignaling state deviations), a fault location module is constructed. Based on the combined results of error statistics and fault location, a test conclusion ("pass," "partially pass," or "fail") is determined. Repair suggestions (e.g., "check the terminal voltage acquisition module wiring" or "adjust the communication module antenna position") are output for high-probability fault points, forming conclusions and recommendations.
[0260] Finally, the report can be exported to PDF, Word or XML format, and the report content can be rendered in real time through the web interface to facilitate user review and analysis.
[0261] It should be noted that, in this embodiment, the multi-device collaborative control unit 200, the analog precision generating unit 300, the communication link fault-tolerant unit 400, and the test data verification unit 500 operate collaboratively around the "command distribution-signal generation-data transmission-verification closed loop". Specifically:
[0262] The host computer sends the debugging task instruction to the multi-device collaborative control unit 200. After the multi-device collaborative control unit 200 parses it, on the one hand, it sends a signal configuration instruction to the analog precision generating unit 300, driving the analog precision generating unit 300 to generate analog and switch signals, synchronously collects the signal reference value and uploads it to the test data verification unit 500; on the other hand, it triggers the tested distribution terminal to start data collection, and collects the terminal's voltage, current output and switch status data in real time. The communication link fault tolerance unit 400 relies on the IEC104 protocol stack to ensure transmission continuity. In the event of abnormalities such as signal interruption or degradation, it automatically performs retransmission or link switching and transmits the data to the distribution master station; the test data verification unit 500 obtains the terminal collection data from the master station, combines the signal reference value of the analog precision generating unit 300 to complete timing correlation, error judgment and fault location, and generates a structured test report. When the report is transmitted back to the host computer, it triggers the multi-device collaborative control unit 200 to execute subsequent actions such as fault terminal marking and test task suspension, forming a debugging closed loop.
[0263] Example 2
[0264] like Figure 2 As shown, this embodiment also provides a method for automatic batch debugging of distribution automation terminals, which is based on the automatic batch debugging system of distribution automation terminals in Example 1 and includes the following steps:
[0265] S100, Task Scheduling and Distribution: Parse the terminal point table file of the distribution automation master station and generate a standardized debugging task sequence based on parameter configuration, distribute the tasks to the multi-device collaborative control unit 200 via the 4G communication protocol, and adopt a multi-task concurrent scheduling algorithm to dynamically manage debugging resources;
[0266] S200, multi-device coordinated signal output: parses task instructions through the IP address and physical port binding mapping mechanism, drives multiple point-to-point debugging devices to synchronously output signals, and ensures signal time consistency based on the clock synchronization calibration mechanism, while generating high-precision analog and switch signals;
[0267] S300, communication link interruption fault tolerance processing: real-time monitoring of 4G communication link parameters, hierarchical determination of communication interruptions through the dynamic interruption determination module 410, and implementation of differentiated fault tolerance strategies based on service priorities;
[0268] S400, test data verification and report generation: Synchronously collect distribution master station data and debugging signal reference values, use a timing correlation verification algorithm to eliminate time offsets, identify data errors and locate fault points through an error interval discrimination model, and automatically generate a structured test report.
[0269] Those skilled in the art will appreciate that the process of implementing all or part of the steps of the above embodiments may be accomplished by hardware, or by instructing related hardware through a program.
[0270] The above shows and describes the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely preferred examples of the present invention and are not intended to limit the present invention. Various changes and improvements may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and improvements fall within the scope of the present invention. The scope of protection claimed in the present invention is defined by the appended claims and their equivalents.
Claims
1. A distribution automation terminal automatic batch debugging system, characterized in that: include: A batch debugging task scheduling unit (100), the batch debugging task scheduling unit (100) generates a standardized debugging task sequence based on a terminal point table file of a distribution automation master station, distributes the tasks to a multi-device collaborative control unit (200) via a 4G communication file service protocol, and adopts a multi-task concurrent scheduling algorithm to achieve dynamic management of the debugging tasks; A multi-device collaborative control unit (200) is used to collaboratively drive multiple point-to-point debugging devices to synchronously output analog signals, parse task instructions through a binding mapping mechanism between IP addresses and physical ports, integrate a clock synchronization calibration mechanism to ensure the time consistency of output signals of multiple point-to-point debugging devices, and retrieve voltage, current output and switch status data of multiple point-to-point debugging devices in real time; An analog quantity precision generating unit (300) is used to generate high-precision analog quantity and switching quantity signals that meet the test requirements of the power distribution terminal, and adopts a heterogeneous hardware architecture module (310) of ARM main control + FPGA signal processing, and realizes multi-interval configuration of current output channels through a dynamic switching circuit of a relay group; A communication link fault-tolerant unit (400), the communication link fault-tolerant unit (400) is used to ensure continuous transmission of debugging data of a 4G communication link, integrate a dynamic interruption determination module (410) based on the IEC104 protocol stack, and deal with signal interruptions by setting a communication interruption tolerance mechanism; A test data verification unit (500) is used to compare the data collected by the power distribution master station with the debugging signal reference value, and automatically generate a test report containing fault location based on a time sequence correlation verification algorithm and an error interval discrimination model.
2. The automatic batch debugging system for distribution automation terminals according to claim 1, characterized in that: The batch debugging task arrangement unit (100) comprises a point table parsing module (110), a task sequence generating module (120) and a resource scheduling module (130), wherein: The point table parsing module (110) is used to parse the terminal point table file of the distribution automation master station, identify the telemetry point, telesignaling point, and remote control point information in the file, and extract the attribute parameters of each point; The task sequence generation module (120) generates a standardized debugging task sequence including test item priorities and test parameter ranges based on the point information extracted by the point table parsing module (110), wherein the task sequence supports differentiated debugging requirements of multiple types of power distribution terminals; The resource scheduling module (130) adopts a multi-task concurrent scheduling algorithm, dynamically adjusts the debugging sequence of multiple power distribution terminals based on a task execution time estimation model and a resource conflict detection mechanism, and maximizes debugging efficiency.
3. The automatic batch debugging system for distribution automation terminals according to claim 2, characterized in that: The execution of the multi-task concurrent scheduling algorithm includes the following steps: S130.
1. Obtain historical debugging basic data: Query the historical average debugging time of the same type and number of terminals to be debugged from the historical debugging database , as a benchmark value for estimated time; S130.
2. Obtain historical debugging basic data: Count the number of currently available debugging resources and calculate resource availability ; ; Determine resource availability influencing factors based on historical reliability data of commissioned devices , used to quantify the impact of insufficient resources on debugging time; Calculate the impact of resource availability on time: ; S130.
3. Evaluation of items affecting communication quality: Monitor the signal strength and packet loss rate of the 4G network in real time, and generate a communication quality score through a preset algorithm ; Determine the factors affecting communication quality based on the historical packet loss rate data of the 4G network , used to quantify the impact of communication fluctuations on debugging time; Calculate the impact of communication quality on time: ; S130.
4. Integrate base time and environmental impacts: The impact items of the first two steps and the historical average debugging time Combined, we get the estimated time after preliminary adjustment ; S130.5, Task complexity correction: Determine the task complexity correction factor based on the terminal type and number of points The higher the complexity, the The smaller; Divide the weight coefficient by debugging task type , and satisfies , used to characterize the importance differences of different task types; Extract the historical average time deviation rate of various tasks , used to correct the estimation error of similar tasks; ; The effect of task complexity on time is corrected by exponential operation to obtain the final estimated time , and complete the debugging time estimate for a single terminal; S130.
6. Calculation of opportunity costs in resource conflict scenarios: When multiple tasks compete for the same resource, the priority decision parameters of the tasks are calculated according to the following logic: Calculate task priority weights: Generate the priority weights of each competing task through a dynamic adaptive priority optimization algorithm ,The dynamic adaptive priority optimization algorithm integrates the task importance level, historical failure probability and current resource status to dynamically derive weights and quantify the task urgency; Calculate resource time difference: obtain the estimated release time of the target resource and the estimated debugging time of the current task , calculate the time difference between the two ; Define resource importance index: pre-configure resource importance index based on resource type ; Deriving the opportunity cost formula: Priority weights of competing tasks , time difference , Resource Importance Index , build an opportunity cost model ,quantify the resource waste and debugging efficiency loss caused by task delays; S130.7 Scheduling Decisions Based on Opportunity Costs: Comparison of all competing tasks value, giving priority to tasks with the highest opportunity cost; The Markov chain model is used to predict the task scheduling sequence after the current resources are released, and the order of subsequent tasks is dynamically adjusted to achieve conflict resolution.
4. The automatic batch debugging system for distribution automation terminals according to claim 1, characterized in that: The multi-device collaborative control unit (200) parses the task instruction through the binding mapping mechanism between the IP address and the physical port, specifically including: Pre-store the corresponding relationship between the IP address and hardware port of each point-to-point debugging device to form a mapping table; Perform CRC check on the IP address and hardware port number of the newly connected peer debugging device, and allow access if the check passes; According to the target IP in the task instruction, the corresponding hardware port number is extracted from the mapping table, and a driving signal is generated and sent to the target point-to-point debugging device.
5. The automatic batch debugging system for distribution automation terminals according to claim 4, characterized in that: The clock synchronization calibration mechanism of the multi-device collaborative control unit (200) specifically includes: Designate one peer debugging device as the master clock source, and the remaining peer debugging devices as slave clocks. The master clock sends synchronization pulse signals to the slave clocks through the hardware synchronization line or network synchronization protocol to establish the initial clock alignment relationship. The slave clock periodically collects the time difference between itself and the master clock. When the difference exceeds the preset threshold, the slave clock's signal output timing is automatically adjusted. The system monitors the working status of the master clock in real time. When the master clock has signal transmission anomalies or the time deviation exceeds the set threshold, the master clock is determined to be faulty. The peer debugging device with no synchronization failure record and the highest clock stability score is automatically selected from the remaining slave clocks as the backup master clock, and the master-slave role switching is completed. When the original master clock returns to normal, it is automatically downgraded to a slave clock and rejoins the synchronization queue.
6. The automatic batch debugging system for distribution automation terminals according to claim 1, characterized in that: The heterogeneous hardware architecture module (310) includes a main control submodule (311), a signal processing submodule (312) and an analog conversion submodule (313), wherein: The main control submodule (311) uses an ARM processor and runs a real-time operating system to receive host computer instructions, analyze test parameters, and generate signal configuration instructions based on the test parameters and send them to the signal processing submodule (312); The signal processing submodule (312) uses an FPGA logic circuit to generate a digital waveform signal through a digital frequency synthesis technology based on the signal configuration instruction issued by the main control submodule (311), and transmits the digital waveform signal to the analog conversion submodule (313) and the switch control submodule (315); The analog conversion submodule (313) integrates a digital-to-analog conversion chip, converts the digital waveform signal output by the signal processing submodule (312) into an analog voltage signal, and performs amplitude adjustment and bias processing on the analog voltage signal through a signal conditioning circuit, thereby outputting an analog signal that meets the test accuracy requirements.
7. The automatic batch debugging system for distribution automation terminals according to claim 6, characterized in that: The heterogeneous hardware architecture module (310) further includes a state monitoring submodule (314) and a switch quantity control submodule (315), wherein: The state monitoring submodule (314) is integrated into the cooperative circuit of the main control submodule (311) and the signal processing submodule (312), and is used to collect the working state parameters of the signal processing submodule (312) and the analog signal output by the analog conversion submodule (313) in real time, and generate an abnormal feedback signal when an abnormal state is detected; The switch quantity control submodule (315) is integrated into the logic circuit of the signal processing submodule (312), generates a switch quantity output instruction based on the digital waveform signal issued by the signal processing submodule (312), and converts the switch quantity output instruction into a physical signal through a driving circuit to control an external switch device.
8. The automatic batch debugging system for distribution automation terminals according to claim 1, characterized in that: The dynamic interruption identification module (410) includes a parameter collection submodule (411), a feature extraction submodule (412), an interruption classification submodule (413), a service priority submodule (414) and a fault tolerance strategy submodule (415), wherein: The parameter acquisition submodule (411) is based on the IEC104 protocol stack and collects the physical layer parameters, link layer parameters and application layer parameters of the 4G communication link in real time; The feature extraction submodule (412) processes the parameters collected by the parameter collection submodule (411) to generate a feature vector including parameter change trend features, statistical features, and parameter correlation features for feature recognition of communication interruption; The interruption classification submodule (413) performs a classification judgment on the communication interruption based on the feature vector generated by the feature extraction submodule (412) and the preset multi-level threshold value; The service priority submodule (414) allocates a priority queue according to the debug data type and generates a priority identifier corresponding to the data type for generating a differentiated interrupt processing strategy; The fault-tolerant strategy submodule (415) generates corresponding processing instructions according to the determination result of the interrupt classification submodule (413) and the priority identifier generated by the service priority submodule (414).
9. The automatic batch debugging system for distribution automation terminals according to claim 1, characterized in that: The test data verification unit (500) comprises a data synchronization module (510), a time sequence association module (520), an error determination module (530), a fault location module (540) and a report generation module (550), wherein: The data synchronization module (510) synchronously collects the real-time data collected from the power distribution master station and the debugging signal reference value based on a unified timestamp mechanism, and caches the collected data in a time window to ensure the consistency of the data time range; The time series association module (520) constructs a time series mapping relationship between the master station collected data and the reference value based on the timestamp, uses a time series association verification algorithm to eliminate time offset, and generates a set of associated data pairs; The error discrimination module (530) establishes an error interval discrimination model for different types of test data, calculates the error value of the associated data pair, compares it with a preset error threshold, identifies the error characteristics, and grades the test data quality; The fault location module (540) is used to construct a topology model of the power terminal signal transmission path, combine the error discrimination result, use the fault tracing method to locate possible fault points, and generate a fault location probability list; The report generation module (550) automatically generates a structured test report based on the error classification result of the error discrimination module (530) and the fault location probability list of the fault location module (540), and supports visual display and standard format output of the report.
10. A method for automatic batch debugging of distribution automation terminals, based on the automatic batch debugging system for distribution automation terminals according to any one of claims 1 to 9, characterized in that: The steps include: S100, task arrangement and distribution: parsing the terminal point table file of the distribution automation master station and generating a standardized debugging task sequence based on parameter configuration, distributing the tasks to the multi-device collaborative control unit (200) via the 4G communication protocol, and dynamically managing debugging resources using a multi-task concurrent scheduling algorithm; S200, multi-device coordinated signal output: parses task instructions through the IP address and physical port binding mapping mechanism, drives multiple point-to-point debugging devices to synchronously output signals, and ensures signal time consistency based on the clock synchronization calibration mechanism, while generating high-precision analog and switch signals; S300, communication link interruption fault tolerance processing: real-time monitoring of 4G communication link parameters, hierarchical determination of communication interruption through a dynamic interruption determination module (410), and implementation of differentiated fault tolerance strategies in combination with service priorities; S400, test data verification and report generation: Synchronously collect distribution master station data and debugging signal reference values, use a timing correlation verification algorithm to eliminate time offsets, identify data errors and locate fault points through an error interval discrimination model, and automatically generate a structured test report.
Citation Information
Patent Citations
Power distribution terminal access adaptive debugging analysis method based on power distribution master station
CN107749811A
Power distribution terminal batch adaptive debugging method and system based on network card monitoring
CN119231758A
Distributed resource cooperative control method based on layering and partitioning autonomy of power distribution network
CN119448281A
Plug-and-play automatic point-to-point joint debugging method and system and storage medium
CN119628223A
Power distribution internet of things terminal debugging and testing system
WO2025112525A1