Method for manufacturing semiconductor chip with resin layer and method for manufacturing substrate laminate

Abstract

A method for manufacturing a semiconductor chip (20A) with a resin layer includes: a step for preparing a laminate (20) including a semiconductor substrate (21) and a resin layer (23) laminated on the semiconductor substrate; a step in which the laminate is bonded to a dicing tape (42) such that the resin layer is exposed; a step for forming a protective layer (33) on the resin layer of the laminate; a step for forming a groove (34) penetrating the protective layer and the resin layer by laser ablation; a step for singulating the semiconductor substrate through the groove; and a step for removing the cut protective layer (33A).

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a method for manufacturing a semiconductor chip with a resin layer and a method for manufacturing a substrate laminate. BACKGROUND

[0002] With the development of miniaturization, lightweight, and high performance of electronic devices, high integration of semiconductor chips and the like is required. However, the more the circuit is miniaturized, the more difficult it is to sufficiently cope with the requirement. Therefore, in recent years, a method of performing high integration by vertically (in the thickness direction) stacking a plurality of semiconductor substrates (wafers), semiconductor chips, and the like to make a multilayer three-dimensional structure has been proposed.

[0003] As a method of stacking and joining semiconductor substrates (wafers), semiconductor chips, and the like (hereinafter, sometimes referred to as "semiconductor substrates and the like"), there is a method of joining via solder between electrodes of stacked semiconductor substrates and the like. However, with the miniaturization of circuits, there are problems such as cracking due to fusion and alloying of adjacent solders, device malfunction due to heat from the solder, and the like.

[0004] On the other hand, a direct joining method of directly joining electrodes of stacked semiconductor substrates and the like without via solder, a method using an adhesive, and the like (for example, Patent Documents 1 to 3) have been proposed.

[0005] In addition, as a method of singulating a semiconductor substrate into semiconductor chips by cutting the semiconductor substrate, a cutting method such as plasma cutting of forming a patterned mask on a semiconductor substrate, and singulating by plasma etching of a portion of the semiconductor substrate where the mask is not formed has been proposed.

[0006] For example, in Patent Document 4, a method of preparing a substrate having a second layer in which an insulating film of SiO2 or the like is formed on a first layer that is a semiconductor layer made of silicon or the like, forming an opening for exposing the first layer in the second layer by irradiating laser light to a division region of the substrate, and after depositing a protective film on a device region and the division region, leaving the protective film covering the end surface of the device region by plasma, and further performing plasma cutting of etching the first layer through the opening to divide into device chips, thereby manufacturing a device chip in which the end surface of the second layer is covered with the protective film.

[0007] Patent Document 1: Japanese Patent Application Laid-Open No. 4-132258

[0008] Patent Document 2: Japanese Patent Application Laid-Open No. 2010-226060

[0009] Patent Document 3: Japanese Patent Application Laid-Open No. 2016-47895

[0010] Patent Document 4: Japanese Patent Application Laid-Open No. 2017-163073 Summary of the Invention

[0011] Problems to be solved by the invention

[0012] When an insulating layer such as a SiO2 film is formed on a semiconductor substrate, a groove (opening) is formed in the insulating layer by laser ablation, and the groove is used to cut the semiconductor chips into individual pieces, the edges of the groove (opening) formed by laser ablation are large, and this unevenness also affects the cutting process as a subsequent step. As a result, the unevenness of the side surface (cut surface) of the semiconductor chip also becomes larger. Such unevenness on the side of the semiconductor chip is likely to become a major cause of particle generation. When the semiconductor chips are stacked and joined, if there are particles on the joining surface, it will become a cause of poor joining.

[0013] One method disclosed herein is completed in view of the above-mentioned problems, and its subject is to provide a method for manufacturing a semiconductor chip with a resin layer and a method for manufacturing a substrate laminate, in which after grooves are formed on an insulating layer on a semiconductor substrate by laser ablation, the grooves are used to cut the semiconductor substrate into single pieces, and the unevenness of the side surface of the cut surface of the semiconductor chip can be suppressed.

[0014] Methods for solving problems

[0015] The specific means for solving the above-mentioned problems are as follows.

[0016] <1> A method for manufacturing a semiconductor chip with a resin layer, comprising:

[0017] a laminate preparation step of preparing a laminate including a semiconductor substrate and a resin layer laminated on the semiconductor substrate;

[0018] a laminating step of laminating the laminate to a dicing tape in such a manner that the resin layer is exposed;

[0019] a protective layer forming step of forming a protective layer on the resin layer of the laminate;

[0020] a groove forming step of forming a groove penetrating the protective layer and the resin layer by laser ablation;

[0021] a dicing step of singulating the semiconductor substrate through the grooves; and

[0022] The protective layer removal step is to remove the protective layer after the cutting step.

[0023] <2> The method for manufacturing a semiconductor chip with a resin layer according to <1>, wherein the laminate includes an electrode exposed from a portion of the resin layer.

[0024] <3> The method for producing a semiconductor chip with a resin layer according to <1> or <2>, wherein the surface of the resin layer has at least one functional group selected from the group consisting of a silanol group, an amino group, an epoxy group, a hydroxyl group, and a functional group having an unsaturated bond.

[0025] <4> The method for manufacturing a semiconductor chip with a resin layer according to any one of <1> to <3>, wherein the resin layer comprises a siloxane bond and at least one bond selected from the group consisting of an ester bond, an ether bond, an amide bond, and an imide bond.

[0026] <5> The method for producing a semiconductor chip with a resin layer according to any one of <1> to <4>, wherein the protective layer is a water-soluble resin layer formed of a water-soluble resin.

[0027] <6> The method for manufacturing a semiconductor chip with a resin layer according to any one of <1> to <5>, wherein the laminate is a laminate having an inorganic material layer laminated on a side of the semiconductor substrate opposite to a side on which the resin layer is laminated.

[0028] <7> According to the method for manufacturing a semiconductor chip with a resin layer according to any one of <1> to <6>, in the above-mentioned cutting step, the above-mentioned protective layer and the above-mentioned resin layer formed with the above-mentioned groove are used as masks, and plasma etching is performed on a part of the above-mentioned semiconductor substrate through the above-mentioned groove, thereby singulating the above-mentioned semiconductor substrate.

[0029] <8> A method for manufacturing a substrate laminate, comprising:

[0030] a lamination step of peeling the semiconductor chip with a resin layer manufactured by the method for manufacturing a semiconductor chip with a resin layer described in any one of <1> to <7> from the dicing tape and laminating the semiconductor chip with a resin layer on the other semiconductor substrate or the other semiconductor chip so that the resin layer of the semiconductor chip with a resin layer contacts the other semiconductor substrate or the other semiconductor chip; and

[0031] The heating step heats and bonds the stacked semiconductor chip with the resin layer to the other semiconductor substrate or the other semiconductor chip.

[0032] <9> The method for manufacturing a substrate laminate according to <8>,

[0033] The other semiconductor substrate or the other semiconductor chip comprises an inorganic material layer.

[0034] In the lamination step, the lamination is performed so that the resin layer of the semiconductor chip with a resin layer is in contact with the other semiconductor substrate or the inorganic material layer of the other semiconductor chip.

[0035] Effects of the Invention

[0036] According to one embodiment of the present disclosure, a method for manufacturing a semiconductor chip with a resin layer and a method for manufacturing a substrate laminate can be provided. After a groove is formed on an insulating layer on a semiconductor substrate by laser ablation, the groove is used to cut the semiconductor substrate into single pieces, and the unevenness of the side surface of the cut surface of the semiconductor chip can be suppressed. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 This is a schematic structural diagram showing an example of a laminate used in the method for producing a semiconductor chip with a resin layer of the present disclosure.

[0038] Figure 2 This is a schematic diagram showing the steps of an example of a method for manufacturing a semiconductor chip with a resin layer according to the present disclosure.

[0039] Figure 3 This is a schematic diagram showing the steps of an example of a method for manufacturing a substrate laminate by laminating a semiconductor chip with a resin layer manufactured by the method for manufacturing a semiconductor chip with a resin layer of the present disclosure on other semiconductor chips.

[0040] Figure 4 This is an optical microscope image showing a portion of the side surface of the silicon substrate of the semiconductor chip with a resin layer manufactured in Example 1.

[0041] Figure 5 This is an optical microscope image showing a portion of the side surface of the silicon substrate of the semiconductor chip with the SiO 2 layer manufactured in Comparative Example 1.

[0042] Figure 6 This is a SEM photograph of the edge of the silicon substrate of the semiconductor chip with a resin layer manufactured in Example 1, as viewed obliquely from above.

[0043] Figure 7 This is a SEM photograph of the edge of the silicon substrate of the semiconductor chip with the SiO2 layer manufactured in Comparative Example 1, observed from obliquely above.

[0044] Figure 8 This is a schematic configuration diagram showing an example of a substrate laminate produced by the method for producing a substrate laminate of the present disclosure. DETAILED DESCRIPTION

[0045] In the present disclosure, a numerical range expressed using “to” means a range including the numerical values ​​described before and after “to” as the lower limit and the upper limit.

[0046] In the numerical ranges described in stages in this disclosure, the upper limit value described in one numerical range may be replaced by the upper limit value of the numerical range described in another stage, and the lower limit value may be replaced by the lower limit value of the numerical range described in another stage. In addition, in the numerical ranges described in this disclosure, the upper limit value or the lower limit value of the numerical range may be replaced by the value shown in the Examples.

[0047] [Method for manufacturing a semiconductor chip with a resin layer]

[0048] The method for manufacturing a semiconductor chip with a resin layer disclosed herein includes:

[0049] a laminate preparation step of preparing a laminate including a semiconductor substrate and a resin layer laminated on the semiconductor substrate;

[0050] a laminating step of laminating the laminate to a dicing tape in such a manner that the resin layer is exposed;

[0051] a protective layer forming step of forming a protective layer on the resin layer of the laminate;

[0052] a groove forming step of forming a groove penetrating the protective layer and the resin layer by laser ablation;

[0053] a dicing step of singulating the semiconductor substrate through the grooves; and

[0054] The protective layer removal step is to remove the protective layer after the cutting step.

[0055] In the manufacturing method of the semiconductor chip with a resin layer disclosed in the present invention, a laminate having a resin layer provided on a semiconductor substrate is made, and a protective layer is further provided on the resin layer. After forming a groove by laser ablation, the exposed portion (groove portion) of the semiconductor substrate is cut and singulated (chipped). As a result, compared with the case of using a laminate having an inorganic layer such as a SiO2 film provided on a semiconductor substrate, the side of the semiconductor chip, that is, the concave and convex surface cut by cutting, becomes smaller, and the generation of particles caused by the concave and convex side of the semiconductor chip can be suppressed. Therefore, for example, when a semiconductor chip with a resin layer is peeled off from a cutting tape and stacked on other semiconductor substrates using a processing device, it is possible to suppress particles from mixing between the semiconductor chip and other semiconductor substrates.

[0056] The reason why the unevenness on the side surface of the semiconductor layer of the semiconductor chip with a resin layer can be suppressed by the method of the present disclosure is not yet clear, but is presumed as follows.

[0057] If a SiO2 layer and a protective layer are provided on a semiconductor substrate, and a mask is patterned by forming grooves in the protective layer and the SiO2 layer, for example, by laser ablation, the laser light scatters in the SiO2 layer, forming vertical stripes (in the direction of the thickness of the protective layer) on the inner wall surface of the groove portion of the protective layer. It is speculated that if the semiconductor substrate is cut through a mask with vertical stripes, the vertical stripes formed on the side of the mask (protective layer) will be transferred to the cut surface of the semiconductor substrate.

[0058] On the other hand, if a resin layer and a protective layer are provided on a semiconductor substrate, and grooves are formed in the protective layer and the resin layer by laser ablation to pattern the mask, this can suppress laser scattering in the resin layer and the formation of vertical streaks on the inner wall surfaces of the grooves in the protective layer. Therefore, it can be inferred that the formation of vertical streaks on the cut surface of the semiconductor substrate during dicing can be suppressed. It should be noted that the present disclosure is not limited to the above speculation.

[0059] Below, an example of a method for manufacturing a semiconductor chip with a resin layer and a method for manufacturing a substrate laminate according to the present disclosure is described with reference to the accompanying drawings. It should be noted that the present disclosure is not limited to the configurations shown in the accompanying drawings. Furthermore, the size, shape, and other configurations of the components in the various figures are conceptual, and the relative relationships between the components are not limited thereto. Furthermore, in the various drawings, components having substantially the same function are denoted by the same reference numerals throughout the drawings, and the reference numerals and descriptions of duplicate components may be omitted.

[0060] <Method for Manufacturing a Semiconductor Chip with a Resin Layer>

[0061] Figure 1 An example of the structure of the laminated body 20 used in the method for manufacturing a semiconductor chip with a resin layer of the present disclosure is schematically shown. Figure 1 In the illustrated laminate 20, an inorganic material layer 22 composed of an inorganic material is disposed on one surface of a silicon substrate 21 serving as a semiconductor substrate, and a resin layer 23 composed of a resin is disposed on the other surface. Furthermore, a surface electrode 24 is disposed on one surface of the laminate, surrounded by the inorganic material layer 22 and exposed, and a back electrode 25 is disposed on the other surface, surrounded by the resin layer 23 and exposed. Furthermore, a through electrode 26 is provided that penetrates the silicon substrate 21 in the thickness direction and electrically connects the surface electrode 24 and the back electrode 25.

[0062] Figure 2 An example of a method for manufacturing a semiconductor chip with a resin layer according to the present disclosure is schematically shown. Figure 2 In, omitted Figure 1 The electrodes 24 , 25 , 26 and the inorganic material layer 22 are shown.

[0063] (A) The surface of the laminate 20 opposite to the resin layer 23 is bonded to the dicing tape 42 ( Figure 2 (A)).

[0064] (B) forming a protective layer 33 on the resin layer 23 ( Figure 2 (B)).

[0065] (C) Laser light L is irradiated on the protective layer 33 side to form grooves 34 penetrating the protective layer 33 and the resin layer 23 in a predetermined pattern ( Figure 2 (C)).

[0066] (D) The silicon substrate 21 is cut through the groove 34 to separate the silicon substrate 21 into individual pieces ( Figure 2 (D)).

[0067] (E) Removal of the protective layer 33A after the cutting process ( Figure 2 (E)).

[0068] As a result, the resin layer 23A is laminated on the singulated silicon substrate 21A, and the semiconductor chip 20A with a resin layer in which the unevenness of the side surface (cut surface) of the silicon substrate 21A is suppressed is manufactured.

[0069] above Figure 2 The steps shown are examples of the method for manufacturing a semiconductor chip with a resin layer according to the present disclosure, and the method is not limited thereto, and may include other steps such as a cleaning step.

[0070] Hereinafter, each step of the method for manufacturing a semiconductor chip with a resin layer of the present disclosure will be described in detail. It should be noted that in the following description, reference will sometimes be made to the drawings, but the reference numerals will be omitted as appropriate.

[0071] [Laminate preparation step]

[0072] The method for manufacturing a semiconductor chip with a resin layer disclosed herein includes a laminated body preparation step of preparing a laminated body 20 in which a semiconductor substrate 21 and a resin layer 23 are laminated.

[0073] (Semiconductor substrate)

[0074] The material of the semiconductor substrate (hereinafter sometimes simply referred to as "substrate") is not particularly limited as long as it is a commonly used material, for example, Si, InP, GaN, GaAs, InGaAs, InGaAlAs, SiC, etc.

[0075] The semiconductor substrate may also have a multilayer structure. Examples include structures in which an inorganic layer such as silicon oxide, silicon nitride, or SiCN (silicon carbonitride) is formed on the surface of a silicon substrate; structures in which an organic layer such as an organic-inorganic composite low-k layer such as polyimide resin, polybenzoxazole resin, epoxy resin, CYCLOTENE (Dow Chemical), imide-crosslinked siloxane resin, epoxy-modified siloxane, porous silica, organo-crosslinked siloxane, or Black Diamond (Applied Materials) is formed on the surface of a silicon substrate; and structures in which a composite of inorganic and organic materials is formed on a silicon substrate.

[0076] The thickness of the substrate is not particularly limited, but is independently preferably 0.5 μm to 1 mm, more preferably 1 μm to 900 μm, and even more preferably 2 μm to 900 μm.

[0077] The shape of the substrate is not particularly limited. For example, if the substrate is a silicon substrate, it can be a silicon substrate formed with an interlayer insulating layer (Low-k film), and further, fine grooves (recesses), fine through holes, etc. can be formed in the silicon substrate.

[0078] In the method for manufacturing a semiconductor chip with a resin layer disclosed herein, the surface of the semiconductor substrate in contact with the resin layer may be surface treated to improve bonding strength. The surface treatment of the semiconductor substrate may form at least one functional group selected from the group consisting of a hydroxyl group, an epoxy group, a carboxyl group, an amino group, and a mercapto group.

[0079] Examples of the surface treatment include plasma treatment, chemical treatment, and ozone treatment such as ultraviolet (UV) ozone treatment.

[0080] The hydroxyl groups can be provided on the surfaces of the substrates by subjecting the surfaces to surface treatment such as plasma treatment, chemical treatment, or ozone treatment such as UV ozone treatment.

[0081] The surface of the substrate that contacts the resin layer preferably has a hydroxyl group-containing silanol group.

[0082] The epoxy groups can be provided on the surfaces of the substrates by subjecting the surfaces to surface treatment such as silane coupling using epoxysilane.

[0083] The carboxyl groups can be provided on the surfaces of the substrates by subjecting the surfaces of the substrates to surface treatment such as silane coupling using carboxylsilane.

[0084] The amino groups can be provided on the surfaces of the substrates by subjecting the surfaces of the substrates to surface treatment such as silane coupling using aminosilane.

[0085] Mercapto groups can be provided on the surfaces of the substrates by subjecting the surfaces of the substrates to surface treatment such as silane coupling using mercaptosilane.

[0086] In addition, from the viewpoint of improving the bonding strength, a primer such as a silane coupling agent may be formed into a film on the surface of the substrate on which the resin material is applied.

[0087] (Resin layer)

[0088] The resin layer is formed by applying a resin composition containing a resin material to one surface of the semiconductor substrate and curing the formed resin composition layer.

[0089] The resin material contained in the resin composition is not particularly limited, and examples thereof include materials that form bonds or structures such as polyimide, polyamide, polyamideimide, polyparaxylene (Parylene), polyarylene ether, tetralin, octahydroanthracene, etc. through cross-linking; materials that form nitrogen-containing ring structures such as polybenzoxazole and polybenzoxazine; materials that form bonds or structures such as Si—O through cross-linking; and organic materials such as siloxane-modified compounds.

[0090] The resin materials used to form the respective resin layers may be the same or different.

[0091] Examples of the structure having a Si—O bond (siloxane bond) include structures represented by the following formulae (1) to (3).

[0092] [Chemistry 1]

[0093]

[0094] In a structure having a Si-O bond (siloxane bond), the group bonded to Si may be substituted by an alkylene group, a phenylene group, or the like. For example, a group having (-O-) x (R1) y Si-(R2)-Si(R1) y (-O-) x etc. (R1 represents a methyl group, etc., R2 represents an alkylene group, a phenylene group, etc., x and y are each independently an integer greater than 0, and x+y is 3).

[0095] Examples of materials that form Si-O bonds by crosslinking include compounds represented by the following formulae (4) and (5). Furthermore, structures represented by formulae (1) and (2) can be generated by, for example, heating the compounds represented by formulae (4) and (5) to react.

[0096] [Chemistry 2]

[0097]

[0098] For example, in the case where the resin material contains a material that forms a bond or structure of polyimide, polyamide, polyamideimide, etc. by cross-linking, it preferably contains: a compound (A) having a cationic functional group containing at least one of a primary nitrogen atom and a secondary nitrogen atom, and a weight-average molecular weight of 900,000 to 400,000; and a cross-linking agent (B) having 3 or more -C(=O)OX groups (X is a hydrogen atom or an alkyl group having 1 to 6 carbon atoms) in the molecule, 1 or more and 6 or less of the 3 or more -C(=O)OX groups are -C(=O)OH groups, and the weight-average molecular weight is 200 to 2000.

[0099] (Compound (A))

[0100] Compound (A) is a compound having a cationic functional group containing at least one of a primary nitrogen atom and a secondary nitrogen atom and having a weight average molecular weight of 90 to 400,000. The cationic functional group is not particularly limited as long as it is a functional group capable of carrying a positive charge and containing at least one of a primary nitrogen atom and a secondary nitrogen atom.

[0101] Furthermore, the compound (A) may contain a tertiary nitrogen atom in addition to the primary and secondary nitrogen atoms.

[0102] In the present disclosure, "primary nitrogen atom" refers to a nitrogen atom that is bonded only to two hydrogen atoms and one atom other than a hydrogen atom (for example, a nitrogen atom contained in a primary amino group (-NH2 group)), or a nitrogen atom (cation) that is bonded only to three hydrogen atoms and one atom other than a hydrogen atom.

[0103] In addition, a "secondary nitrogen atom" refers to a nitrogen atom bonded only to one hydrogen atom and two atoms other than hydrogen atoms (i.e., a nitrogen atom contained in the functional group represented by the following formula (a)), or a nitrogen atom bonded only to two hydrogen atoms and two atoms other than hydrogen atoms (cation).

[0104] Furthermore, a "tertiary nitrogen atom" refers to a nitrogen atom bonded only to three atoms other than hydrogen atoms (i.e., a nitrogen atom serving as a functional group represented by the following formula (b)), or a nitrogen atom bonded only to one hydrogen atom and three atoms other than hydrogen atoms (cation).

[0105] [Chemistry 3]

[0106]

[0107] In formula (a) and formula (b), * represents a bonding position to an atom other than a hydrogen atom.

[0108] Here, the functional group represented by the above formula (a) may be a secondary amino group (-NHR a Here, Ra a functional group that is a part of R

[0109] In addition, the functional group represented by the formula (b) (i.e., a tertiary nitrogen atom) can be a divalent linking group contained in the backbone of the polymer. b R c a functional group that is a part of R b and R c each independently represent an alkyl group) can be a trivalent linking group contained in the backbone of the polymer.

[0110] The weight average molecular weight of the compound (A) is 90 or more and 400,000 or less. As the compound (A), for example, an aliphatic amine, a compound having a siloxane bond (Si-O bond) and an amino group, an amine compound having a ring structure without a Si-O bond in the molecule, and the like can be given. In the case where the compound (A) is an aliphatic amine, the weight average molecular weight is preferably 10,000 or more and 200,000 or less. In the case where the compound (A) is a compound having a siloxane bond (Si-O bond) and an amino group, the weight average molecular weight is preferably 130 or more and 10,000 or less, more preferably 130 or more and 5,000 or less, and further preferably 130 or more and 2,000 or less. In the case where the compound (A) is an amine compound having a ring structure without a Si-O bond in the molecule, the weight average molecular weight is preferably 90 or more and 600 or less.

[0111] Note that, in the present disclosure, the weight average molecular weight refers to the weight average molecular weight converted by GPC (Gel Permeation Chromatography) method, except for monomers.

[0112] Specifically, the weight average molecular weight is calculated using an aqueous solution of sodium nitrate having a concentration of 0.1 mol / L as an elution solvent, using an analysis device Shodex DET RI-101 and two kinds of analysis columns (TSKgel G6000PWXL-CP and TSKgel G3000PWXL-CP manufactured by Tosoh) to detect the refractive index at a flow rate of 1.0 mL / min, using polyethylene glycol / polyethylene oxide as a standard, and using an analysis software (Empower3 manufactured by Waters).

[0113] In addition, the compound (A) can further have an anionic functional group, a nonionic functional group, and the like as needed.

[0114] The above nonionic functional group can be a hydrogen bond acceptor group or a hydrogen bond donor group. As the above nonionic functional group, for example, a hydroxyl group, a carbonyl group, an ether group (-O-), and the like can be given.

[0115] The anionic functional group is not particularly limited as long as it is a functional group capable of being negatively charged. Examples of the anionic functional group include a carboxylic acid group, a sulfonic acid group, and a sulfate group.

[0116] Examples of the compound (A) include aliphatic amines, and more specifically, polymers of alkyleneimines such as ethyleneimine, propyleneimine, butyleneimine, pentyleneimine, hexyleneimine, heptyleneimine, octyleneimine, trimethyleneimine, tetramethyleneimine, pentamethyleneimine, hexamethyleneimine, and octamethyleneimine, i.e., polyalkyleneimines; polyallylamine; and polyacrylamide.

[0117] Polyethyleneimine (PEI) can be produced by the known methods described in Japanese Patent Publication No. 43-8828, Japanese Patent Publication No. 49-33120, Japanese Patent Application Laid-Open No. 2001-213958, International Publication No. 2010 / 137711, etc. Polyalkyleneimines other than polyethyleneimine can also be produced by the same method as polyethyleneimine.

[0118] Compound (A) is also preferably a derivative of the above-mentioned polyalkyleneimine (a polyalkyleneimine derivative; particularly preferably a polyethyleneimine derivative). The polyalkyleneimine derivative is not particularly limited as long as it is a compound that can be produced using the above-mentioned polyalkyleneimine. Specifically, examples include polyalkyleneimine derivatives in which an alkyl group (preferably an alkyl group having 1 to 10 carbon atoms) or an aryl group is introduced into the polyalkyleneimine, and polyalkyleneimine derivatives in which a crosslinking group such as a hydroxyl group is introduced into the polyalkyleneimine.

[0119] These polyalkyleneimine derivatives can be produced by a commonly used method using the above-mentioned polyalkyleneimine, and specifically, can be produced according to the method described in, for example, Japanese Patent Application Laid-Open No. 6-016809.

[0120] Furthermore, the polyalkyleneimine derivative is preferably a highly branched polyalkyleneimine obtained by reacting a cationic functional group-containing monomer with polyalkyleneimine to increase the branching degree of the polyalkyleneimine.

[0121] Examples of methods for obtaining highly branched polyalkyleneimines include: a method in which a monomer containing a cationic functional group is reacted with a polyalkyleneimines having a plurality of secondary nitrogen atoms in its backbone, and at least one of the plurality of secondary nitrogen atoms is replaced with a monomer containing a cationic functional group; a method in which a monomer containing a cationic functional group is reacted with a polyalkyleneimines having a plurality of primary nitrogen atoms at its terminals, and at least one of the plurality of primary nitrogen atoms is replaced with a monomer containing a cationic functional group; and the like.

[0122] Examples of the cationic functional group introduced to increase the degree of branching include aminoethyl, aminopropyl, diaminopropyl, aminobutyl, diaminobutyl, and triaminobutyl. From the perspective of reducing the cationic functional group equivalent and increasing the cationic functional group density, the aminoethyl group is preferred.

[0123] The polyethyleneimine and its derivatives may be commercially available products. For example, polyethyleneimine and its derivatives sold by Nippon Shokubai Co., Ltd., BASF, MP Biomedicals, etc. may be appropriately selected and used.

[0124] Examples of compound (A) include, in addition to the aforementioned aliphatic amines, compounds having a Si—O bond and an amino group. Examples of compounds having a Si—O bond and an amino group include siloxane diamines, silane coupling agents having an amino group, and siloxane polymers of silane coupling agents having an amino group.

[0125] As a silane coupling agent which has an amino group, the compound represented by following formula (A-3) is mentioned, for example.

[0126] [Chemistry 4]

[0127]

[0128] In formula (A-3), R 1 represents an alkyl group having 1 to 4 carbon atoms which may be substituted. 2 and R 3 Each independently represents an alkylene group having 1 to 12 carbon atoms, an ether group or a carbonyl group which may be substituted (a carbonyl group, an ether group or the like may be contained in the skeleton). 4 and R 5 Each independently represents an optionally substituted alkylene group having 1 to 4 carbon atoms or a single bond. Ar represents a divalent or trivalent aromatic ring. 1 represents hydrogen or an optionally substituted alkyl group having 1 to 5 carbon atoms. 2 represents hydrogen, a cycloalkyl group, a heterocyclic group, an aryl group, or an alkyl group having 1 to 5 carbon atoms which may be substituted (a carbonyl group, an ether group, etc. may be included in the skeleton). 1 、R 2 、R 3 、R 4 、R 5 、X 1 Can be the same or different.

[0129] As R 1 、R 2 、R 3 、R 4 、R 5 、X 1 、X 2The substituents of the alkyl group and the alkylene group in the group are each independently amino, hydroxy, alkoxy, cyano, carboxylic acid, sulfonic acid, halogen and the like.

[0130] Examples of the divalent or trivalent aromatic ring in Ar include a divalent or trivalent benzene ring. 2 Examples of the aryl group in include phenyl, methylbenzyl, and vinylbenzyl.

[0131] Specific examples of the silane coupling agent represented by formula (A-3) include N-(2-aminoethyl)-3-aminopropylmethyldiethoxysilane, N-(2-aminoethyl)-3-aminopropyltriethoxysilane, N-(2-aminoethyl)-3-aminoisobutyldimethylmethoxysilane, N-(2-aminoethyl)-3-aminoisobutylmethyldimethoxysilane, N-(2-aminoethyl)-11-aminoundecyltrimethoxysilane, 3-aminopropyltrimethoxysilane, 3-aminopropyltriethoxysilane, N-phenyl-3-aminopropyltrimethoxysilane, (aminoethylaminoethyl)phenyltriethoxysilane, methylbenzylaminoethylaminopropyltrimethoxysilane, benzylaminoethylaminopropyltriethoxysilane, 3-ureidopropyltriethoxysilane, alkyl, (aminoethylaminoethyl)phenethyltrimethoxysilane, (aminoethylaminomethyl)phenethyltrimethoxysilane, N-[2-[3-(trimethoxysilyl)propylamino]ethyl]ethylenediamine, 3-aminopropyldiethoxymethylsilane, 3-aminopropyldimethoxymethylsilane, 3-aminopropyldimethylethoxysilane, 3-aminopropyldimethylmethoxysilane, trimethoxy[2-(2-aminoethyl)-3-aminopropyl]silane, diaminomethylmethyldiethoxysilane, methylaminomethylmethyldiethoxysilane, p-aminophenyltrimethoxysilane, N-methylaminopropyltriethoxysilane, N-methylaminopropylmethyldiethoxysilane, (phenylaminomethyl)methyldiethoxysilane, acetamidopropyltrimethoxysilane, and hydrolyzates thereof.

[0132] Examples of silane coupling agents containing an amino group other than those represented by formula (A-3) include N,N-bis[3-(trimethoxysilyl)propyl]ethylenediamine, N,N'-bis[3-(trimethoxysilyl)propyl]ethylenediamine, bis[(3-triethoxysilyl)propyl]amine, piperazinylpropylmethyldimethoxysilane, bis[3-(triethoxysilyl)propyl]urea, bis(methyldiethoxysilylpropyl)amine, 2,2-dimethoxy-1,6-diaza-2-silacyclooctane, 3,5-diamino-N-(4-(methoxydimethylsilyl)phenyl)benzamide, 3,5-diamino-N-(4-(triethoxysilyl)phenyl)benzamide, 5-(ethoxydimethylsilyl)benzene-1,3-diamine, and hydrolyzates thereof.

[0133] The above-mentioned silane coupling agent with amino group can be used alone or in combination of two or more. In addition, a silane coupling agent with amino group and a silane coupling agent without amino group can be used in combination. For example, a silane coupling agent with mercapto group can be used to improve adhesion to metal.

[0134] In addition, polymers (siloxane polymers) formed from these silane coupling agents via siloxane bonds (Si-O-Si) can also be used. For example, polymers having a linear siloxane structure, a branched siloxane structure, a cyclic siloxane structure, and a cage siloxane structure can be obtained from the hydrolyzate of 3-aminopropyltrimethoxysilane. The cage siloxane structure is represented, for example, by the following formula (A-1).

[0135] [Chemistry 5]

[0136]

[0137] Examples of the siloxane diamine include compounds represented by the following formula (A-2): In formula (A-2), i is an integer of 0 to 4, j is an integer of 1 to 3, and Me is a methyl group.

[0138] [Chemistry 6]

[0139]

[0140] Examples of the siloxane diamine include 1,3-bis(3-aminopropyl)tetramethyldisiloxane (in formula (A-2), i=0, j=1) and 1,3-bis(2-aminoethylamino)propyltetramethyldisiloxane (in formula (A-2), i=1, j=1).

[0141] As compound (A), in addition to the above-mentioned aliphatic amines and compounds having Si-O bonds and amino groups, amine compounds having a ring structure but not having a Si-O bond in the molecule can also be mentioned. Among them, preferably, an amine compound having a weight average molecular weight of 90 or more and 600 or less that does not have a Si-O bond in the molecule but has a ring structure. As amine compounds having a weight average molecular weight of 90 or more and 600 or less that do not have a Si-O bond in the molecule but have a ring structure, alicyclic amines, aromatic ring amines, heterocyclic amines, etc. can be mentioned. There can be multiple ring structures in the molecule, and the multiple ring structures can be the same or different. As the amine compound having a ring structure, a compound having an aromatic ring is more preferred because it is easy to obtain a compound that is more stable to heat.

[0142] In addition, as an amine compound having a weight-average molecular weight of 90 to 600, which does not have an Si-O bond in the molecule but has a ring structure, a compound having a primary amino group is preferred because it can easily form a thermally crosslinked structure such as an amide, amideimide, or imide with the crosslinking agent (B), thereby improving heat resistance. Furthermore, as the above-mentioned amine compound, a diamine compound having two primary amino groups, a triamine compound having three primary amino groups, etc. are preferred because it can easily increase the number of thermally crosslinked structures such as an amide, amideimide, or imide with the crosslinking agent (B), thereby further improving heat resistance.

[0143] Examples of the alicyclic amine include cyclohexylamine and dimethylaminocyclohexane.

[0144] Examples of the aromatic cyclic amine include diaminodiphenyl ether, xylenediamine (preferably p-xylenediamine), diaminobenzene, diaminotoluene, methylenedianiline, dimethyldiaminobiphenyl, bis(trifluoromethyl)diaminobiphenyl, diaminobenzophenone, diaminobenzanilide, bis(aminophenyl)fluorene, bis(aminophenoxy)benzene, bis(aminophenoxy)biphenyl, dicarboxydiaminodiphenylmethane, diaminoresorcinol, dihydroxybenzidine, diaminobenzidine, 1,3,5-triaminophenoxybenzene, 2,2'-dimethylbenzidine, tris(4-aminophenyl)amine, 2,7-diaminofluorene, 1,9-diaminofluorene, and dibenzylamine.

[0145] Examples of the heterocyclic ring of the heterocyclic amine include a heterocyclic ring containing a sulfur atom as a heteroatom (e.g., a thiophene ring), or a heterocyclic ring containing a nitrogen atom as a heteroatom (e.g., a 5-membered ring such as a pyrrole ring, a pyrrolidine ring, a pyrazole ring, an imidazole ring, and a triazole ring; a 6-membered ring such as an isocyanurate ring, a pyridine ring, a pyridazine ring, a pyrimidine ring, a pyrazine ring, a piperidine ring, a piperazine ring, and a triazine ring; and a condensed ring such as an indole ring, an indoline ring, a quinoline ring, an acridine ring, a naphthyridine ring, a quinazoline ring, a purine ring, and a quinoxaline ring).

[0146] For example, examples of the heterocyclic amine having a nitrogen-containing heterocyclic ring include melamine, ammeline, melam, melem, and tris(4-aminophenyl)amine.

[0147] Furthermore, examples of the amine compound having both a heterocyclic ring and an aromatic ring include N2,N4,N6-tris(4-aminophenyl)-1,3,5-triazine-2,4,6-triamine.

[0148] Compound (A) has a primary or secondary amino group, and therefore can firmly bond the substrates to each other through electrostatic interaction with functional groups such as hydroxyl, epoxy, carboxyl, amino, and mercapto groups that may be present on the surfaces of the first and second substrates, or by tightly forming covalent bonds with the above-mentioned functional groups.

[0149] In addition, compound (A) has a primary or secondary amino group and is therefore easily soluble in the polar solvent (D) described below. By using a compound (A) that is easily soluble in a polar solvent (D), the affinity for the hydrophilic surface of a substrate such as a silicon substrate is increased, thereby easily forming a smooth film and enabling the thickness of the resin layer to be reduced.

[0150] The compound (A) is preferably an aliphatic amine or a compound having a Si—O bond and an amino group from the viewpoint of forming a smooth thin film, and more preferably a compound having a Si—O bond and an amino group from the viewpoint of heat resistance.

[0151] When compound (A) contains a compound having a Si-O bond and an amino group, from the perspective of forming a smooth thin film, the ratio of the total number of primary nitrogen atoms and secondary nitrogen atoms in compound (A) to the number of silicon atoms (total number of primary nitrogen atoms and secondary nitrogen atoms / number of silicon atoms) is preferably greater than 0.2 and less than 5.

[0152] When compound (A) includes a compound having a Si—O bond and an amino group, from the perspective of adhesion between substrates, the non-crosslinking groups such as methyl groups bonded to Si in the compound having a Si—O bond and an amino group preferably satisfy the relationship (non-crosslinking group) / Si<2 in terms of molar ratio. It is speculated that satisfying this relationship increases the crosslink density (crosslinks between Si—O—Si bonds and amide bonds, imide bonds, etc.) of the formed film, resulting in sufficient adhesion between substrates and suppressing delamination of the substrates.

[0153] As described above, compound (A) has a cationic functional group comprising at least one of a primary nitrogen atom and a secondary nitrogen atom. Here, when compound (A) contains a primary nitrogen atom, the proportion of primary nitrogen atoms in compound (A) to all nitrogen atoms is preferably 20 mol% or more, more preferably 25 mol% or more, and even more preferably 30 mol% or more. Alternatively, compound (A) may have a cationic functional group comprising a primary nitrogen atom and excluding nitrogen atoms other than primary nitrogen atoms (e.g., secondary nitrogen atoms or tertiary nitrogen atoms).

[0154] When compound (A) contains secondary nitrogen atoms, the proportion of secondary nitrogen atoms in compound (A) to all nitrogen atoms is preferably 5 mol% to 50 mol%, more preferably 10 mol% to 45 mol%.

[0155] In addition, compound (A) may contain tertiary nitrogen atoms in addition to primary nitrogen atoms and secondary nitrogen atoms. When compound (A) contains tertiary nitrogen atoms, the proportion of tertiary nitrogen atoms in compound (A) to all nitrogen atoms is preferably from 20 mol% to 50 mol%, and more preferably from 25 mol% to 45 mol%.

[0156] In the present disclosure, the content of the component derived from compound (A) in the resin layer is not particularly limited. For example, it can be set to 1 mass % to 82 mass % relative to the entire resin layer, preferably 5 mass % to 82 mass %, and more preferably 13 mass % to 82 mass %.

[0157] (Crosslinking agent (B))

[0158] The crosslinking agent (B) is a compound having three or more -C(=O)OX groups (X is a hydrogen atom or an alkyl group having 1 to 6 carbon atoms) in the molecule, one or more but no more than six of the three or more -C(=O)OX groups (hereinafter also referred to as "COOX") are -C(=O)OH groups (hereinafter also referred to as "COOH"), and a weight-average molecular weight of 200 to 2000.

[0159] The crosslinking agent (B) is a compound having three or more -C(=O)OX groups (X is a hydrogen atom or an alkyl group having 1 to 6 carbon atoms) in the molecule, preferably a compound having three or more -C(=O)OX groups in the molecule, and more preferably a compound having three or four -C(=O)OX groups in the molecule.

[0160] In the crosslinking agent (B), X in the -C(=O)OX group may be a hydrogen atom or an alkyl group having 1 to 6 carbon atoms, with a hydrogen atom, a methyl group, an ethyl group, and a propyl group being preferred. It should be noted that X in the -C(=O)OX group may be the same or different.

[0161] The crosslinking agent (B) is a compound having one or more -C(=O)OH groups in which X is a hydrogen atom in the molecule, preferably a compound having one or more -C(=O)OH groups in which X is a hydrogen atom in the molecule, more preferably a compound having two or more -C(=O)OH groups in which X is a hydrogen atom, and further preferably a compound having two or three -C(=O)OH groups in the molecule.

[0162] The crosslinking agent (B) is a compound having a weight average molecular weight of 200 to 2000. The weight average molecular weight of the crosslinking agent (B) is preferably 200 to 1000, more preferably 200 to 600, and even more preferably 200 to 400.

[0163] The crosslinking agent (B) preferably has a ring structure in the molecule. Examples of the ring structure include alicyclic structures and aromatic ring structures. In addition, the crosslinking agent (B) may have multiple ring structures in the molecule, and the multiple ring structures may be the same or different.

[0164] Examples of the alicyclic structure include alicyclic structures having 3 to 8 carbon atoms, preferably alicyclic structures having 4 to 6 carbon atoms. The ring structure may be saturated or unsaturated. More specifically, examples of the alicyclic structure include saturated alicyclic structures such as a cyclopropane ring, a cyclobutane ring, a cyclopentane ring, a cyclohexane ring, a cycloheptane ring, and a cyclooctane ring; and unsaturated alicyclic structures such as a cyclopropene ring, a cyclobutene ring, a cyclopentene ring, a cyclohexene ring, a cycloheptene ring, and a cyclooctene ring.

[0165] The aromatic ring structure is not particularly limited as long as it is a ring structure showing aromaticity. Examples thereof include benzene-based aromatic rings such as benzene ring, naphthalene ring, anthracene ring, and perylene ring; aromatic heterocycles such as pyridine ring and thiophene ring; and non-benzene-based aromatic rings such as indene ring and azulene ring.

[0166] The ring structure possessed by the crosslinking agent (B) in the molecule is preferably at least one selected from the group consisting of a cyclobutane ring, a cyclopentane ring, a cyclohexane ring, a benzene ring and a naphthalene ring. From the perspective of further improving the heat resistance of the resin layer, at least one of a benzene ring and a naphthalene ring is more preferred.

[0167] As described above, the crosslinking agent (B) may have a plurality of ring structures in the molecule. When the ring structure is benzene, the crosslinking agent (B) may have a biphenyl structure, a benzophenone structure, a diphenyl ether structure, or the like.

[0168] The crosslinking agent (B) preferably has a fluorine atom in the molecule, more preferably has 1 or more and 6 or less fluorine atoms in the molecule, and even more preferably has 3 or more and 6 or less fluorine atoms in the molecule. For example, the crosslinking agent (B) may have a fluoroalkyl group in the molecule, specifically a trifluoroalkyl group or a hexafluoroisopropyl group.

[0169] Furthermore, examples of the crosslinking agent (B) include carboxylic acid compounds such as alicyclic carboxylic acids, benzene carboxylic acids, naphthalene carboxylic acids, diphthalic acids, and fluorinated aromatic ring carboxylic acids; and carboxylate compounds such as alicyclic carboxylic acid esters, benzene carboxylic acid esters, naphthalene carboxylic acid esters, diphthalic acid esters, and fluorinated aromatic ring carboxylic acid esters. It should be noted that the carboxylate compound is a compound having a carboxyl group (-C(=O)OH group) in the molecule, and at least one X among three or more -C(=O)OX groups is an alkyl group having 1 to 6 carbon atoms (i.e., having an ester bond). In the present disclosure, since the crosslinking agent (B) is a carboxylate compound, the aggregation caused by the association of the compound (A) and the crosslinking agent (B) is suppressed, the number of aggregates and pits is reduced, and the adjustment of the film thickness becomes easy.

[0170] The carboxylic acid compound is preferably a tetravalent or less carboxylic acid compound containing four or less -C(=O)OH groups, and more preferably a trivalent or tetravalent carboxylic acid compound containing three or four -C(=O)OH groups.

[0171] The carboxylate compound preferably contains three or less carboxyl groups (—C(═O)OH groups) and three or less ester bonds in the molecule, and more preferably contains two or less carboxyl groups and two or less ester bonds in the molecule.

[0172] In the case of the carboxylate compound, when X in three or more -C(=O)OX groups is an alkyl group having 1 to 6 carbon atoms, X is preferably a methyl group, an ethyl group, a propyl group, a butyl group, or the like. From the perspective of further suppressing aggregation caused by the association of the compound (A) and the crosslinking agent (B), an ethyl group or a propyl group is preferred.

[0173] Specific examples of the carboxylic acid compounds include, but are not limited to, alicyclic carboxylic acids such as 1,2,3,4-cyclobutanetetracarboxylic acid, 1,2,3,4-cyclopentanetetracarboxylic acid, 1,3,5-cyclohexanetricarboxylic acid, 1,2,4-cyclohexanetricarboxylic acid, 1,2,4,5-cyclohexanetetracarboxylic acid, and 1,2,3,4,5,6-cyclohexanehexacarboxylic acid; 1,2,4-benzenetricarboxylic acid, 1,3,5-benzenetricarboxylic acid, pyromellitic acid, and 3,4'-biphenyldicarboxylic acid; acid), p-phenylenebis(trimellitic acid), benzene pentacarboxylic acid, mellitic acid and other phenylcarboxylic acids; 1,4,5,8-naphthalenetetracarboxylic acid, 2,3,6,7-naphthalenetetracarboxylic acid and other naphthalenecarboxylic acids; 3,3',5,5'-tetracarboxydiphenylmethane, biphenyl-3,3',5,5'-tetracarboxylic acid, biphenyl-3,4',5-tricarboxylic acid, biphenyl-3,3',4,4'-tetracarboxylic acid, benzophenone-3,3',4,4'-tetracarboxylic acid, 4,4'-oxybis(phthalic acid) Acid, 3,4'-oxydiphthalic acid, 1,3-bis(phthalic acid)tetramethyldisiloxane, 4,4'-(ethynyl-1,2-diyl)diphthalic acid, 4,4'-(1,4-phenylenebis(oxy))diphthalic acid diphthalic acid; perylene carboxylic acids such as perylene-3,4,9,10-tetracarboxylic acid; anthracene carboxylic acids such as anthracene-2,3,6,7-tetracarboxylic acid; and fluorinated aromatic ring carboxylic acids such as 4,4'-(hexafluoroisopropylidene)diphthalic acid, 9,9-bis(trifluoromethyl)-9H-xanthene-2,3,6,7-tetracarboxylic acid and 1,4-bis(trifluoromethyl)pyromellitic acid.

[0174] Specific examples of the carboxylic acid ester compounds include compounds in which at least one carboxyl group in the specific examples of the carboxylic acid compounds is substituted with an ester group. Examples of the carboxylic acid ester compounds include half-esterified compounds represented by the following general formulas (B-1) to (B-5).

[0175] [Chemistry 7]

[0176]

[0177] R in general formulae (B-1) to (B-5) is independently an alkyl group having 1 to 6 carbon atoms, preferably a methyl group, an ethyl group, a propyl group, or a butyl group, and more preferably an ethyl group or a propyl group.

[0178] Y in the general formula (B-2) is a single bond, O, C=O or C(CF3)2.

[0179] The half-esterified compound can be produced by, for example, mixing carboxylic anhydride, which is an anhydride of the above-mentioned carboxylic acid compound, with an alcohol solvent and ring-opening the carboxylic anhydride.

[0180] In the present disclosure, the content of the component derived from the crosslinking agent (B) in the resin layer is not particularly limited. For example, the ratio of the number of carbonyl groups (-(C=O)-Y) in the substance derived from the crosslinking agent (B) to the number of all nitrogen atoms in the substance derived from the compound (A) ((-(C=O)-Y) / N) is preferably 0.1 to 3.0, more preferably 0.3 to 2.5, and further preferably 0.4 to 2.2. Here, in -(C=O)-Y, Y represents a nitrogen atom, OH or ester group crosslinked by imide or amide. By making (-(C=OY) / N 0.1 to 3.0, the resin layer appropriately has a crosslinked structure such as amide, amideimide, and imide, and the heat resistance is more excellent.

[0181] (Polar solvent (D))

[0182] The laminate preparation step may include applying a resin composition containing a resin material to at least one surface of the substrate. In this case, the resin composition containing the resin material preferably includes a polar solvent (D) along with the resin material such as the compound (A) and the crosslinking agent (B). Here, the polar solvent (D) refers to a solvent having a relative dielectric constant of 5 or greater at room temperature. Specific examples of the polar solvent (D) include protic inorganic compounds such as water and heavy water; alcohols such as methanol, ethanol, 1-propanol, 2-propanol, 1-butanol, 2-butanol, isobutanol, isopentanol, cyclohexanol, ethylene glycol, propylene glycol, 2-methoxyethanol, 2-ethoxyethanol, benzyl alcohol, diethylene glycol, triethylene glycol, and glycerol; ethers such as tetrahydrofuran and dimethoxyethane; aldehydes and ketones such as furfural, acetone, methyl ethyl ketone, and cyclohexane; acid derivatives such as acetic anhydride, ethyl acetate, butyl acetate, ethylene carbonate, propylene carbonate, formaldehyde, N-methylformamide, N,N-dimethylformamide, N-methylacetamide, N,N-dimethylacetamide, N-methyl-2-pyrrolidone, and hexamethylphosphoramide; nitriles such as acetonitrile and propionitrile; nitro compounds such as nitromethane and nitrobenzene; and sulfur compounds such as dimethyl sulfoxide. As the polar solvent (D), a protic solvent is preferably contained, water is more preferably contained, and ultrapure water is further preferably contained.

[0183] The content of the polar solvent (D) in the resin composition is not particularly limited, and is, for example, 1.0% by mass to 99.99896% by mass, and preferably 40% by mass to 99.99896% by mass, based on the entire resin composition.

[0184] The boiling point of the polar solvent (D) is preferably 150° C. or lower, more preferably 120° C. or lower, from the viewpoint of volatilizing the polar solvent (D) by heating during resin layer formation and reducing the amount of residual solvent in the resin layer.

[0185] (Additive (C))

[0186] The resin composition containing the resin material may further contain an additive (C) in addition to the above-mentioned compound (A), a crosslinking agent (B) and other resin materials, a polar solvent (D), etc. Examples of the additive (C) include an acid (C-1) having a carboxyl group and a weight-average molecular weight of 46 to 195, and a base (C-2) having a nitrogen atom and a weight-average molecular weight of 17 to 120 without a ring structure. Although the additive (C) may volatilize due to heating during the formation of the resin layer, the resin layer in the substrate laminate of the present disclosure may also contain the additive (C).

[0187] Acid (C-1) is an acid having a weight-average molecular weight of 46 or more and 195 or less having a carboxyl group. It can be speculated that by including acid (C-1) as additive (C), the amino group in compound (A) and the carboxyl group in acid (C-1) form an ionic bond, thereby suppressing the aggregation caused by the association of compound (A) and cross-linking agent (B). In more detail, it can be speculated that the interaction (for example, electrostatic interaction) between the ammonium ion from the amino group in compound (A) and the carboxyl group from the carboxyl group in acid (C-1) is stronger than the interaction between the ammonium ion from the amino group in compound (A) and the carboxyl group from the cross-linking agent (B). Therefore, aggregation can be suppressed. It should be noted that the present disclosure is not limited by the above speculation.

[0188] The acid (C-1) is not particularly limited as long as it is a compound having a carboxyl group and a weight-average molecular weight of 46 to 195, and examples thereof include monocarboxylic acid compounds, dicarboxylic acid compounds, and oxydicarboxylic acid compounds. More specifically, examples of the acid (C-1) include formic acid, acetic acid, malonic acid, oxalic acid, citric acid, benzoic acid, lactic acid, glycolic acid, glyceric acid, butyric acid, methoxyacetic acid, ethoxyacetic acid, phthalic acid, terephthalic acid, picolinic acid, salicylic acid, and 3,4,5-trihydroxybenzoic acid.

[0189] In the present disclosure, the content of the acid (C-1) in the resin composition containing the resin material is not particularly limited. For example, the ratio of the number of carboxyl groups in the acid (C-1) to the total number of nitrogen atoms in the compound (A) (COOH / N) is preferably 0.01 to 10, more preferably 0.02 to 6, and even more preferably 0.5 to 3.

[0190] Base (C-2) is a base having a nitrogen atom and a weight average molecular weight of 17 to 120. It can be inferred that the resin composition containing the resin material contains the base (C-2) as the additive (C), so that the carboxyl group in the cross-linking agent (B) and the amino group in the base (C-2) form an ionic bond, thereby suppressing the aggregation caused by the association of the compound (A) and the cross-linking agent (B). In more detail, it can be inferred that the interaction between the carboxyl group of the cross-linking agent (B) and the ammonium ion from the amino group in the base (C-2) is stronger than the interaction between the ammonium ion from the amino group in the compound (A) and the carboxyl group in the cross-linking agent (B), so aggregation can be suppressed. It should be noted that the present disclosure is not limited by the above speculation.

[0191] The base (C-2) is not particularly limited as long as it is a compound having a nitrogen atom and a weight-average molecular weight of 17 to 120, and does not have a ring structure. Examples thereof include monoamine compounds and diamine compounds. More specifically, the base (C-2) includes ammonia, ethylamine, ethanolamine, diethylamine, triethylamine, ethylenediamine, N-acetylethylenediamine, N-(2-aminoethyl)ethanolamine, and N-(2-aminoethyl)glycine.

[0192] In the present disclosure, the content of the base (C-2) in the resin composition containing the resin material is not particularly limited. For example, the ratio of the number of nitrogen atoms in the base (C-2) to the number of carboxyl groups in the cross-linking agent (B) (N / COOH) is preferably 0.5 to 5, more preferably 0.9 to 3.

[0193] When the resin layer of the substrate laminate of the present disclosure is required to have insulating properties, tetraethoxysilane, tetramethoxysilane, bis(triethoxysilyl)ethane, bis(triethoxysilyl)methane, bis(methyldiethoxysilyl)ethane, 1,1,3,3,5,5-hexaethoxy-1,3,5-trisilacyclohexane, 1,3,5,7-tetramethyl-1,3,5,7-tetrahydroxycyclosiloxane, 1,1,4,4-tetramethyl-1,4-diethoxydisilazane, 1,3,5-trimethyl-1,3,5-trimethyl-1,3,5-triethoxy-1,3,5-trisilacyclohexane may be mixed to improve the insulating properties or mechanical strength. Furthermore, methyltriethoxysilane, dimethyldiethoxysilane, trimethylethoxysilane, etc. may be mixed to improve the hydrophobicity of the insulating resin layer. These compounds may also be mixed to control the etching selectivity.

[0194] The resin composition containing the resin material may contain a solvent other than the polar solvent (D), and examples thereof include n-hexane.

[0195] Furthermore, in order to improve, for example, electrical characteristics, the resin composition containing the resin material may contain phthalic acid, benzoic acid, or the like, or derivatives thereof.

[0196] In addition, in order to suppress corrosion of copper, for example, the resin composition including the resin material may contain benzotriazole or a derivative thereof.

[0197] The pH of the resin composition containing the resin material is not particularly limited, but is preferably 2.0 or more and 12.0 or less.

[0198] When an acid (C-1) is used as the additive (C), it is preferred to mix a mixture of the acid (C-1) and the compound (A) with the crosslinking agent (B). Specifically, it is preferred to mix the compound (A) and the acid (C-1) before mixing them. This allows for the resin composition containing the resin material to be appropriately suppressed from becoming cloudy or gelling when the compound (A) and the crosslinking agent (B) are mixed (gelling may take time for the resin composition to become transparent, which is not preferred).

[0199] When a base (C-2) is used as the additive (C), it is preferred to mix a mixture of the base (C-2) and the crosslinking agent (B) with the compound (A). Specifically, it is preferred to mix the crosslinking agent (B) and the base (C-2) before mixing the compound (A) and the crosslinking agent (B). This can appropriately suppress cloudiness and gelation of the resin composition containing the resin material when the compound (A) and the crosslinking agent (B) are mixed (gelation may take time for the resin composition to become transparent, which is not preferred).

[0200] As a method for imparting a resin material to at least one surface of a substrate, for example, vapor deposition polymerization, CVD (chemical vapor deposition) method, ALD (atomic layer deposition) method and other vapor phase film forming methods, dipping method, spraying method, spin coating method, rod coating method and other coating methods can be cited. In the case of imparting a resin material by a coating method, it is preferred to impart a resin composition containing the above-mentioned resin material. For example, in the case of forming a film with a film thickness of micrometer size, it is preferred to use a rod coating method, and in the case of forming a film with a film thickness of nanometer size (several nm to hundreds of nm), it is preferred to use a spin coating method. It should be noted that the film thickness of the resin material can be appropriately adjusted according to the expected thickness of the resin layer.

[0201] For example, the method of applying the resin material by spin coating is not particularly limited. For example, a method can be used in which a resin composition containing the resin material is dropped onto the surface of the substrate while the substrate is rotated by a spin coater, and then the substrate is dried by increasing the rotation speed.

[0202] In the method of applying the resin material by spin coating, there are no particular restrictions on the conditions such as the rotation speed of the substrate, the amount and time of dripping the resin composition containing the resin material, and the rotation speed of the substrate during drying. They can be appropriately adjusted while considering the thickness of the formed resin material.

[0203] The substrate coated with the resin material may be cleaned to remove excess resin material. Examples of the cleaning method include wet cleaning using a rinse solution such as a polar solvent, and plasma cleaning.

[0204] In the disclosed method for manufacturing a semiconductor chip with a resin layer, the laminate preparation step may include a step of curing the resin material applied to one surface of the semiconductor substrate to form the resin layer. For example, the resin layer may be formed by curing the resin material by heating or the like. In this case, if the resin material comprises a thermosetting compound, curing is achieved by heating the resin material at a temperature above its curing temperature.

[0205] The resin material applied to one surface of the substrate is preferably heated at 100° C. to 450° C. to be cured.

[0206] In addition, the said temperature refers to the temperature of the surface of the resin material applied to the said surface.

[0207] By heating the resin material, the solvent in the resin composition containing the resin material is removed. In addition, the components in the resin material react to obtain a cured product, and a resin layer containing the cured product is formed.

[0208] From the viewpoint of suppressing thermal damage to devices such as semiconductor memories, the temperature is preferably 150°C to 450°C, more preferably 180°C to 400°C, further preferably 180°C to 250°C, and particularly preferably 180°C to 200°C.

[0209] The pressure when heating the resin material applied to the surface is not particularly limited, but is preferably an absolute pressure greater than 17 Pa and equal to or less than atmospheric pressure.

[0210] The absolute pressure is more preferably 1000 Pa or more and below atmospheric pressure, further preferably 5000 Pa or more and below atmospheric pressure, and particularly preferably 10000 Pa or more and below atmospheric pressure.

[0211] The resin material applied to the surface can be heated by a conventional method using a furnace or a hot plate. Examples of furnaces that can be used include SPX-1120 manufactured by APPEX and VF-1000LP manufactured by Koyo Thermo Systems.

[0212] The heating of the resin material applied to the surface may be performed in air atmosphere or in an inert gas (nitrogen, argon, helium, etc.) atmosphere.

[0213] The heating time of the resin material applied to the surface is not particularly limited, and is, for example, 3 hours or less, preferably 1 hour or less. The lower limit of the heating time is not particularly limited, and can be, for example, 5 minutes.

[0214] In order to shorten the curing time of the resin material applied to the above-mentioned surface, the resin material applied to the above-mentioned surface can be subjected to ultraviolet (UV) irradiation. As ultraviolet rays, ultraviolet light with a wavelength of 170nm to 230nm, excimer light with a wavelength of 222nm, excimer light with a wavelength of 172nm, etc. are preferably used. In addition, ultraviolet irradiation is preferably carried out under an inert gas atmosphere.

[0215] Whether the resin material has been cured can be confirmed by measuring the peak intensity of specific bonds and structures using FT-IR (Fourier Transform Infrared Spectroscopy). Examples of specific bonds and structures include those generated by a crosslinking reaction.

[0216] For example, when an amide bond, imide bond, siloxane bond, tetralin structure, oxazole ring structure, etc. are formed, it can be determined that the resin material has been cured. This can be confirmed by measuring the peak intensity derived from these bonds and structures using FT-IR.

[0217] The amide bond can be detected by the -1 and about 1520cm -1The presence of the vibration peak is confirmed.

[0218] The imide bond can be detected by the -1 and about 1720cm -1 The presence of the vibration peak is confirmed.

[0219] Siloxane bonds can pass through 1000cm -1 ~1080cm -1 The presence of the vibration peak between them is confirmed.

[0220] The structure of tetralin can be seen at 1500 cm -1 The presence of the vibration peak between them is confirmed.

[0221] The oxazole ring structure can be detected by the -1 and about 1460cm -1 The presence of the vibration peak is confirmed.

[0222] The resin layer formed by curing the resin material preferably has a siloxane bond and at least one bond selected from the group consisting of an ester bond, an ether bond, an amide bond, and an imide bond, and more preferably has a siloxane bond and an imide bond.

[0223] The resin layer formed by curing the resin material preferably contains sodium and potassium at a content of 10 ppb by mass or less, respectively, on an elemental basis. When the sodium or potassium content is 10 ppb by mass or less, respectively, on an elemental basis, it is possible to suppress the occurrence of poor electrical properties of the semiconductor device, such as transistor malfunction.

[0224] The amount of silicon on the surface of each resin layer is independently preferably 20 atomic % or less, more preferably 15 atomic % or less, and further preferably 10 atomic % or less.

[0225] The amount of silicon on the surface of the resin layer can be evaluated by atomic ratio measurement using an X-ray photoelectron spectroscopy (XPS). Specifically, the atomic ratio can be measured using the AXIS-NOVA XPS (manufactured by Kratos) instrument, based on the peak intensity of the narrow spectrum when the total amount of each element detected in the broad spectrum is set to 100%.

[0226] The thickness of the resin layer is preferably 0.001 μm to 8.0 μm, more preferably 0.01 μm to 6.0 μm, and even more preferably 0.03 μm to 5.0 μm. By setting the thickness of the resin layer to 0.001 μm or greater, the bonding strength with the inorganic material layer and other layers can be improved. By setting the thickness of the resin layer to 8.0 μm or less, when the resin layer is formed on a large substrate, the thickness variation of the resin layer can be suppressed.

[0227] When an electrode is provided on a portion of the surface of the resin layer, the thickness of the resin layer is preferably 0.01 μm to 8.0 μm, more preferably 0.03 μm to 6.0 μm, and further preferably 0.05 μm to 5.0 μm, from the perspective of improving the bonding strength with the inorganic material layer, other layers, etc. and suppressing the thickness deviation of the resin layer.

[0228] When no electrode is provided on the surface of the resin layer, the thickness of the resin layer is preferably greater than 0.001 μm and less than 1.0 μm, more preferably 0.01 μm to 0.8 μm, and further preferably 0.03 μm to 0.6 μm, from the perspective of improving the bonding strength with the inorganic material layer, other layers, etc. and suppressing the thickness deviation of the resin layer.

[0229] From the aspect of the bond strength improving with other semiconductor chips joined etc., resin layer preferably has the functional group that can form chemical bond on the surface of resin layer, more preferably have at least one functional group selected from the group consisting of silanol group (Si-OH group), amino, epoxy group(ing), hydroxyl and the functional group with unsaturated bond, from the aspect of thermotolerance, further preferably have silanol group.These functional groups can be formed by surface treatment after resin layer is formed, also can be formed by silane coupling agent processing etc..Or, also can mix the compound that comprises these functional groups in resin combination.

[0230] Examples of the functional group having an unsaturated bond include a vinyl group, an allyl group, an acryloyl group, a methacryloyl group, and a styryl group.

[0231] The resin layer is preferably a resin layer having at least one functional group selected from the group consisting of a silanol group, an amino group, an epoxy group, a hydroxyl group and a functional group having an unsaturated bond on the surface of the resin layer, or a resin layer formed by a resin material containing a siloxane bond and at least any one bond selected from the group consisting of an ester bond, an ether bond, an amide bond and an imide bond (hereinafter sometimes referred to as a "specific resin material").

[0232] Whether the surface of the resin layer has Si-OH groups can be evaluated by analyzing the surface of the resin layer using time-of-flight secondary ion mass spectrometry (TOF-SIMS). Specifically, the presence of a peak with a mass-to-charge ratio (m / z) of 45 can be used as a TOF-SIMS analyzer such as PH Inano TOFII (ULVAC-PHI Co., Ltd.).

[0233] After forming the resin layer, the resin layer may be planarized. Examples of planarization methods include fly cutting and chemical mechanical polishing (CMP). One planarization method may be used alone or in combination of two or more methods.

[0234] After forming the resin layer, the resin layer may be cleaned. Examples of cleaning methods include wet cleaning using a rinse solution and dry cleaning using plasma or the like. Examples of wet cleaning methods include ultrasonic cleaning using pure water and spin cleaning using a solvent such as NMP.

[0235] (electrode)

[0236] The laminate may include an electrode exposed from a portion of the resin layer or from a portion of both surfaces. A through hole extending from one surface of the laminate to the other surface may be provided, and an electrode (through electrode) may be provided extending through the through hole.

[0237] The material of the electrode is not particularly limited, and examples thereof include conventionally known electrode materials, etc. Specific examples thereof include copper, solder, tin, gold, silver, aluminum, indium, cobalt, and tungsten.

[0238] The method of providing electrodes on the laminate is not particularly limited, and a conventionally known method can be employed.

[0239] For example, the electrodes may be formed on the surface on which the resin material is applied before forming the resin layer of the laminate, or the electrodes may be formed on the surface on which the resin layer is formed after forming the resin layer.

[0240] In addition, the electrode can be formed on the surface where the inorganic material layer is to be formed before forming the inorganic material layer on the surface opposite to the resin layer side of the semiconductor substrate, or the electrode can be formed on the surface where the inorganic material layer is formed after forming the inorganic material layer.

[0241] The electrodes may be formed in a protruding shape on the surface of the substrate, may be formed in a state of penetrating the substrate, or may be formed in a state of being embedded in the substrate.

[0242] Furthermore, when a resin layer is formed on one surface of a substrate and an inorganic material layer is formed on the other surface, the order in which the resin layer and the inorganic material layer are formed is not particularly limited. For example, the resin layer may be formed on one surface of the substrate and then the inorganic material layer may be formed on the other surface of the substrate, or vice versa.

[0243] In the case where an electrode is formed before forming the resin layer or before forming the inorganic material layer, after forming the resin layer or the inorganic material layer, the resin layer or the inorganic material layer on the electrode is removed, thereby forming a structure in which a portion of the surface of the resin layer or the inorganic material layer has an electrode. As a method for removing the resin layer or the inorganic material layer on the electrode, fly cutting, chemical mechanical polishing (CMP), plasma dry etching, etc. can be cited. The removal method can use one method alone or two or more methods in combination. For example, in the fly cutting method, a surface planer (DFS 8910 (manufactured by DISCO Co., Ltd.)) can be used. When using CMP, as a slurry, for example, a slurry containing silicon dioxide or aluminum oxide commonly used for resin polishing, a slurry containing hydrogen peroxide and silicon dioxide used for metal polishing, etc. can be used. When using plasma dry etching, carbon fluorine plasma, oxygen plasma, etc. can also be used.

[0244] When the resin layer or inorganic material layer on the electrode is removed to expose the electrode, a reduction treatment of the oxide on the electrode surface can be performed as needed. Examples of reduction treatment methods include heating the substrate at 100°C to 300°C in an acid atmosphere such as formic acid or heating the substrate in a hydrogen atmosphere. These treatments can also be performed simultaneously with the heating step described below.

[0245] When forming electrodes after forming a resin layer or an inorganic material layer, for example, holes for forming electrodes can be formed on the surface of the substrate on which the resin layer is formed or the surface of the substrate on which the inorganic material layer is formed by a known method, and the electrodes can be formed in the formed holes. Examples of methods for forming holes include dry etching using a gas and laser ablation.

[0246] Examples of the method for forming the electrode include electroplating, chemical plating, sputtering, and inkjet methods.

[0247] If the resin material is photosensitive, holes for forming electrodes can be formed in the resin material applied to at least one surface of the substrate by photolithography. Alternatively, the electrodes can be formed in the holes after the resin material is cured to form a resin layer.

[0248] [Lamination process]

[0249] The method for manufacturing a semiconductor chip with a resin layer disclosed herein includes a laminating step ( 42 ) of laminating the laminate 20 with the dicing tape 42 in such a manner that the resin layer 23 is exposed. Figure 2 (A)).

[0250] As the dicing tape 42, for example, a dicing tape 42 having an adhesive layer whose adhesive strength is reduced by irradiation with ultraviolet rays (UV) is provided on one surface of a resin film can be used. Figure 2 As shown, a dicing tape is preferably fixed to one surface of a frame 44 having an opening larger than the stacked body 20 .

[0251] [Protective Layer Formation Step]

[0252] The method for manufacturing a semiconductor chip with a resin layer disclosed herein includes a protective layer forming step of forming a protective layer 33 on the resin layer 23 of the laminate 20 .

[0253] The protective layer 33 is not particularly limited as long as it can protect the resin layer 23 during the dicing process and can be selectively removed after the dicing process. Examples include water-soluble resins, developers containing TMAH (tetramethylammonium hydroxide), and photoresists that can be cleaned with organic solvents such as NMP (N-methyl-2-pyrrolidone). Hogomax from Disco Corporation can be used as a water-soluble resin.

[0254] The method for forming the protective layer 33 on the resin layer 23 is not particularly limited. For example, a method of spin-coating a composition for forming the protective layer 33 on the resin layer 23 and then curing the composition by drying, heating, or the like can be mentioned.

[0255] The thickness of the protective layer 33 is, for example, in the range of 0.1 μm to 1 mm.

[0256] [Groove Forming Process]

[0257] The method for manufacturing a semiconductor chip with a resin layer disclosed herein includes a groove forming step ( 10 ) of forming a groove 34 penetrating the protective layer 33 and the resin layer 23 by laser ablation. Figure 2 (B)).

[0258] For example, laser light L is irradiated from the protective layer 33 side to form a groove (opening) 34 penetrating the protective layer 33 and the resin layer 23. Specifically, through laser ablation, portions of the protective layer 33 and the resin layer 23 are heated to a high temperature and evaporated, forming the groove 34 and exposing a portion of the semiconductor substrate 21. The groove 34 can be formed in a predetermined pattern depending on the size and shape of the semiconductor chip with the resin layer being manufactured.

[0259] [Cutting process]

[0260] The method for manufacturing a semiconductor chip with a resin layer disclosed herein includes a dicing step ( dicing step 21 ) in which the semiconductor substrate 21 is cut through the grooves 34 to separate the semiconductor substrate 21 into individual pieces. Figure 2 (D)).

[0261] As the cutting method, a cutting method using laser is preferred, and specific examples thereof include plasma cutting, laser full-cut cutting, and stealth cutting.

[0262] Plasma cutting is a method of forming a mask on a semiconductor substrate and performing dry etching under vacuum through the mask to monolithicize the silicon substrate. For example, the Bosch process can be applied. Specifically, by repeatedly performing the three steps of isotropic etching of Si, accumulation of a protective film, and anisotropic etching of Si (removal of the bottom protective film), the exposed portion of the silicon substrate 21 exposed from the groove 34 can be deeply dug in the depth direction. For example, SF6 is used in etching and C4F8 is used in the protective film. For example, after forming the groove 34 on the protective layer 33 and the resin layer 23 by laser ablation processing, the laminate is arranged in a processing chamber of a plasma processing device (not shown) in a state of being attached to a cutting tape 42, and the above three steps are repeated from the protective layer 33A side to perform plasma cutting. The remaining portion of the protective layer 33 and the resin layer 23 functions as a mask when plasma etching is performed on the exposed portion of the semiconductor substrate 21 in the plasma cutting process. Since the protective layer 33A is provided on the resin layer 23A, the resin layer 23A can be prevented from being damaged by plasma etching.

[0263] Laser full-cut cutting is a method of fully cutting a semiconductor substrate by irradiating the surface of the semiconductor substrate with a laser beam once or multiple times, cutting into the dicing tape. Laser full-cut cutting produces finer machining marks than blade dicing and can reduce burrs.

[0264] Stealth dicing is a method in which laser light of a wavelength that is transparent to a semiconductor substrate to be processed is focused inside the semiconductor substrate to form a modified layer, which is then expanded (stretched) to separate the layers.

[0265] In the silicon substrate 21 , since the protective layer 33A is provided on the resin layer 23A, the resin layer 23A can be prevented from being damaged by cutting regardless of any of the above-mentioned cutting methods using laser light.

[0266] [Protective layer removal process]

[0267] The method for manufacturing a semiconductor chip with a resin layer disclosed in the present invention includes a protective layer removal step ( Figure 2 (E)).

[0268] The method for removing protective layer 33A is not particularly limited, as long as the protective layer 33A is removed and the resin layer 23A remains on the silicon substrate 21A without being removed. The method for removing protective layer 33A can be selected based on the materials of protective layer 33A and resin layer 23A. For example, if protective layer 33A is formed of a water-soluble resin, washing with water can easily remove only protective layer 33A.

[0269] In addition, when the protective layer 33A is not a water-soluble resin, it is removed by ashing, chemical cleaning, or the like.

[0270] The method for manufacturing a semiconductor chip with a resin layer of the present disclosure may include a step of cleaning the semiconductor chip 20A with a resin layer after the dicing step in order to remove particles and the like.

[0271] The cleaning method is not particularly limited, and examples thereof include wet cleaning using solvents such as alkaline cleaning solutions, acidic cleaning solutions, cleaning solutions containing hydrofluoric acid, and solutions containing permanganic acid (desmear solutions), wet cleaning using pure water, etc., and dry cleaning using UV ozone, plasma, etc.

[0272] The cleaning step may be performed together with the protective layer removal step.

[0273] <Method for Manufacturing Substrate Laminate>

[0274] The semiconductor chip with a resin layer manufactured by the method for manufacturing a semiconductor chip with a resin layer disclosed herein can be stacked and bonded onto another semiconductor substrate or another semiconductor chip to manufacture a substrate stack.

[0275] That is, the manufacturing method of the substrate stack disclosed in the present invention includes: a stacking process, in which the semiconductor chip manufactured by the manufacturing method of the semiconductor chip disclosed in the present invention is peeled off from the cutting tape, and stacked on the above-mentioned other semiconductor substrate or the above-mentioned other semiconductor chip in a manner such that the resin layer of the above-mentioned semiconductor chip with a resin layer contacts the other semiconductor substrate or the above-mentioned other semiconductor chip; and a heating process, in which the above-mentioned stacked semiconductor chip with a resin layer is heated and joined to the above-mentioned other semiconductor substrate or the above-mentioned other semiconductor chip.

[0276] Furthermore, the method for producing a substrate laminate of the present disclosure may include other steps such as a temporary fixing step of temporarily fixing the stacked semiconductor chips with resin layers and a cleaning step after the stacking step and before the heating step.

[0277] Figure 3 The lamination step and heating step included in an example of the method for producing a substrate laminate of the present disclosure are schematically shown.

[0278] [Lamination process]

[0279] The method for manufacturing a substrate laminate of the present disclosure includes the following lamination step: peeling the semiconductor chip 20A with a resin layer manufactured by the method for manufacturing a semiconductor chip with a resin layer of the present disclosure from the dicing tape 42, and laminating the semiconductor chip 20A with a resin layer on another semiconductor substrate or another semiconductor chip 10A in such a manner that the resin layer 23A of the semiconductor chip 20A with a resin layer contacts the other semiconductor substrate or another semiconductor chip 10A ( Figure 3 (F)).

[0280] The semiconductor chip 20A with a resin layer manufactured by the method for manufacturing a semiconductor chip with a resin layer of the present disclosure (sometimes referred to as "semiconductor chip 20A" in the present disclosure) is picked up from the dicing tape 42 by a processing device (not shown) and is stacked in such a manner that the electrodes 25 exposed from the resin layer 23A of the semiconductor chip 20A contact the corresponding electrodes 14 of other semiconductor chips 10A. Figure 3 In the stacked semiconductor chip 20A, another semiconductor chip 10A has a structure in which an inorganic material layer 12A made of SiO 2 is stacked on a silicon substrate 11A, and an electrode 14 is exposed from the inorganic material layer 12A.

[0281] When the inorganic material layer and the resin layer are brought into contact during the lamination process, the curing rate of the resin layer before contact is preferably 70% or more and 100% or less. This tends to ensure that the semiconductor chips 10A and 20A are firmly bonded to each other during the temporary fixing process and the heating process described later, and that positional misalignment (misalignment) of the bond is less likely to occur.

[0282] The curing rate of the resin layer is more preferably 80% or more, further preferably 85% or more, particularly preferably 90% or more, and further preferably 93% or more. In addition, the curing rate of the resin layer may be 100%, 99% or less, 95% or less, or 90% or less.

[0283] The curing rate of the resin layer may be a curing rate before the resin layer comes into contact with other layers (eg, an inorganic material layer).

[0284] The curing rate of a resin layer containing at least one selected from the group consisting of an amide bond, an imide bond, a siloxane bond, a tetralin structure, an oxazole ring structure, an ester bond, and an ether bond is more preferably 80% or higher, further preferably 85% or higher, particularly preferably 90% or higher, and even more preferably 93% or higher. The curing rate of a resin layer containing at least one selected from the group consisting of a siloxane bond and an ester bond, an ether bond, an amide bond, and an imide bond is more preferably 80% or higher, further preferably 85% or higher, particularly preferably 90% or higher, and even more preferably 93% or higher.

[0285] The cure rate of a resin layer formed by curing a resin material can be confirmed by measuring the peak intensity of specific bonds and structures (the sum of the peak intensities in the case of multiple peaks, such as those of imides and amides) using FT-IR (Fourier transform infrared spectroscopy) before applying the resin material to the substrate, before the resin layer is brought into contact with the inorganic material layer in the lamination process, and after the heating process, and calculating the rate of increase or decrease in the peak intensity. It should be noted that in the case of band-like peaks that are difficult to separate, such as siloxane bonds, the maximum peak intensity can be used.

[0286] Specifically, when a specific bond and structure are generated by the curing reaction, the increase rate of the peak intensity can be calculated by the following formula, and the calculated value can be used as the curing rate of the resin layer.

[0287] Peak intensity increase rate (curing rate of the resin layer) = [(peak intensity of the specific bond and structure of the resin layer before the resin layer and the inorganic material layer are brought into contact in the lamination process) / (peak intensity of the specific bond and structure of the resin layer after heating at 300°C for 1 hour in the heating process)] × 100

[0288] It should be noted that background signal removal can be performed by a conventional method. In addition, FT-IR measurement can be performed by a transmission method or a reflection method as needed.

[0289] Regarding the increase rate of the peak intensity, when there are a plurality of bonds or structures causing an increase in the peak intensity, the peak intensity may be replaced with the total intensity of the plurality of peak intensities.

[0290] Before the resin layer and the inorganic material layer are brought into contact in the lamination process, the complex elastic modulus of the resin layer at 23°C is preferably from 0.1 GPa to 20 GPa, and more preferably from 0.1 GPa to 10 GPa. Thus, voids formed when the resin layer and the inorganic material layer are brought into contact in the lamination process are absorbed by the resin layer during the heating process, thereby tending to suppress the generation of voids.

[0291] From the perspective of appropriately suppressing the generation of voids, the composite elastic modulus of the resin layer at 23°C is preferably 8 GPa or less, more preferably 6 GPa or less. Furthermore, from the perspective of appropriately suppressing misalignment, the composite elastic modulus of the resin layer at 23°C is preferably 0.1 GPa or more, more preferably 1 GPa or more.

[0292] The preferred range of the complex elastic modulus of the resin layer at 23° C. is the same as the preferred range of the complex elastic modulus of the resin layer at 23° C. The complex elastic modulus of the resin layer at 23° C. may be the complex elastic modulus at 23° C. before contact with other layers (e.g., other inorganic material layers).

[0293] The complex elastic modulus of the resin layer at 23° C. can be measured by the method described below.

[0294] A resin composition containing a resin material was prepared, spin-coated on a silicon substrate, and then heated at 400°C for 10 minutes to prepare a measurement sample. The prepared measurement sample was measured using a nanoindenter (trade name TI-950 Tribo Indenter, manufactured by Hysitron, Berkovich-type indenter) at a test depth of 20 nm. The unloading-displacement curve at 23°C was measured, and the complex elastic modulus at 23°C was calculated from the maximum load and maximum displacement according to the calculation method in the reference document (Handbook of Micro / nanoTribology (2nd Edition), edited by Bharat Bhushan, CRC Press).

[0295] It should be noted that the complex elastic modulus is defined by the following formula (1). In formula (1), E r Represents the composite elastic modulus, E i The Young's modulus of the indenter is 1140 GPa, ν i The Poisson's ratio of the pressure head is 0.07, E s and ν s represent the Young's modulus and Poisson's ratio of the sample, respectively.

[0296] [Number 1]

[0297]

[0298] Before the inorganic material layer and the resin layer are brought into contact in the lamination process, the surface roughness (Ra) of the inorganic material layer is preferably 0.01 nm to 1.2 nm, more preferably 0.1 nm to 1.0 nm. This facilitates temporary fixing of the inorganic material layer and the resin layer at low temperatures, as described later.

[0299] The preferred range of the surface roughness (Ra) of the resin layer is the same as the preferred range of the surface roughness (Ra) of the inorganic material layer.

[0300] The surface roughness (Ra) of each layer may be the surface roughness (Ra) before contacting each other.

[0301] The surface roughness of each layer can be evaluated by morphological observation using a scanning probe microscope (SPM). Specifically, the surface roughness is determined by measuring a 3 μm x 3 μm square area using a SPA400 SPM (manufactured by Hitachi High-Technologies Corporation) in dynamic force microscopy mode.

[0302] The method for producing a substrate laminate of the present disclosure may include the following various steps before the above-mentioned lamination step. The following various steps are preferably performed after the laminate preparation step and before the lamination step.

[0303] The manufacturing method of the substrate laminate disclosed herein may include a step of performing a surface activation treatment on the resin layer 23A before the lamination step. By performing the surface activation treatment, the bonding strength between the inorganic material layer and the resin layer can be improved. In particular, when electrodes are provided on the bonding surfaces of the semiconductor chip 10A and the semiconductor chip 20A and the electrodes are bonded to each other, it is preferred to perform the surface activation treatment from the perspective of promoting the diffusion of metals such as copper contained in the electrodes and improving the bonding strength between the electrodes, and from the perspective of reducing the heating temperature during metal diffusion.

[0304] Furthermore, the inorganic material layer 12A in the semiconductor chip 10A may be subjected to a surface activation treatment. In particular, the inorganic material layer may be subjected to a surface activation treatment before it comes into contact with other layers (eg, a resin layer).

[0305] Specific examples of the surface activation treatment include plasma treatment and FAB (Fast Atom Bombardment) treatment.

[0306] [Temporary fixing process]

[0307] The method for manufacturing a substrate stacked body of the present disclosure may include a temporary fixing step of temporarily fixing the stacked semiconductor chips 10A and 20A at a first temperature.

[0308] The semiconductor chip 10A and the semiconductor chip 20A are temporarily bonded together at a first temperature, for example, a low temperature of at least room temperature (e.g., 23°C) and less than 100°C. Preferably, the bonding is performed at a low temperature of at least room temperature and no more than 50°C, and more preferably at room temperature. In particular, if the resin layer is formed of the aforementioned specific resin material, temporary bonding can be performed even at room temperature.

[0309] When the semiconductor substrates 11A and 21A are made of silicon substrates, the surface energy of the bonding interface between the semiconductor chips 10A and 20A in a state where they are temporarily fixed is preferably 0.05 J / m 2 in view of ease of handling during the heating process, suppression of misalignment (bonding position shift), and suppression of foreign matter contamination. 2 More than 0.1 J / m 2 More than, more preferably 0.15 J / m 2 above.

[0310] The surface energy (bonding strength) of the above-mentioned bonding interface can be obtained by a blade insertion test according to the method of the non-patent document "MP Maszara, G. Goetz, A. Cavigila and JB Mckitterick, Journal of Applied Physics, 64 (1988) 4943-4950." A blade with a thickness of 0.1mm to 0.3mm is inserted into the bonding interface of a temporarily fixed semiconductor chip. Using an infrared light source and an infrared camera, the distance the semiconductor chip peels off from the blade tip is measured. Then, the surface energy can be obtained based on the following formula.

[0311] γ=3×10 9 ×t b 2 ×E 2 ×t 6 / (32×L 4 ×E×t 3 )

[0312] Where γ represents the surface energy (J / m 2 ), t b represents the blade thickness (m), E represents the Young's modulus of the silicon substrate included in the semiconductor substrate (GPa), t represents the thickness of the semiconductor substrate (m), and L represents the distance (m) that the semiconductor chip is peeled off from the blade tip.

[0313] [Heating process]

[0314] The method for manufacturing a substrate laminate of the present disclosure includes a heating step ( 10A ) of heating and bonding the stacked semiconductor chip 20A with a resin layer to another semiconductor substrate or another semiconductor chip 10A. Figure 3 (G)).

[0315] After the lamination step, the aforementioned temporary fixing step may be performed as needed, and further heating may be performed to bond the semiconductor chips 10A and 20A to each other, thereby manufacturing the substrate laminate 100 .

[0316] The heating step is performed at a second temperature higher than the first temperature in the temporary fixing step, for example, 100° C. or higher. The heating step yields the substrate laminate 100 in which the semiconductor chips 10A and 20A are bonded via the inorganic material layer 12A and the resin layer 23A.

[0317] The pressure when the semiconductor chip 10A and the semiconductor chip 20A are bonded is not particularly limited, but preferably the absolute pressure is greater than 10 -4 Pa and is below atmospheric pressure.

[0318] The above absolute pressure is more preferably 10-3 It is preferably 100 Pa or more and atmospheric pressure or less, more preferably 100 Pa or more and atmospheric pressure or less, and particularly preferably 1000 Pa or more and atmospheric pressure or less.

[0319] The semiconductor chip 10A and the semiconductor chip 20A may be bonded together in air or in an inert gas (nitrogen, argon, helium, etc.) atmosphere.

[0320] In the heating step, the temporarily fixed semiconductor chip 10A and the semiconductor chip 20A are preferably heated at 100° C. to 450° C. in a state where the inorganic material layer 12A and the resin layer 23A are in contact with each other.

[0321] It should be noted that the above-mentioned heating temperature refers to the temperature of the surface of the semiconductor chip 20A.

[0322] The heating temperature is preferably 100°C to 400°C, more preferably 130°C to 350°C, more preferably 150°C to 300°C, further preferably 150°C to 250°C, particularly preferably 150°C to 200°C.

[0323] When the electrodes 14 provided on the inorganic material layer 12A side are arranged so as to contact the electrode 25 provided on the resin layer 23A side during the lamination process, the temperature is preferably 130° C. or higher, more preferably 150° C. or higher, and even more preferably 200° C. or higher. This allows components (e.g., copper) contained in the electrode provided on the inorganic material layer side and the electrode provided on the resin layer side to diffuse, and there is a tendency for the bonding strength between the electrodes to increase.

[0324] The heating in the heating step can be performed by a conventional method using a furnace or a hot plate.

[0325] The heating in the heating step may be performed in air atmosphere or in an inert gas (nitrogen, argon, helium, etc.) atmosphere.

[0326] The heating time in the heating step is not particularly limited, and is, for example, 3 hours or less, preferably 1 hour or less. The lower limit of the heating time is not particularly limited, and can be, for example, 5 minutes.

[0327] In the heating step, the semiconductor chips 10A and 20A may be pressed while the inorganic material layer and the resin layer are in contact with each other to improve the bonding strength between the semiconductor chips 10A and 20A. Pressing and heating may be performed simultaneously.

[0328] The pressure applied to the temporarily fixed semiconductor chips 10A and 20A is not particularly limited, but is preferably 0.1 MPa to 10 MPa, more preferably 0.1 MPa to 5 MPa. For example, a pressurizing device such as TEST MINI PRESS manufactured by Toyo Seiki Co., Ltd. can be used.

[0329] It should be noted that, for example, when the contact surfaces of two stacked semiconductor chips are formed of inorganic material layers such as SiO2, if foreign matter such as particles exists on the bonding surface, gaps caused by the foreign matter are likely to cause bonding defects.

[0330] On the other hand, if the semiconductor chip 20A is manufactured by the method for manufacturing a semiconductor chip with a resin layer disclosed in the present invention, unevenness (vertical streaks) on the side surface (cut surface) of the silicon substrate 21A can be suppressed, and the generation of particles during handling can be suppressed. Figure 3 As shown, even if foreign matter 35 such as particles exists on the bonding surface 36 of the two semiconductor chips 10A and 20A, the resin layer 23A of the semiconductor chip 20A follows the foreign matter 35 , and bonding defects due to gaps caused by the foreign matter 35 are unlikely to occur.

[0331] It should be noted that if the resin layers are bonded together, positional deviation occurs due to resin flow during bonding, which easily leads to poor bonding between electrodes. However, if the inorganic material layer 12A and the resin layer 23A are bonded together, positional deviation can be suppressed.

[0332] In the method for producing a substrate stack of the present disclosure, the surface of the substrate stack may be subjected to thinning processing (back grinding or back grinding) as needed after the heating step.

[0333] Furthermore, the method for manufacturing a substrate stack of the present disclosure may include, after the heating step, the step of providing through-holes in the thickness direction of the semiconductor chips 10A and 20A, and forming electrodes in the through-holes that penetrate the semiconductor chips 10A and 20A. If the substrate stack obtained in the heating step does not have electrodes formed therein, it is preferable to perform the step of forming such electrodes so that electrodes penetrating the semiconductor chips 10A and 20A are formed in the through-holes.

[0334] For example, a through hole penetrating the semiconductor chip 10A and the semiconductor chip 20A may be formed by a known method, and an electrode may be formed in the formed hole. Examples of hole forming methods include dry etching using gas and laser ablation.

[0335] Examples of a method for forming the electrode that penetrates the semiconductor chip 10A and the semiconductor chip 20A include electroplating, chemical plating, sputtering, and an inkjet method.

[0336] The material of the electrode penetrating the semiconductor chip 10A and the semiconductor chip 20A is not particularly limited, and conventionally known electrode materials can be used, and specific examples include copper, solder, tin, gold, silver, aluminum, indium, cobalt, and tungsten.

[0337] In the manufacturing method of the substrate stack disclosed in the present invention, after the temporary fixing process of the semiconductor chip 10A and the semiconductor chip 20A and before the heating process, the process of further stacking other semiconductor chips (not shown) on the semiconductor chip 20A and temporarily fixing them can be repeated to stack the semiconductor chips.

[0338] Preferably, the resin layer is formed of a specific resin material, such as Figure 8 As shown, a substrate laminate 200 can be manufactured by stacking three layers of semiconductor chips 20A, 20B, and 20C with resin layers, each manufactured by the method for manufacturing a semiconductor chip with a resin layer disclosed herein, between inorganic material layers 12 and 12A and resin layer 23A. This can suppress particle generation during handling of each of the semiconductor chips 20A, 20B, and 20C and contamination at the bonding surface, and can produce a substrate laminate 200 in which multiple layers of semiconductor chips 20A, 20B, and 20C are bonded together in a single heating step. Consequently, damage to each of the laminates caused by heating can be suppressed, and manufacturing costs associated with the heating step can be kept low.

[0339] It should be noted that the semiconductor chips 20A, 20B, and 20C with resin layers bonded to each other may have the same configuration or different configurations.

[0340] Example

[0341] The following describes an embodiment of the method for manufacturing a semiconductor chip with a resin layer disclosed herein. It should be noted that the following embodiment is a conditional example employed to verify the feasibility and effectiveness of the method for manufacturing a semiconductor chip with a resin layer disclosed herein. Therefore, the method for manufacturing a semiconductor chip with a resin layer disclosed herein is not limited to the following embodiment.

[0342] [Example 1]

[0343] <Manufacturing of Silicon Substrates with Resin Layers>

[0344] A resin layer having a thickness of 1 μm was formed on one surface of a silicon substrate having a diameter of 200 mm and a thickness of 200 μm by the following method to produce a silicon substrate with a resin layer.

[0345] Preparation of the composition for forming a resin layer

[0346] A composition for forming a resin layer was prepared. Details are shown below.

[0347] 3-aminopropyl diethoxymethyl silane (3APDES) was prepared as a silane compound (A) and symmetric oxybisphthalic acid ethyl ester half-ester (ODPAehe) was prepared as a cross-linking agent (B).

[0348] ODPAehe was prepared by adding symmetric oxybisphthalic anhydride (ODPA) in ethanol, heating to reflux for 4 hours until a transparent liquid was obtained. Further, it was confirmed by proton NMR that ester groups were formed in the prepared ODPAehe. Removal of ethanol was performed using an evaporator, and the concentration of the half-ester compound was concentrated to a 70 to 75% liquid, which was used as the cross-linking agent (B).

[0349] Silane compound (A) 25 g was added dropwise to water 25 g, dissolved in a manner of 50 mass%, and left to stand at room temperature overnight. Then, it was confirmed by proton NMR spectrum that the ethoxysilane had been hydrolyzed. Further, cross-linking agent (B) was added after the addition of silane compound (A) in a manner of 1 / 1 of the molar ratio of (A) / (B), and stirred at room temperature overnight, whereby a composition for forming a resin layer was prepared.

[0350] Formation of a resin layer

[0351] As a substrate on which the prepared composition was to be coated, a silicon substrate (silicon wafer) of 8 inches in diameter was prepared. After the silicon wafer was subjected to UV (ultraviolet) ozone treatment for 5 minutes, the silicon wafer was placed on a spin coater, and about 5 mL of the composition whose concentration was adjusted was added dropwise to the silicon wafer. Next, the silicon wafer was held for 13 seconds, and then dried by being rotated at 2000 rpm (rpm is rotational speed) for 1 second, at 600 rpm for 30 seconds, and at 2000 rpm for 10 seconds. After being left to stand overnight, further heating at 200°C for 1 hour in an inert oven was performed, whereby a resin layer of 1 μm in thickness after curing was obtained.

[0352] Formation of a protective layer

[0353] Hogomax (Disco Corporation) as a composition for forming a protective layer was spin-coated (1500 rpm) on the resin layer, and dried, whereby a protective layer of 5 μm in thickness was formed.

[0354] Groove formation

[0355] After bonding the surface of the silicon substrate opposite to the surface in contact with the resin layer to a dicing tape (D-628, manufactured by Lintec Co., Ltd.), a laser is irradiated from the protective layer side to penetrate the protective layer and the resin layer, forming grooves with a width of approximately 55 μm at intervals of 7.3 mm in the vertical and horizontal directions.

[0356] Plasma etching

[0357] Using a plasma etching device, SF6 gas and C4F8 gas are used to perform plasma etching from the protective layer side, and plasma etching is performed on a portion of the silicon substrate through the groove. This separates the silicon substrate into chips.

[0358] <Removal of protective layer>

[0359] After plasma etching, the protective layer is removed by washing with water.

[0360] Next, ultraviolet rays are irradiated on the surface of the dicing tape opposite to the surface bonded to the silicon substrate, so that the semiconductor chip with the resin layer is peeled from the dicing tape.

[0361] Through the above steps, the semiconductor chip 1 with a resin layer is manufactured, in which the resin layer is arranged on the singulated silicon substrate.

[0362] [Comparative Example 1]

[0363] A SiO2 layer with a thickness of 1 μm was formed on one surface of a silicon substrate with a diameter of 200 mm and a thickness of 200 μm by CVD (chemical vapor deposition) using TEOS (tetraethoxysilane) as a raw material, thereby manufacturing a silicon substrate with a SiO2 layer.

[0364] <Formation of protective layer>

[0365] Hogomax (Disco) was spin-coated as a protective layer-forming composition on the SiO 2 layer and dried to form a protective layer having a thickness of 5 μm.

[0366] Groove Formation

[0367] After bonding the surface of the silicon substrate opposite to the surface in contact with the resin layer to a dicing tape (D-628, manufactured by Lintec Co., Ltd.), laser is irradiated from the protective layer side to penetrate the protective layer and the SiO2 layer, forming grooves with a width of about 55 μm at intervals of 7.3 mm in the vertical and horizontal directions.

[0368] Plasma etching

[0369] Plasma etching was performed from the protective layer side using a plasma etching apparatus under the same conditions as in Example 1, and a portion of the silicon substrate was plasma-etched through the grooves, thereby dividing the silicon substrate into chips.

[0370] <Removal of protective layer>

[0371] After plasma etching, the protective layer is removed by washing with water.

[0372] Next, ultraviolet rays are irradiated on the surface of the dicing tape opposite to the surface bonded with the silicon substrate, thereby peeling the semiconductor chip from the dicing tape.

[0373] Through the above steps, the semiconductor chip 2 with the SiO 2 layer is manufactured, in which the SiO 2 layer is arranged on the silicon substrate.

[0374] [evaluate]

[0375] For each semiconductor chip manufactured in Example 1 and Comparative Example 1, the end of the silicon substrate was observed at 1500 times magnification using an optical microscope, with the surface cut by plasma etching observed from the resin layer or SiO 2 layer, that is, from above.

[0376] Figure 4 This is an optical microscope image of the edge of the silicon substrate in the semiconductor chip 1 with a resin layer manufactured in Example 1 observed from the resin layer surface. Figure 5 This is an optical microscope image of the end of the silicon substrate in the semiconductor chip 2 with the SiO2 layer manufactured in Comparative Example 1, observed from the SiO2 layer. It can be seen that the side surface of the silicon substrate in the semiconductor chip 1 with the resin layer has less unevenness and is smoother than the side surface of the silicon substrate in the semiconductor chip 2 with the SiO2 layer manufactured in Comparative Example 1.

[0377] Figure 6 This is a SEM photograph of the edge of the silicon substrate in the semiconductor chip 1 with a resin layer manufactured in Example 1, viewed from obliquely above. Figure 7 This is an SEM photograph of the end of the silicon substrate in the semiconductor chip 2 with the SiO2 layer manufactured in Comparative Example 1, observed from an oblique angle above. In Example 1, within the field of view of the SEM photograph, only one convex portion (protrusion) with a height of 1 to 2 μm was observed at the end, and the formation of unevenness at the end was suppressed, resulting in a smooth shape. In Comparative Example 1, within the field of view of the SEM photograph, approximately 10 convex portions (protrusions) with a height of 5 to 10 μm were observed at the end (the portion surrounded by the dotted line), indicating that the formation of unevenness at the end was not suppressed.

[0378] The disclosure of Japanese Patent Application No. 2023-025618 filed on February 21, 2023 is incorporated into this specification by reference in its entirety.

[0379] All documents, patent applications, and technical standards described in this specification are incorporated herein by reference to the same extent as if each document, patent application, and technical standard were specifically and individually indicated to be incorporated by reference.

[0380] Description of Reference Numerals

[0381] 10Semiconductor substrate

[0382] 10A semiconductor chip

[0383] 11A Silicon substrate

[0384] 12.12A inorganic material layer

[0385] 14 electrodes

[0386] 20 laminated body

[0387] 20A, 20B, 20C Semiconductor chip with resin layer

[0388] 21. Semiconductor substrate (silicon substrate)

[0389] 22 Inorganic material layer

[0390] 23, 23A resin layer

[0391] Electrodes 24, 25, and 26

[0392] 33, 33A protective layer

[0393] 34 slots (opening)

[0394] 35 Foreign matter

[0395] 36 Joint surface

[0396] 42 cutting belt

[0397] 44 Frame

[0398] L Laser

[0399] P plasma.

Claims

1. A method for manufacturing a semiconductor chip with a resin layer, comprising: a laminate preparation step of preparing a laminate including a semiconductor substrate and a resin layer laminated on the semiconductor substrate; a laminating step of laminating the laminate to a dicing tape in such a manner that the resin layer is exposed; a protective layer forming step of forming a protective layer on the resin layer of the laminate; a groove forming step of forming a groove penetrating the protective layer and the resin layer by laser ablation; a dicing step of singulating the semiconductor substrate through the grooves; and The protective layer removal step is to remove the protective layer after the cutting step. 2 . The method for manufacturing a semiconductor chip with a resin layer according to claim 1 , wherein the laminate includes an electrode exposed from a portion of the resin layer. 3 . The method for manufacturing a semiconductor chip with a resin layer according to claim 1 , wherein the surface of the resin layer has at least one functional group selected from the group consisting of a silanol group, an amino group, an epoxy group, a hydroxyl group, and a functional group having an unsaturated bond. 4 . The method for manufacturing a semiconductor chip with a resin layer according to claim 1 , wherein the resin layer is a resin layer including a siloxane bond and at least one bond selected from the group consisting of an ester bond, an ether bond, an amide bond, and an imide bond. 5 . The method for manufacturing a semiconductor chip with a resin layer according to claim 1 , wherein the protective layer is a water-soluble resin layer formed of a water-soluble resin. 6 . The method for manufacturing a semiconductor chip with a resin layer according to claim 1 , wherein the laminate is a laminate in which an inorganic material layer is laminated on a side of the semiconductor substrate opposite to a side on which the resin layer is laminated.

7. The method for manufacturing a semiconductor chip with a resin layer according to claim 1, wherein in the dicing step, the protective layer and the resin layer having the grooves formed therein are used as masks to perform plasma etching on a portion of the semiconductor substrate through the grooves, thereby singulating the semiconductor substrate.

8. A method for manufacturing a substrate laminate, comprising: a lamination step of peeling the semiconductor chip with a resin layer manufactured by the method for manufacturing a semiconductor chip with a resin layer according to any one of claims 1 to 7 from the dicing tape and laminating the semiconductor chip with a resin layer on another semiconductor substrate or another semiconductor chip in such a manner that the resin layer of the semiconductor chip with a resin layer contacts the other semiconductor substrate or the other semiconductor chip; as well as The heating step heats and bonds the stacked semiconductor chip with the resin layer to the other semiconductor substrate or the other semiconductor chip.

9. The method for manufacturing a substrate laminate according to claim 8, The other semiconductor substrate or the other semiconductor chip comprises an inorganic material layer, In the lamination step, the lamination is performed so that the resin layer of the semiconductor chip with a resin layer is in contact with the other semiconductor substrate or the inorganic material layer of the other semiconductor chip.

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