Method for manufacturing semiconductor device and dicing tape

Abstract

The present invention relates, as an example, to a hybrid bonding process in a CoW (Chip On Water: Chip-to-Water) process. In this method, the semiconductor wafer (100) is attached to a dicing tape (DCT) such that an insulating film (102) and a terminal electrode (103) of the semiconductor wafer (100) on the singulated side face the dicing tape (DCT). Then, the semiconductor wafer (100) is singulated by dicing in a state in which the surface of the terminal electrode (103) and the like is protected by the dicing tape (DCT). Consequently, foreign matter (dust) generated during singulation in the CoW is prevented from adhering to the surface of the insulating film (102b) or the terminal electrode (103) of the singulated semiconductor chip (10), thereby improving the yield of hybrid bonding. This method can be applied to a case where the insulating film (102) of the semiconductor wafer (100) is an organic material or an insulating material.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device and a dicing tape for the method of manufacturing the semiconductor device. Background Technology

[0002] In recent years, three-dimensional mounting has been studied to improve the integration density of LSIs. An example of three-dimensional mounting of a semiconductor chip is disclosed in Non-Patent Literature 1.

[0003] Previous technical documents

[0004] Non-patent literature

[0005] Non-patent literature 1: FCChen et al., “System on Integrated Chips (SoIC™) for 3D Heterogeneous Integration”, 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), pp. 594-599 (2019) Summary of the Invention

[0006] The technical problem to be solved by the invention

[0007] A hybrid bonding technique is known that, in the case of three-dimensional mounting of semiconductor chips, the insulating films of two devices are smoothed and directly bonded to achieve fine bonding of the wiring between the devices. This hybrid bonding technique can utilize either a WoW (Wafer-to-Wafer) method, where semiconductor wafers are bonded together and then monolithically assembled, or a CoW (Chip-to-Wafer) method, where semiconductor chips obtained by dicing one semiconductor wafer are bonded to another semiconductor wafer (and then monolithically assembled as needed). In the CoW method, bonding is performed after sorting out good semiconductor chips, which improves yield and increases design freedom, such as mounting dissimilar or multiple semiconductor chips in a single semiconductor device. On the other hand, in the CoW method, since a semiconductor wafer is monolithically assembled by dicing before bonding, foreign matter generated during dicing may adhere to the bonding surface of the semiconductor chips, hindering bonding.

[0008] The purpose of this invention is to provide a method for manufacturing a semiconductor device that can prevent poor bonding of semiconductor chips and a dicing tape for the manufacturing method.

[0009] means for solving technical problems

[0010] [1] This invention relates, in one aspect, to a method for manufacturing a semiconductor device. The method includes the following steps: preparing a first semiconductor substrate having a first substrate body, a first insulating film disposed on one side of the first substrate body, and a plurality of first electrodes; preparing a dicing tape; attaching the first semiconductor substrate to the dicing tape; and monolithically processing the first semiconductor substrate to obtain a plurality of semiconductor chips, each having an insulating film portion corresponding to the first insulating film and at least one of the plurality of first electrodes. In the attachment step described above, the first semiconductor substrate is attached to the dicing tape such that the first insulating film and the plurality of first electrodes face the dicing tape.

[0011] In this manufacturing method, a first semiconductor substrate is attached to a dicing tape with the first insulating film and a plurality of first electrodes facing the tape, and then monolithized in this state. At this time, the first semiconductor substrate is monolithized while the surfaces of the first insulating film and the plurality of first electrodes are protected by the dicing tape. Therefore, foreign matter generated during dicing will not adhere to the insulating film portion and the surface of the first electrodes in the monolithized semiconductor chip. Thus, poor bonding of the semiconductor chip caused by foreign matter can be prevented.

[0012] [2] In the semiconductor device manufacturing method described in [1] above, the adhesion force of the dicing tape to the first semiconductor substrate is preferably 1.0 N / 25 mm or more. In this case, it is possible to prevent the semiconductor chip from flying out when the first semiconductor substrate is monolithically assembled.

[0013] [3] In the semiconductor device manufacturing method described in [1] or [2] above, the adhesion force of the dicing tape to the first insulating film is preferably less than the adhesion force of the first insulating film to the first substrate body. In this case, it is possible to prevent the insulating film portion corresponding to the first insulating film from peeling off from the substrate portion corresponding to the first substrate body when picking up the monolithized semiconductor chip by means of a die bonder or the like.

[0014] [4] In the method for manufacturing a semiconductor device described in any one of [1] to [3] above, the adhesion force of the dicing tape to the first insulating film can be less than the stress when picking up any one of the plurality of semiconductor chips. In this case, the semiconductor chip can be easily picked up from the dicing tape when picking up the monolithized semiconductor chip by means of a die bonder or the like.

[0015] [5] In the method for manufacturing a semiconductor device according to any one of [1] to [4] above, the adhesion force of the dicing tape to foreign matter is preferably greater than the adhesion force of the first insulating film to foreign matter. In this case, even if foreign matter is assumed to be mixed between the first semiconductor substrate or semiconductor chip and the dicing tape, the foreign matter can be left on the dicing tape side when picking up the semiconductor chip from the dicing tape. Thus, according to this manufacturing method, poor bonding of the semiconductor chip can be further prevented.

[0016] [6] In the method for manufacturing a semiconductor device according to any one of [1] to [5] above, the adhesion force of the dicing tape to the first semiconductor substrate is preferably greater than the dicing stress when the first semiconductor substrate is monolithically diced. In this case, it is possible to prevent the semiconductor chip from scattering when the first semiconductor substrate is monolithically diced by dicing. In addition, the "dicing stress" mentioned here refers to the stress acting in the direction of peeling from the dicing tape among the stresses acting on the first semiconductor substrate or semiconductor chip, such as friction with the dicing blade, vibration, and water flow of the rinsing water, when the first semiconductor substrate is diced by the dicing machine (Dicer).

[0017] [7] In any of the semiconductor device manufacturing methods described in [1] to [6] above, the manufacturing method may further include, after the monolithization step, a step of cleaning the surface of at least one of the insulating film portions of the plurality of semiconductor chips and the surface of the first electrode using plasma treatment. In this case, contaminants on the surface of the semiconductor chips can be removed by cleaning using plasma treatment, for example, organic foreign matter can be burned off to prevent poor bonding of the semiconductor chips. Furthermore, as the plasma treatment used herein, oxygen plasma can be used, for example, but is not limited to this.

[0018] [8] In the method for manufacturing a semiconductor device according to any one of [1] to [7] above, the method may further include a step of removing a plurality of semiconductor chips from a dicing tape after the monolithization step. In the step of removing the plurality of semiconductor chips, the plurality of semiconductor chips may be picked up in a manner that contacts the substrate portion monolithized in the first substrate body. At this time, the semiconductor chips can be bonded using a device such as a die bonder, and the manufacturing method of the present invention can be easily applied to existing manufacturing processes.

[0019] [9] In the method for manufacturing a semiconductor device according to any one of [1] to [8] above, the method may further include the following steps: preparing a second semiconductor substrate, the second semiconductor substrate having a second substrate body and a second insulating film disposed on one side of the second substrate body and a plurality of second electrodes; aligning the first electrode of at least one of the plurality of semiconductor chips with any one of the plurality of second electrodes; bonding the insulating film portion of the semiconductor chip to the second insulating film of the second semiconductor substrate; and bonding the first electrode of the semiconductor chip to the second electrode of the second semiconductor substrate. At this time, the monolithically formed semiconductor chip can be reliably bonded to the second semiconductor substrate.

[0020]

[10] In any of the semiconductor device manufacturing methods described in [1] to [9] above, during the process of monolithically assembling the first semiconductor substrate, positioning can be performed by cutting from the main body side of the first substrate. In this semiconductor device manufacturing method, the surface of the first semiconductor substrate faces the cutting strip, making it difficult to align the cutting position. Therefore, by positioning by cutting from the back side, it is possible to more accurately monolithically assemble the semiconductor chip. As such a positioning method, for example, methods such as using an infrared camera (IR camera) or X-rays to detect the position of the first electrode or the like by electromagnetic waves or ultrasonic waves that pass through the substrate, or providing through holes or vias on the first semiconductor substrate and using them as alignment marks for positioning, can be used. However, it is not limited to these methods, and positioning can also be performed by other methods.

[0021]

[11] In the method for manufacturing a semiconductor device according to any one of [1] to

[10] above, the dicing tape may be configured to prevent oxidation of the surfaces of the plurality of first electrodes of the first semiconductor substrate. In this case, it is possible to suppress the formation of an oxide film on the electrode surface due to oxidation of the first electrodes during the period from the state of the first semiconductor substrate to its monolithization into a semiconductor chip, thereby hindering electrode bonding. Furthermore, it is possible to perform methods such as removing the oxide film of the plurality of first electrodes at the same time while the first semiconductor substrate is in the state before monolithization, thereby improving manufacturing efficiency.

[0022]

[12] In the method for manufacturing a semiconductor device according to any one of [1] to

[11] above, the method may further include a step of removing the oxide film on the surface of the first electrode of the semiconductor chip before the step of bonding the first electrode of the semiconductor chip to other electrodes (the second electrode). This prevents poor bonding between the first electrode and other electrodes. Similarly, the oxide film on the surface of the second electrode can also be removed. This also achieves the same effect.

[0023]

[13] In the method for manufacturing a semiconductor device described in any one of [1] to

[12] above, the first insulating film of the first semiconductor substrate may contain an organic material. In this case, by using an organic material, which is relatively soft, foreign matter (debris) adhering to the surface of the semiconductor chip or the second semiconductor substrate can be absorbed (embedded) into the insulating film portion formed by the organic material, thereby further reducing poor connection of the semiconductor chip. That is, according to this manufacturing method, foreign matter adhering to the surface of the semiconductor chip, etc., can be embedded in the insulating film of the organic material to render it harmless. Furthermore, the second insulating film of the second semiconductor substrate may be formed by containing an organic material. In this case, the same effect can also be achieved.

[0024]

[14] In the semiconductor device manufacturing method described in

[13] above, when the first insulating film contains an organic material, the organic material contained in the first insulating film may include polyimide, polyimide precursor, polyamide-imide, benzocyclobutene (BCB), polybenzoxazole (PBO), or PBO precursor. Since these materials are liquid or soluble in solvents, the first insulating film can be easily fabricated, for example, by spin coating, and a thin film can be easily formed. Furthermore, these materials have high heat resistance, so they can withstand the high temperatures when bonding the semiconductor chip to the second semiconductor substrate, thereby enabling more reliable bonding between the substrates. In addition, the second insulating film of the second semiconductor substrate may be formed by containing the aforementioned organic material. In this case, the same effect can also be achieved.

[0025]

[15] In any of the semiconductor device manufacturing methods described in [1] to

[14] above, the first insulating film of the first semiconductor substrate may contain an inorganic material. This allows for the fabrication of semiconductor devices with finer structures. Furthermore, since the inorganic materials readily bond together, the adhesion strength between the insulating films is improved, thereby enhancing the connection reliability of the semiconductor device. Additionally, the second insulating film of the second semiconductor substrate may be formed by containing an inorganic material. This also provides the same benefits.

[0026]

[16] As another aspect, the present invention relates to a dicing strip. The dicing strip is a dicing strip used in the manufacturing method of the semiconductor device described in any one of [1] to

[15] above. In this case, similarly to the above, in the hybrid bonding method, it is possible to prevent poor bonding of the semiconductor chip caused by foreign matter.

[0027] Invention Effects

[0028] According to the present invention, poor bonding of semiconductor chips can be reduced during the manufacture of semiconductor devices. Attached Figure Description

[0029] Figure 1This is a cross-sectional view schematically illustrating an example of a semiconductor device (CoW) manufactured by a semiconductor device manufacturing method according to an embodiment of the present invention.

[0030] Figure 2 These are sequentially indicated as being used for manufacturing. Figure 1 A diagram illustrating a method using a semiconductor device.

[0031] Figure 3 It is a schematic representation Figure 2 A diagram illustrating the dicing method in the manufacturing process of a semiconductor device.

[0032] Figure 4 It is a more detailed expression Figure 2 A diagram illustrating the bonding method in the manufacturing process of the semiconductor device.

[0033] Figure 5 It is a detailed description Figure 4 A diagram of the joining portion in the joining method shown.

[0034] exist Figure 6 middle, Figure 6 (a) is a diagram showing the bonding state between the diced tape and the semiconductor chip (first semiconductor substrate). Figure 6 (b) is a diagram schematically illustrating a method for picking up a monolithically sized semiconductor chip from a dicing tape. Detailed Implementation

[0035] Hereinafter, some embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, the same or equivalent parts are labeled with the same symbols, and repeated descriptions are omitted. Furthermore, unless otherwise specified, positional relationships such as up, down, left, and right are based on the positional relationships shown in the accompanying drawings. When terms such as "left," "right," "front," "back," "up," "down," "above," and "below" are used in the description and claims of this specification, these are for illustrative purposes only and do not necessarily imply that the objects are always in those relative positions. Moreover, the scale of the accompanying drawings is not limited to the scale shown in the drawings.

[0036] In this specification, the term "layer," when viewed in a top view, includes not only structures with shapes formed across the entire surface but also structures with shapes formed locally. Furthermore, the term "process" in this specification includes not only independent processes but also processes that cannot be clearly distinguished from others, as long as the desired effect of the process is achieved. The numerical range indicated by "~" represents the range encompassed by the values ​​described before and after the "~", respectively, as the minimum and maximum values.

[0037] (Structure of a semiconductor device)

[0038] Figure 1 This is a cross-sectional view schematically illustrating an example of a semiconductor device manufactured by the manufacturing method according to this embodiment. Figure 1 As shown, the semiconductor device 1 is, for example, an example of a semiconductor package. The semiconductor device 1 includes a plurality of semiconductor chips 10 and a semiconductor substrate 20, and has a Chip-on-Wafer (CoW) structure. The plurality of semiconductor chips 10 are fabricated by dicing the first semiconductor substrate 100 (described later). The plurality of semiconductor chips 10 are mounted on the semiconductor substrate 20 to form a three-dimensional mounting structure. The semiconductor substrate 20 can be, for example, a substrate on which multiple semiconductor chips, such as LSI (Large Scale Integrated Circuit) chips or CMOS (Complementary Metal Oxide Semiconductor) sensors, are formed at locations corresponding to each semiconductor chip 10. Each semiconductor chip 10 can be, for example, an LSI or a memory chip. The plurality of semiconductor chips 10 and the semiconductor substrate 20 are coupled together (described later), with their respective terminal electrodes and surrounding insulating films firmly and finely bonded to each other without positional displacement. The semiconductor device 1 can be further monolithically divided into individual semiconductor devices, each individual semiconductor device having... Figure 1 The structure shown is further monolithically divided into a semiconductor chip 10 and a substrate portion that is part of a semiconductor substrate 20 corresponding to the semiconductor chip 10.

[0039] (Semiconductor device manufacturing method)

[0040] Next, refer to Figures 2-5 The manufacturing method of semiconductor device 1 will be described. Figure 2 These are sequentially indicated as being used for manufacturing. Figure 1 A diagram illustrating a method using a semiconductor device. Figure 3 It is a schematic representation Figure 2 A diagram illustrating the dicing method in the manufacturing process of a semiconductor device. Figure 4 and Figure 5 It is a more detailed expression Figure 2 A diagram illustrating the bonding method in the manufacturing process of the semiconductor device.

[0041] Semiconductor device 1 can be manufactured, for example, through the following processes (a) to (h).

[0042] Step (a) Prepare a first semiconductor substrate 100, which is a semiconductor substrate corresponding to a plurality of semiconductor chips 10, and has a first substrate body 101, a first insulating film 102 and a plurality of first electrodes 103.

[0043] Step (b) prepares a second semiconductor substrate 200, the second semiconductor substrate 200 having a second substrate body 201, a second insulating film 202 and a plurality of second electrodes 203.

[0044] In step (c), the first insulating film 102 of the first semiconductor substrate 100 and the first electrode 103 are polished together.

[0045] In step (d), the second insulating film 202 of the second semiconductor substrate 200 is polished together with the second electrode 203.

[0046] In step (e), the first semiconductor substrate 100 is monolithized, and a plurality of semiconductor chips 10 are obtained, each having an insulating film portion 102b corresponding to the first insulating film 102 and a first electrode 103.

[0047] In step (f), the first electrode 103 of each of the plurality of semiconductor chips 10 is aligned with the second electrode 203 of the second semiconductor substrate 200.

[0048] In step (g), each insulating film portion 102b of the plurality of semiconductor chips 10 is bonded to the second insulating film 202 of the second semiconductor substrate 200.

[0049] In process (h), the first electrode 103 of each of the plurality of semiconductor chips 10 is bonded to the second electrode 203 of the second semiconductor substrate 200.

[0050] [Process (a) and Process (b)]

[0051] Step (a) is a step of preparing a first semiconductor substrate 100, which is a silicon substrate corresponding to a plurality of semiconductor chips 10 and having an integrated circuit formed thereon consisting of semiconductor elements and wiring connecting them. Figure 2 As shown in (a), in process (a), a plurality of first electrodes 103 formed of copper or aluminum are disposed at predetermined intervals on one side 101a of the first substrate body 101 formed of silicon or the like, and a first insulating film 102 formed of inorganic or organic material is disposed. The first electrodes 103 are terminal electrodes for exposing integrated circuits or the like formed on the first semiconductor substrate 100 to the outside through the first insulating film 102. The plurality of first electrodes 103 can be disposed after the first insulating film 102 is disposed on one side 101a of the first substrate body 101, or the first insulating film 102 can be disposed after the plurality of first electrodes 103 are disposed on one side 101a of the first substrate body 101.

[0052] Step (b) is the step of preparing a second semiconductor substrate 200, which is a silicon substrate on which an integrated circuit composed of semiconductor elements and wiring connecting them is formed. Figure 2 As shown in (a), in process (b), a plurality of second electrodes 203 formed of copper or aluminum are disposed at predetermined intervals on one side 201a of the second substrate body 201 formed of silicon or the like, and a second insulating film 202 formed of inorganic or organic material is disposed. The second electrodes 203 are terminal electrodes for exposing integrated circuits or the like formed on the second semiconductor substrate 200 to the outside through the second insulating film 202. The plurality of second electrodes 203 can be disposed after the second insulating film 202 is disposed on one side 201a of the second substrate body 201, or the second insulating film 202 can be disposed after the plurality of second electrodes 203 are disposed on one side 201a of the second substrate body 201.

[0053] The first insulating film 102 and the second insulating film 202 used in steps (a) and (b) can be composed of inorganic or organic materials. Inorganic materials used in the insulating films include, for example, silicon oxide (SiO2). Using inorganic materials such as silicon oxide in the insulating films allows for the fabrication of semiconductor devices with finer structures. Furthermore, when the insulating films are bonded together in the subsequent step (g), the bonding strength between the inorganic materials is easily and firmly established, thereby improving the adhesion strength between the semiconductor substrates and enhancing the connection reliability of the semiconductor device.

[0054] The organic materials used in the insulating film are, for example, polyimide, polyimide precursors (e.g., polyimide amide ester or polyamic acid), polyamide-imide, benzocyclobutene (BCB), polybenzoxazole (PBO), or PBO precursors. These organic materials, for example, have an elastic modulus lower than that of inorganic materials such as silicon dioxide (SiO2), making them flexible materials. By using such organic materials, when bonding the insulating films together in the subsequent step (g), even if fine foreign matter (debris) is present on the insulating film, it will be absorbed into the insulating film, preventing poor bonding caused by foreign matter, thereby enabling reliable bonding of the insulating films together. For example, when the thickness of the insulating film is 4 μm, foreign matter with a diameter or width of 4 μm can be embedded in the organic insulating film. Furthermore, the elastic modulus of the organic materials constituting the first insulating film 102 and the second insulating film 202 can be, for example, 7.0 GPa or less, 5.0 GPa or less, 3.0 GPa or less, 2.0 GPa or less, or 1.5 GPa or less. The elastic modulus referred to here is Young's modulus. Moreover, the coefficient of thermal expansion of the organic materials constituting the first insulating film 102 and the second insulating film 202 is preferably 70 ppm / K or less, and more preferably 50 ppm / K or less.

[0055] Furthermore, since the organic materials used in the insulating films are liquid or soluble in solvents, each insulating film can be easily formed into a thin film by spin coating or similar methods. Moreover, because these organic materials are heat-resistant, they can withstand the temperatures (e.g., high temperatures above 300°C) during the subsequent step (h) of joining the first electrode 103 and the second electrode 203, thereby preventing the bonding between the insulating films from deteriorating due to high temperatures. Additionally, as the organic materials constituting the first insulating film 102 and the second insulating film 202, photosensitive resins, thermosetting non-conductive films (NCFs), or thermosetting resins can be used. This organic material can be an underfill material. Furthermore, the first insulating film 102 and the second insulating film 202 can be insulating films containing both inorganic and organic materials, or one insulating film can be formed from an inorganic material and the other from an organic material.

[0056] The thickness of the first insulating film 102 can be 20 μm or less. By making the thickness of the first insulating film 102 sufficiently thin, the wiring formed by the first electrode 103 can be made into a finer structure. For example, the minimum dimension (electrode width) of the first electrode 103 formed in the first insulating film 102 is defined by the thickness of the first insulating film 102 and the aspect ratio of the photosensitive material used. When the aspect ratio of the photosensitive material is, for example, 1:1 (aperture width: depth), the thickness of the first insulating film 102 is 20 μm or less, thereby allowing the electrode width of the first electrode 103 to be set to 20 μm or less. Alternatively, the thickness of the first insulating film 102 can be thicker than 20 μm. In this case, in the later step (g), when bonding the insulating films together, more foreign matter can be embedded in the resin-made first insulating film 102, thereby enabling a more reliable bonding of the insulating films together. Furthermore, any resin insulating layer can be used to alleviate the stress when bonding the insulating films together, thereby improving the adhesion between the insulating films.

[0057] Furthermore, the thickness of the first insulating film 102 can be 4 μm or more. In this case, by embedding minute foreign objects into the resin insulating film, even assuming the presence of minor foreign object residue, a good connection between the first insulating film 102 and the second insulating film 202 can be achieved. For example, the size of the foreign object that can be embedded in the first insulating film 102 is determined by the thickness of the resin-made first insulating film 102. When the thickness of the first insulating film 102 is, for example, 4 μm, foreign objects with a diameter or width of 4 μm can be embedded within it. That is, according to this manufacturing method, even if there are debris smaller than the thickness of the first insulating film 102, a good connection between the first insulating film 102 and the second insulating film 202 can be achieved by embedding the debris into the resin insulating film. Similarly to the first insulating film 102, the thickness of the second insulating film 202 can be 20 μm or less, thicker than 20 μm, or 4 μm or more. The second insulating film 202 can be used to embed debris as described above.

[0058] [Process (c) and Process (d)]

[0059] Step (c) is a process of polishing the first semiconductor substrate 100. In step (c), the surface of the first insulating film 102 on which the first electrode 103 is provided is polished using CMP (Chemical Mechanical Polishing). In step (c), for example, the first semiconductor substrate 100 can be polished using CMP under the condition that the first electrode 103 formed of copper or the like is selectively and deeply polished (see reference). Figure 5(a) Alternatively, CMP polishing can be used to make each surface of the first electrode 103 conform to the surface of the first insulating film 102. This polishing sets the average roughness of the surface of the first insulating film 102 to below 1 nm, enabling hybrid bonding as described later. Furthermore, this polishing also removes debris from the surface of the first semiconductor substrate 100.

[0060] Step (d) is a process of polishing the second semiconductor substrate 200. In step (d), the surface of the second insulating film 202 on which the second electrode 203 is provided is polished using the CMP method. In step (d), for example, the second semiconductor substrate 200 can be polished using the CMP method while selectively and deeply polishing the second electrode 203 formed of copper or the like, or the CMP method can be used to make each surface of the second electrode 203 consistent with the surface of the second insulating film 202. Through this polishing, similar to the first insulating film 102, the average surface roughness of the second insulating film 202 is set to 1 nm or less. In addition, this polishing can also remove debris from the surface of the second semiconductor substrate 200.

[0061] In steps (c) and (d), polishing can be performed in a manner that makes the thickness of the first insulating film 102 the same as the thickness of the second insulating film 202, or polishing can be performed in a manner that makes the thickness of the first insulating film 102 thicker than the thickness of the second insulating film 202. On the other hand, polishing can also be performed in a manner that makes the thickness of the first insulating film 102 thinner than the thickness of the second insulating film 202. When the thickness of the first insulating film 102 is thicker than the thickness of the second insulating film 202 and it is formed of an organic material, most of the debris that adheres to the bonding interface during the monolithic formation of the semiconductor chip 10 or during chip mounting can be embedded in the first insulating film 102, thereby reducing bonding defects. On the other hand, when the thickness of the first insulating film 102 is thinner than the thickness of the second insulating film 202, the height of the mounted semiconductor chip 10, i.e., the semiconductor device 1, can be reduced.

[0062] [Process (e)]

[0063] Step (e) is the process of monolithizing the first semiconductor substrate 100 to obtain multiple semiconductor chips 10. For example... Figure 3 (a) and Figure 3 As shown in (b), in step (e), the first semiconductor substrate 100 is attached to the dicing tape DCT with the first insulating film 102 and the plurality of first electrodes 103 facing the dicing tape DCT. Then, as... Figure 3 (b) and Figure 3As shown in (c), multiple semiconductor chips 10 are monolithically formed from the first substrate body 101 toward the first insulating film 102 using a cutting method such as a cutting blade D (cutting machine). During this monolithization, the surfaces of the first insulating film 102 and the first electrode 103, which are the electrode surfaces of the first semiconductor substrate 100, are attached to the cutting tape DCT and thus protected. Through process (e), the first substrate body 101 and the first insulating film 102 of the first semiconductor substrate 100 are as follows... Figure 2 As shown in (b), the substrate is divided into a substrate portion 101b and an insulating film portion 102b corresponding to each semiconductor chip 10. As a method for monolithically cutting the first semiconductor substrate 100, a cutting machine equipped with a cutting blade D is preferably used, but stealth cutting or laser cutting can also be used. In step (e), the electrode surfaces are attached with the cutting strip DCT side facing towards it, so surface protection material is not required.

[0064] The cutting tape (DCT) used in process (e) can be of various types, but it can be configured to have a substrate layer and a pressure-sensitive adhesive layer disposed on the substrate layer. Examples of substrate layers include polytetrafluoroethylene (PTFE) films, polyethylene terephthalate (PET) films, polyethylene films, polypropylene films, polymethylpentene films, polyimide films, and other plastic films. These substrate layers can also undergo surface treatments such as primer coating, UV treatment, corona discharge treatment, polishing, and etching, as needed.

[0065] The pressure-sensitive adhesive layer of the dicing tape is a layer formed of pressure-sensitive adhesive. There are no particular limitations on the type of dicing tape that can be used, provided that the pressure-sensitive adhesive has sufficient adhesive strength to prevent the semiconductor element from scattering during dicing and low adhesive strength to prevent damage to the semiconductor chip 10 during subsequent pick-up processes. The pressure-sensitive adhesive can also be either non-radio-cured or radio-cured. Non-radio-cured pressure-sensitive adhesives exhibit constant adhesive strength under short-term pressure and do not have the property of decreasing adhesive strength upon exposure to radiation (e.g., ultraviolet light). On the other hand, radio-cured pressure-sensitive adhesives have the property of decreasing adhesive strength upon exposure to radiation (e.g., ultraviolet light). For example, a radio-cured pressure-sensitive adhesive can be an ultraviolet-cured pressure-sensitive adhesive. In addition, from the perspective of economy and membrane processability, the thickness of the cut strip DCT (substrate layer and pressure-sensitive adhesive layer) can be 60-150 μm or 70-130 μm.

[0066] As the cutting tape DCT used in process (e), a tape having the adhesive properties described below can be used. For example, the cutting tape DCT can be configured such that the adhesion force of the cutting tape DCT to the first insulating film 102 is 1.0 N / 25 mm or more (see reference). Figure 6(a) This prevents the semiconductor chip 10 from scattering when the first semiconductor substrate 100 is monolithically assembled. Furthermore, the adhesion force described herein (hereinafter the same as applicable) refers to the 90° peel strength measured at a temperature of 23°C, a peel angle of 90°, and a peel speed of 5 mm / s.

[0067] The dicing tape DCT can be configured such that the adhesion force of the dicing tape DCT to the first insulating film 102 is less than the adhesion force of the first insulating film 102 to the first substrate body 101 (reference). Figure 6 (a) and Figure 6 (b) Therefore, when picking up the monolithized semiconductor chip 10 using a die bonder P, it is possible to prevent the insulating film portion 102b corresponding to the first insulating film 102 from peeling off from the substrate portion 101b corresponding to the first substrate body 101. Furthermore, the dicing tape DCT can be configured such that the adhesion force of the dicing tape DCT to the first insulating film 102 is less than the stress during the picking up of the semiconductor chip 10 in the later process (see reference). Figure 6 (b) Therefore, when picking up the monolithized semiconductor chip 10 by means of a die bonder P, it is easy to pick up the semiconductor chip 10 from the dicing tape DCT.

[0068] The dicing tape (DCT) can be configured such that the adhesion force of the dicing tape to foreign matter (debris) is greater than the adhesion force of the first insulating film 102 to foreign matter. In this case, even if foreign matter is mixed between the first semiconductor substrate 100 or the semiconductor chip 10 and the dicing tape (DCT), the foreign matter can be left on the dicing tape (DCT) side when picking up the semiconductor chip 10 from the dicing tape (DCT). As a result, poor bonding of the semiconductor chip 10 can be further prevented. In addition, the foreign matter mentioned here is, for example, the chips generated during dicing, which are made of metals such as silicon, silicon oxide of the oxide film, or copper of the wiring portion, and have a size of 0.1 μm to 10 μm. Regarding the adhesion force to such foreign matter, various methods can be used, such as measurement based on intake airflow, measurement based on centrifugal separation, or measurement based on surface vibration (for example, refer to "Basic Concepts of Fluid Physical Cleaning (1) and Adhesion Force of Particles", Toshiyuki Sanada et al., THE CHEMICAL TIMES 2015 No.2 (Total No. 236)). Alternatively, the adhesion strength of the tape to the foreign object can be determined by the following method: First, the foreign object is brought into contact with the first insulating film 102, and an evaluation cutting tape DCT is attached to it. Then, the cutting tape DCT is peeled off, and it is determined whether the foreign object has been transferred onto the tape. The magnitude of the adhesion strength can also be evaluated using this method.

[0069] The dicing tape DCT can be configured such that the adhesion force of the dicing tape DCT to the first semiconductor substrate 100 is greater than the cutting stress exerted by the dicing blade D during the monolithization of the first semiconductor substrate 100. This prevents the semiconductor chip 10 from scattering during the monolithization of the first semiconductor substrate 100 by cutting. Furthermore, the "cutting stress" mentioned here refers to the stress acting in the direction of peeling from the dicing tape DCT, among the stresses acting on the first semiconductor substrate 100 or the semiconductor chip 10 during cutting by the dicing machine, such as friction with the dicing blade, vibration, and the flow of cleaning water.

[0070] In process (e), the monolithized semiconductor chip 10 can be cleaned after the monolithization process is completed by cutting. Furthermore, as... Figure 3 As shown in (d), the semiconductor chip 10 can be reattached to another dicing strip DCT by reversing the surface and back sides so that the substrate portion 101b faces the dicing strip DCT, and then used in subsequent processes. Furthermore, to attach the semiconductor chip 10 to the second semiconductor substrate 200, surface treatment can be performed after dicing by irradiating the insulating film portion 102b and the surface of the first electrode 103 with plasma, ion beam, ultraviolet light, or electron beam, or by applying a coupling agent to the surface of the insulating film portion 102b. Additionally, as the plasma treatment used here, oxygen plasma, nitrogen plasma, or argon plasma can be used, for example.

[0071] [Process (f)]

[0072] like Figure 2 As shown in (c), step (f) is a step of aligning the first electrode 103 of each of the plurality of semiconductor chips 10 with the second electrode 203 of the second semiconductor substrate 200. Figure 4 As shown in (a), in process (f), the semiconductor chips 10 are aligned such that each first electrode 103 of each semiconductor chip 10 is aligned with the corresponding second electrode 203 of the second semiconductor substrate 200. The semiconductor chips 10 are then placed on... Figure 3 In the case where the first electrode 103 is directly attached to the second semiconductor substrate 200 in the cut state shown in (c) (with the insulating film portion 102b and the first electrode 103 facing the strip side), the position of the first electrode 103 cannot be observed from above. Therefore, the position of the first electrode 103 can be determined by, for example, using an infrared camera (IR camera) or X-rays or other electromagnetic waves or ultrasonic waves that pass through the substrate to determine the position of the first electrode, or by pre-setting through holes or vias on the first semiconductor substrate 100 (at least on the substrate portion 101b side) as alignment marks. This allows for the positioning of the first electrode 103.

[0073] [Process (g)]

[0074] Step (g) is a process of bonding the insulating film portions 102b of the plurality of semiconductor chips 10 to the second insulating film 202 of the second semiconductor substrate 200. In step (g), after removing organic matter or metal oxides attached to the surfaces of each semiconductor chip 10 and the second semiconductor substrate 200, as... Figure 4 (a) The semiconductor chip 10 is aligned with the position of the second semiconductor substrate 200 as shown. After this step is completed, the insulating film portions 102b of each of the plurality of semiconductor chips 10 are bonded to the second insulating film 202 of the second semiconductor substrate 200 as a hybrid bonding process (see reference). Figure 4 (b) and Figure 5 (b)). At this time, bonding can be performed after uniformly heating the insulating film portion 102b of the plurality of semiconductor chips 10 to the second insulating film 202 of the second semiconductor substrate 200. The temperature difference between the semiconductor chips 10 and the second semiconductor substrate 200 during bonding is preferably, for example, 10°C or less. By performing heating bonding at this uniform temperature, an insulating bonding portion S1 is formed by bonding the insulating film portion 102b to the second insulating film 202, and the plurality of semiconductor chips 10 are mechanically and firmly mounted on the second semiconductor substrate 200. Furthermore, since the heating bonding is performed at a uniform temperature, positional displacement in the bonding area is less likely to occur, and high-precision bonding can be performed. During this mounting stage, the first electrode 103 of the semiconductor chip 10 and the second electrode 203 of the second semiconductor substrate 200 are separated from each other (see reference). Figure 5 (b)), and not connected (but aligned). In addition, the bonding of the semiconductor chip 10 to the second semiconductor substrate 200 can be performed by other bonding methods, such as bonding at room temperature.

[0075] [Process (h)]

[0076] Step (h) is the process of bonding the first electrode 103 of each of the plurality of semiconductor chips 10 to the second electrode 203 of the second semiconductor substrate 200. In step (h), as... Figure 2 As shown in (d), if the bonding of process (g) is completed, a specified heat or pressure, or both, is applied to bond the first electrode 103 of the plurality of semiconductor chips 10 to the second electrode 203 of the second semiconductor substrate 200 as a hybrid bonding (see also [reference]). Figure 4 (b) and Figure 5(c)). When the first electrode 103 and the second electrode 203 are made of copper, the annealing temperature in step (g) is preferably 150°C or higher and 400°C or lower, more preferably 200°C or higher and 300°C or lower. Through this bonding process, an electrode bonding portion S2 is formed by bonding the first electrode 103 to the corresponding second electrode 203, and the first electrode 103 and the second electrode 203 are mechanically and firmly electrically bonded. Figure 4 (b) shows the state in which the insulating bonding portion S1 and the electrode bonding portion S2 are formed. Furthermore, the electrode bonding in step (h) is performed after the bonding in step (g), but it can also be performed simultaneously with the bonding in step (g). Afterwards, as... Figure 4 (c) and Figure 4 As shown in (d), all semiconductor chips 10 are bonded to the second semiconductor substrate 200 to obtain a semiconductor device 1.

[0077] Through the above, a semiconductor device 1 (reference) can be obtained in which multiple semiconductor chips 10 are electrically and mechanically disposed at predetermined positions on the second semiconductor substrate 200 with high precision. Figure 4 (c) and Figure 4 (d)). Then, it is possible to further... Figure 4 (d) shows a semiconductor device (CoW) with a structure that is monolithically formed into each semiconductor device consisting of a semiconductor chip 10 and a portion of a second semiconductor substrate 200 corresponding to the semiconductor chip 10.

[0078] According to the semiconductor device manufacturing method of this embodiment, the first semiconductor substrate 100 is attached to the dicing tape DCT with the first insulating film 102 and the plurality of first electrodes 103 facing the dicing tape DCT, and monolithization is performed in this state. At this time, the first semiconductor substrate 100 is monolithized while the surfaces of the first insulating film 102 and the plurality of first electrodes 103 are protected by the dicing tape DCT. Therefore, foreign matter generated during dicing will not adhere to the insulating film portion 102b and the surface of the first electrodes 103 in the monolithized semiconductor chip 10. Therefore, poor bonding of the semiconductor chip 10 caused by foreign matter can be prevented.

[0079] In the semiconductor device manufacturing method according to this embodiment, the manufacturing method may further include, after the monolithization step, a step of cleaning the surface of at least one of the insulating film portion 102b and the first electrode 103 of each of the plurality of semiconductor chips 10 using plasma treatment. At this time, contaminants on the surface of the semiconductor chips 10 can be removed by cleaning using plasma treatment, for example, organic foreign matter can be burned off to prevent poor bonding of the semiconductor chips 10.

[0080] In the semiconductor device manufacturing method according to this embodiment, after the monolithization step, the manufacturing method further includes a step of removing a plurality of semiconductor chips 10 from the dicing tape (DCT). In the step of removing the plurality of semiconductor chips, the plurality of semiconductor chips 10 can be picked up in a manner that contacts the substrate portion 101b monolithized in the first substrate body 101. At this time, devices such as a die bonder can be used to bond the semiconductor chips 10, and the manufacturing method of the present invention can be easily applied to existing manufacturing processes.

[0081] In the semiconductor device manufacturing method according to this embodiment, the manufacturing method further includes the following steps: preparing a second semiconductor substrate 200, the second semiconductor substrate 200 having a second substrate body 201, a second insulating film 202 disposed on one side of the second substrate body 201, and a plurality of second electrodes 203; aligning the first electrode 103 of at least one of the plurality of semiconductor chips 10 with any one of the plurality of second electrodes 203; bonding the insulating film portion 102b of the semiconductor chip 10 to the second insulating film 202 of the second semiconductor substrate 200; and bonding the first electrode 103 of the semiconductor chip 10 to the second electrode 203 of the second semiconductor substrate 200. At this time, the monolithically formed semiconductor chip 10 can be reliably bonded to the second semiconductor substrate 200.

[0082] In the semiconductor device manufacturing method according to this embodiment, during the process of monolithically forming the first semiconductor substrate 100, positioning for cutting can be performed from the side of the first substrate body 101. In this semiconductor device manufacturing method, the surface of the first semiconductor substrate 100 faces the cutting zone DCT, making it difficult to align the cutting position. Therefore, by positioning for cutting from the back side, it is possible to more accurately monolithically form a semiconductor chip.

[0083] In the semiconductor device manufacturing method according to this embodiment, the dicing tape (DCT) can be configured to prevent oxidation of the surfaces of the plurality of first electrodes 103 of the first semiconductor substrate 100. To prevent oxidation with the dicing tape (DCT), for example, it can be achieved by including the tape in materials such as rust inhibitors (e.g., benzotriazole, toluenetriazole, mercaptobenzothiazole), surfactants (e.g., carboxylic acids, alkylamines, alkyl thiols, etc., having 8 or more carbon atoms), or reducing agents or antioxidants (e.g., hydrazine, sulfites, ascorbic acid). This suppresses the formation of oxide films on the electrode surfaces due to oxidation of the first electrodes 103 during the period from the state of the first semiconductor substrate 100 until it is monolithically formed into a semiconductor chip 10, thereby hindering electrode bonding. Furthermore, methods such as removing the oxide films of the plurality of first electrodes 103 simultaneously while the first semiconductor substrate 100 is in its monolithic state can be performed, thereby improving manufacturing efficiency.

[0084] In the semiconductor device manufacturing method according to this embodiment, the manufacturing method may further include a step of removing the oxide film on the surface of the first electrode 103 of the semiconductor chip 10 before the step of bonding the first electrode 103 of the semiconductor chip 10 to the second electrode 203 of the second semiconductor substrate 200. This prevents poor bonding between the first electrode 103 and the second electrode 203. Similarly, the oxide film on the surface of the second electrode 203 can also be removed.

[0085] In the semiconductor device manufacturing method according to this embodiment, the first insulating film 102 of the first semiconductor substrate 100 may contain an organic material. In this case, by using a relatively soft organic material, foreign matter (debris) adhering to the surface of the semiconductor chip 10 or the second semiconductor substrate 200 can be absorbed (embedded) into the insulating film portion formed by the organic material, thereby further reducing poor connection of the semiconductor chip 10. That is, according to this manufacturing method, foreign matter adhering to the surface of the semiconductor chip 10, etc., can be embedded in the insulating film of the organic material to render it harmless. Furthermore, the second insulating film 202 of the second semiconductor substrate 200 may also be formed containing an organic material. In this case, the same effect can also be achieved.

[0086] In the semiconductor device manufacturing method according to this embodiment, when the first insulating film 102 contains an organic material, the organic material contained in the first insulating film 102 may include polyimide, polyimide precursor, polyamide-imide, benzocyclobutene (BCB), polybenzoxazole (PBO), or PBO precursor. Since these materials are liquid or soluble in solvents, the first insulating film 102 can be easily fabricated, for example, by spin coating, and a thin film can be easily formed. Furthermore, these materials have high heat resistance, thus they can withstand the high temperatures when bonding the semiconductor chip 10 to the second semiconductor substrate 200, thereby enabling more reliable bonding between the substrates. Additionally, the second insulating film 202 of the second semiconductor substrate 200 may be formed containing the aforementioned organic material. In this case, the same effects can also be achieved.

[0087] In the semiconductor device manufacturing method according to this embodiment, the first insulating film 102 of the first semiconductor substrate 100 may contain inorganic materials. This allows for the fabrication of semiconductor devices with finer structures. Furthermore, since the inorganic materials bond firmly to each other, the adhesion strength between the insulating films can be improved, thereby enhancing the connection reliability of the semiconductor device. Additionally, the second insulating film 202 of the second semiconductor substrate 200 may also be formed containing inorganic materials. In this case, the same effects can be achieved.

[0088] Example

[0089] The present invention will be described in more detail below through embodiments, but the present invention is not limited to the embodiments.

[0090] [Experimental Example 1]

[0091] As the semiconductor substrate corresponding to the first semiconductor substrate 100 in the above embodiment, an 8-inch silicon wafer (substrate with an insulating film) having a 5 μm thick polyimide curing film (product name: HD4100, manufactured by HD MicroSystems, Ltd.) formed on it was prepared. A photosensitive dicing tape (product name: N30, manufactured by Maxell, Ltd.) was also prepared. Then, the silicon wafer with the polyimide curing film formed on it was attached to the photosensitive dicing tape with the polyimide curing film (first insulating film 102) as the attachment surface (see reference). Figure 3 (a) and Figure 3 (b) A 25mm wide slit was cut into the attached photosensitive cutting tape using a cutting knife. Then, using a tensile testing machine (product name: EZ-SX, manufactured by SHIMADZUCORPORATION), one end of the 25mm wide photosensitive cutting tape was held and a 90° peel test was performed at a tensile speed of 5mm / second. The average peel force was measured as the adhesion force. As the number of tests, N=3, and the adhesion force was taken as their average value. The average adhesion force was 2.64N / 25mm, confirming that the two could be sealed together with more than 1.0N / 25mm during cutting.

[0092] [Experimental Examples 2 and 3]

[0093] The front and back sides (Example 2 and Example 3) of a silicon wafer without a polyimide film were attached to the same type of photosensitive dicing tape used in Example 1, and the same 90° peel test as in Example 1 was performed. The results showed that the average adhesion force (N=3) in Example 2 was 2.50 N / 25 mm, and the average adhesion force (N=3) in Example 3 was 1.75 N / 25 mm.

[0094] Thus, it was confirmed that high adhesion could be maintained even when a dicing tape was attached to a substrate containing an insulating film such as the polyimide-cured film shown in Experimental Example 1. Furthermore, after attaching the photosensitive dicing tape to a silicon wafer containing the polyimide-cured film shown in Experimental Example 1, a high-pressure mercury lamp was used to apply the dicing tape at 350 mW / cm². 2The sample was exposed to a specific illuminance. The results of the 90° peel test performed on the exposed sample confirmed that the average adhesion force (N=3) decreased to 0.07 N / 25 mm. That is, it was confirmed that the adhesion force was reduced by exposure, and the pickup performance after exposure was good. Furthermore, 90° peel tests were also performed after exposure in Experimental Examples 2 and 3 (refer to Table 1 below), and the results were confirmed to be the same as those in Experimental Example 1.

[0095] [Table 1]

[0096]

[0097] Symbol Explanation

[0098] 1-Semiconductor device, 10-Semiconductor chip, 100-First semiconductor substrate, 101-First substrate body, 101a-One side, 101b-Substrate portion, 102-First insulating film, 102b-Insulating film portion, 103-First electrode, 200-Second semiconductor substrate, 201-Second substrate body, 201a-One side, 202-Second insulating film, 203-Second electrode, DCT-Cut tape.

Claims

1. A method for manufacturing a semiconductor device, wherein, The manufacturing method includes the following steps: Prepare a first semiconductor substrate, the first semiconductor substrate having a first substrate body and a first insulating film disposed on one side of the first substrate body and a plurality of first electrodes; Prepare the cutting strip; The first semiconductor substrate is attached to the dicing tape; and The first semiconductor substrate is monolithically processed to obtain a plurality of semiconductor chips, each having an insulating film portion corresponding to the first insulating film and at least one of the plurality of first electrodes. In the attachment process, the first semiconductor substrate is attached to the dicing tape such that the first insulating film and the plurality of first electrodes are oriented toward the dicing tape.

2. The method for manufacturing a semiconductor device according to claim 1, wherein, The adhesion force of the cutting strip to the first semiconductor substrate is greater than 1.0 N / 25 mm.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein, The adhesion force of the cutting strip to the first insulating film is less than the adhesion force of the first insulating film to the first substrate body.

4. The method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein, The adhesion force of the cutting strip to the first insulating film is less than the stress when picking up any one of the plurality of semiconductor chips.

5. A method for manufacturing a semiconductor device according to any one of claims 1 to 4, wherein, The adhesion force of the cutting strip to the foreign object is greater than that of the first insulating film to the foreign object.

6. A method for manufacturing a semiconductor device according to any one of claims 1 to 5, wherein, The adhesion force of the cutting strip to the first semiconductor substrate is greater than the cutting stress when the first semiconductor substrate is monolithically processed.

7. A method for manufacturing a semiconductor device according to any one of claims 1 to 6, wherein, The manufacturing method, after the monolithization process, further includes a process of using plasma treatment to clean the surface of the insulating film portion of each of the plurality of semiconductor chips and at least one of the first electrode.

8. A method for manufacturing a semiconductor device according to any one of claims 1 to 7, wherein, The manufacturing method, after the monolithization process, further includes a process of removing the plurality of semiconductor chips from the dicing tape. In the process of removing the plurality of semiconductor chips, the plurality of semiconductor chips are picked up in such a way that they contact the substrate portion that is monolithized in the first substrate body.

9. A method for manufacturing a semiconductor device according to any one of claims 1 to 8, wherein, The manufacturing method includes the following steps: Prepare a second semiconductor substrate, the second semiconductor substrate having a second substrate body and a second insulating film disposed on one side of the second substrate body and a plurality of second electrodes; Align the first electrode of at least one of the plurality of semiconductor chips with any one of the plurality of second electrodes; The insulating film portion of the semiconductor chip is bonded to the second insulating film of the second semiconductor substrate; and The first electrode of the semiconductor chip is bonded to the second electrode of the second semiconductor substrate.

10. A method for manufacturing a semiconductor device according to any one of claims 1 to 9, wherein, In the process of monolithizing the first semiconductor substrate, the positioning is cut from the main body side of the first substrate.

11. A method for manufacturing a semiconductor device according to any one of claims 1 to 10, wherein, The dicing strip is configured to prevent oxidation of the surfaces of the plurality of first electrodes of the first semiconductor substrate.

12. A method for manufacturing a semiconductor device according to any one of claims 1 to 11, wherein, The manufacturing method further includes a step of removing the oxide film on the surface of the first electrode of the semiconductor chip before the step of bonding the first electrode of the semiconductor chip to other electrodes.

13. A method for manufacturing a semiconductor device according to any one of claims 1 to 12, wherein, The first insulating film of the first semiconductor substrate comprises an organic material.

14. The method of manufacturing a semiconductor device according to claim 13, wherein, The organic material contained in the first insulating film includes polyimide, polyimide precursor, polyamide-imide, benzocyclobutene (BCB), polybenzoxazole (PBO), or PBO precursor.

15. A method for manufacturing a semiconductor device according to any one of claims 1 to 14, wherein, The first insulating film of the first semiconductor substrate comprises an inorganic material.

16. A dicing strip used in a method of manufacturing a semiconductor device according to any one of claims 1 to 15.

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