Cholesterol liquid crystal display device and driving method thereof

Abstract

The present disclosure provides a cholesterol liquid crystal display device and a driving method thereof. The cholesterol liquid crystal display device comprises a cholesterol liquid crystal display panel, a time sequence control module and a driving module. The time sequence control module is used for outputting an enable signal and a latch signal. The driving module is used for receiving the enable signal and the latch signal and outputting a driving voltage to the cholesterol liquid crystal display panel. The enable signal is used for controlling the driving module to stop outputting the driving voltage, and the latch signal is used for controlling the driving module to enable the driving voltage to be discharged to zero volt. Therefore, the power consumption of the cholesterol liquid crystal display device is reduced.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a display device and a driving method thereof, and particularly relates to a cholesteric liquid crystal display device and a driving method thereof. BACKGROUND

[0002] Cholesteric liquid crystal (ChLCD) has bistable characteristics, one of which is a planar state and the other of which is a focal conic state. A cholesteric liquid crystal display device can maintain a display screen without providing power after the display screen is finished.

[0003] However, the largest power consumption of the cholesteric liquid crystal display device is related to the polarity change of the driving voltage, which causes the cholesteric liquid crystal display device to fail to achieve the goal of cost optimization.

[0004] Therefore, there is a lack of a cholesteric liquid crystal display device and a driving method thereof capable of reducing the power consumption of the driving voltage polarity change in the market, and relevant manufacturers are seeking solutions. SUMMARY

[0005] The purpose of the present disclosure is to provide a cholesteric liquid crystal display device and a driving method thereof, which can greatly reduce the power consumption of the cholesteric liquid crystal display panel and effectively achieve the goal of cost optimization by discharging the driving voltage to zero volts when the polarity of the driving voltage is changed.

[0006] According to an embodiment of the structural form of the present disclosure, a cholesteric liquid crystal display device is provided, which includes a cholesteric liquid crystal display panel, a timing control module, and a driving module. The cholesteric liquid crystal display panel includes a plurality of row electrodes and a plurality of column electrodes. The column electrodes are perpendicular to the row electrodes and form a plurality of pixels with the row electrodes. The timing control module is used to output an enable signal and a latch signal. The driving module is electrically connected to the timing control module and the cholesteric liquid crystal display panel, and is used to receive the enable signal and the latch signal to output a driving voltage to each corresponding pixel, respectively. The driving voltage output by the driving module reaches a target voltage value corresponding to an image data from an initial voltage value, the enable signal is used to control the driving module to stop outputting the driving voltage, and the latch signal is used to control the driving module to discharge the driving voltage to zero volts.

[0007] Other embodiments of the foregoing embodiment are as follows: The latch signal is further used to control the driving module to latch the image data and output the driving voltage.

[0008] Other implementations of the aforementioned embodiment are as follows: the driving module latches the image data when the latch signal is in the high level stage. The driving module outputs the driving voltage to the cholesteric liquid crystal display panel when the latch signal is in the low level stage.

[0009] Other implementations of the aforementioned embodiment are as follows: the driving module makes the driving voltage reach the target voltage value from the initial voltage value when the latch signal is in the high level stage.

[0010] Other implementations of the aforementioned embodiment are as follows: the driving module further outputs a zero voltage when the latch signal is in the high level stage, so that the driving voltage discharges from the initial voltage value to zero voltage. The driving module makes the driving voltage reach the target voltage value from zero voltage when the latch signal is in the low level stage.

[0011] Other implementations of the aforementioned embodiment are as follows: the driving module outputs the driving voltage discharges from the initial voltage value to zero voltage, and then reaches the target voltage value from zero voltage when zero voltage is between the initial voltage value and the target voltage value.

[0012] Other implementations of the aforementioned embodiment are as follows: the driving module outputs the driving voltage to the cholesteric liquid crystal display panel when the enable signal outputted by the timing control module is in the high level stage. The driving module stops outputting the driving voltage when the enable signal outputted by the timing control module is in the low level stage.

[0013] Other implementations of the aforementioned embodiment are as follows: the timing control module further outputs a zero voltage enable signal. The driving module makes the driving voltage outputted to each pixel discharge from the initial voltage value to zero voltage when the enable signal and the zero voltage enable signal outputted by the timing control module are both in the high level stage. The driving module makes the driving voltage reach the target voltage value when the enable signal outputted by the timing control module is in the high level stage and the zero voltage enable signal is in the low level stage.

[0014] Other implementations of the aforementioned embodiment are as follows: the driving voltage comprises a plurality of scan driving voltages and a plurality of data driving voltages. The driving module further outputs the scan driving voltages to the row electrodes respectively, and outputs the data driving voltages to the column electrodes respectively.

[0015] Other implementations of the aforementioned embodiment are as follows: the driving module comprises a row driver and a column driver. The row driver is electrically connected to the row electrodes and is used to output the scan driving voltages. The column driver is electrically connected to the column electrodes and is used to output the data driving voltages.

[0016] One embodiment of the method aspect of the present disclosure provides a driving method of a cholesteric liquid crystal display device. The cholesteric liquid crystal display device includes a cholesteric liquid crystal display panel, a timing control module and a driving module. The cholesteric liquid crystal display panel includes a plurality of pixels. The driving method of the cholesteric liquid crystal display device includes: determining, by the driving module, whether a driving voltage is changed in polarity. Outputting, by the timing control module, an enable signal and a latch signal. The enable signal is used to control the driving module to stop outputting the driving voltage. The latch signal is used to control the driving module to discharge the driving voltage to zero volt. Receiving, by the driving module, the enable signal and the latch signal to output the driving voltage to each pixel of the cholesteric liquid crystal display panel corresponding to the pixel respectively. The driving voltage outputted by the driving module is from an initial voltage value to a target voltage value corresponding to an image data.

[0017] Other implementations of the aforementioned embodiment include the following. The latch signal is further used to control the driving module to latch the image data and output the driving voltage.

[0018] Other implementations of the aforementioned embodiment include the following. When the latch signal is in a high level stage, the driving module latches the image data. When the latch signal is in a low level stage, the driving module outputs the driving voltage to the cholesteric liquid crystal display panel.

[0019] Other implementations of the aforementioned embodiment include the following. The driving module discharges the driving voltage from the initial voltage value to zero volt when the latch signal is in the high level stage.

[0020] Other implementations of the aforementioned embodiment include the following. The driving method of the cholesteric liquid crystal display device further includes: outputting, by the driving module, a zero volt voltage to discharge the driving voltage from the initial voltage value to zero volt when the driving voltage is changed in polarity and the latch signal is in the high level stage. Outputting the driving voltage from zero volt to the target voltage value when the latch signal is in the low level stage.

[0021] Other implementations of the aforementioned embodiment include the following. When zero volt is between the initial voltage value and the target voltage value, the driving voltage outputted by the driving module is discharged from the initial voltage value to zero volt and continues to be from zero volt to the target voltage value.

[0022] Other implementations of the aforementioned embodiment include the following. When the enable signal is in a high level stage, the driving module outputs the driving voltage to the cholesteric liquid crystal display panel. When the enable signal is in a low level stage, the driving module stops outputting the driving voltage.

[0023] Other embodiments of the aforementioned embodiment are as follows: The driving method of a cholesteric liquid crystal display device further includes outputting a zero-voltage enable signal via a timing control module. When the enable signal and the zero-voltage enable signal output by the timing control module are both in a high-level phase, the driving module causes the driving voltage output to each pixel to drain from an initial voltage value to zero volts. When the enable signal output by the timing control module is in a high-level phase and the zero-voltage enable signal is in a low-level phase, the driving module causes the driving voltage to reach a target voltage value. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a block diagram illustrating a cholesteric liquid crystal display device according to a first embodiment of the present disclosure;

[0025] Figure 2 It shows that according to Figure 1 The timing diagram of the latch signal of the timing control module and the driving voltage of the driving module;

[0026] Figure 3A is a current timing diagram showing that a conventional cholesteric liquid crystal display panel does not leak to zero volts when the driving voltage polarity is changed;

[0027] Figure 3B It shows that according to Figure 1 A timing diagram of the current leakage to zero volts in a cholesterol liquid crystal display panel when the driving voltage polarity changes;

[0028] Figure 4 It shows that according to Figure 1 The control logic diagram of the enable signal and zero voltage enable signal of the timing control module; and

[0029] Figure 5 FIG. 1 is a flow chart illustrating a driving method of a cholesteric liquid crystal display device according to a second embodiment of the present disclosure.

[0030] Description of reference numerals:

[0031] 100: Cholesteric liquid crystal display device

[0032] 110: Cholesteric LCD panel

[0033] 111: Row electrode

[0034] 112: Column electrode

[0035] 120: Timing control module

[0036] 130: Driver module

[0037] 131: Row driver

[0038] 132: Column driver

[0039] 200: driving method of cholesteric liquid crystal display device

[0040] CLK: clock signal

[0041] Data: image data

[0042] DIO: data output input instruction signal

[0043] S01, S02, S03: step

[0044] SDOE: enable signal

[0045] SDOZ: zero voltage enable signal

[0046] STB: latch signal

[0047] VD, VD1, VD2, VD3, VD4, VDa, VDb: driving voltage

[0048] VN1, VN2, VN3, VP1, VP2, VP3: voltage DETAILED DESCRIPTION

[0049] Embodiments of the present disclosure will be described herein below with reference to the accompanying drawings. For the purpose of explanation, numerous specific details will be set forth in the description below. It should be noted, however, that these specific details are not to be taken in a limiting sense as the present disclosure is understood to be broadly applicable. That is, well-known structures and elements are not described in great detail in order to avoid obscuring the present disclosure. Furthermore, like reference numerals are intended to refer to like elements throughout.

[0050] Furthermore, when an element (or a unit or a module etc.) is "connected" to another element, it can mean that the element is directly connected to the other element or indirectly connected to the other element, that is, there is another element between the element and the other element. When it is explicitly stated that an element is "directly connected" to another element, it means that there is no other element between the element and the other element. The terms first, second, third, etc. are used to describe different elements and do not limit the elements themselves. Thus, a first element can also be referred to as a second element. Also, the combination of elements / units / circuits herein is not a combination generally known in the art, conventionally or currently, and whether the combination of elements / units / circuits is easily completed by those skilled in the art cannot be determined by whether the elements / units / circuits are existing or not.

[0051] Referring to Figure 1 the drawings, Figure 1Figure 1 is a block diagram illustrating a cholesteric liquid crystal display device according to a first embodiment of the present disclosure. The cholesteric liquid crystal display device 100 includes a cholesteric liquid crystal display panel 110, a timing control module 120, and a driving module 130. The driving module 130 is electrically connected to the cholesteric liquid crystal display panel 110 and the timing control module 120. The cholesteric liquid crystal display panel 110 includes a plurality of row electrodes 111 and a plurality of column electrodes 112. The column electrodes 112 are perpendicular to the row electrodes 111 and form a plurality of pixels with the row electrodes 111.

[0052] The timing control module 120 outputs a plurality of control signals to the driving module 130 to control the driving module 130. The driving module 130 receives the control signals and outputs a driving voltage VD to corresponding pixels respectively to make the cholesteric liquid crystal display panel 110 display images. The driving voltage VD includes a plurality of scanning driving voltages and a plurality of data driving voltages. The driving module 130 outputs the scanning driving voltages to the row electrodes 111 respectively and outputs the data driving voltages to the column electrodes 112 respectively. The driving module 130 includes a row driver 131 and a column driver 132. The row driver 131 is electrically connected to the row electrodes 111 and outputs the scanning driving voltages. The column driver 132 is electrically connected to the column electrodes 112 and outputs the data driving voltages.

[0053] Referring to Figure 1 The control signals outputted by the timing control module 120 include an image data Data, a start enable signal SDOE, and a latch signal STB. The image data Data is image data to be displayed by the cholesteric liquid crystal display panel 110. The start enable signal SDOE is used to control the driving module 130 to stop outputting the driving voltage VD. The latch signal STB is used to control the driving module 130 to discharge the driving voltage VD to zero volt. The driving voltage VD outputted by the driving module 130 is from an initial voltage value to a target voltage value corresponding to the image data Data. In addition, the control signals outputted by the timing control module 120 further include a zero voltage enable signal SDOZ, a data output input indication signal DIO, and a clock signal CLK. The zero voltage enable signal SDOZ is used to control the driving module 130 to discharge the driving voltage VD outputted by the cholesteric liquid crystal display panel 110 to zero volt. The data output input indication signal DIO is used to control the driving module 130 to obtain time information of data receiving or data transmitting. The clock signal CLK is used to obtain data to the column driver 132.

[0054] Referring to Figure 1 and Figure 2 The control signals outputted by the timing control module 120 include an image data Data, a start enable signal SDOE, and a latch signal STB. The image data Data is image data to be displayed by the cholesteric liquid crystal display panel 110. The start enable signal SDOE is used to control the driving module 130 to stop outputting the driving voltage VD. The latch signal STB is used to control the driving module 130 to discharge the driving voltage VD to zero volt. The driving voltage VD outputted by the driving module 130 is from an initial voltage value to a target voltage value corresponding to the image data Data. In addition, the control signals outputted by the timing control module 120 further include a zero voltage enable signal SDOZ, a data output input indication signal DIO, and a clock signal CLK. The zero voltage enable signal SDOZ is used to control the driving module 130 to discharge the driving voltage VD outputted by the cholesteric liquid crystal display panel 110 to zero volt. The data output input indication signal DIO is used to control the driving module 130 to obtain time information of data receiving or data transmitting. The clock signal CLK is used to obtain data to the column driver 132. Figure 2 is a block diagram illustrating a cholesteric liquid crystal display device according to a second embodiment of the present disclosure. The cholesteric liquid crystal display device 200 includes a cholesteric liquid crystal display panel 210, a timing control module 220, and a driving module 230. The driving module 230 is electrically connected to the cholesteric liquid crystal display panel 210 and the timing control module 220. The cholesteric liquid crystal display panel 210 includes a plurality of row electrodes 211 and a plurality of column electrodes 212. The column electrodes 212 are perpendicular to the row electrodes 211 and form a plurality of pixels with the row electrodes 211. Figure 1The timing diagram of the latch signal of the timing control module and the driving voltage of the driving module. The latch signal STB is used to control the row driver 131 of the driving module 130 to latch the image data Data and output the driving voltage VD. When the latch signal STB outputted by the timing control module 120 is at the high level stage, the row driver 131 of the driving module 130 latches the image data Data; and when the latch signal STB is at the low level stage, the row driver 131 of the driving module 130 outputs the driving voltage VD to the cholesteric liquid crystal display panel 110.

[0055] In detail, the driving module 130 does not output the driving voltage VD to the cholesteric liquid crystal display panel 110 at the high level stage of the latch signal STB, only latches the image data Data, and makes the driving voltage VD reach the target voltage value from the initial voltage value.

[0056] In addition, the driving module 130 outputs a zero-volt voltage at the high level stage of the latch signal STB in the case of polarity change of the driving voltage VD, so as to discharge the driving voltage VD from the initial voltage value to zero volt, and continues to make the driving voltage VD reach the target voltage value from zero volt and output at the low level stage of the latch signal STB.

[0057] It should be particularly pointed out that when zero volt is between the initial voltage value and the target voltage value of the driving voltage VD, it represents that the polarity of the driving voltage VD changes (from positive voltage to negative voltage or from negative voltage to positive voltage), and the timing control module 120 outputs the latch signal STB as high level, so that the driving voltage VD outputted by the driving module 130 is discharged from the initial voltage value to zero volt first, and then reaches the target voltage value from zero volt.

[0058] Therefore, in the case of polarity change of the driving voltage VD, the driving voltage VD is discharged to zero volt first by the latch signal STB, which can greatly reduce the power consumption of the cholesteric liquid crystal display panel 110.

[0059] For example, in the case of polarity change of the driving voltage VD1, VD2, and no polarity change of the driving voltage VD3, VD4. Figure 2 The initial voltage value of the driving voltage VD1 is voltage VP2, and the target voltage value is voltage VN3. The driving module 130 outputs a zero-volt voltage at the high level stage of the latch signal STB, so as to discharge the driving voltage VD from voltage VP2 to zero volt, and then makes the driving voltage VD reach voltage VN3 from zero volt at the low level stage of the latch signal STB, and outputs to the cholesteric liquid crystal display panel 110. Figure 2 (not shown).

[0060] The initial voltage value of the driving voltage VD2 is voltage VN2, and the target voltage value is voltage VP1. The driving module 130 outputs a zero volt voltage when the latch signal STB is at a high level, causing the driving voltage VD to leak from voltage VN2 to zero volt. Then, when the latch signal STB is at a low level, the driving voltage VD is caused to reach voltage VP1 from zero volt and is supplied to the cholesteric liquid crystal display panel 110 ( Figure 2 (not shown) output.

[0061] The initial voltage value of the driving voltage VD3 is voltage VP3, and the target voltage value is voltage VP1. When the latch signal STB is at a high level, the driving module 130 causes the driving voltage VD to directly reach voltage VP1 from voltage VP3. Then, when the latch signal STB is at a low level, the driving module 130 supplies the driving voltage VD to the cholesteric liquid crystal display panel 110 ( Figure 2 (not shown) output voltage VP1.

[0062] The initial voltage value of the driving voltage VD4 is voltage VN2, and the target voltage value is voltage VN1. When the latch signal STB is at a high level, the driving module 130 causes the driving voltage VD to directly reach voltage VN1 from voltage VN2. Then, when the latch signal STB is at a low level, the driving module 130 supplies the driving voltage VD to the cholesteric liquid crystal display panel 110 ( Figure 2 (not shown) output voltage VN1.

[0063] See Figure 1 、 Figure 3A and Figure 3B As shown, Figure 3A is a current timing diagram showing that a conventional cholesteric liquid crystal display panel does not leak to zero volts when the driving voltage polarity changes; and Figure 3B It shows that according to Figure 1 The current timing diagram of the cholesterol liquid crystal display panel when the driving voltage polarity changes is shown. Figure 3A In the case where the driving voltage VDa changes polarity and does not discharge to zero volts; Figure 3B In this example, the driving voltage VDb changes polarity and leaks to zero volts. Current i is the peak current generated by the cholesteric liquid crystal display panel 110 during the polarity change. The current i is calculated as i = Cdv / dt, where C is the pixel load of the cholesteric liquid crystal display panel 110, dv is the pixel voltage change, and dt is the transition time. The initial voltage values ​​of the driving voltages VDa and VDb are both voltage VN3, and the target voltage values ​​are both voltage VP3.

[0064] exist Figure 3A In , since the driving voltage VDa does not leak to zero volts when the latch signal STB is at a high level, the pixel voltage changes to the target voltage value minus the initial voltage value (dv=VP3-VN3). Figure 3BIn the embodiment of the present invention, the driving voltage VDb first discharges to zero volts when the latch signal STB is at a high level. The pixel voltage changes to the target voltage value minus zero volts (dv=VP3-0=VP3). Therefore, the current i of the driving voltage VDb is significantly reduced compared to the current i of the driving voltage VDa. This significantly reduces the power consumption of the cholesteric liquid crystal display panel 110.

[0065] See Figure 1 and Figure 4 As shown, Figure 4 It shows that according to Figure 1 The control logic diagram of the enable signal and zero voltage enable signal of the timing control module. When the enable signal SDOE output by the timing control module 120 is in the high level stage, the driving module 130 outputs the driving voltage VD to the cholesterol liquid crystal display panel 110; and when the enable signal SDOE is in the low level stage, the driving module 130 outputs high impedance and stops outputting the driving voltage VD (such as Figure 4 When the zero voltage enable signal SDOZ output by the timing control module 120 is at a high level, the driving module 130 causes the driving voltage VD to discharge from the initial voltage value to zero volts; and when the zero voltage enable signal SDOZ is at a low level, the driving module 130 causes the driving voltage VD to reach the target voltage value from the initial voltage value.

[0066] To further explain, the CLC driving process includes four phases: Reset, Interval, Display, and End. The Reset phase clears the previously displayed image and drives the CLC into a homeotropic state. The Interval phase drives the CLC into a reflective state. The Display phase displays the next image, and the End phase terminates the display. The zero-voltage enable signal SDOZ primarily operates during the Interval and End phases.

[0067] In addition, it should be noted that the control of the enable signal SDOE takes precedence over the control of the zero voltage enable signal SDOZ. Figure 4 As shown, when the enable signal SDOE output by the timing control module 120 is in a low-level phase, the driver module 130 outputs a high impedance regardless of whether the zero-voltage enable signal SDOZ is in a high-level phase or a low-level phase. When both the enable signal SDOE and the zero-voltage enable signal SDOZ are in a high-level phase, the driver module 130 causes the drive voltage VD output to each pixel to drain from an initial voltage value to zero volts. When the enable signal SDOE is in a high-level phase and the zero-voltage enable signal SDOZ is in a low-level phase, the driver module 130 causes the drive voltage VD to reach a target voltage value.

[0068] See alsoFigure 1 and Figure 5 wherein Figure 5 is a flowchart illustrating a driving method of a cholesterol liquid crystal display device according to a second embodiment of the present disclosure. It must be noted that the cholesterol liquid crystal display device 100 in the first embodiment is configured to implement the driving method 200 of a cholesterol liquid crystal display device, but the driving method 200 of a cholesterol liquid crystal display device according to the present disclosure is not limited to be implemented by the cholesterol liquid crystal display device 100 according to the present disclosure.

[0069] The driving method 200 of a cholesterol liquid crystal display device comprises the following steps S01, S02, S03. In step S01, the driving module 130 determines whether the driving voltage VD changes polarity. In step S02, the timing control module 120 outputs an enable signal SDOE, a latch signal STB and a zero voltage enable signal SDOZ. The enable signal SDOE is used to control the driving module 130 to stop outputting the driving voltage VD, the latch signal STB is used to control the driving module 130 to discharge the driving voltage VD to zero volts and control the driving module 130 to latch the image data Data and output the driving voltage VD, and the zero voltage enable signal SDOZ is used to control the driving module 130 to discharge the driving voltage VD output by the cholesterol liquid crystal display panel 110 to zero volts. In step S03, the driving module 130 receives the enable signal SDOE, the latch signal STB and the zero voltage enable signal SDOZ to output the driving voltage VD to the cholesterol liquid crystal display panel 110.

[0070] When the latch signal STB output by the timing control module 120 is in the high level stage, the driving module 130 latches the image data Data; and when the latch signal STB is in the low level stage, the driving module 130 outputs the driving voltage VD to the cholesterol liquid crystal display panel 110.

[0071] It must be noted that when the driving module 130 determines that the driving voltage VD changes polarity, a zero-voltage is output in the high level stage of the latch signal STB to discharge the driving voltage VD from the initial voltage value to zero volts, and the driving voltage VD reaches the target voltage value from zero volts in the low level stage of the latch signal STB.

[0072] Further, when the enable signal SDOE is in the high level stage, the driving module 130 outputs the driving voltage VD to the cholesterol liquid crystal display panel 110; and when the enable signal SDOE is in the low level stage, the driving module 130 stops outputting the driving voltage VD.

[0073] Further, when the enable signal SDOE and the zero-voltage enable signal SDOZ are both at the high level stage, the driving voltage VD output to each pixel is discharged from the initial voltage value to zero volts. When the enable signal SDOE is at the high level stage and the zero-voltage enable signal SDOZ is at the low level stage, the driving voltage VD reaches the target voltage value.

[0074] As can be seen from the above embodiments, the present disclosure has the following advantages: in the case of polarity change of the driving voltage, the driving voltage is first discharged to zero volts, and then reaches the target voltage value from zero volts, which can greatly reduce the power consumption of the cholesteric liquid crystal display panel, and further optimize the cost of the cholesteric liquid crystal display device.

[0075] Although the present disclosure has been disclosed in the above embodiments, it is not intended to limit the present disclosure, and any person skilled in the art can make some changes and modifications without departing from the concept and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the definition of the claims.

Claims

1. A cholesteric liquid crystal display device, characterized by comprising: A cholesteric liquid crystal display panel comprising: a plurality of row electrodes; and a plurality of column electrodes perpendicular to the plurality of row electrodes and forming a plurality of pixels with the plurality of row electrodes; a timing control module for outputting an enable signal and a latch signal; and a driving module electrically connected to the timing control module and the cholesteric liquid crystal display panel for receiving the enable signal and the latch signal and outputting a driving voltage to each corresponding pixel respectively; wherein the driving voltage outputted by the driving module is from an initial voltage value to a target voltage value corresponding to an image data, the enable signal is for controlling the driving module to stop outputting the driving voltage, and the latch signal is for controlling the driving module to discharge the driving voltage to zero volt. The latch signal is further for controlling the driving module to latch the image data and output the driving voltage.

2. The cholesterol liquid crystal display device according to claim 1, wherein 3. The cholesteric liquid crystal display device of claim 2, wherein the driving module latches the image data when the latch signal is in a high level stage; and the driving module outputs the driving voltage to the cholesteric liquid crystal display panel when the latch signal is in a low level stage. The driving module makes the driving voltage from the initial voltage value to the target voltage value when the latch signal is in the high level stage.

4. The cholesterol liquid crystal display device according to claim 3, wherein The driving module is further for, when the driving voltage changes polarity, 5. The cholesterol liquid crystal display device according to claim 3, wherein outputting a zero volt voltage to make the driving voltage discharge from the initial voltage value to zero volt when the latch signal is in the high level stage; and making the driving voltage from zero volt to the target voltage value when the latch signal is in the low level stage. When zero volt is between the initial voltage value and the target voltage value, the driving voltage outputted by the driving module discharges from the initial voltage value to zero volt and continues from zero volt to the target voltage value.

6. The cholesterol liquid crystal display device according to claim 1, wherein 7. The cholesteric liquid crystal display device of claim 1, wherein the driving module outputs the driving voltage to the cholesteric liquid crystal display panel when the enable signal outputted by the timing control module is in a high level stage; and the driving module stops outputting the driving voltage when the enable signal outputted by the timing control module is in a low level stage. The timing control module is further for outputting a zero voltage enable signal; 8. The cholesterol liquid crystal display device according to claim 7, wherein the driving module makes the driving voltage outputted to each pixel discharge from the initial voltage value to zero volt when the enable signal and the zero voltage enable signal outputted by the timing control module are both in the high level stage; and the driving module makes the driving voltage reach the target voltage value when the enable signal outputted by the timing control module is in the high level stage and the zero voltage enable signal is in the low level stage. The driving voltage comprises a plurality of scan driving voltages and a plurality of data driving voltages, and the driving module is further for outputting the plurality of scan driving voltages to the plurality of row electrodes respectively and outputting the plurality of data driving voltages to the plurality of column electrodes respectively.

9. The cholesterol liquid crystal display device according to claim 1, wherein The driving module comprises:

10. The cholesterol liquid crystal display device according to claim 9, wherein a row driver electrically connected to the plurality of row electrodes and for outputting the plurality of scan driving voltages; and a column driver electrically connected to the plurality of column electrodes and for outputting the plurality of data driving voltages. A cholesteric liquid crystal display panel comprising:

11. A method for driving a cholesteric liquid crystal display device, the cholesteric liquid crystal display device comprising a cholesteric liquid crystal display panel, a timing control module, and a driving module, the cholesteric liquid crystal display panel comprising a plurality of pixels, the method for driving the cholesteric liquid crystal display device comprising: ​ The driving module determines whether a driving voltage changes polarity; The timing control module outputs an enable signal and a latch signal, the enable signal is used to control the driving module to stop outputting the driving voltage, and the latch signal is used to control the driving module to discharge the driving voltage to zero volts; And The driving module receives the enable signal and the latch signal and outputs the driving voltage to each pixel corresponding to the cholesteric liquid crystal display panel respectively; The driving voltage output by the driving module reaches a target voltage value corresponding to an image data from an initial voltage value.

12. The driving method of a cholesteric liquid crystal display device as claimed in claim 11, wherein The latch signal is further used to control the driving module to latch the image data and output the driving voltage.

13. The driving method of the cholesteric liquid crystal display device of claim 12, wherein, when the latch signal is in a high level stage, the driving module latches the image data; and when the latch signal is in a low level stage, the driving module outputs the driving voltage to the cholesteric liquid crystal display panel.

14. The driving method of a cholesteric liquid crystal display device as claimed in claim 13, wherein The driving module makes the driving voltage reach the target voltage value from the initial voltage value when the latch signal is in the high level stage.

15. The method for driving a cholesterol liquid crystal display device according to claim 13, wherein Further comprising: The driving module, when the driving voltage changes polarity, in the high level stage of the latch signal, outputs a zero-volt voltage, so that the driving voltage is discharged from the initial voltage value to zero volts; and in the low level stage of the latch signal, makes the driving voltage reach the target voltage value from zero volts.

16. The driving method of a cholesteric liquid crystal display device as claimed in claim 11, wherein When zero volts is between the initial voltage value and the target voltage value, the driving voltage output by the driving module is discharged from the initial voltage value to zero volts, and continues to reach the target voltage value from zero volts.

17. The driving method of the cholesteric liquid crystal display device of claim 11, wherein, when the enable signal is in a high level stage, the driving module outputs the driving voltage to the cholesteric liquid crystal display panel; and when the enable signal is in a low level stage, the driving module stops outputting the driving voltage.

18. The driving method of a cholesteric liquid crystal display device as claimed in claim 17, wherein, Further comprising outputting a zero-voltage enable signal by the timing control module; when the enable signal and the zero-voltage enable signal output by the timing control module are both in a high level stage, the driving module makes the driving voltage output to each pixel be discharged from the initial voltage value to zero volts; when the enable signal output by the timing control module is in a high level stage and the zero-voltage enable signal is in a low level stage, the driving module makes the driving voltage reach the target voltage value.

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