General modeling method and system for signal integrity analysis based on fast time domain simulation and transfer learning

Abstract

The invention discloses a high-speed link signal integrity analysis general modeling method and system based on fast time domain simulation and transfer learning. The method comprises the following steps: S1, selecting a high-speed link structure to be modeled; s2, extracting a pure edge signal without intersymbol interference based on a multi-edge response method, and calculating a reconstructed transient waveform and a worst eye pattern; s3, only performing a small amount of high-precision transient simulation and preprocessing in the target domain, and constructing a target domain data set; s4, designing special neural network DNN and TCN models, and constructing a source domain data pre-training model by using source domain fast time domain simulation data; and S5, based on a transfer learning strategy, the model is finely tuned by using limited target domain data. The method is used for constructing the high-speed link signal integrity agent model, so that under the condition that the number of times of high-precision transient simulation is remarkably reduced, the model prediction precision and training efficiency are improved, and the problems that traditional transient simulation consumes too long time, ANN model data dependence is large, and the transfer learning application range is limited are solved.

Description

Technical Field

[0001] This invention belongs to the field of high-speed link system design and signal integrity analysis technology in three-dimensional integrated microsystems, and particularly relates to a method and system for constructing a signal integrity proxy model based on fast time-domain simulation technology and transfer learning. Background Technology

[0002] With the continuous improvement of integrated circuit operating frequencies and integration density, the feature size of integrated circuits is approaching the physical limits of materials. In the semiconductor and microelectronics fields, three-dimensional integrated microsystems based on advanced packaging have become a feasible solution to meet chip performance and size requirements such as higher bandwidth, higher functionality, higher density, and smaller footprint. High-speed links for three-dimensional integrated microsystems, while pursuing high bandwidth density and low latency transmission, also face more severe signal integrity challenges. Electromagnetic interference, crosstalk, timing mismatch, and other problems are becoming increasingly prominent in high-speed link systems, seriously affecting signal transmission quality and system reliability. Eye diagrams, as a core tool for evaluating the quality and integrity of high-speed signals, visually present problems such as inter-symbol interference, amplitude distortion, and jitter by superimposing waveforms at the receiver at different times. Traditional transient simulations based on physical models can accurately capture waveform details and high-frequency effects, and are the benchmark method for signal integrity (SI) analysis. However, their time consumption is proportional to the length of the input bit sequence, and to obtain the statistically significant bit error rate, simulations of millions to billions of bit responses are usually required, leading to a significant increase in computational load and time overhead, which is not conducive to rapid design iteration and engineering applications. To improve simulation efficiency, researchers have proposed various fast time-domain simulation techniques based on modeling or mathematical optimization, including Single Bit Response (SBR), Double Edge Response (DER), and Multiple Edge Response (MER). However, with the increasing complexity and nonlinearity of high-speed links, these fast time-domain simulations still lag behind transient simulations in terms of accuracy. How to balance and optimize the simulation efficiency while ensuring sufficient accuracy is a crucial research topic in current SI analysis.

[0003] In recent years, machine learning techniques such as Artificial Neural Networks (ANNs) have been introduced into surrogate modeling, design optimization, and uncertainty quantification in SI analysis due to their excellent nonlinear fitting capabilities. However, ANN models have significant limitations: on the one hand, they are extremely dependent on data, requiring massive amounts of data to train and ensure reliable simulation of SI characteristics. On the other hand, ANN methods have obvious scalability limitations: even slight modifications to the target object's structure or environment require the model to be re-sampled with a large amount of new data and retrained, making them inflexible and inefficient. To address this data dependency, existing research has incorporated external prior knowledge (such as knowledge-based neural networks and spatial mapping techniques) to accelerate or improve model accuracy by introducing analytical expressions, empirical models, or equivalent circuit information. However, these methods are highly dependent on the completeness and accuracy of the prior knowledge used; incomplete or biased prior knowledge can easily lead to systematic errors, limiting their universality and robustness. Furthermore, methods such as spatial mapping often rely on engineer experience and lack a unified and applicable general framework.

[0004] Transfer learning, by reusing model parameters or feature knowledge learned from a source task to a target task, can improve model training efficiency and generalization ability when data is insufficient or simulation costs are high, breaking through the isolated training paradigm. Existing literature applies transfer learning between single dimensions or specific circuit structures to accelerate convergence or reduce the number of transient simulations, but it is often limited to single or low-dimensional scenarios. Most studies focus on specific circuits or single regression tasks, lacking a unified framework that can be extended to different high-speed link structures and different simulation accuracy requirements. Summary of the Invention

[0005] To address the aforementioned problems in existing technologies, this invention provides a general transfer learning framework that combines fast time-domain simulation technology with transient simulation. This framework is used to construct high-speed link signal integrity proxy models, significantly reducing the number of high-precision transient simulations while improving model prediction accuracy and training efficiency. It solves the problems of excessive time consumption in traditional transient simulations, high data dependency in ANN models, and limited applicability of transfer learning. This invention designs dedicated neural network structures for different task types (such as waveform mapping and eye height prediction) and systematically evaluates the performance of various transfer strategies in terms of training loss, data dependency, and model robustness, ensuring the framework has broad applicability and scalability.

[0006] The present invention adopts the following technical solution:

[0007] A general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning includes the following steps:

[0008] S1. Target circuit structure selection: Select the high-speed link structure to be modeled, build the corresponding simulation circuit, and set key parameters such as data transmission rate for subsequent transient simulation to obtain the transient waveform and eye diagram of the link.

[0009] S2. Source Domain Fast Time Domain Simulation Data Generation: Based on the multi-edge response method, the pure edge signal without inter-symbol interference is extracted from the transient waveform of step S1, and the signal is shifted and superimposed to construct the transient waveform of the high-speed link; the worst-case eye diagram is generated based on the edge signal using the dynamic programming method, and the key eye diagram SI index is extracted; the source domain fast time domain simulation data includes the transient waveform and the worst-case eye diagram generated by the multi-edge response method.

[0010] S3. Based on the simulation circuit in step S1, high-precision transient simulation data acquisition and preprocessing in the target domain are performed. Only a limited number of high-precision transient simulations are performed in the target domain to obtain high-quality data and construct the target domain dataset.

[0011] S4. Design neural network models according to different modeling task types, and use the source domain fast time domain simulation data obtained in step S2 to construct source domain pre-trained models respectively.

[0012] S5. Load the source domain pre-trained model obtained in step S4. Using a transfer learning strategy, fine-tune the target domain model using the limited target domain dataset obtained in step S3 to obtain the surrogate model. Perform a horizontal comparison with various traditional methods and the transfer learning strategy to verify the effectiveness and robustness of the method.

[0013] Preferably, the high-speed link structure includes, but is not limited to, a driver, microstrip line and receiver model or a three-dimensional heterogeneous interconnect structure.

[0014] Preferably, in step 2, the specific method of the fast time-domain simulation technique is as follows:

[0015] The multi-edge response method is as follows:

[0016] S2.1 Constructing the edge response considering the first two leading bits using bit response patterns:

[0017] f 01 (t)=y 010 (t)-y 001 (t+T)+V high

[0018] f 11 (t)=y 110 (t)

[0019] in, This means that for the current bit being 0, considering the previous bit pattern as b -2 The descent edge of 1 removes the influence of the preceding edge transition. Vhigh This is the steady-state response value at a high level.

[0020] The ascending edge can be represented by the following formula:

[0021] r 10 (t)=y 101 (t)-y 110 (t+T)+V low

[0022] r 00 (t)=y 001 (t)

[0023] Among them, b -2 0 represents the symbol of the first two bits. This means that for the current bit being 1, considering the previous bit pattern as b -2 The rising edge of 0 removes the effect of the preceding edge transition. V low This represents the steady-state response value at a low level.

[0024] S2.2. Extending the second-order multi-edge response to a higher order to achieve higher accuracy, when considering m leading bits, the multi-edge response can be expressed as:

[0025]

[0026] Among them, b -m Let b0 be the m-th leading bit, and b0 represent the current bit. This indicates the response considering the first m leading bits. This indicates that the current bit is 1 and the leading bit pattern is b. -m ,…,b -2 The rising edge of 0, This indicates that the current bit is 0 and the leading bit pattern is b. -m ,…,b -2 The descending edge of 1.

[0027] S2.3 After pre-determining the MER order and obtaining a clean multi-edge response through transient simulation, the target code sequence is scanned bit by bit to identify all bit positions i where edge transitions occur. For each edge transition position i, m bits are truncated forward as a preamble code (i.e., bits 1 to i-1) to select the corresponding edge response. The multi-edge response signal under the corresponding preamble code is shifted right by i bit periods to align with the timing of the i-th bit transition. All edge transition positions are traversed and superimposed to form the final transient waveform.

[0028] S2.4 For a continuous time-domain waveform with multi-edge responses r(t) and f(t), the sampling point is fixed at the moment after the Nth bit ends, i.e., the end of the entire sequence, representing the influence of all input bits on the current bit. Every bit period, at the same relative position in each bit period, it is sampled into edge response arrays R[k] and F[k], representing the influence of the position where the transition occurs delayed by kT time at the current sampling point.

[0029] Define DP state This indicates that when the i-th bit is input, the last m bits of the input sequence pattern are b. -m ,…,b -1 The minimum accumulated voltage. Then the next... Only through and Superimposed "b" -2 →b -1 The influence of code pattern transitions is obtained. The specific formula for the dynamic programming method is as follows:

[0030]

[0031] in,

[0032]

[0033] in, The leading bit at position j at time Δt is 1,b -m ,…,b -2 The voltage change at the sampling point after a delay of (Nj)T in the edge response. This indicates that the leading bit at position j at time Δt is 0, b -m ,…,b -2 The voltage change at the sampling point after an edge response delay of (Nj)T time. and These represent the response values ​​of the rising or falling edge occurring at position j, respectively.

[0034] By filling the state matrix A of size N×M, the worst-case "1" for the current sampling point is the minimum value of the last column of the matrix. For the entire cell interval, traversing each sampling point yields the worst-case eye diagram "1". For the worst-case "0", similar to the worst-case "1", the worst-case code sequence that maximizes the voltage at the sampling point is found, thus calculating the worst-case eye diagram. The specific process is as follows:

[0035] Similarly, it can only be done through and Superimposed b -2 →b-1 The influence of code pattern transitions is obtained. For the worst-case scenario of "0", the search is for the edge response that has the greatest impact on the current sampling point. Therefore:

[0036]

[0037] Finally, the worst-case "0" for the current sampling point is the maximum value in the last column of the matrix; for the entire cell interval period, each sampling point is traversed to obtain the worst-case eye diagram case "0". The worst-case "0" and the worst-case "1" together constitute the worst-case eye diagram.

[0038] Preferably, in step 4, the specific method for constructing the neural network using the datasets from steps 2 and 3 is as follows:

[0039] S4.1. Design different neural network structures according to different modeling task types. Design a multi-layer fully connected deep neural network (Deep Neural Network), with normalized high-speed link structure geometric parameters as input and eye height data as output; design a time-series convolutional network (TCN), with sequence waveforms of high-speed link input as input and time-domain waveforms of the receiver as output.

[0040] S4.2 Load the source domain fast time-domain simulation dataset and divide it into training, validation, and test sets; select Mean Squared Error (MSE) as the model's loss function:

[0041]

[0042] Where n is the number of samples, y i This is the actual result of the sample. This refers to the predicted values ​​of the samples output by the model. The Adam optimizer is used to update the model parameters, guiding the loss function parameters to update in the correct direction and to an appropriate size, so that the loss function value continuously approaches the global minimum. The initial learning rate, batch size, number of training epochs, and early stopping strategy are set.

[0043] S4.3 Iteratively update the training set, use the validation set to monitor overfitting and adjust hyperparameters; terminate training when the validation set performance no longer improves or reaches the preset stopping condition, such as reaching the maximum number of rounds, and then evaluate the model performance on the test set and save the final model weights and network structure definition.

[0044] S4.4 Save the pre-trained model parameters and corresponding network definitions for use in target domain transfer initialization. The neural network structure and hyperparameters of the target domain model are basically the same as those of the source domain pre-trained model.

[0045] Preferably, in step 5, the specific method for fine-tuning the target domain model of the model in step 4 using the small amount of high-precision transient simulation dataset constructed in step 3 is as follows:

[0046] S5.1. Based on the amount of data in the target domain and the similarity between the source and target domains, select or combine the following strategies: Fine-Tuning and Partial-Freezing. Fine-Tuning loads all weights from the source domain model into the target domain model, using a lower learning rate to fine-tune the weights of all layers on the target domain training set. Partial-Freezing freezes several DNN feature extraction layers or several TCN residual blocks, initializing and training only subsequent layers or newly added modules, balancing the transfer of prior knowledge from the source domain and adaptation to the target domain.

[0047] S5.2 Configure the optimizer and learning rate scheduler, update parameters on the target domain training set in mini-batch iterations, and monitor performance on the validation set; determine whether to adjust the learning rate or modify the freezing strategy based on the validation curve. Record training loss, validation loss, and other evaluation metrics during training; if overfitting or validation performance deteriorates, measures such as regularization, reducing training epochs, or increasing the number of frozen layers can be taken.

[0048] S5.3 Under different sample sizes in the target domain, scan hyperparameters such as the number of frozen layers, learning rate, and training rounds to determine the optimal transfer strategy when samples are scarce and the similarity between the source and target domains is high; record the performance curves under different strategy combinations to form empirical guidance.

[0049] This invention also discloses a general modeling system for signal integrity analysis based on fast time-domain simulation and transfer learning, used to perform the above methods, comprising the following modules:

[0050] Target circuit structure selection module: Select the high-speed link structure to be modeled, build the corresponding simulation circuit, and set key parameters such as data transmission rate for subsequent transient simulation to obtain the transient waveform and eye diagram of the link.

[0051] Source domain fast time-domain simulation data generation module: Based on the multi-edge response method, pure edge signals are extracted from transient waveforms, and the transient waveforms of high-speed links are constructed by shifting and superimposing; the worst-case eye diagram based on the edge signals is generated using dynamic programming, and the key eye diagram SI index is extracted;

[0052] Target domain dataset construction module: Based on the simulation circuit, acquire transient simulation data in the target domain, perform transient simulation in the target domain, obtain high-quality data, and construct the target domain dataset;

[0053] Source domain pre-trained model building module: Design a neural network model according to the modeling task type, and build a source domain pre-trained model using the source domain fast time-domain simulation data obtained by the source domain fast time-domain simulation data generation module;

[0054] Model generation module: Loads the source domain pre-trained model obtained from the source domain pre-trained model building module, and adjusts the target domain model using the target domain dataset obtained from the target domain dataset building module through transfer learning strategy to obtain the surrogate model.

[0055] Compared with conventional signal integrity analysis and modeling methods, this invention has the following significant advantages:

[0056] In this invention, source-domain fast time-domain simulation preferably employs a multi-edge response combined with dynamic programming worst-case eye diagram construction method to obtain high-quality, large-scale data without performing long-sequence transient simulations. This cross-domain transfer learning method, moving from fast time-domain simulation to transient simulation, organically combines numerical computation efficiency with high-precision simulation. This invention is not dependent on specific circuit topologies and is not limited to fixed regression tasks; it is applicable to the establishment of any modern nonlinear high-speed link SI surrogate model, effectively avoiding the limitations of traditional neural network modeling methods and transfer learning methods. Results show that this invention exhibits excellent scalability and robustness in a variety of complex tasks. Attached Figure Description

[0057] Figure 1 This is a schematic diagram of the high-speed link structure model targeted by the preferred embodiment of the present invention.

[0058] Figure 2 The results obtained using the fast time-domain simulation technique in this invention are compared with the transient simulation results. (a) is a comparison of the inner contours of the worst-case eye diagram and the average eye diagram, and (b) is a comparison of the transient waveforms.

[0059] Figure 3 This is a schematic diagram of the transient waveform reconstructed using the second-order MER method in this invention.

[0060] Figure 4 This is a schematic diagram of constructing the worst-case eye diagram using dynamic programming in the MER method of this invention.

[0061] Figure 5 This is a structural diagram of the deep neural network model used in this invention.

[0062] Figure 6 This is a diagram of the temporal convolutional network model used in this invention. (a) is a schematic diagram of dilated causal convolution, (b) is a basic TCN residual block structure diagram, ReLU is the activation function used, and Dropout is the dropout layer.

[0063] Figure 7 This is a comparison chart of the accuracy of different network models under different target domain sample sizes in the task of predicting eye height using geometric parameters. Here, DNN-TL represents the DNN model after transfer learning in this invention. Among them, (a) is a comparison chart of root mean square error and (b) is a comparison chart of mean absolute percentage error.

[0064] Figure 8 This is a comparison chart of the accuracy of different network models in the input-output transient waveform mapping task. TCN-TL represents the TCN model after transfer learning in this invention.

[0065] Figure 9 This is a flowchart of a general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning, according to a preferred embodiment of the present invention.

[0066] Figure 10 This is a block diagram of a general modeling system for signal integrity analysis based on fast time-domain simulation and transfer learning, according to a preferred embodiment of the present invention. Detailed Implementation

[0067] The following specific implementation examples, in conjunction with the accompanying drawings, illustrate the embodiments of the present invention. Those skilled in the art can intuitively understand other advantages of the present invention from the description herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the following embodiments and features described therein can be combined with each other.

[0068] This embodiment presents a general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning. The specific steps are as follows:

[0069] S1. Select the high-speed link structure to be modeled, build the corresponding simulation circuit, and set key parameters such as data transmission rate for subsequent transient simulation to obtain the transient waveform and eye diagram of the link. Figure 1 The diagram illustrates the basic structure of a high-speed serial link, whose core consists of a high-speed transmitter (TX), an interconnect, and a receiver (RX). The TX terminal is excited by a pseudo-random binary sequence, with the drive signal voltage range set to 0-1.1V. A two-stage driver composed of four CMOS transistors serves as the core drive circuit for the TX. A typical single microstrip line is used as the connection channel between the TX and RX.

[0070] S2. Source Domain Fast Time Domain Simulation Data Generation: Based on the multi-edge response method, pure edge signals without inter-symbol interference are extracted from the transient waveform of step S1, and the signals are shifted and superimposed to construct the transient waveform of the high-speed link; the worst-case eye diagram is generated based on the edge signals using the dynamic programming method, and the key eye diagram SI index is extracted. Figure 2 The worst-case eye diagrams calculated using circuit simulation and fast time-domain simulation methods are presented respectively. The results show that the worst-case eye diagram generated by the MER method basically matches the inner contour of the average eye diagram from transient simulation. Meanwhile, Figure 2 The paper also compares the transient output waveform reconstructed by the MER method with the full circuit simulation waveform. The two are highly consistent in waveform morphology and key timing characteristics.

[0071] In step 2 of this embodiment, the specific method of fast time-domain simulation technology is as follows:

[0072] S2.1 The multi-edge response method constructs the edge response considering the first m leading bits using bit response patterns. Taking the second-order MER method as an example, the edge response considering the first two leading bits is constructed as follows:

[0073] f 01 (t)=y 010 (t)-y 001 (t+T)+V high

[0074] f 11 (t)=y 110 (t)

[0075] in, This means that for the current bit being 0, considering the previous bit pattern as b -2 The descent edge of 1 removes the influence of the preceding edge transition. V high This is the steady-state response value at a high level.

[0076] The ascending edge can be represented by the following formula:

[0077] r 10 (t)=y 101 (t)-y 110 (t+T)+V low

[0078] r 00 (t)=y 001 (t)

[0079] Among them, b -2 0 represents the symbol of the first two bits. This means that for the current bit being 1, considering the previous bit pattern as b -2 The rising edge of 0 removes the effect of the preceding edge transition. V low This represents the steady-state response value at a low level.

[0080] S2.2, Extend the second-order multi-edge response to higher orders to achieve higher accuracy, b -m Let b0 be the m-th leading bit, and b0 represent the current bit. This means considering the response of the first m leading bits, and thus the multi-edge response can be expressed as:

[0081]

[0082] in, This indicates that the current bit is 1 and the leading bit pattern is b. -m ,…,b -2 The rising edge of 0, This indicates that the current bit is 0 and the leading bit pattern is b. -m ,…,b -2 The descending edge of 1.

[0083] S2.3, Reference Figure 3 Since this embodiment employs a high-speed circuit structure model with low nonlinearity, the MER order is predetermined to be two. Transient waveforms of eight different code pattern combinations are obtained through transient simulation to construct a clean multi-edge response. First, the target code pattern sequence is scanned bit by bit to identify all bit positions i where edge transitions occur. For each edge transition position i, m bits are truncated forward as a preamble code pattern (i.e., bits 1 to i-1) to select the corresponding edge response. The multi-edge response signal under the corresponding preamble code pattern is shifted right by i bit periods to align with the timing of the i-th bit transition. All edge transition positions are traversed and superimposed to form the final transient waveform.

[0084] S2.4 For a continuous time-domain waveform with multi-edge responses r(t) and f(t), the sampling point is fixed at the moment after the Nth bit ends, i.e., the end of the entire sequence, representing the influence of all input bits on the current bit. Every bit period, at the same relative position in each bit period, it is sampled into edge response arrays R[k] and F[k], representing the influence of the position where the transition occurs delayed by kT time at the current sampling point.

[0085] S2.5, such as Figure 4 As shown, the DP state is defined. This indicates that when the input reaches the i-th bit, the last m bits of the input sequence are represented by the code b. -m ,…,b -1 The minimum accumulated voltage. Then the next... Only through and Superimposed "b" -2 →b -1 The influence of code pattern transitions is obtained. The specific formula for the dynamic programming method is as follows:

[0086]

[0087] in,

[0088]

[0089] in, The leading bit at position j at time Δt is 1,b -m ,…,b -2 The voltage change at the sampling point after a delay of (Nj)T in the edge response. This indicates that the leading bit at position j at time Δt is 0, b -m ,…,b -2 The voltage change at the sampling point after an edge response delay of (Nj)T time. and These represent the response values ​​of the rising or falling edge occurring at position j, respectively.

[0090] By filling the state matrix A of size N×M, the worst-case "1" for the current sampling point is the minimum value of the last column of the matrix. For the entire cell interval, traversing each sampling point yields the worst-case eye diagram "1". The worst-case "0" is similar to the worst-case "1"; the worst-case code sequence that maximizes the voltage at the sampling point is found, thus calculating the worst-case eye diagram and obtaining the corresponding eye height. The specific process is as follows:

[0091] Similarly, it can only be done through and Superimposed b -2 →b -1 The influence of code pattern transitions is obtained. For the worst-case scenario of "0", the search is for the edge response that has the greatest impact on the current sampling point. Therefore:

[0092]

[0093] Finally, the worst-case "0" for the current sampling point is the maximum value in the last column of the matrix; for the entire cell interval period, each sampling point is traversed to obtain the worst-case eye diagram case "0". The worst-case "0" and the worst-case "1" together constitute the worst-case eye diagram.

[0094] S3. For the simulation circuit in step S1, high-precision transient simulation is used in the target domain to obtain high-precision transient simulation data. Only a limited number of transient simulations are performed to obtain high-quality data to construct the target domain dataset. In this step, the circuit structure of the target domain is basically the same as that of the source domain, and resampling is performed within the same parameter range. The data volume is smaller than that of the source domain dataset. In the geometric parameter mapping eye height task, high-precision transient simulation with a step size of 1ps and a total duration of 100ns is used to simulate each set of parameters. Multiple symbol periods are superimposed to generate an average eye diagram, and the bit error rate reaches 1×10⁻⁶. -12 The average eye diagram is measured, and the vertical opening is measured, i.e., the corresponding eye height. In the input-output waveform mapping task, the transient simulation step size is set to 1ps, the simulation duration is 2ns, and the generated waveform sequence length is 2000 sampling points to cover the complete signal cycle of the 10-bit bitstream.

[0095] S4. Design a dedicated neural network model according to different modeling task types, and use the source domain fast time domain simulation data obtained in step S2 to construct source domain pre-trained models respectively.

[0096] S4.1. Design different neural network structures according to different modeling task types. (Reference) Figure 5 A multi-layer fully connected deep neural network was designed, with normalized high-speed link structure geometric parameters as input and eye height data as output; (Reference) Figure 6 Design a temporal convolutional network with input being a sequence waveform from a high-speed link and output being a time-domain waveform from the receiver.

[0097] S4.2 Load the source domain fast time-domain simulation dataset and divide it into training, validation, and test sets; select mean squared error as the loss function for the model:

[0098]

[0099] Where n is the number of samples, y i This is the actual result of the sample. This represents the predicted value of the sample output by the model. The Adam optimizer is used to update the model parameters, guiding the loss function parameters to update to an appropriate size in the correct direction, so that the loss function value continuously approaches the global minimum. The learning rate is set to 0.001, and the training epochs are 1000.

[0100] S4.3 Iteratively update the training set in the source domain, using the validation set to monitor overfitting and adjust hyperparameters; use the MER method to generate a total of 300 samples to train the source domain DNN model. After training, evaluate the model performance on the test set and save the optimal model's weights and network structure definitions.

[0101] S4.4 Save the pre-trained model parameters and corresponding network definitions for use in target domain transfer initialization. The neural network structure and hyperparameters of the target domain model are basically the same as those of the source domain model.

[0102] S5. Load the source domain pre-trained model obtained in step S4. Using a transfer learning strategy, fine-tune the target domain model using the limited target domain data obtained in step S3 to obtain the surrogate model. The specific method for fine-tuning the target domain model loaded in step 4 using the small amount of high-precision transient simulation dataset constructed in step 3 is as follows:

[0103] S5.1. Based on the amount of data in the target domain and the similarity between the source and target domains, select or combine the full-model fine-tuning and partial-freezing strategies. The fine-tuning method loads all weights from the source domain model to the target domain model and fine-tunes the weights of all layers on the target domain training set using a lower learning rate. The partial-freezing method freezes several DNN feature extraction layers or several TCN residual blocks, and only initializes and trains subsequent layers or newly added modules, balancing the transfer of prior knowledge from the source domain and the adaptation to the target domain.

[0104] S5.2 Configure the optimizer and learning rate scheduler, update parameters on the target domain training set in mini-batch iterations, and monitor performance on the validation set; determine whether to adjust the learning rate or modify the freezing strategy based on the validation curve. Record training loss, validation loss, and other evaluation metrics during training; if overfitting or validation performance deteriorates, measures such as regularization, reducing training epochs, or increasing the number of frozen layers can be taken.

[0105] S5.3 In the target domain, for the geometric parameter prediction of eye height task, training datasets containing 50, 100, 200, and 400 samples were constructed respectively, and transfer learning was performed based on the source domain DNN model. The validation set was resampled with 100 different datasets. For the input-output waveform mapping task, after obtaining 200 sets of high-precision output waveform data, the datasets were divided according to the ratio of training set:validation set:test set = 1:1:2. Under different sample sizes in the target domain, the number of frozen layers was scanned to determine the optimal transfer strategy when samples were scarce and the similarity between the source and target domains was high. The performance curves under different strategy combinations were recorded to form empirical guidance.

[0106] After the model has completed all training, its accuracy and effectiveness are verified. For example... Figure 7 As shown, in the task of predicting eye height using geometric parameters, the transferred DNN model significantly outperforms the traditional DNN model in terms of both standard deviation and root mean square error under four different sample sizes. Figure 8As shown, in the input-output transient waveform mapping task, compared with the TCN model and traditional time series networks LSTM and GRU, it is evident that the transferred TCN model performs optimally, especially in regions of rapid signal transitions and peak fluctuations, where it can more accurately capture local features. The introduction of the transfer strategy significantly improves model accuracy, effectively alleviating the training difficulties caused by insufficient target domain samples, and providing an efficient and reliable solution for accelerating intelligent modeling and simulation of complex circuit systems. The overall flowchart of the general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning is shown below. Figure 9 As shown.

[0107] like Figure 10 As shown, this embodiment discloses a general modeling system for signal integrity analysis based on fast time-domain simulation and transfer learning, used to execute the above method, including the following modules:

[0108] Target circuit structure selection module: Select the high-speed link structure to be modeled, build the corresponding simulation circuit, and set key parameters such as data transmission rate for subsequent transient simulation to obtain the transient waveform and eye diagram of the link.

[0109] Source domain fast time-domain simulation data generation module: Based on the multi-edge response method, pure edge signals without inter-symbol interference are extracted from transient waveforms, and the transient waveforms of high-speed links are constructed by shifting and superimposing; the worst-case eye diagram is generated based on the edge signals using dynamic programming, and the key eye diagram SI index is extracted.

[0110] Target domain dataset construction module: Based on the simulation circuit, acquire transient simulation data in the target domain, perform transient simulation in the target domain, obtain high-quality data, and construct the target domain dataset;

[0111] Source domain pre-trained model building module: Design a neural network model according to the modeling task type, and build a source domain pre-trained model using the source domain fast time-domain simulation data obtained by the source domain fast time-domain simulation data generation module;

[0112] Model generation module: Loads the source domain pre-trained model obtained from the source domain pre-trained model building module, and adjusts the target domain model using the target domain dataset obtained from the target domain dataset building module through transfer learning strategy to obtain the surrogate model.

[0113] Other aspects of this embodiment can be found in the above method embodiments.

[0114] In summary, this invention is used to construct a high-speed link signal integrity proxy model, which improves the model prediction accuracy and training efficiency while significantly reducing the number of high-precision transient simulations. It solves the problems of excessive time consumption in traditional transient simulations, large data dependence of ANN models, and limited applicability of transfer learning.

[0115] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning, characterized in that, Includes the following steps: S1. Select the high-speed link structure to be modeled, build the corresponding simulation circuit, and set the parameters to obtain the transient waveform and eye diagram of the link. S2. Source Domain Fast Time Domain Simulation Data Generation: Based on the multi-edge response method, the edge signals without inter-symbol interference are extracted from the transient waveform in step S1, and the shifted and superimposed signals are used to construct the transient waveform of the high-speed link. The worst-case eye diagram is generated based on the edge signal using dynamic programming, and the key eye diagram SI index is extracted. S3. Based on the simulation circuit in step S1, obtain transient simulation data in the target domain, perform transient simulation in the target domain, obtain high-quality data, and construct the target domain dataset. S4. Based on the modeling task type, design a neural network model and use the source domain fast time domain simulation data obtained in step S2 to construct a source domain pre-trained model. S5. Load the source domain pre-trained model obtained in step S4, and use the target domain dataset obtained in step S3 to adjust the target domain model through transfer learning strategy to obtain the surrogate model.

2. The general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning according to claim 1, characterized in that, In step S2, the multi-edge response method is as follows: S2.1 Construct the edge response of the first two leading bits using the bit response pattern: f 01 (t)=y 010 (t)-y 001 (t+T)+V high f 11 (t)=y 110 (t) Among them, b -2 1 represents the symbol of the first two bits. This means that for the current bit being 0, considering the previous bit pattern as b - The descending edge of 21; V high This is the steady-state response value at a high level; The ascending edge is represented by the following formula: r 10 (t)=y 101 (t)-y 110 (t+T)+V low r 00 (t)=y 001 (t) Among them, b -2 0 represents the symbol of the first two bits. This means that for the current bit being 1, considering the previous bit pattern as b -2 Rising edge of 0; V low This is the steady-state response value at a low level; S2.

2. Extending the second-order multi-edge response to higher orders, when considering m leading bits, the multi-edge response is expressed as: Among them, b -m Let b0 be the m-th leading bit, and b0 represent the current bit. This indicates the response considering the first m leading bits. This indicates that the current bit is 1 and the leading bit pattern is b. -m ,…,b -2 The rising edge of 0, This indicates that the current bit is 0 and the leading bit pattern is b. -m ,…,b -2 The descending edge of 1; S2.3 After pre-determining the MER order and obtaining the pure multi-edge response through transient simulation, the target code sequence is scanned bit by bit to identify all bit positions i where edge transitions occur. For each edge transition position i, m bits are truncated forward as a preamble code, i.e., bits 1 to i-1, to select the corresponding edge response. The multi-edge response signal under the corresponding preamble code is shifted right by i bit periods to align with the time point of the i-th bit transition. All edge transition positions are traversed and superimposed to form the final transient waveform. S2.4 For a continuous time-domain waveform with multiple edge responses r(t) and f(t), the sampling point is fixed at the moment after the Nth bit ends, representing the influence of all input bits on the current bit; every bit period, at the same relative position in each bit period, it is sampled into edge response arrays R[k] and F[k], representing the influence of the position where the transition occurs delayed by kT time at the current sampling point.

3. The general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning according to claim 2, characterized in that, In step S2: Define the DP state This indicates that when the input reaches the i-th bit, the last m bits of the input sequence are represented by the code b. -m ,…,b -1 The minimum accumulated voltage, then the next bit Only through and Superimposed b -2 →b -1 The influence of code pattern transitions is obtained; the specific formula of the dynamic programming method is as follows: in, in, The leading bit at position j at time Δt is 1,b -m ,…,b -2 The voltage change at the sampling point after an edge response delay of (Nj)T time. This indicates that the leading bit at position j at time Δt is 0, b -m ,…,b -2 The voltage change at the sampling point after an edge response delay of (Nj)T time. and These represent the response values ​​of the rising or falling edge occurring at position j, respectively. By filling the state matrix A of size N×M, the worst case "1" of the current sampling point is the minimum value of the last column of the matrix; for the entire cell interval period, traverse each sampling point to obtain the worst eye diagram case "1".

4. The general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning according to claim 3, characterized in that, In step S2, for the worst case "0", the worst code pattern sequence that maximizes the voltage at the sampling point is found, thereby calculating the worst eye diagram. The specific process is as follows: Only through and Superimposed b -2 →b -1 The influence of code pattern transitions is obtained. For the worst case "0", the search is for the edge response that has the greatest impact on the current sampling point. Therefore: in, in, The leading bit at position j at time Δt is 1,b -m ,…,b -2 The voltage change at the sampling point after an edge response delay of (Nj)T time. This indicates that the leading bit at position j at time Δt is 0, b -m ,…,b -2 The voltage change at the sampling point after an edge response delay of (Nj)T time. and These represent the response values ​​of the rising or falling edge occurring at position j, respectively. Finally, the worst case "0" for the current sampling point is the maximum value of the last column of the matrix; for the entire cell interval period, traverse each sampling point to obtain the worst eye diagram case "0"; the worst case "0" and the worst case "1" together constitute the worst eye diagram.

5. The general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning according to claim 1, characterized in that, Step S4 specifically includes: S4.1 Design a multi-layer fully connected deep neural network with normalized high-speed link structure geometric parameters as input and eye height data as output; design a temporal convolutional network with sequence waveforms of high-speed link input as input and time-domain waveforms of the receiver as output. S4.2 Load the source domain fast time-domain simulation dataset and divide it into training, validation, and test sets; select mean squared error as the loss function for the model: Where n is the number of samples, y i This is the actual result of the sample. This is the predicted value of the sample output by the model; update the model parameters using the Adam optimizer; set the initial learning rate, batch size, training epochs, and early stopping strategy. S4.3 Iteratively update on the training set, use the validation set to monitor overfitting and adjust hyperparameters; when the validation set performance no longer improves or reaches the preset stopping condition, then evaluate the model performance on the test set and save the final model weights and network structure definition; S4.4 Save the pre-trained model parameters and corresponding network definitions for use in target domain transfer initialization. The neural network structure and hyperparameters of the target domain model are consistent with those of the source domain pre-trained model.

6. The general modeling method for signal integrity analysis based on fast time-domain simulation and transfer learning according to claim 1, characterized in that, Step S5 specifically includes: S5.

1. Based on the amount of data in the target domain and the similarity between the source and target domains, select or combine the following strategies: full model fine-tuning and partial freezing strategies. The full model fine-tuning method loads all weights from the source domain model to the target domain model and adjusts the weights of all layers on the target domain training set using a learning rate lower than the set value. The partial freezing strategy freezes several DNN feature extraction layers or several TCN residual blocks and only initializes and trains subsequent layers or newly added modules, balancing the transfer of prior knowledge from the source domain and the adaptation to the target domain. S5.2 Configure the optimizer and learning rate scheduler, update parameters on the target domain training set in mini-batch iterations, and monitor performance on the validation set; determine whether to adjust the learning rate or modify the freezing strategy based on the validation curve; record training loss, validation loss and other evaluation metrics during training; if overfitting or validation performance deteriorates, take measures such as regularization, reducing the number of training rounds or relaxing the number of frozen layers. S5.3 Under different sample sizes in the target domain, scan the hyperparameters of the number of frozen layers, learning rate, and training epochs to determine the optimal transfer strategy when the sample size is less than the set value and the similarity between the source and target domains is higher than the set value; record the performance curves under different strategy combinations to form experience guidance.

7. A general modeling system for signal integrity analysis based on fast time-domain simulation and transfer learning, used to perform the method as described in any one of claims 1-6, characterized in that, Includes the following modules: Target circuit structure selection module: Select the high-speed link structure to be modeled, build the corresponding simulation circuit, set the parameters, and obtain the transient waveform and eye diagram of the link; Source domain fast time-domain simulation data generation module: Based on the multi-edge response method, it extracts clean edge signals from transient waveforms and constructs transient waveforms of high-speed links by shifting and superimposing them; The worst-case eye diagram is generated based on the edge signal using dynamic programming, and the key eye diagram SI index is extracted. Target domain dataset construction module: Based on the simulation circuit, acquire transient simulation data in the target domain, perform transient simulation in the target domain, obtain high-quality data, and construct the target domain dataset; Source domain pre-trained model building module: Design a neural network model according to the modeling task type, and build a source domain pre-trained model using the source domain fast time-domain simulation data obtained by the source domain fast time-domain simulation data generation module; Model generation module: Loads the source domain pre-trained model obtained from the source domain pre-trained model building module, and adjusts the target domain model using the target domain dataset obtained from the target domain dataset building module through transfer learning strategy to obtain the surrogate model.

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