System and method for micro-led pixel driving circuit

Abstract

This disclosure provides a miniature LED pixel driving circuit, which includes a logic operation module and a pixel driving module. The logic operation module receives an N-bit image data signal, where N is a positive integer. The logic operation module includes a conversion unit, an AND logic unit connected to the conversion unit, and a NOR logic unit connected to the AND logic unit. The conversion unit is used to convert the N-bit image data signal in a first format to a second format. The AND logic unit is used to convert the N-bit image data signal in the second format and a timing control signal to a third format. The NOR logic unit is used to convert the N-bit image data signal in the third format to a fourth format to control the on / off state of the pixel driving module.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a micro LED pixel driving circuit and system, as well as a program for driving the micro LED pixel driving system. Background Technology

[0002] Display technology is becoming increasingly important in today's commercial electronic devices. Display panels are widely used in fixed large-screen devices such as LCD TVs and OLED TVs, as well as portable electronic devices such as laptops, smartphones, tablets, and wearable electronic devices.

[0003] Light-emitting diode (LED) chips typically include organic light-emitting diode (OLED) chips, miniature light-emitting diode (submillimeter-sized LED) chips, or micro-LED (micrometer-sized LED) chips. LEDs are widely used in the lighting industry. As LED displays gradually penetrate the high-end market, the requirements for the luminous efficiency of LED display devices are also increasing.

[0004] A pixel is made up of small squares in an image. These squares have defined locations and are assigned color values; their color and location together determine the appearance of the image. A pixel can be considered an indivisible unit or element in an image. Indivisibility means that a pixel cannot be further divided into smaller units or elements existing in monochrome units. Each bitmap image contains a certain number of pixels, which determine the size of the image displayed on the screen.

[0005] Micro-LED display technology is related to micrometer-scale LED pixel units, which can be assembled with driving panels to form high-density LED display arrays. In this paper, micro-LED display technology may also be referred to as μ-LED display technology. Due to the miniaturization, high integration, and self-emissive properties of micro-LED chips, compared with LCD and OLED, micro-LEDs have greater advantages in brightness, resolution, contrast ratio, energy consumption, lifespan, response speed, and thermal stability. In some schemes, early LED display screen pixels were formed by combining LEDs with the three primary colors of red, green, and blue.

[0006] In some designs, the driving circuit of a micro-LED device includes switching transistors to drive at least one single pixel, and these switching transistors are high-voltage transistors, referred to as input / output (I / O) transistors. High-voltage transistors occupy a large portion of the pixel area, thus limiting the data buffer capacity of a single pixel and complicating driving control. Therefore, a new driving circuit structure is needed that can improve the data buffer capacity of a single pixel while simplifying control.

[0007] Therefore, there is a need to provide a light-emitting pixel driving circuit for a display panel to solve the above-mentioned defects and other problems. Summary of the Invention

[0008] To improve display devices and address problems and deficiencies in display systems (such as those mentioned above), improvements to the design of display devices are needed. In particular, a micro-LED pixel driving system with improved image and data buffering capacity is required.

[0009] This disclosure relates to the field of display technology, and discloses a light-emitting diode (LED) pixel driving circuit and system, as well as a method for driving a micro LED pixel system. In some embodiments, this disclosure relates to a digital micro LED pixel driving system, thereby solving the technical defect of limited data buffer capacity of current pixel light-emitting units.

[0010] This disclosure includes, but is not limited to, the following exemplary embodiments.

[0011] Some exemplary embodiments of this disclosure provide a miniature light-emitting driving circuit, the miniature light-emitting driving circuit including: a logic operation module and a pixel driving module electrically connected to the logic operation module. In some embodiments, the logic operation module is adapted to receive an N-bit image data signal from its input terminal, where N is a positive integer; and the logic operation module includes: a conversion unit, an AND logic unit connected to the conversion unit, and a NOR logic unit connected to the AND logic unit. In some embodiments, the conversion unit is used to convert an N-bit image data signal of a first format into an N-bit image data signal of a second format; the AND logic unit is used to convert the N-bit image data signal of the second format into an N-bit image data signal of a third format; and the NOR logic unit is used to convert the N-bit image data signal of the third format into an N-bit image data signal of a fourth format.

[0012] In some embodiments or any combination of embodiments of the micro-light-emitting driving circuit, the pixel driving module includes a current source, a switching transistor, and a micro-LED pixel. In some embodiments, the current source is electrically connected to a first terminal of the switching transistor, the gate of the switching transistor is electrically connected to the output terminal of the logic operation module, the second terminal of the switching transistor is electrically connected to a first electrode of the micro-LED pixel, and the second electrode of the micro-LED pixel is grounded.

[0013] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, the conversion unit is used to convert the N-bit image data signal of the first format into the N-bit image data signal of the second format after receiving a trigger signal, the N-bit image data signal of the second format being processed by logical operators, and the conversion unit is an N-bit static random access memory (SRAM) cell latch.

[0014] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, the AND logic unit is used to receive timing control signals from the conversion unit and N-bit image data signals in the second format, and output N-bit image data signals in the third format.

[0015] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, the conversion unit includes N parallel sub-conversion units, each of which is used to convert 1 bit of the N-bit image data signal in the first format to the second format after receiving a trigger signal.

[0016] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, the AND logic unit includes N parallel sub-AND logic units, each of which is used to receive a timing control signal for its corresponding bit in the N-bit image data signal of the second format from the corresponding sub-conversion unit, and outputs its corresponding bit in the N-bit image data signal of the third format.

[0017] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, the NOR logic unit is used to receive N-bit image data signals from N parallel sub-AND logic units and output the N-bit image data signal in the fourth format.

[0018] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, the logic operation module is used to output the N-bit image data signal of the fourth format to the gate of the switching transistor to control the on / off state of the switching transistor.

[0019] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, the switching transistor is turned on when both the timing control signal and the N-bit image data signal of the second format are at a first level, wherein the first level is a high level or a low level.

[0020] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, N=2 k k is a non-negative integer.

[0021] In some embodiments or any combination of embodiments of the micro-light-emitting driving circuit, the switching transistor is a high-voltage transistor, and one micro-LED pixel corresponds to one switching transistor.

[0022] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, the N-bit SRAM cell latch includes N 1-bit SRAM cell latches.

[0023] In some embodiments or any combination of embodiments of the micro light-emitting driving circuit, each of the 1-bit SRAM cell latches is used to store 1 bit of the N-bit image data signal.

[0024] This disclosure provides a micro-light-emitting driving method, which includes: providing an N-bit image data signal, where N is a positive integer, to the input terminal of a logic operation module; converting the N-bit image data signal in a first format to a second format through a conversion unit of the logic operation module; converting the N-bit image data signal in the second format to a third format through an AND logic unit of the logic operation module; converting the N-bit image data signal in the third format to a fourth format through a NOR logic unit of the logic operation module; and connecting a pixel driving module to the output terminal of the logic operation module.

[0025] This disclosure provides a miniature light-emitting display system, comprising: one or more miniature LED pixels, a timing control circuit module, and a data buffer conversion module. In some embodiments, the data buffer conversion module includes: a logic operation module and a pixel driving module electrically connected to the logic operation module. In some embodiments, the logic operation module is adapted to receive an N-bit image data signal from its input terminal, where N is a positive integer; the logic operation module includes: a conversion unit, an AND logic unit connected to the conversion unit, and a NOR logic unit connected to the AND logic unit. In some embodiments, the conversion unit is used to convert an N-bit image data signal of a first format to a second format; the AND logic unit is used to convert the N-bit image data signal of the second format to a third format; and the NOR logic unit is used to convert the N-bit image data signal of the third format to a fourth format.

[0026] To address the technical drawback of pixel driving circuits occupying too much pixel area, which directly leads to low buffer capacity of a single pixel, this disclosure provides an I / O transistor with only one high-voltage transistor and other devices employing the core transistor to improve the data buffer capacity of a single pixel and simplify control.

[0027] In some embodiments, this disclosure is described in the following ways to achieve the above objectives.

[0028] In some aspects, a micro LED pixel driving circuit includes a logic operation module and a pixel driving module, wherein the logic operation module and the pixel driving module are electrically connected.

[0029] In some embodiments, the logic operation module is adapted to receive an N-bit image data signal D, a timing control signal SF for image timing control, and a word line (WL) signal for converting the N-bit image data signal D into a data signal DL that can be processed by a logic operator, and the logic operation module outputs an N-bit Y signal.

[0030] In some embodiments, the pixel driving module includes a current source, a switching transistor, and a micro LED pixel; wherein the current source is connected to the source electrode of the switching transistor, the gate of the switching transistor is connected to the output terminal of the logic operation module to receive a Y signal, the drain electrode of the switching transistor is connected to the positive electrode of the micro LED pixel, and the negative electrode of the micro LED pixel is grounded.

[0031] According to the above embodiments, there is no need to employ a pixel driving circuit with two or more I / O transistors. Instead, the pixel driving circuit for a single pixel includes an I / O transistor with only one high-voltage transistor, and a core transistor is used in other devices. In some embodiments, the pixel driving circuit includes a logic operation module, which can achieve the goal of driving micro-LED pixels, and the driving circuit occupies a small pixel area, thereby increasing the data buffer capacity of a single pixel and simplifying control.

[0032] In some embodiments, the logic operation module includes: a conversion unit, an AND logic unit, and a NOR logic unit. The input of the conversion unit is adapted to an N-bit image data signal D and a WL signal. The WL signal is used to convert the N-bit image data signal D into a data signal DL that can be operated on by logical operators. The output of the conversion unit is adapted to output the data signal DL that can be operated on by logical operators. The input of the AND logic unit is adapted to receive the DL signal and the SF signal. After performing an AND logic operation on the two signals, the AND logic unit outputs the result Y signal. Multiple Y<N-1:0> signals are input to the NOR logic unit, and the NOR logic unit performs a NOR logic operation and transmits the NOR operation result to the gate of a switching transistor to control the on / off state of the switching transistor. Y<N-1:0> means that the number of Y signals is N, where N includes Y(0), Y(1), Y(2)...Y(N-1), and N is a positive integer.

[0033] According to the above embodiment, the pixel driving circuit includes a logic operation module for a single pixel. When both the timing control signal SF and the data signal DL are at a high level, the switching transistor is turned on.

[0034] In some embodiments, the conversion unit is an N-bit static random access memory (SRAM) cell latch.

[0035] In some embodiments, the number of AND logic units is N, the NOR logic unit is a module for receiving N inputs, and the number of switching transistors is 1.

[0036] In some embodiments, N can be 1 bit, 4 bits, 8 bits, 16 bits, or 2 bits. k The number of bits is k, where k is a non-negative integer.

[0037] In some embodiments, the switching transistor is a high-voltage transistor.

[0038] In some aspects, the novel micro LED pixel driving system includes a display matrix, a timing control system, and a buffer system, wherein the buffer system is data-connected to the display matrix, the timing control system is control-connected to the display matrix, and the timing control system is used to control the buffer system to transmit data to the display matrix.

[0039] According to the above embodiments, this disclosure provides a pixel driving system for a pixel driving circuit.

[0040] In some aspects, a method for driving micro-LED pixels includes the following steps:

[0041] Step 1: The latch receives the source image data signal D and converts it to signal DL upon triggering the WL signal. Before completing the logical operation on signal DL, signal D is stored in the latch, and the latch locks the signal format conversion. Upon triggering the next WL signal, signal D is converted to signal DL. Subsequent conversions of signal D follow the same procedure. For example, when signal D is sent to the latch, the latch holds the data signal D until WL goes high before converting it to signal DL. When WL goes high, the state of data signal D transitions to the state of signal DL.

[0042] Step 2: Simultaneously perform N-bit timing control signal SF and N-bit signal DL on multiple AND logic operation branches, and output the operation result as Y<N-1:0>. In some instances, the number of multiple AND logic operation branches is N.

[0043] Step 3: The synchronous operation results Y< N-1: 0 > from multiple AND logic operation branches are jointly operated on the NOR logic unit, and the NOR logic unit outputs the VPX signal.

[0044] Step 4: Provide the VPX signal to the gate of the switching transistor in the pixel driver module to control the switching, as well as the brightness and grayscale of the micro LED pixels.

[0045] According to the above embodiments, this disclosure provides a driving method for a pixel driving system based on a logical operator implementation.

[0046] In some embodiments, the number of NOR logic cells is one or more.

[0047] In some embodiments, N bits can be 1 bit, 4 bits, 8 bits, 16 bits, or 2 bits. k The number of bits is k, where k is a non-negative integer.

[0048] According to embodiments of this disclosure, instead of employing a pixel driving circuit with more I / O transistors, a design with only one high-voltage I / O transistor is used, and a core transistor is employed in other devices. In some embodiments, a logic operation module is used. The pixel driving circuit simplifies the control of driving micro-LED pixels. Because the driving circuit occupies a smaller area, the data buffer capacity of a single pixel is increased.

[0049] It should be noted that the various embodiments described above can be combined with any other embodiments described in this disclosure. This disclosure does not describe all features and advantages; in particular, many additional features and advantages will become apparent to those skilled in the art upon reference to the accompanying drawings, specification, and claims. Furthermore, it should be pointed out that the language used in this disclosure is chosen primarily for readability and guidance purposes and is not intended to define or limit the subject matter of the invention. Attached Figure Description

[0050] To enable a more detailed understanding of this disclosure, a more specific description can be obtained by referring to the features of various embodiments, some of which are illustrated in the accompanying drawings. However, the drawings are for illustrative purposes only and should not be considered limiting, as this disclosure may contain other valid features.

[0051] For ease of description, "upward" is used to indicate a substrate or circuit board away from the light-emitting structure, "downward" is used to indicate towards the substrate, and other directional terms such as top, bottom, above, below, under, etc. are interpreted in accordance with this principle.

[0052] Figure 1 A schematic diagram of an exemplary external layout for a micro LED display driving system is shown.

[0053] Figure 2 A circuit diagram of an exemplary micro LED pixel driving system is shown.

[0054] Figure 3 A circuit diagram of an exemplary micro LED pixel driving system is shown.

[0055] Figure 4A schematic diagram of an exemplary micro LED pixel driving circuit is shown.

[0056] Figure 5 A schematic diagram of an exemplary structure of a micro LED pixel driving circuit is shown.

[0057] Figure 6 A schematic diagram of an exemplary micro-LED pixel driving circuit for driving 4-bit image data is shown.

[0058] The attached diagram includes the following component identifiers: 01, Display Matrix; 02, Timing Control System; 03, Frame Buffer System; 1, Miniature LED Pixel Unit; 2, Timing Control Circuit Module; 2-1, Timing Control Unit; 2-2, Subframe Control Unit; 3, Data Buffer Conversion Module; 3-1, Bit Conversion Unit; 3-2, External Data Input Port; 3-3, Memory; 4, Reference Current Module; 4-1, Current Source; 4-2, Current Mirror; A1, Logic Operation Module; A1-1, Conversion Unit; A1-2, AND Logic Unit; A1-3, NOR Logic Unit; A2, Pixel Driver Module; A2-1, Current Source; A2-2, Switching Transistor; A2-3, Miniature LED Pixel.

[0059] By convention, features in the illustrations may not be drawn to scale. Therefore, for clarity, the dimensions of features may be arbitrarily enlarged or reduced. Furthermore, some figures may not fully represent all components of a particular system, method, or apparatus. Finally, the same reference numerals are used to denote the same features in the specification and figures. Detailed Implementation

[0060] This disclosure provides detailed descriptions of numerous details to better understand the exemplary embodiments shown in the accompanying drawings. However, some embodiments may be practiced with many specific details omitted, and the scope of the claims is limited only to the features and aspects specifically set forth in the claims. Furthermore, to avoid unnecessary description that could obscure the embodiments of this disclosure, well-known processes, components, and materials are not described in detail.

[0061] This disclosure relates to the field of micro LED display technology, and discloses a micro LED pixel driving circuit and system, as well as its driving method. Specifically, this disclosure reveals how to drive pixels when displaying images through pixels.

[0062] In both analog and digital technologies, information or data (such as any video or audio) is converted into electrical signals. Analog circuits convert information or data into electrical pulses of different amplitudes, while digital circuits convert information or data into a binary format (0 or 1), where each data bit represents two different amplitudes.

[0063] Currently, the pixel driving circuit occupies too much pixel area, resulting in low data buffer capacity of a single pixel buffer. This disclosure aims to address this technical deficiency. In some embodiments, the micro-LED pixel driving circuit includes a logic operation module and a pixel driving module. The logic operation module and the pixel driving module are electrically connected. In some embodiments, the logic operation module outputs an N-bit Y signal. In some embodiments, the pixel driving module includes a current source, a switching transistor, and a micro-LED pixel. In some embodiments, the current source is connected to the source electrode of the switching transistor, the gate of the switching transistor is connected to the output terminal of the logic operation module to receive the Y signal, the drain electrode of the switching transistor is connected to the positive terminal of the micro-LED pixel, and the negative terminal of the micro-LED pixel is grounded. This disclosure provides an I / O transistor with only one high-voltage transistor, and other devices employ a core transistor, thereby increasing the data buffer capacity of a single pixel and simplifying control. For example, the data buffer capacity of a single-pixel display is increased by 100% or more (at least twice the previous data buffer capacity). In some embodiments, the high-voltage transistor refers to a low-leakage transistor. In some embodiments, the high-voltage transistor includes a high-voltage field-effect transistor (FET). In some embodiments, the low-leakage transistor has extremely low turn-off leakage current. In some embodiments, the high-voltage transistor handles input / output signals requiring a higher supply voltage (e.g., 1.8V, 2.5V, or 1.8V to 3.3V, or other circuit-dependent ranges) compared to other core logic devices / transistors on the same integrated circuit chip / board. In some instances, other core logic transistors require a lower supply voltage (e.g., 0.9V-1.2V, or other voltage ranges depending on circuit requirements). In some embodiments, the core logic transistor includes a core FET. The microLED pixel driving system disclosed herein is adapted to drive microLED pixels to display images on a display screen.

[0064] Figure 1 A schematic diagram of an exemplary external layout for a micro LED display driving system is shown.

[0065] In one or more embodiments, such as Figure 1As shown, the micro LED pixel driving system includes a display matrix 01, a timing control system 02, and a frame buffer system (or cache system) 03. In the field of micro LED display technology, the display matrix 01 refers to an array (e.g., 2040*1080) composed of multiple micro LED pixels, the timing control system 02 is an integrated control chip, and the frame buffer system 03 is a memory. In some embodiments, the frame buffer system 03 is used to access and store external image data. The frame buffer system 03 is connected to the display matrix 01 to transmit data, so that the data stored in the frame buffer system 03 can be displayed through the display matrix 01. In practical applications, the image in the display matrix 01 needs to meet various color requirements. Therefore, it is necessary to control the timing of data transmission from the frame buffer system 03 to the display matrix 01, or to adjust the brightness and grayscale level of the display matrix 01. In some embodiments, the timing control system 02 is electrically connected between the display matrix 01 and the frame buffer system 03 so as to drive and load the data in the frame buffer system 03.

[0066] Figure 2 A circuit diagram of an exemplary micro LED pixel driving system is shown.

[0067] Figure 3 An exemplary micro LED pixel driving system is shown (e.g. Figure 2 The circuit structure diagram of the micro LED pixel driving system shown is shown.

[0068] In one or more embodiments, Figure 2 and Figure 3 The illustrated micro-LED pixel driving system includes a micro-LED unit 1, a timing control circuit unit 2, a data buffer conversion module 3, and a reference current module 4. In some embodiments, the reference current module 4 provides a constant current to the micro-LED pixel unit 1. The data buffer conversion module 3 performs format conversion on external input data and stores the external input data. The data buffer conversion module 3 is electrically connected to the micro-LED pixel unit 1 so that the data stored in the data buffer conversion module 3 can be displayed through the micro-LED pixel unit 1. The timing control module 2 is electrically connected between the data buffer conversion module 3 and the micro-LED pixel unit 1, and is used to drive and control the display sequence and other display parameters of the micro-LED pixel unit. Figure 2 In the display matrix 01, one or more micro LED pixel units 1 are included.

[0069] In some embodiments, the micro-LED pixel unit 1 is a single pixel in the display matrix 01. In some embodiments, such as Figure 3As shown, the reference current module 4 includes a current source 4-1 and a current mirror 4-2, wherein one end of the current source 4-1 is electrically connected to one end of the current mirror 4-2, and the other end of the current mirror 4-2 is used to provide current to the micro LED pixel unit 1. In some embodiments, the current mirror 4-2 replicates the same current from the current source and provides a constant current to each micro LED pixel unit 1.

[0070] In some embodiments, the circuit structure of the timing control circuit module 2 and the data buffer conversion module 3 is configured as follows: The components of the timing control circuit module 2 include a timing control unit 2-1, a subframe control unit 2-2, and subframe control switches SF0, SF1, ..., SFn, wherein the number of subframe control switches is N (N is a positive integer). In some embodiments, the subframe control unit 2-2 controls the global brightness of each pixel in the display matrix 01, and each pixel of the display matrix 01 is connected to the same group of subframe control switches SF0, SF1, ..., SFn for brightness control. For example, the number of subframe control switches is 4, and the subframe control switches include SF0, SF1, SF2, and SF3. The components of the data buffer conversion module 3 include a bit conversion unit 3-1, an external data input port 3-2, a memory 3-3, and data transmission switches B0, B1, ..., Bn. The number of data transmission switches can be N. In some embodiments, the number of data transmission switches is 4, that is, the data transmission switches include B0, B1, B2, and B3. In some embodiments, the value of N is selected based on the number of bits in the image data or a fraction of the number of bits in the image data (e.g., 1 / 2, 1 / 4, 1 / 8, 1 / 16, 1 / 32, etc.).

[0071] In some embodiments, high-voltage transistors are selected for SF0, SF1, SF2, and SF3, as well as B0, B1, B2, and B3. The source electrodes of SF0, SF1, SF2, and SF3 are connected to the current mirror 4-2, the drain electrodes of SF0, SF1, SF2, and SF3 are connected to the drain electrodes of B0, B1, B2, and B3, respectively, and the source electrodes of B0, B1, B2, and B3 are connected to the micro-LED pixel unit 1. In some embodiments, the subframe control switch and the data transmission switch are transistors, such as field-effect transistors, metal-oxide-semiconductor field-effect transistors (MOSFETs), or bipolar junction transistors (BJTs).

[0072] In some embodiments, the gates of SF0, SF1, SF2, and SF3 are respectively connected to the corresponding output ports of the subframe control unit 2-2. The timing control unit 2-1 is electrically connected to the subframe control unit 2-2. The gates of B0, B1, B2, and B3 are respectively connected to the corresponding data output ports of the memory 3-3. The external data input port 3-2 is located at the input terminal of the memory 3-3, and the bit conversion unit 3-1 is located at the input terminal of the memory 3-3.

[0073] In some embodiments, the circuit structures of the timing control unit 2-1, subframe control unit 2-2, bit conversion unit 3-1, external data input port 3-2, and memory 3-3 are understandable and implementable by those skilled in the art. For example, the timing control unit 2-1, subframe control unit 2-2, bit conversion unit 3-1, external data input port 3-2, and memory 3-3 are all implemented using application-specific integrated circuits (ASICs), which use P-channel metal-oxide-semiconductor (PMOS), N-channel metal-oxide-semiconductor (NMOS), or other types of transistors. In some embodiments, the timing control unit 2-1, subframe control unit 2-2, bit conversion unit 3-1, external data input port 3-2, and memory 3-3 can be implemented using other integrated circuit chips or circuit boards, including field-programmable gate arrays (FPGAs). Memory 3-3 can be static random access memory (SRAM) or dynamic random access memory (DRAM).

[0074] exist Figure 3 In the illustrated micro-LED pixel digital driving system, the driving circuit of the micro-LED device includes multiple switching transistors to drive at least one individual pixel. These switching transistors are high-voltage transistors, referred to as input / output (I / O) devices. High-voltage transistors occupy a large portion of the pixel area, directly resulting in limited buffer capacity for individual pixels and complex control schemes. In some embodiments, an improved micro-LED pixel digital driving system will be further described below, which increases the data buffer capacity of individual pixels and simplifies the control scheme of the micro-LED pixel digital driving system.

[0075] In some embodiments, combined with Figures 4 to 6 , showed Figure 1 The diagram shows the structure of a micro-LED pixel driving circuit. In some embodiments, Figures 4 to 6 The structure shown is primarily applicable to pixel-driven designs with extremely small dimensions (e.g., less than 50 micrometers, less than 20 micrometers, less than 10 micrometers, or preferably less than 4 micrometers, such as 2-20 micrometers) in this field.

[0076] Figure 4 A schematic diagram of an exemplary micro LED pixel driving circuit is shown.

[0077] Figure 5 A schematic diagram of an exemplary structure of a micro LED pixel driving circuit is shown.

[0078] Figure 6 A schematic diagram of an exemplary micro-LED pixel driving circuit for driving 4-bit image data is shown.

[0079] In some embodiments, the structure of the micro LED pixel driving circuit includes a logic operation module A1 and a pixel driving module A2. The logic operation module A1 and the pixel driving module A2 are electrically connected.

[0080] In some embodiments, the logic operation module A1 can receive three types of signals: first, an N-bit image data signal D; second, a timing control signal SF for controlling image timing; and third, a WL signal for converting the N-bit image data signal D into a data signal DL that can be operated on by logical operators. The logic operation module A1 can output an N-bit Y signal. In some embodiments, the timing control signal SF adjusts the rise and fall times of the data signal by controlling the on / off sequence of a switch.

[0081] In some embodiments, the pixel driving module A2 includes a current source A2-1, a switching transistor 2-2, and a micro LED pixel A2-3. The current source A2-1 is connected to the source electrode of the switching transistor A2-2, the gate of the switching transistor A2-2 is connected to the output terminal of the logic operation module A1 to receive a Y signal, the drain electrode of the switching transistor A2-2 is connected to the positive electrode of the micro LED pixel A2-3, and the negative electrode of the micro LED pixel A2-3 is grounded.

[0082] In some embodiments, the logic operation module A1 includes a conversion unit A1-1, an AND logic unit A1-2, and a NOR logic unit A1-3. The input of the conversion unit A1-1 receives an N-bit image data signal D and a WL signal. The WL signal is used to convert the N-bit image data signal D into a data signal DL that can be operated on by logical operators. The output of the conversion unit A1-1 outputs the data signal DL that can be operated on by logical operators. The input of the AND logic unit A1-2 receives the DL signal and the SF signal, and outputs the result Y signal after performing an AND logic operation on the two signals. Multiple Y<N-1:0> signals are input to the NOR logic unit A1-3 to perform NOR logic operations, and the operation result is transmitted to the gate of the switching transistor A2-2 to control the on / off state of the switching transistor A2-2.

[0083] In some embodiments, such as Figure 5 and Figure 6As shown, conversion unit A1-1 is an N-bit static random access memory (SRAM) cell latch. In Figure 6 In this configuration, the N-bit SRAM cell latch A1-1 consists of N 1-bit SRAM cells. The number of AND logic units A1-2 is N (N is a positive integer). The NOR logic units A1-3 can be modules for implementing N inputs, such as combination modules with multiple NOR logic units A1-3. The number of switching transistors A2-2 is 1. N bits can be 1 bit, 4 bits, 8 bits, or 16 bits. In some embodiments, N bits can be any number of bits. In some embodiments, N bits can be 2. k Bit, k is a non-negative integer. In some embodiments, the switching transistor A2-2 is a high-voltage transistor.

[0084] In some embodiments, the novel micro-LED pixel driving method uses a 4-bit image data type, referenced... Figure 5 and Figure 6 The driving method includes the following steps:

[0085] Step 1: Conversion unit A1-1 receives the source image data signal D and converts it into signal DL upon triggering the WL signal. Before signal DL completes its logical operation (e.g., conversion to DL), conversion unit A1-1 stores signal D in a latch and locks the signal format conversion. Upon triggering the next signal WL, signal D is converted into signal DL, and the next signal D follows the same conversion pattern. In some embodiments, WL can act as a switch. When WL is high, DL is connected to D, and DL becomes the state of D (this state can be high or low). When WL is low, DL is disconnected from D, and DL remains in the state of D until WL becomes low. For example, at time point T0, D is high and WL is low. At time point T1, WL becomes high, the state of D is transmitted to DL, and DL becomes high. At time point T2, WL becomes low, and DL remains high. At time T3, WL is low, D is low, and DL remains high. At time T4, WL goes high, the state of D is transmitted to DL, and DL goes low. At time T5, WL goes low, and DL remains low.

[0086] Step 2: Simultaneously perform operations on the 4-bit timing control signal SF and the 4-bit signal DL on multiple AND logic branches, and output the result as Y<3:0>. Here, Y<3:0> represents Y0, Y1, Y2, and Y3.

[0087] Step 3: The synchronous operation results Y<3:0> on multiple AND logic operation branches are jointly operated on the NOR logic operator, and the VPX signal is output by the NOR logic operator through the NOR logic unit A1-3.

[0088] Step 4: Send the VPX signal to the gate of the switching transistor A2-2 of the pixel driver module A2 to control the switching and the brightness and grayscale of the micro LED pixels 2-3.

[0089] Those skilled in the art should understand that the micro LED pixel driving system is not limited to the structure described above, and may contain more or fewer components than illustrated, or a combination of some components, or use different components.

[0090] The above description is merely an embodiment of this disclosure, and this disclosure is not limited thereto. Modifications, equivalent substitutions, and improvements made without departing from the concepts and principles of this disclosure are all within the protection scope of this disclosure.

[0091] Other embodiments also include various subsets of the above embodiments, including, for example Figures 1 to 6 The embodiments shown may be combined or otherwise rearranged in various other embodiments.

[0092] While the detailed description contains many specific details, these details should not be construed as limiting the scope of this disclosure, but rather as illustrating different embodiments and aspects of this disclosure. It should be understood that the scope of this disclosure also includes other embodiments not discussed in detail above. For example, the methods described above can be applied to the integration of functional devices other than LEDs and OLEDs with control circuitry other than pixel drivers. Examples of non-LED devices include vertical-cavity surface-emitting lasers (VCSELs), photodetectors, microelectromechanical systems (MEMS), silicon photonic devices, power electronic devices, and distributed feedback lasers (DFBs). Examples of other control circuitry include current drivers, voltage drivers, transimpedance amplifiers, and logic circuits.

[0093] The above description of embodiments of this disclosure is intended to enable those skilled in the art to make or use the embodiments described herein and variations thereof. Various modifications to these embodiments will be readily understood by those skilled in the art, and the general principles defined in this disclosure can be applied to other embodiments without departing from the spirit or scope of the subject matter. Therefore, this disclosure is not limited to the specific embodiments described, but should be given the broadest scope of protection consistent with the claims and the principles and novel features disclosed herein.

[0094] The features of this disclosure can be implemented using or by means of computer software products, such as a storage medium (medium) or a computer-readable storage medium (medium) storing instructions that can be used to program a processing system to execute any feature of this disclosure. The storage medium may include, but is not limited to, high-speed random access memory (e.g., DRAM, SRAM, DDRRAM, or other random access solid-state memory devices), and may also include non-volatile memory (e.g., one or more disk storage devices, optical disk storage devices, flash memory devices, or other non-volatile solid-state storage devices). The memory may optionally include one or more storage devices located remotely from the central processing unit (CPU). The memory or the non-volatile storage devices within it contain non-transitory computer-readable storage media.

[0095] The features of this disclosure can be stored in various machine-readable media, and these features can be integrated into software and / or firmware to control the hardware operation of a processing system and enable the processing system to interact with other mechanisms using the technical results of this disclosure. Such software or firmware includes, but is not limited to: application code, device drivers, operating systems, and execution environments / containers.

[0096] It should be understood that although the terms "first," "second," etc., may be used in this disclosure to describe various elements or steps, these elements and steps should not be limited to these terms. These terms are used only to distinguish elements or steps.

[0097] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the claims. In the description of embodiments and the appended claims, the singular forms “a” and “described” include the plural forms unless the context explicitly requires it. It should be understood that the term “and / or” refers to and covers any and all possible combinations of one or more of the listed items. It should be further understood that the term “comprising” as used in this specification indicates only the presence of the stated features, integrals, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or combinations thereof.

[0098] In this specification, the term "if" may be interpreted, depending on the context, as "when," "at," "after determining," "according to the determination," or "after detecting," indicating that a prerequisite stated in the context is true. Similarly, depending on the context, the phrases "if it is determined [that a prerequisite is true]," "if [a prerequisite is true]," or "when [a prerequisite is true]" may be interpreted as "when a prerequisite is determined to be true," "in response to determining that a prerequisite is true," "according to determining that a prerequisite is true," "when a prerequisite is detected to be true," or "in response to detecting that a prerequisite is true."

[0099] For ease of explanation, the above content has been described with reference to specific embodiments. However, the above illustrative discussion is not intended to exhaust all possibilities, nor is it intended to limit the claims to the precise forms disclosed. Various modifications and variations can be derived based on the teachings of the above technical solutions. The selected embodiments are intended to best illustrate the working principle and practical application, thereby enabling those skilled in the art to fully utilize the disclosure and various embodiments.

Claims

1. A miniature light-emitting driving circuit, comprising: Logical operation module; as well as The pixel driving module is electrically connected to the logic operation module; The logic operation module is adapted to receive N-bit image data signals from its input terminal, where N is a positive integer; The logic operation module includes: Conversion unit; An AND logic unit, connected to the conversion unit; and The NOR logic unit is connected to the AND logic unit; The conversion unit is used to convert an N-bit image data signal in a first format into an N-bit image data signal in a second format. The AND logic unit is used to convert the N-bit image data signal in the second format into the N-bit image data signal in the third format; The NOR logic unit is used to convert the N-bit image data signal in the third format into the N-bit image data signal in the fourth format.

2. The micro light-emitting driving circuit according to claim 1, wherein, The pixel driving module includes a current source, a switching transistor, and micro LED pixels; The current source is electrically connected to the first terminal of the switching transistor; The gate of the switching transistor is electrically connected to the output terminal of the logic operation module; The second terminal of the switching transistor is electrically connected to the first electrode of the micro LED pixel; The second electrode of the micro LED pixel is grounded.

3. The micro light-emitting driving circuit according to claim 1, wherein, The conversion unit is used to convert the N-bit image data signal of the first format into the N-bit image data signal of the second format after receiving the trigger signal. The N-bit image data signal of the second format is processed by logical operators, and the conversion unit is an N-bit static random access memory unit latch.

4. The micro light-emitting driving circuit according to claim 1, wherein, The AND logic unit is used to receive timing control signals from the conversion unit and N-bit image data signals in the second format, and output N-bit image data signals in the third format.

5. The micro light-emitting driving circuit according to claim 1, wherein, The conversion unit includes N parallel sub-conversion units, each of which is used to convert 1 bit of the N-bit image data signal in the first format to the second format after receiving a trigger signal.

6. The micro light-emitting driving circuit according to claim 5, wherein, The AND logic unit includes N parallel sub-AND logic units. Each sub-AND logic unit is used to receive the timing control signal of its corresponding bit in the N-bit image data signal of the second format from the corresponding sub-conversion unit, and output the corresponding bit in the N-bit image data signal of the third format.

7. The micro light-emitting driving circuit according to claim 6, wherein, The NOR logic unit is used to receive N-bit image data signals from N parallel sub-AND logic units and output the N-bit image data signal in the fourth format.

8. The micro light-emitting driving circuit according to claim 2, wherein, The logic operation module is used to output the N-bit image data signal of the fourth format to the gate of the switching transistor to control the on / off state of the switching transistor.

9. The micro light-emitting driving circuit according to claim 2, wherein, When the timing control signal and the N-bit image data signal of the second format are both at the first level, the switching transistor is turned on, wherein the first level is a high level or a low level.

10. The micro light-emitting driving circuit according to claim 1, wherein, N=2 k k is a non-negative integer.

11. The micro light-emitting driving circuit according to claim 2, wherein, The switching transistor is a high-voltage transistor, and one switching transistor corresponds to one micro LED pixel.

12. The micro light-emitting driving circuit according to claim 3, wherein, The N-bit static random access memory cell latch includes N 1-bit static random access memory cell latches.

13. The micro light-emitting driving circuit according to claim 12, wherein, Each of the 1-bit static random access memory cell latches is used to store 1 bit of the N-bit image data signal.

14. A micro-light-emitting driving method, comprising: Provide an N-bit image data signal to the input of the logic operation module, where N is a positive integer; The conversion unit of the logic operation module converts the N-bit image data signal in the first format into the N-bit image data signal in the second format. The AND logic unit of the logic operation module converts the N-bit image data signal in the second format into an N-bit image data signal in the third format. The NOR logic unit of the logic operation module converts the N-bit image data signal in the third format into an N-bit image data signal in the fourth format; and Connect the pixel driver module to the output of the logic operation module.

15. A miniature light-emitting display system, comprising: One or more miniature LED pixels; Timing control circuit module; as well as Data buffering and conversion module; The data buffer conversion module includes: a logic operation module and a pixel driving module electrically connected to the logic operation module; The logic operation module is adapted to receive N-bit image data signals from its input terminal, where N is a positive integer. The logic operation module includes: Conversion unit; The AND logic unit connected to the conversion unit; and The NOR logic unit connected to the AND logic unit; The conversion unit is used to convert the N-bit image data signal in the first format into the second format; The AND logic unit is used to convert the N-bit image data signal of the second format into a third format; and The NOR logic unit is used to convert the N-bit image data signal in the third format into the fourth format.

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