ECO base unit and ECO logic unit

Abstract

The invention provides an ECO basic unit and an ECO logic unit. The ECO basic unit comprises a first active region, a second active region and a first polycrystalline strip, and the first polycrystalline strip is located above the first active region and the second active region and stretches across the first active region and the second active region; the second polycrystalline strip is located on the outer side of the first active region and the second active region, and the second polycrystalline strip is used for providing a connecting channel when metal layer connection is carried out among the ECO basic units to form an ECO logic unit; and the first metal layer is positioned above the first active region, the second active region, the first polycrystalline strip and the second polycrystalline strip, and comprises a first connecting part and a second connecting part which are separated from each other and are respectively used for connecting a power supply and grounding. When the ECO basic unit is used for building the ECO logic unit, the ECO logic unit can be successfully built only through one metal layer so as to replace the faulty part in the original design, and the repairing difficulty is reduced.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to an ECO basic unit and an ECO logic unit. Background Technology

[0002] In the IC design flow, if circuit design issues are discovered during the tape-out stage and adjustments are needed, but the mask has already been manufactured and is no longer suitable for adjusting the semiconductor structure beneath the metal layers, designers often consider using ECO (Engineering Change Order) base cells in conjunction with adjustments to the upper metal layers to resolve the problem with minimal modifications, time, and cost. Of course, ECO base cells can also be used for repairs before tape-out to minimize changes and resolve the issue.

[0003] ECO base cells are reserved in the initial circuit design and are generally located in the peripheral area (or blank area) of the chip's functional circuit structure. The semiconductor structure within them is not connected to any metal layer and does not function under normal circumstances, so they can also be called spare cells. When a problem is found in the circuit design during the tape-out stage, the designers adjust the design of the upper metal layer of the ECO base cell (often multiple ECO base cells are used simultaneously) to connect it to the semiconductor structure within, thereby implementing a certain logic function and replacing the problematic part of the original design.

[0004] However, the designers further discovered that when using the ECO basic unit to build logic function modules, it is often necessary to design multiple metal layers, which increases the difficulty of fixing design problems. Summary of the Invention

[0005] The purpose of this application is to provide an ECO basic unit and an ECO logic unit that can reduce the difficulty of fixing design problems.

[0006] To achieve the above objectives, this application provides the following technical solution: This application provides an ECO basic unit, the ECO basic unit comprising: The first active region and the second active region are arranged at intervals along the first direction; The first polycrystalline strip extends along the first direction and is located above the first active region and the second active region, spanning the first active region and the second active region. The first polycrystalline strip and the first active region constitute a PMOS, and the first polycrystalline strip and the second active region constitute an NMOS. The second polycrystalline strip is located outside the first active region and the second active region along the second direction, the second direction being perpendicular to the first direction. The second polycrystalline strip is used to provide a connection channel when metal layer connections are made between multiple ECO basic units to form ECO logic units. The first metal layer, located above the first active region, the second active region, the first polycrystalline strip, and the second polycrystalline strip, includes a phase-separated first connection portion and a second connection portion, which are used to connect the power supply and the ground, respectively.

[0007] In one embodiment, the ECO basic unit further includes: The third polycrystalline strip, along the second direction, is located outside the first active region and the second active region, and is located on opposite sides of the first polycrystalline strip, respectively. The third polycrystalline strip is used to provide a connection channel when metal layer connections are made between multiple ECO basic units to form ECO logic units.

[0008] In one embodiment, the second polycrystalline strip extends along the first direction and is parallel to the first polycrystalline strip.

[0009] In one embodiment, the second polycrystalline strip extends along the second direction and is perpendicular to the first polycrystalline strip.

[0010] In one embodiment, the second polycrystalline strip is L-shaped, partially parallel to the first polycrystalline strip and partially perpendicular to the first polycrystalline strip.

[0011] In one embodiment, the second polycrystalline strip is T-shaped, partially parallel to the first polycrystalline strip and partially perpendicular to the first polycrystalline strip.

[0012] In one embodiment, the first polycrystalline strip divides the first active region and the second active region into multiple partitions.

[0013] In one embodiment, the length of the second polycrystalline strip is less than the length of the first polycrystalline strip.

[0014] In one embodiment, the first connecting portion and the second connecting portion are disposed opposite to each other, and along the first direction, the first connecting portion is located on the side of the first active region away from the second active region, and the second connecting portion is located on the side of the second active region away from the first active region.

[0015] This application also provides an ECO logic unit, which includes: three ECO basic units as described above and a second metal layer; The three ECO basic units include: a first ECO basic unit, a second ECO basic unit, and a third ECO basic unit; each ECO basic unit has two first polycrystalline strips; each ECO basic unit's first active region includes a second partition located between the two first polycrystalline strips and a first partition and a third partition located on the side of each first polycrystalline strip opposite to the second partition; each ECO basic unit's second active region includes a fifth partition located between the two first polycrystalline strips and a fourth partition and a sixth partition located on the side of each first polycrystalline strip opposite to the fifth partition; the first connecting portions of the first metal layers of each ECO basic unit are interconnected and connected to the first and third partitions of each ECO basic unit; the second connecting portions of the first metal layers of each ECO basic unit are interconnected and connected to one of the fourth and sixth partitions of the first ECO basic unit, and to one of the fourth and sixth partitions of the second ECO basic unit; The second metal layer and the first metal layer are co-layered metal layers, and the second metal layer includes a phase-separated third connecting portion, a fourth connecting portion, and a fifth connecting portion; The third connection part includes multiple branches, which are respectively connected to the first polysilicon strip of each ECO basic unit to form the input terminal of the ECO logic unit; The fourth connection portion includes multiple branches, which respectively connect the second partition of each ECO base unit, the second polysilicon strip of at least one ECO base unit, and the fourth and sixth partitions of the third ECO base unit to form the output terminal of the ECO logic unit; The fifth connection portion is connected to another of the fourth and sixth partitions of the first ECO base unit, to another of the fourth and sixth partitions of the second ECO base unit, and to the fifth partition of the third ECO base unit.

[0016] Compared with the prior art, the technical solution of this application has the following beneficial effects: This application discloses ECO basic units and ECO logic units. The ECO basic units have a second polysilicon strip. When each ECO basic unit is interconnected through metal layers to form a required ECO logic unit, the second polysilicon strip can cooperate to provide connection channels, which can reduce the number of metal layer connections. This can minimize the use of multiple metal layers, thereby avoiding significant adjustments to the circuit design when problems are found later. It can also reduce the number of metal layers and / or ECO basic units that need to be adjusted, thus reducing the difficulty of circuit design repair. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 , Figure 2 , Figure 3 Schematic diagrams of three different embodiments of an ECO basic unit provided in the first embodiment of this application; Figure 4 A schematic diagram of the structure of an ECO logic unit provided in the second embodiment of this application; Figure 5 for Figure 4 The diagram shows the actual circuit connection relationship of the ECO logic unit. Figure 6 This is a schematic diagram of the principle structure of a typical three-input NAND gate circuit; Figure 7-11 A schematic diagram showing the actual circuit connection relationship of other different embodiments of the ECO logic unit provided in the second embodiment of this application. Detailed Implementation

[0019] The technical solutions in the embodiments of this application will be clearly and completely described below. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. It should be noted that the order of description of the following embodiments is not intended to limit the preferred order of the embodiments of this application. Moreover, in the following embodiments, the description of each embodiment has its own emphasis, and for parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0020] Please see Figure 1 , Figure 2 As shown, the first embodiment of this application provides an ECO basic unit, which may include: The first active region 1 and the second active region 2 are arranged at intervals along the first direction X.

[0021] In one embodiment, both the first active region 1 and the second active region 2 are strip-shaped, having a length direction and a width direction. They are arranged in the width direction, that is, the first direction X is the width direction of the first active region 1 and the second active region 2. The conductivity type of the first active region 1 is opposite to that of the second active region 2. For example, the conductivity type of the first active region 1 is P-type, and the conductivity type of the second active region 2 is N-type, so that they are used to form PMOS and NMOS respectively, or vice versa.

[0022] In this embodiment, both the first active region 1 and the second active region 2 have contact holes, which are used as connection holes when performing metal layer wiring.

[0023] In this embodiment, the ECO base unit may further include: a first polycrystalline strip 3 extending along the first direction X, the first polycrystalline strip 3 being located above the first active region 1 and the second active region 2, spanning the first active region 1 and the second active region 2, the first polycrystalline strip 3 and the first active region 1 forming a PMOS, and the first polycrystalline strip 3 and the second active region 2 forming an NMOS.

[0024] In this embodiment, the first polycrystalline strip 3 extends along the first direction X, that is, along the width direction of the first active region 1 and the second active region 2, and spans across the top of the first active region 1 and the second active region 2. In this way, the same polycrystalline strip (the first polycrystalline strip 3) can be used to form PMOS and NMOS with the first active region 1 and the second active region 2 respectively, resulting in a compact structure and less space occupation.

[0025] In this embodiment, the first polycrystalline strip 3 has contact holes for metal layer bonding. For example... Figure 1 or Figure 2 As shown, the contact hole on the first polycrystalline strip 3 can be located on the first polycrystalline strip 3 in the region between the first active region 1 and the second active region 2.

[0026] In this embodiment, the ECO base unit may further include a second polycrystalline strip 4, located outside the first active region 1 and the second active region 2 along the second direction Y. The second direction Y is perpendicular to the first direction X. The second polycrystalline strip 4 is used to provide a connection channel when metal layer connections are made between multiple ECO base units to form an ECO logic unit.

[0027] In this embodiment, the second polysilicon strip 4 is located outside the first active region 1 and the second active region 2, rather than spanning across the first active region 1 and the second active region 2. It has no electrical connection to the first active region 1 and the second active region 2, nor does it form a MOS structure with them. However, the polysilicon strip itself has conductivity. This application provides the second polysilicon strip 4 to provide a channel for electrical connection when multiple ECO basic units are connected.

[0028] In this embodiment, the second polycrystalline strip 4 may include multiple contact holes, such as... Figure 1 or Figure 2 As shown, it may include two contact holes, which are respectively disposed at both ends of the second polycrystalline strip 4.

[0029] In this embodiment, the ECO base unit may further include a first metal layer 5, located above the first active region 1, the second active region 2, the first polycrystalline strip 3 and the second polycrystalline strip 4, including a phase-separated first connecting portion 51 and a second connecting portion 52, which are respectively used to connect the power supply and the ground.

[0030] In this embodiment, the first metal layer 5 is not on the same layer as the first active region 1, the second active region 2, the first polycrystalline strip 3, and the second polycrystalline strip 4 in the vertical direction. Instead, it has a dielectric layer (not shown) between it and the first active region 1, the second active region 2, the first polycrystalline strip 3, and the second polycrystalline strip 4. Therefore, unless explicitly stated otherwise, the first metal layer 5 itself has no electrical connection with the first active region 1, the second active region 2, the first polycrystalline strip 3, and the second polycrystalline strip 4 (even if there is some overlap in a planar top view). Therefore, the ECO basic unit does not actually play any role at this time and will not affect the function of the chip itself. Only when it is needed to build an ECO logic unit is the first metal layer electrically connected to each structure as required. The electrical connection is to allow the semiconductor device formed by the above structures to be connected to the power supply and ground. Therefore, the first metal layer includes a separate first connection portion 51 and a second connection portion 52, which respectively connect the different structures and then connect these different structures to the power supply and ground respectively.

[0031] In this embodiment, please continue to refer to Figure 1 or Figure 2 The first connection part 51 is located on the side of the first active region 1 away from the second active region 2 in the first direction X, that is, the upper position in the figure, and is used to connect the power supply; the second connection part 52 is located on the side of the second active region 2 away from the first active region 1 in the first direction X, that is, the lower position in the figure, and is used to connect the ground.

[0032] In this embodiment, the first polycrystalline strip 3 divides the first active region 1 and the second active region 2 into multiple partitions. The number of the first polycrystalline strip 3 is one. The first polycrystalline strip 3 divides the first active region 1 and the second active region 2 into two partitions. The first polycrystalline strip 3 and the first active region 1 constitute a PMOS, and the first polycrystalline strip 3 and the second active region 2 constitute an NMOS. Alternatively, the number of the first polycrystalline strip 3 is two and they are parallel. The first polycrystalline strip 3 divides the first active region 1 and the second active region 2 into three partitions. The first polycrystalline strip 3 and the first active region 1 constitute two PMOS, and the first polycrystalline strip 3 and the second active region 2 constitute two NMOS.

[0033] Those skilled in the art will understand that the number of the first polycrystalline strip 3 can generally be one, two, or even more, depending on the actual situation. Please refer to... Figure 1 As shown, in one specific embodiment, the number of first polysilicon strips 3 is one. The first polysilicon strip 3 and the first active region 1 constitute a PMOS, and the first polysilicon strip 3 and the second active region 2 constitute an NMOS, which can be simply referred to as a single-P single-N structure. Please refer to [link / reference]. Figure 2 As shown, in another specific embodiment, there are two first polysilicon strips 3, which are generally arranged in parallel. These two first polysilicon strips 3 and the first active region 1 constitute two PMOS, and these two first polysilicon strips 3 and the second active region 2 constitute two NMOS, which can be referred to as a double-P double-N structure. Obviously, when the electrical performance parameters of a unit MOS device are exactly the same, the double-P double-N structure will occupy more space than the single-P single-N structure. When using the ECO basic unit to build the ECO logic unit, if the specific electrical performance parameters of the ECO logic unit are not considered, and only the implementation of the functional architecture is considered, then the single-P single-N structure can reduce the space occupation. However, in actual products, specific electrical performance parameters must often be considered. In this case, the double-P double-N structure is often used to reduce the space occupation. Those skilled in the art can use it flexibly according to the actual situation.

[0034] In this application's ECO basic unit, a second polysilicon strip 4 is provided. When each ECO basic unit is interconnected through a metal layer to form a required logic function module (also called an ECO logic unit), the second polysilicon strip 4 can cooperate to provide connection channels. Thus, generally only one metal layer is needed to successfully build the required logic function module (see the second embodiment of this application described later for an ECO logic unit), replacing the problematic parts of the original design and reducing the difficulty of repair. Of course, because of the presence of the second polysilicon strip 4, the size of the ECO basic unit seems to be slightly larger. However, in actual chip products, the number of ECO basic units is not large, and they are all arranged using blank areas outside the functional circuit structure of the chip. Therefore, it will not actually increase the size of the chip product or increase the space cost.

[0035] Please see Figure 3 As shown, in one embodiment, the ECO basic unit may further include: The third polycrystalline strip 6, along the second direction Y, is located outside the first active region 1 and the second active region 2, and is located on opposite sides of the first polycrystalline strip 3, respectively, and is used to provide a connection channel when metal layer connections are made between multiple ECO basic units to form ECO logic units.

[0036] In this embodiment, the third polycrystalline strip 6, like the second polycrystalline strip 4, is located outside the first active region 1 and the second active region. They can be located on the same side, on opposite sides, or arbitrarily arranged, as long as they are separated. Thus, each ECO basic unit has two polycrystalline strips (the second polycrystalline strip 4 and the third polycrystalline strip 6) that can cooperate to provide connection channels when ECO basic units are connected to each other through metal layers, making it easier to build the required ECO logic units using only one metal layer.

[0037] The positional and size relationships between the second polycrystalline strip 4 (and the third polycrystalline strip 6) and the first polycrystalline strip 3 are not subject to strict limitations in this application. Generally, the first polycrystalline strip 3 extends along a first direction X. In one embodiment, the second polycrystalline strip 4 can extend along the first direction X, and the second polycrystalline strip 4 is parallel to the first polycrystalline strip 3. In another embodiment, the second polycrystalline strip 4 can also extend along the second direction Y, and the second polycrystalline strip 4 is perpendicular to the first polycrystalline strip 3. Further, in one embodiment, the second polycrystalline strip 4 can be L-shaped, so it can be partially parallel to and partially perpendicular to the first polycrystalline strip 3. In another embodiment, the second polycrystalline strip 4 can be T-shaped, so it can also be partially parallel to and partially perpendicular to the first polycrystalline strip 3. Even, in yet another embodiment, the second polycrystalline strip 4 can be any irregular shape, and there is no necessary positional relationship between it and the first polycrystalline strip 3, as long as it is located outside the first active region 1 and the second active region 1, that is, separated from the first polycrystalline strip 3. Regarding the size relationship between the two, in this embodiment, the length of the second polycrystalline strip 4 is less than the length of the first polycrystalline strip 3. In another embodiment, the length of the second polycrystalline strip 4 may also be greater than the length of the first polycrystalline strip 3, or the length of the second polycrystalline strip 4 may be equal to the length of the first polycrystalline strip 3, which can be adjusted according to the actual application.

[0038] The following describes an ECO logic unit provided in the second embodiment of this application, which can be a three-input NAND gate.

[0039] In this embodiment, the ECO logic unit may include: three ECO basic units as described above and a second metal layer.

[0040] In this embodiment, the three ECO basic units may include: a first ECO basic unit, a second ECO basic unit, and a third ECO basic unit.

[0041] Specifically, refer to Figure 4 The three ECO basic units may include: a first ECO basic unit 100, a second ECO basic unit 200, and a third ECO basic unit 300. In this embodiment, the first ECO basic unit 100, the second ECO basic unit 200, and the third ECO basic unit 300 are arranged sequentially along the second direction Y.

[0042] It will be understood by those skilled in the art that this is merely an example, and in other embodiments, the first ECO base unit 100, the second ECO base unit 200, and the third ECO base unit 300 may not be arranged in sequence. That is, along the second direction Y, the first ECO base unit 100 or the third ECO base unit 300 may be located in the middle of the other two ECO base units. This application does not limit this.

[0043] In this embodiment, each of the ECO basic units has two first polycrystalline strips. The first active region of each ECO basic unit includes a second partition located between the two first polycrystalline strips and a first partition and a third partition located on the side of each first polycrystalline strip opposite to the second partition. The second active region of each ECO basic unit includes a fifth partition located between the two first polycrystalline strips and a fourth partition and a sixth partition located on the side of each first polycrystalline strip opposite to the fifth partition.

[0044] Continue to refer to Figure 4 Each of the ECO basic units has two first polycrystalline strips 3. Each of the ECO basic units has a first active region 1 comprising a first partition 11, a second partition 12, and a third partition 13, with the second partition 12 located between the two first polycrystalline strips 3. Each of the ECO basic units has a second active region 2 comprising a fourth partition 21, a fifth partition 22, and a sixth partition 23, with the fifth partition 22 located between the two first polycrystalline strips 3.

[0045] In this embodiment, the first connecting portions of the first metal layers of each ECO base unit are interconnected and connected to the first and third partitions of each ECO base unit. The second connecting portions of the first metal layers of each ECO base unit are interconnected and connected to one of the fourth and sixth partitions of the first ECO base unit, as well as one of the fourth and sixth partitions of the second ECO base unit.

[0046] Continue to refer to Figure 4 The first connecting portions 51 of the first metal layer 5 of each ECO base unit are interconnected and connected to the first partition 11 and the third partition 13 of each ECO base unit. The second connecting portions 52 of the first metal layer 5 of each ECO base unit are interconnected and connected to the fourth partition 21 of the first ECO base unit 100 and the sixth partition 23 of the second ECO base unit 200.

[0047] To facilitate a clear and concise introduction to the ECO logic unit of this embodiment, the two first polysilicon strips 3 in each ECO basic unit utilized are further named separately. Figure 4In each ECO basic unit, the first polycrystalline strip 3 on the left is named the first sub-polycrystalline strip 31. Figure 4 In each ECO basic unit, the first polycrystalline strip 3 on the right is named the second sub-polycrystalline strip 32. The first active region 1 includes a first partition 11 located to the left of the first sub-polycrystalline strip 31, a second partition 12 located between the first sub-polycrystalline strip 31 and the second sub-polycrystalline strip 32, and a third partition 13 located to the right of the second sub-polycrystalline strip 32. The first partition 11, the first sub-polycrystalline strip 31, and the second partition 12 constitute the first PMOS 93, and the second partition 12, the second sub-polycrystalline strip 32, and the third partition 13 constitute the second PMOS 94. The second active region 2 includes a fourth partition 21 located to the left of the first sub-polycrystalline strip 31, a fifth partition 22 located between the first sub-polycrystalline strip 31 and the second sub-polycrystalline strip 32, and a sixth partition 23 located to the right of the second sub-polycrystalline strip 32. The fourth partition 21, the first sub-polycrystalline strip 31, and the fifth partition 22 constitute the first NMOS 91, and the fifth partition 22, the second sub-polycrystalline strip 32, and the sixth partition 23 constitute the second NMOS 92. The first sub-polysilicon strip 31 and the second sub-polysilicon strip 32 serve as the gates of each MOS device. As for which region serves as the drain or source of each MOS device, since the drain and source of a MOS device are interchangeable, it needs to be determined based on the connection relationship in the specific circuit. As mentioned earlier, the first partition 11 and the third partition 13 of each ECO base unit are connected to the first connection part 51, which is used to connect the power supply. The first active region 1 and the first sub-polycrystalline strip 31 (and the second sub-polycrystalline strip 32) constitute a PMOS, so the first partition 11 and the third partition 13 of each ECO base unit serve as the source of the PMOS, and the second partition 12 of each ECO base unit serves as the drain of the PMOS. In addition, the fourth partition 21 of the first ECO base unit 100 and the sixth partition 23 of the second ECO base unit 200 are connected to the second connection part 52, which is used to connect the ground. The second active region 2 and the first sub-polycrystalline strip 31 constitute an NMOS, so the fourth partition 21 of the first ECO base unit 100 and the sixth partition 23 of the second ECO base unit 200 serve as the source of the NMOS. As for the other structures and connections, they are achieved by the second metal layer 7 and with the help of the second polycrystalline strip 4.

[0048] In this embodiment, the second metal layer and the first metal layer are co-layered metal layers, and the second metal layer may include a phase-separated third connecting portion, a fourth connecting portion, and a fifth connecting portion.

[0049] Continue to refer to Figure 4 The second metal layer 7 and the first metal layer 5 are co-layered metal layers, such as both being the first metal layer. The second metal layer 7 may include a phase-separated third connecting portion 71, a fourth connecting portion 72, and a fifth connecting portion 73.

[0050] In this embodiment, the third connection portion may include multiple branches, each connecting to the first polysilicon strip of each ECO basic unit to form the input terminal of the ECO logic unit. The input terminal is used to connect to a signal source to receive the input signal from the signal source.

[0051] For details, please refer to [link / reference]. Figure 4 The third connecting portion 71 may include a first branch 711, a second branch 712, and a third branch 713. The first branch 711 connects the first sub-polycrystalline strip 31 of the first ECO base unit 100 and the second sub-polycrystalline strip 32 of the second ECO base unit 200; the second branch 712 connects the second sub-polycrystalline strip 32 of the first ECO base unit 100 and the first sub-polycrystalline strip 31 of the second ECO base unit 200; and the third branch 713 connects the first sub-polycrystalline strip 31 and the second sub-polycrystalline strip 32 of the third ECO base unit 300.

[0052] In this embodiment, the fourth connection portion may include multiple branches, which respectively connect the second partition of each ECO base unit, the second polysilicon strip of at least one ECO base unit, and the fourth and sixth partitions of the third ECO base unit to form the output terminal of the ECO logic unit.

[0053] In one specific embodiment, reference continues to... Figure 4 The fourth connecting part 72 is respectively connected to the second partition 12 of each ECO base unit, the second polycrystalline strip 4 of the second ECO base unit 200 and the third ECO base unit 300, the fourth partition 21 and the sixth partition 23 of the third ECO base unit 300.

[0054] Specifically, the fourth connection portion 72 may include a fourth branch 721, a fifth branch 722, and a sixth branch 723. The fourth branch 721 connects to the second partition 12 of the first ECO base unit 100, the second partition 12 and the second polycrystalline strip 4 of the second ECO base unit 200, and the second partition 12 and the second polycrystalline strip 4 of the third ECO base unit 300. The fifth branch 722 connects to the second polycrystalline strip 4 of the second ECO base unit 200 and the fourth partition 21 of the third ECO base unit 300. The sixth branch 723 connects to the sixth partition 23 and the second polycrystalline strip 4 of the third ECO base unit 300.

[0055] In this embodiment, the fifth connection portion is connected to another of the fourth and sixth partitions of the first ECO base unit, to another of the fourth and sixth partitions of the second ECO base unit, and to the fifth partition of the third ECO base unit.

[0056] As mentioned above, in Figure 4 In the illustrated embodiment, the second connection portion 52 of the first metal layer 5 of each ECO base unit is connected to the fourth partition 21 of the first ECO base unit 100 and the sixth partition 23 of the second ECO base unit 200. Then, the fifth connection portion 73 connects the sixth partition 23 of the first ECO base unit 100, the fourth partition 21 of the second ECO base unit 200, and the fifth partition 22 of the third ECO base unit 300.

[0057] In this way, only one metal layer (etched and divided into multiple connection parts) is needed to build the required ECO logic unit.

[0058] The following combination Figure 4 and Figure 5 The ECO logic unit in this embodiment will be described in further detail.

[0059] Please refer to the following: Figure 4 and Figure 5 , Figure 4 The actual circuit structure of the ECO logic unit shown is as follows: Figure 5 As shown: the first PMOS 93 of the first ECO base unit 100 and the second PMOS 94 of the second ECO base unit 200 together form a large PMOS, referred to as the first large PMOS 950; the first NMOS 91 of the first ECO base unit 100 and the second NMOS 92 of the second ECO base unit 200 together form a large NMOS, referred to as the first large NMOS 910. Specifically, the fourth partition 21 of the first ECO base unit 100 and the sixth partition 23 of the second ECO base unit 200 together serve as the source of the first large NMOS 910; the fifth partition 22 of the first ECO base unit 100 and the fifth partition 22 of the second ECO base unit 200 together serve as the drain of the first large NMOS 910; the first sub-polycrystalline strip 31 of the first ECO base unit 100 and the second sub-polycrystalline strip 32 of the second ECO base unit 200 together serve as both the gate and the first large PMOS 950. The gate of OS950 is connected to the gate of the first large NMOS910 and the gate of the first large PMOS950, which together serve as the first input of the ECO logic unit. The first partition 11 of the first ECO base unit 100 and the third partition 13 of the second ECO base unit 200 together serve as the source of the first large PMOS950. The second partition 12 of the first ECO base unit 100 and the second partition 12 of the second ECO base unit 200 together serve as the drain of the first large PMOS950.

[0060] The second PMOS 94 of the first ECO base unit 100 and the first PMOS 93 of the second ECO base unit 200 together form a large PMOS, referred to as the second large PMOS 960; the second NMOS 92 of the first ECO base unit 100 and the first NMOS 91 of the second ECO base unit 200 together form a large NMOS, referred to as the second large NMOS 920. Specifically, the fifth partition 22 of the first ECO base unit 100 and the fifth partition 22 of the second ECO base unit 200 together serve as the source of the second large NMOS 920 (and also as the drain of the first large NMOS 910, i.e., the source of the second large NMOS 920 is connected to the drain of the first large NMOS 910), the sixth partition 23 of the first ECO base unit 100 and the fourth partition 21 of the second ECO base unit 200 together serve as the drain of the second large NMOS 920; the second sub-polycrystalline strip 32 of the first ECO base unit 100 and the first sub-polycrystalline strip 31 of the second ECO base unit 200 together serve as both the gate and the second large PMOS 920. The gate of OS960 is used as the second input terminal of the ECO logic unit, that is, the gate of the second large NMOS920 is connected to the gate of the second large PMOS960 and together they serve as the second input terminal of the ECO logic unit; the third partition 13 of the first ECO base unit 100 and the first partition 11 of the second ECO base unit 200 together serve as the source of the second large PMOS960, and the second partition 12 of the first ECO base unit 100 and the second partition 12 of the second ECO base unit 200 together serve as the drain of the second large PMOS960 (and also serve as the drain of the first large PMOS950, that is, the drain of the second large PMOS960 is connected to the drain of the first large PMOS950).

[0061] The two PMOS (first PMOS 93 and second PMOS 94) of the third ECO basic unit 300 together form a large PMOS, referred to as the third large PMOS 970; the two NMOS (first NMOS 91 and second NMOS 92) of the third ECO basic unit 300 together form a large NMOS, referred to as the third large NMOS 930. In this system, the fourth partition 21 and the sixth partition 23 of the third ECO base unit 300 together serve as the drain of the third large NMOS 930. The fifth partition 22 of the third ECO base unit 300 serves as the source of the third large NMOS 930 and is connected to the drain of the second large NMOS 920 (the fourth partition 21 of the second ECO base unit 200 and the sixth partition 23 of the first ECO base unit 100). The first sub-polysilicon strip 31 and the second sub-polysilicon strip 32 of the third ECO base unit 300 together serve as both the gate of the third large NMOS 930 and the gate of the third large PMOS 970, and also serve as the third input terminal of this ECO logic unit. That is, the gate of the third large NMOS 930 and the gate of the third large PMOS 970 are connected together. As the third input terminal of the ECO logic unit; the first partition 11 and the third partition 13 of the third ECO base unit 300 together serve as the source of the third large PMOS 970, and the second partition 12 of the third ECO base unit 300 serves as the drain of the third large PMOS 970, and is connected to the drain of the second large PMOS 960 (the second partition 12 of the first ECO base unit 100 and the second partition 12 of the second ECO base unit 200), the drain of the first large PMOS 950 (the second partition 12 of the first ECO base unit 100 and the second partition 12 of the second ECO base unit 200), and the drain of the third large NMOS 930 (the fourth partition 21 and the sixth partition 23 of the third ECO base unit 300).

[0062] Thus, the circuit relationship of the ECO logic unit can be simply described as follows: three large PMOS transistors are connected in parallel, the gates of the three large PMOS transistors are each connected to the gate of a large NMOS transistor, and each serves as an input terminal of the ECO logic unit; the drains of the three large PMOS transistors are connected to the drain of a large NMOS transistor, and serve as the output terminals of the ECO logic unit; the three large NMOS transistors are connected in series. Figure 6 The schematic diagram shows the principle structure of the three-input NAND gate circuit. That is, the ECO logic unit of this application is a three-input NAND gate circuit, which uses three ECO basic units and only utilizes one metal layer. It can be constructed by the cooperation of the second polysilicon strip 4 in each ECO basic unit.

[0063] Furthermore, it's easy to see that the three large PMOS transistors in the aforementioned ECO logic unit are actually formed by pairing six PMOS transistors together, and the three large NMOS transistors are actually formed by pairing six NMOS transistors together. This is necessary to meet the electrical performance parameter requirements of the ECO logic unit. If the ECO logic unit were built using a single P-type, single N-type ECO basic unit, six ECO basic units would be required. Obviously, this would require more space (compared to building it using a double P-type, double N-type ECO basic unit).

[0064] Finally, it should be reiterated that, as mentioned earlier, each ECO basic unit does not need to strictly follow... Figure 4 The order shown in the diagram does not necessarily require strict adherence to the arrangement of each connecting part, branch, and polycrystalline strip. Figure 4 The shapes and positions shown are not set in a fixed way, but can be flexibly adjusted according to the actual application and design rules (such as minimum spacing). For example, in Figure 4 In the specific embodiment shown, the fourth connecting part 72 may further include a seventh branch 724 (located above the second polycrystalline strip 4 of the third ECO base unit 300), the seventh branch 724 connecting the fourth branch 721 and the sixth branch 723, so that the three become a whole to increase stability.

[0065] Please see Figure 7 As shown, in another embodiment, with Figure 4 , Figure 5 The difference in the illustrated embodiment is that: the second connecting portion 52 of the first metal layer 5 of each ECO base unit is connected to the fourth partition 21 of the first ECO base unit 100 and the fourth partition 21 of the second ECO base unit 200; the first branch 711 can connect the first sub-polycrystalline strip 31 of the first ECO base unit 100 and the first sub-polycrystalline strip 31 of the second ECO base unit 200, the second branch 712 connects the second sub-polycrystalline strip 32 of the first ECO base unit 100 and the second sub-polycrystalline strip 32 of the second ECO base unit 200, and the third branch 713 also connects the first sub-polycrystalline strip 31 and the second sub-polycrystalline strip 32 of the third ECO base unit 300; the fifth connecting portion 73 connects the sixth partition 23 of the first ECO base unit 100, the sixth partition 23 of the second ECO base unit 200 and the fifth partition 22 of the third ECO base unit 300.

[0066] Please see Figure 8 As shown, in yet another embodiment, with Figure 4 , Figure 5The difference in the illustrated embodiment is that: the second connecting portion 52 of the first metal layer 5 of each ECO base unit is connected to the sixth partition 23 of the first ECO base unit 100 and the fourth partition 21 of the second ECO base unit 200; the first branch 711 can connect the second sub-polycrystalline strip 32 of the first ECO base unit 100 and the first sub-polycrystalline strip 31 of the second ECO base unit 200, the second branch 712 connects the first sub-polycrystalline strip 31 of the first ECO base unit 100 and the second sub-polycrystalline strip 32 of the second ECO base unit 200, and the third branch 713 also connects the first sub-polycrystalline strip 31 and the second sub-polycrystalline strip 32 of the third ECO base unit 300; the fifth connecting portion 73 connects the fourth partition 21 of the first ECO base unit 100, the sixth partition 23 of the second ECO base unit 200 and the fifth partition 22 of the third ECO base unit 300.

[0067] Please see Figure 9 As shown, in yet another embodiment, with Figure 4 , Figure 5 The difference in the illustrated embodiment is that: the second connecting portion 52 of the first metal layer 5 of each ECO base unit is connected to the sixth partition 23 of the first ECO base unit 100 and the sixth partition 23 of the second ECO base unit 200; the first branch 711 can connect the second sub-polycrystalline strip 32 of the first ECO base unit 100 and the second sub-polycrystalline strip 32 of the second ECO base unit 200, the second branch 712 connects the first sub-polycrystalline strip 31 of the first ECO base unit 100 and the first sub-polycrystalline strip 31 of the second ECO base unit 200, and the third branch 713 also connects the first sub-polycrystalline strip 31 and the second sub-polycrystalline strip 32 of the third ECO base unit 300; the fifth connecting portion 73 connects the fourth partition 21 of the first ECO base unit 100, the fourth partition 21 of the second ECO base unit 200 and the fifth partition 22 of the third ECO base unit 300.

[0068] As can be seen, in all the above embodiments, the first ECO basic unit 100, the second ECO basic unit 200, and the third ECO basic unit 300 are arranged sequentially along the second direction Y. Please refer to [link / reference]. Figure 10 As shown, in another embodiment, it is related to Figure 4 The main difference in the illustrated embodiment is that the third ECO base unit 300 is positioned between the first ECO base unit 100 and the second ECO base unit 200; the other connection relationships are essentially the same.

[0069] Please see Figure 11 As shown, in yet another embodiment, it is related to Figure 9The main difference in the illustrated embodiment is that the first ECO base unit 100, the second ECO base unit 200, and the third ECO base unit 300 are arranged sequentially in the opposite direction of the second direction Y, and the second polycrystalline strip 4 is located on the left side of the position shown in the figure. Figure 9 The embodiment shown is located on the right side of the center position in the diagram), and the other connection relationships are essentially the same.

[0070] In summary, it is easy to see that, compared with the prior art, the technical solution of this application has the following beneficial effects: This application discloses ECO basic units and ECO logic units. The ECO basic units have a second polysilicon strip. When each ECO basic unit is interconnected through metal layers to form a required ECO logic unit, the second polysilicon strip can cooperate to provide connection channels, which can reduce the number of metal layer connections. This can minimize the use of multiple metal layers, thereby avoiding significant adjustments to the circuit design when problems are found later. It can also reduce the number of metal layers and / or ECO basic units that need to be adjusted, thus reducing the difficulty of circuit design repair.

[0071] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of protection of the claims. Furthermore, specific examples have been used in the specification to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application, and the content of this specification should not be construed as a limitation of this application.

Claims

1. An ECO basic unit, characterized in that, The ECO basic unit includes: The first active region and the second active region are arranged at intervals along the first direction; The first polycrystalline strip extends along the first direction and is located above the first active region and the second active region, spanning the first active region and the second active region. The first polycrystalline strip and the first active region constitute a PMOS, and the first polycrystalline strip and the second active region constitute an NMOS. The second polycrystalline strip is located outside the first active region and the second active region along the second direction, the second direction being perpendicular to the first direction. The second polycrystalline strip is used to provide a connection channel when metal layer connections are made between multiple ECO basic units to form ECO logic units. The first metal layer, located above the first active region, the second active region, the first polycrystalline strip, and the second polycrystalline strip, includes a phase-separated first connection portion and a second connection portion, which are used to connect the power supply and the ground, respectively.

2. The ECO basic unit according to claim 1, characterized in that, The ECO basic unit also includes: The third polycrystalline strip, along the second direction, is located outside the first active region and the second active region, and is located on opposite sides of the first polycrystalline strip, respectively. The third polycrystalline strip is used to provide a connection channel when metal layer connections are made between multiple ECO basic units to form ECO logic units.

3. The ECO basic unit according to claim 1, characterized in that, The second polycrystalline strip extends along the first direction and is parallel to the first polycrystalline strip.

4. The ECO basic unit according to claim 1, characterized in that, The second polycrystalline strip extends along the second direction and is perpendicular to the first polycrystalline strip.

5. The ECO basic unit according to claim 1, characterized in that, The second polycrystalline strip is L-shaped, partly parallel to the first polycrystalline strip and partly perpendicular to the first polycrystalline strip.

6. The ECO basic unit according to claim 1, characterized in that, The second polycrystalline strip is T-shaped, partly parallel to the first polycrystalline strip and partly perpendicular to the first polycrystalline strip.

7. The ECO basic unit according to claim 1, characterized in that, The first polycrystalline strip divides the first active region and the second active region into multiple partitions.

8. The ECO basic unit according to claim 1, characterized in that, The length of the second polycrystalline strip is less than the length of the first polycrystalline strip.

9. The ECO basic unit according to claim 1, characterized in that, The first connecting portion and the second connecting portion are disposed opposite to each other, and along the first direction, the first connecting portion is located on the side of the first active region away from the second active region, and the second connecting portion is located on the side of the second active region away from the first active region.

10. An ECO logic unit, characterized in that, The ECO logic unit includes: three ECO basic units as described in claim 1 and a second metal layer; The three ECO basic units include: a first ECO basic unit, a second ECO basic unit, and a third ECO basic unit; each ECO basic unit has two first polycrystalline strips; each ECO basic unit's first active region includes a second partition located between the two first polycrystalline strips and a first partition and a third partition located on the side of each first polycrystalline strip opposite to the second partition; each ECO basic unit's second active region includes a fifth partition located between the two first polycrystalline strips and a fourth partition and a sixth partition located on the side of each first polycrystalline strip opposite to the fifth partition; the first connecting portions of the first metal layers of each ECO basic unit are interconnected and connected to the first and third partitions of each ECO basic unit; the second connecting portions of the first metal layers of each ECO basic unit are interconnected and connected to one of the fourth and sixth partitions of the first ECO basic unit, and to one of the fourth and sixth partitions of the second ECO basic unit; The second metal layer and the first metal layer are co-layered metal layers, and the second metal layer includes a phase-separated third connecting portion, a fourth connecting portion, and a fifth connecting portion; The third connection part includes multiple branches, which are respectively connected to the first polysilicon strip of each ECO basic unit to form the input terminal of the ECO logic unit; The fourth connection portion includes multiple branches, which respectively connect the second partition of each ECO base unit, the second polysilicon strip of at least one ECO base unit, and the fourth and sixth partitions of the third ECO base unit to form the output terminal of the ECO logic unit; The fifth connection portion is connected to another of the fourth and sixth partitions of the first ECO base unit, to another of the fourth and sixth partitions of the second ECO base unit, and to the fifth partition of the third ECO base unit.

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