Memory allocation method and device for many-core processor and electronic equipment

Abstract

The invention provides a memory allocation method and device for a many-core processor and electronic equipment, and the method comprises the steps: obtaining a plurality of memory allocation requests sent by a plurality of application programs, and determining a plurality of idle lists corresponding to a plurality of Banks of the many-core processor; matching the plurality of memory allocation requests with a plurality of Banks, and determining a plurality of target idle lists from a plurality of idle lists according to a matching result; performing feature extraction on the plurality of memory allocation requests to obtain feature vectors of the plurality of memory allocation requests, and performing feature extraction on the plurality of target idle lists to obtain feature vectors of the plurality of target idle lists; and inputting the feature vectors of the plurality of memory allocation requests and the feature vectors of the plurality of target idle lists into a pre-constructed memory allocation model to obtain a memory allocation strategy. According to the method, the multiple Banks are combined with the idle list, and the memory allocation strategy is predicted by adopting the memory allocation model, so that the memory allocation efficiency of the many-core processor is improved.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a memory allocation method, apparatus, and electronic device for a many-core processor. Background Technology

[0002] With the rapid development of technology, many-core processors, with their superior parallel computing capabilities, have been widely used in numerous fields. From high-performance computing to artificial intelligence, from big data processing to graphics rendering, many-core processors, with their powerful performance advantages, provide strong support for solving complex computational problems. However, as these applications continue to evolve, memory allocation efficiency has gradually become a prominent issue, becoming one of the key factors restricting the performance of many-core processors. Traditional memory allocation algorithms often fail to fully utilize the parallelism of many-core processors, affecting memory allocation efficiency. Summary of the Invention

[0003] This invention provides a memory allocation method, apparatus, and electronic device for many-core processors, which addresses the shortcomings of existing memory allocation algorithms that cannot fully utilize the parallelism of many-core processors, thus affecting memory allocation efficiency.

[0004] This invention provides a memory allocation method for a many-core processor, comprising: Obtain multiple memory allocation requests sent by multiple applications, and determine multiple free lists corresponding to multiple banks of the many-core processor; The multiple memory allocation requests are matched with the multiple banks to obtain matching results. Based on the matching results, multiple target free lists are determined from the multiple free lists. Feature extraction is performed on the multiple memory allocation requests to obtain feature vectors of the multiple memory allocation requests; feature extraction is also performed on the multiple target free lists to obtain feature vectors of the multiple target free lists. The feature vectors of the multiple memory allocation requests and the feature vectors of the multiple target free lists are input into a pre-built memory allocation model to obtain the memory allocation strategy corresponding to the multiple memory allocation requests output by the memory allocation model. The memory allocation model is trained based on the sample feature vectors of multiple sample memory allocation requests, the sample feature vectors of multiple sample target free lists, and the memory allocation strategy labels of the multiple sample memory allocation requests.

[0005] In some embodiments, the step of inputting the feature vectors of the plurality of memory allocation requests and the feature vectors of the plurality of target free lists into a pre-built memory allocation model to obtain the memory allocation strategy corresponding to the plurality of memory allocation requests output by the memory allocation model includes: Based on the memory allocation model, according to the feature vectors of the multiple memory allocation requests and the feature vectors of the multiple target free lists, the corresponding memory block for each memory allocation request is searched in each target free list to obtain multiple memory blocks. The mapping relationship between the multiple memory blocks and the multiple applications is determined to obtain the memory allocation strategy.

[0006] In some embodiments, matching the plurality of memory allocation requests with the plurality of Banks to obtain a matching result includes: Determine the types of the plurality of memory allocation requests and determine the adaptive weights of the plurality of Banks; Based on the types of the multiple memory allocation requests and the adaptive weights of the multiple banks, the multiple memory allocation requests are matched with the multiple banks to obtain matching results.

[0007] In some embodiments, determining the adaptive weights of the plurality of banks includes: Obtain the operational metrics of the multiple Banks; the operational metrics include: allocation frequency, average allocation size, allocation failure rate, fragmentation level, and access latency; Based on the operating metrics of the multiple banks, adaptive weights for the multiple banks are determined.

[0008] In some embodiments, the many-core processor includes DRAM memory and SRAM memory; each DRAM corresponds to multiple channels, each channel corresponds to a bank, and each SRAM corresponds to a bank.

[0009] In some embodiments, the method further includes: Based on the memory allocation strategy, multiple memory blocks to be allocated are determined; The multiple memory blocks are split or merged to obtain multiple target memory blocks; Remove the plurality of target memory blocks from the corresponding target free list; Determine the mapping relationship between the plurality of target memory blocks and the plurality of applications, and allocate each target memory block to the corresponding application.

[0010] In some embodiments, the method further includes: Release the multiple memory blocks to be reclaimed corresponding to the multiple applications; A delayed reclamation mechanism is adopted, marking the multiple memory blocks to be reclaimed as reclaimable. If the multiple memory blocks to be reclaimed meet the reclamation conditions, the multiple memory blocks to be reclaimed are reclaimed in a unified manner.

[0011] In some embodiments, the training process of the memory allocation model includes: Obtain multiple sample memory allocation requests sent by multiple sample applications, and determine multiple sample free lists corresponding to multiple sample banks of the sample many-core processor; Determine the memory allocation strategy labels for the multiple sample memory allocation requests; The multiple sample memory allocation requests are matched with the multiple sample banks to obtain sample matching results. Based on the sample matching results, multiple sample target free lists are determined from the multiple sample free lists. Feature extraction is performed on the multiple sample memory allocation requests to obtain sample feature vectors of the multiple sample memory allocation requests; feature extraction is performed on the multiple sample target free lists to obtain sample feature vectors of the multiple sample target free lists. Using the sample feature vectors of the multiple sample memory allocation requests and the sample feature vectors of the multiple sample target free lists as training samples, and the memory allocation strategy labels of the multiple sample memory allocation requests as sample labels, an initial memory allocation model is trained. After training, the memory allocation model is obtained.

[0012] The present invention also provides a memory allocation device for a many-core processor, comprising: The acquisition unit is used to acquire multiple memory allocation requests sent by multiple applications and determine multiple free lists corresponding to multiple banks of the many-core processor; A matching unit is used to match the plurality of memory allocation requests with the plurality of banks to obtain matching results, and to determine a plurality of target free lists from the plurality of free lists based on the matching results; The feature extraction unit is used to extract features from the plurality of memory allocation requests to obtain feature vectors of the plurality of memory allocation requests, and to extract features from the plurality of target free lists to obtain feature vectors of the plurality of target free lists; The allocation decision unit is used to input the feature vectors of the multiple memory allocation requests and the feature vectors of the multiple target free lists into a pre-built memory allocation model to obtain the memory allocation strategy corresponding to the multiple memory allocation requests output by the memory allocation model. The memory allocation model is trained based on the sample feature vectors of multiple sample memory allocation requests, the sample feature vectors of multiple sample target free lists, and the memory allocation strategy labels of the multiple sample memory allocation requests.

[0013] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements a memory allocation method for any of the many-core processors described above.

[0014] The present invention provides a memory allocation method, apparatus, and electronic device for many-core processors. This method involves acquiring multiple memory allocation requests and determining multiple free lists corresponding to multiple banks of the many-core processor; matching the multiple memory allocation requests with the multiple banks; determining multiple target free lists from the multiple free lists based on the matching results; extracting features from the multiple memory allocation requests and the multiple target free lists respectively to obtain feature vectors for the multiple memory allocation requests and the multiple target free lists; and inputting the feature vectors of the multiple memory allocation requests and the multiple target free lists into a pre-built memory allocation model to obtain a memory allocation strategy, thereby improving the efficiency of memory allocation. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0016] Figure 1 This is a flowchart illustrating the memory allocation method for a many-core processor provided in an embodiment of the present invention.

[0017] Figure 2 This is a schematic diagram of the memory module of the many-core processor provided in an embodiment of the present invention.

[0018] Figure 3 This is a flowchart illustrating the process of determining the memory allocation strategy provided in an embodiment of the present invention.

[0019] Figure 4 This is a flowchart illustrating the training process of the memory allocation model provided in this embodiment of the invention.

[0020] Figure 5 This is a schematic diagram of the memory allocation device for a many-core processor provided in an embodiment of the present invention.

[0021] Figure 6 This is a schematic diagram of the structure of the electronic device provided in an embodiment of the present invention. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0023] Currently, traditional memory allocation methods achieve good results in single-core or few-core processor environments, but face numerous challenges in many-core processor environments. First, resource contention is common when multiple cores allocate memory simultaneously. Multiple cores may attempt to access the same memory region or the same memory management data structure at the same time, leading to frequent lock contention and synchronization overhead, significantly reducing memory allocation efficiency. Second, traditional memory allocation algorithms often fail to fully utilize the parallelism of many-core processors. For example, some single-threaded memory allocation algorithms cannot scale effectively in multi-core environments, failing to fully utilize the computing resources of multiple cores to accelerate the memory allocation process. Furthermore, traditional memory allocation methods may not adapt well to the complex memory hierarchy in many-core processors, leading to increased data access latency and further impacting memory allocation efficiency.

[0024] To address this, embodiments of the present invention provide a memory allocation method, apparatus, and electronic device for many-core processors. The method involves acquiring multiple memory allocation requests and determining multiple free lists corresponding to multiple banks of the many-core processor; matching the multiple memory allocation requests with the multiple banks; and determining multiple target free lists from the multiple free lists based on the matching results; extracting features from the multiple memory allocation requests and the multiple target free lists respectively to obtain feature vectors for the multiple memory allocation requests and the multiple target free lists; and inputting the feature vectors of the multiple memory allocation requests and the multiple target free lists into a pre-built memory allocation model to obtain a memory allocation strategy. This invention can effectively avoid resource contention, fully utilize the parallel computing capabilities of many-core processors, and adapt to the memory hierarchy of many-core processors, thereby achieving efficient and fast memory allocation and providing stronger support for the widespread application of many-core processors in various fields.

[0025] Figure 1 This is a flowchart illustrating a memory allocation method for a many-core processor provided in an embodiment of the present invention. Figure 1 As shown, a memory allocation method for a many-core processor is provided, including the following steps: steps 110, 120, 130, and 140. These method steps are merely one possible implementation of the present invention.

[0026] Step 110: Obtain multiple memory allocation requests sent by multiple applications, and determine multiple free lists corresponding to multiple banks of the many-core processor.

[0027] The memory allocation request includes information such as the amount of memory to be allocated and the type of memory.

[0028] Among them, a many-core processor refers to a central processing unit that integrates a large number of computing cores (usually dozens to thousands, or even more) on a single chip; many-core processors have massive parallel processing capabilities and are suitable for handling computationally intensive tasks, such as deep learning model training, big data processing, and graphics rendering.

[0029] Optionally, the many-core processor adopts a multi-bank architecture, which improves the memory allocation efficiency of the many-core processor while ensuring memory safety through a three-layer design of physical isolation, logical decoupling, and intelligent collaboration.

[0030] Optionally, a large memory region is pre-allocated as a memory pool, which is then divided into multiple memory blocks of different sizes to meet the storage needs of different types of data. Identification information is designed for each memory block to record information such as usage status and size. Different types of memory pools are maintained independently and isolated from each other.

[0031] The free list is a core data structure in the memory management system. It dynamically records the location, size, and status of currently unallocated contiguous free memory blocks through a linked list structure, used to efficiently serve memory allocation requests. Essentially, it is a dynamically mapped directory of physical memory resources.

[0032] Step 120: Match multiple memory allocation requests with multiple banks to obtain matching results. Based on the matching results, determine multiple target free lists from multiple free lists.

[0033] It should be noted that one Bank corresponds to one free list. Based on the matching results, the Bank corresponding to each memory allocation request can be determined, and thus the free list corresponding to each memory allocation request, i.e., the target free list, can be determined.

[0034] Optionally, based on each memory allocation request, the required memory type is determined, and based on the required memory type, a Bank matching each memory allocation request is determined.

[0035] In some embodiments, multiple memory allocation requests are matched with multiple banks to obtain matching results, including: Determine the types of multiple memory allocation requests and determine the adaptive weights of multiple banks; Based on the types of multiple memory allocation requests and the adaptive weights of multiple banks, multiple memory allocation requests are matched with multiple banks to obtain matching results.

[0036] Optionally, the type of memory allocation request can be determined based on the purpose, urgency, required memory size, and type of each memory allocation request.

[0037] Optionally, adaptive weights for different banks can be determined based on factors such as their performance, capacity, and usage frequency.

[0038] It should be noted that different banks have different read and write speeds. Banks with faster read and write speeds have an advantage when handling memory allocation requests with high timeliness requirements. For large-capacity banks, they can be prioritized for allocation to memory requests with high storage demand. Frequently accessed banks may have issues such as overheating, so their weight can be appropriately reduced to allow other banks to share some of the requests, which helps to balance the load of each bank.

[0039] Optionally, the performance (such as real-time read / write speed), remaining capacity, access frequency, and other parameters of each Bank can be checked periodically, and the weights can be updated according to the set rules to adapt to the ever-changing memory allocation requirements.

[0040] In some embodiments, determining adaptive weights for multiple banks includes: Obtain operational metrics for multiple banks; these metrics include: allocation frequency, average allocation size, allocation failure rate, fragmentation level, and access latency. Based on the operational metrics of multiple banks, adaptive weights for multiple banks are determined.

[0041] Optionally, operational metrics from multiple banks can be periodically acquired, and adaptive weights for these banks can be updated accordingly.

[0042] Optionally, adaptive weights for multiple banks can be determined based on the operational metrics of multiple banks and the types of multiple memory allocation requests.

[0043] It should be noted that banks with high allocation frequency may be at risk of overload, and may have problems such as insufficient capacity and severe fragmentation, which may affect their reliability. Their weight should be reduced in the subsequent weight determination. Banks with high fragmentation may not be able to effectively utilize storage space, make it difficult to meet large memory allocation requests, and also have a negative impact on performance. Banks with low access latency can respond to memory access requests faster.

[0044] Step 130: Extract features from multiple memory allocation requests to obtain feature vectors for multiple memory allocation requests; extract features from multiple target free lists to obtain feature vectors for multiple target free lists.

[0045] The feature vectors of multiple memory allocation requests include, but are not limited to: request size, request type, request priority, request time characteristics, and request associated task type.

[0046] The feature vectors of multiple target free lists include, but are not limited to, features such as the number, type, size, location, and distribution of free memory blocks.

[0047] Step 140: Input the feature vectors of multiple memory allocation requests and the feature vectors of multiple target free lists into the pre-built memory allocation model to obtain the memory allocation strategies corresponding to the multiple memory allocation requests output by the memory allocation model. The memory allocation model is trained based on the sample feature vectors of multiple sample memory allocation requests, the sample feature vectors of multiple sample target free lists, and the memory allocation strategy labels of multiple sample memory allocation requests.

[0048] The memory allocation strategy includes information such as the specific location and size of the memory block to be allocated, the allocation object (i.e., the application), and whether free blocks need to be merged or split.

[0049] Optionally, based on the memory allocation model, the feature vector of each memory allocation request is concatenated with the feature vector of each target free list to form a comprehensive feature vector. For example, the request feature vector is [request size, request type, request priority], the free list feature vector is [free block size, number of free blocks, fragmentation level], and the concatenated feature vector is [request size, request type, request priority, free block size, number of free blocks, fragmentation level].

[0050] In this embodiment of the invention, multiple memory allocation requests are acquired to determine multiple free lists corresponding to multiple banks of the many-core processor; the multiple memory allocation requests are matched with the multiple banks, and based on the matching results, multiple target free lists are determined from the multiple free lists; feature extraction is performed on the multiple memory allocation requests and the multiple target free lists respectively to obtain feature vectors for the multiple memory allocation requests and the multiple target free lists; the feature vectors for the multiple memory allocation requests and the multiple target free lists are input into a pre-built memory allocation model to obtain a memory allocation strategy. This effectively avoids resource contention, fully utilizes the parallel computing capabilities of the many-core processor, and can adapt to the memory hierarchy of the many-core processor, thereby achieving efficient and fast memory allocation and providing stronger support for the widespread application of many-core processors in various fields.

[0051] Figure 2 This is a schematic diagram of the memory module of a many-core processor provided in an embodiment of the present invention. Figure 2 As shown, in some embodiments, the many-core processor includes dynamic random-access memory (DRAM) and static random-access memory (SRAM); each DRAM corresponds to multiple channels, each channel corresponds to a bank, and each SRAM corresponds to a bank.

[0052] DRAM is the main memory, located outside the many-core processor chip; DRAM has slow access speed, low power consumption, high integration, and low cost, but requires refreshing.

[0053] SRAM is a memory on a single core, mainly integrated inside the processor chip, serving as the core's private and shared cache; SRAM has fast access speed, high power consumption, low integration density, and high cost, and does not require refreshing.

[0054] It should be noted that the memory module of the many-core processor consists of four layers. The top layer consists of various forms of cache, such as DRAM and SRAM. The layers below are the memory allocator and the Bank manager. The Bank manager manages different free lists (FreeList) in a Bank-based manner. The FreeList includes L1 Manager, L1 SMALL Manager, DRAM Manager, etc. The bottom layer is the FreeList, which manages free memory and maintains memory allocation and release.

[0055] Figure 3 This is a flowchart illustrating the process of determining the memory allocation strategy provided in an embodiment of the present invention. Figure 3As shown, in some embodiments, the feature vectors of multiple memory allocation requests and the feature vectors of multiple target free lists are input into a pre-built memory allocation model to obtain the memory allocation strategy corresponding to the multiple memory allocation requests output by the memory allocation model, including: Based on the feature vectors of multiple memory allocation requests and multiple target free lists, the memory allocation model searches for the memory block corresponding to the memory allocation request in each target free list to obtain multiple memory blocks. The mapping relationship between multiple memory blocks and multiple applications is then determined to obtain the memory allocation strategy.

[0056] Understandably, by adopting a memory allocation model, the optimal memory allocation scheme can be found quickly and accurately based on the feature vectors of memory allocation requests and the target free list, thereby reducing the failure rate of memory allocation, enhancing the stability and reliability of the system, and reducing the occurrence of system crashes or abnormal application terminations caused by memory allocation problems.

[0057] In some embodiments, the above method further includes: Based on the memory allocation strategy, multiple memory blocks to be allocated are determined; Multiple memory blocks can be split or merged to obtain multiple target memory blocks; Remove multiple target memory blocks from their respective target free lists; Determine the mapping relationship between multiple target memory blocks and multiple applications, and assign each target memory block to the corresponding application.

[0058] Optionally, the size of the memory block to be allocated is compared with the memory size required by the memory allocation request. If the memory block to be allocated is too large, exceeding the request requirements, it needs to be split. If splitting is determined, the memory block to be allocated is split into two parts: one part is equal in size to the memory size required by the memory allocation request, and the other part is the remaining free memory block. The relevant information of the memory block is updated, including its starting address and size.

[0059] Optionally, when there are multiple adjacent small memory blocks and the total size of the multiple small memory blocks can meet a certain memory allocation request, consider performing a merging operation; merge the multiple adjacent small memory blocks into a large memory block, and update the starting address, size and other information of the merged memory block to meet the requirements of the memory allocation request.

[0060] Optionally, after the memory block splitting or merging operation is completed, the allocated memory block is removed from the target free list. This involves adjusting the data structure of the free list to ensure that the free list only contains information about currently available memory blocks.

[0061] Optionally, information about the removed memory blocks, such as the starting address, size, and allocation object identifier, can be recorded for subsequent memory management and reclamation operations.

[0062] In some embodiments, the above method further includes: Release multiple memory blocks that are to be reclaimed for multiple applications; A delayed reclamation mechanism is adopted, marking multiple memory blocks to be reclaimed as reclaimable. When multiple memory blocks meet the reclamation conditions, they are reclaimed at the same time.

[0063] The conditions for memory reclamation include system memory usage reaching a certain threshold, system idle time being long enough, or memory allocation requests failing due to insufficient memory.

[0064] For example, when the system memory usage exceeds 90%, or the system remains idle for a certain period of time (such as 5 minutes), or multiple memory allocation requests fail due to insufficient memory, the conditions for memory reclamation can be considered met.

[0065] It should be noted that once the reclamation conditions are met, the memory manager begins to reclaim all memory blocks marked as "reclaimable". During the reclamation process, the memory manager changes these memory blocks from the "reclaimable" state to the "free" state and adds them back to the free list so that they can be used by subsequent memory allocation requests; the free list is then updated.

[0066] Understandably, using a delayed memory reclamation mechanism allows multiple memory blocks to be reclaimed at once, avoiding frequent context switching and memory management operations. This significantly reduces the performance overhead of memory reclamation and improves the overall system performance and response speed.

[0067] Figure 4 This is a flowchart illustrating the training process of the memory allocation model provided in an embodiment of the present invention. Figure 4 As shown, in some embodiments, the training process of the memory allocation model includes: Step 410: Obtain multiple sample memory allocation requests sent by multiple sample applications, and determine multiple sample free lists corresponding to multiple sample banks of the sample many-core processor. Step 420: Determine the memory allocation strategy labels for multiple sample memory allocation requests; Step 430: Match multiple sample memory allocation requests with multiple sample banks to obtain sample matching results. Based on the sample matching results, determine multiple sample target free lists from multiple sample free lists. Step 440: Extract features from multiple sample memory allocation requests to obtain sample feature vectors of multiple sample memory allocation requests; extract features from multiple sample target free lists to obtain sample feature vectors of multiple sample target free lists. Step 450: Using the sample feature vectors of multiple sample memory allocation requests and the sample feature vectors of multiple sample target free lists as training samples, and the memory allocation strategy labels of multiple sample memory allocation requests as sample labels, train the initial memory allocation model. After training, the memory allocation model is obtained.

[0068] Among them, the sample feature vectors of multiple sample memory allocation requests include, but are not limited to: request size, request type, request priority, request time characteristics, and request associated task type.

[0069] Among them, the sample feature vectors of multiple sample target free lists include, but are not limited to, features such as the number, type, size, location and distribution of free memory blocks.

[0070] Optionally, during the training of the initial memory allocation model, the memory allocation strategy predicted by the initial memory allocation model is compared with the memory allocation strategy label, and the loss function value is calculated; based on the loss function value, the parameters of the initial memory allocation model are iteratively optimized.

[0071] The memory allocation device for a many-core processor provided in the embodiments of the present invention will be described below. The memory allocation device for a many-core processor described below can be referred to in correspondence with the memory allocation method for a many-core processor described above.

[0072] Figure 5 This is a schematic diagram of the memory allocation device for a many-core processor provided in an embodiment of the present invention, as shown below. Figure 5 As shown, the memory allocation device 500 of the many-core processor includes: The acquisition unit 510 is used to acquire multiple memory allocation requests sent by multiple applications and determine multiple free lists corresponding to multiple banks of the many-core processor; Matching unit 520 is used to match multiple memory allocation requests with multiple banks to obtain matching results, and to determine multiple target free lists from multiple free lists based on the matching results; The feature extraction unit 530 is used to extract features from multiple memory allocation requests to obtain feature vectors of multiple memory allocation requests, and to extract features from multiple target free lists to obtain feature vectors of multiple target free lists. The allocation decision unit 540 is used to input the feature vectors of multiple memory allocation requests and the feature vectors of multiple target free lists into a pre-built memory allocation model to obtain the memory allocation strategy corresponding to the multiple memory allocation requests output by the memory allocation model. The memory allocation model is trained based on the sample feature vectors of multiple sample memory allocation requests, the sample feature vectors of multiple sample target free lists, and the memory allocation strategy labels of multiple sample memory allocation requests.

[0073] Optionally, the feature vectors of multiple memory allocation requests and the feature vectors of multiple target free lists are input into a pre-built memory allocation model to obtain the memory allocation strategies corresponding to the multiple memory allocation requests output by the memory allocation model, including: Based on the feature vectors of multiple memory allocation requests and multiple target free lists, the memory allocation model searches for the memory block corresponding to the memory allocation request in each target free list to obtain multiple memory blocks. The mapping relationship between multiple memory blocks and multiple applications is then determined to obtain the memory allocation strategy.

[0074] Optionally, multiple memory allocation requests are matched with multiple banks to obtain matching results, including: Determine the types of multiple memory allocation requests and determine the adaptive weights of multiple banks; Based on the types of multiple memory allocation requests and the adaptive weights of multiple banks, multiple memory allocation requests are matched with multiple banks to obtain matching results.

[0075] Optionally, adaptive weights for multiple banks are determined, including: Obtain operational metrics for multiple banks; these metrics include: allocation frequency, average allocation size, allocation failure rate, fragmentation level, and access latency. Based on the operational metrics of multiple banks, adaptive weights for multiple banks are determined.

[0076] Optionally, the many-core processor includes DRAM memory and SRAM memory; each DRAM corresponds to multiple channels, each channel corresponds to one bank, and each SRAM corresponds to one bank.

[0077] Optionally, the memory allocation device of the many-core processor also includes a memory allocation unit for: Based on the memory allocation strategy, multiple memory blocks to be allocated are determined; Multiple memory blocks can be split or merged to obtain multiple target memory blocks; Remove multiple target memory blocks from their respective target free lists; Determine the mapping relationship between multiple target memory blocks and multiple applications, and assign each target memory block to the corresponding application.

[0078] Optionally, the memory allocation device of the many-core processor also includes a memory release unit for: Release multiple memory blocks that are to be reclaimed for multiple applications; A delayed reclamation mechanism is adopted, marking multiple memory blocks to be reclaimed as reclaimable. When multiple memory blocks meet the reclamation conditions, they are reclaimed at the same time.

[0079] Optionally, the training process of the memory allocation model includes: Obtain multiple sample memory allocation requests sent by multiple sample applications, and determine multiple sample free lists corresponding to multiple sample banks of the sample many-core processor; Determine the memory allocation strategy labels for multiple sample memory allocation requests; Multiple sample memory allocation requests are matched with multiple sample banks to obtain sample matching results. Based on the sample matching results, multiple sample target free lists are determined from multiple sample free lists. Feature extraction is performed on multiple sample memory allocation requests to obtain sample feature vectors of multiple sample memory allocation requests; feature extraction is performed on multiple sample target free lists to obtain sample feature vectors of multiple sample target free lists. The initial memory allocation model is trained using the sample feature vectors of multiple sample memory allocation requests and the sample feature vectors of multiple sample target free lists as training samples, and the memory allocation strategy labels of multiple sample memory allocation requests as sample labels. After training, the memory allocation model is obtained.

[0080] It should be noted that the memory allocation device for a many-core processor provided in this embodiment of the invention can implement all the method steps implemented in the above-described memory allocation method embodiment for a many-core processor, and can achieve the same technical effect. Therefore, the parts and beneficial effects that are the same as those in the method embodiment will not be described in detail here.

[0081] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention, such as... Figure 6As shown, the electronic device may include: a processor 610, a communications interface 620, a memory 630, and a communications bus 640, wherein the processor 610, the communications interface 620, and the memory 630 communicate with each other through the communications bus 640. The processor 610 can invoke logical instructions in the memory 630 to execute a memory allocation method for the many-core processor. This method includes: acquiring multiple memory allocation requests sent by multiple applications; determining multiple free lists corresponding to multiple banks of the many-core processor; matching the multiple memory allocation requests with the multiple banks to obtain matching results; determining multiple target free lists from the multiple free lists based on the matching results; extracting features from the multiple memory allocation requests to obtain feature vectors for the multiple memory allocation requests; extracting features from the multiple target free lists to obtain feature vectors for the multiple target free lists; and inputting the feature vectors of the multiple memory allocation requests and the feature vectors of the multiple target free lists into a pre-built memory allocation model to obtain memory allocation strategies corresponding to the multiple memory allocation requests output by the memory allocation model. The memory allocation model is trained based on sample feature vectors of multiple sample memory allocation requests, sample feature vectors of multiple sample target free lists, and memory allocation strategy labels for multiple sample memory allocation requests.

[0082] Furthermore, the logical instructions in the aforementioned memory 630 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0083] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0084] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0085] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A memory allocation method for a many-core processor, characterized in that, include: Obtain multiple memory allocation requests sent by multiple applications, and determine multiple free lists corresponding to multiple banks of the many-core processor; The multiple memory allocation requests are matched with the multiple banks to obtain matching results. Based on the matching results, multiple target free lists are determined from the multiple free lists. Feature extraction is performed on the multiple memory allocation requests to obtain feature vectors of the multiple memory allocation requests; feature extraction is also performed on the multiple target free lists to obtain feature vectors of the multiple target free lists. The feature vectors of the multiple memory allocation requests and the feature vectors of the multiple target free lists are input into a pre-built memory allocation model to obtain the memory allocation strategy corresponding to the multiple memory allocation requests output by the memory allocation model. The memory allocation model is trained based on the sample feature vectors of multiple sample memory allocation requests, the sample feature vectors of multiple sample target free lists, and the memory allocation strategy labels of the multiple sample memory allocation requests.

2. The memory allocation method for a many-core processor according to claim 1, characterized in that, The step of inputting the feature vectors of the multiple memory allocation requests and the feature vectors of the multiple target free lists into a pre-built memory allocation model to obtain the memory allocation strategy corresponding to the multiple memory allocation requests output by the memory allocation model includes: Based on the memory allocation model, according to the feature vectors of the multiple memory allocation requests and the feature vectors of the multiple target free lists, the corresponding memory block for each memory allocation request is searched in each target free list to obtain multiple memory blocks. The mapping relationship between the multiple memory blocks and the multiple applications is determined to obtain the memory allocation strategy.

3. The memory allocation method for a many-core processor according to claim 1, characterized in that, The step of matching the multiple memory allocation requests with the multiple Banks to obtain matching results includes: Determine the types of the plurality of memory allocation requests and determine the adaptive weights of the plurality of Banks; Based on the types of the multiple memory allocation requests and the adaptive weights of the multiple banks, the multiple memory allocation requests are matched with the multiple banks to obtain matching results.

4. The memory allocation method for a many-core processor according to claim 3, characterized in that, Determining the adaptive weights of the plurality of banks includes: Obtain the operational metrics of the multiple Banks; the operational metrics include: allocation frequency, average allocation size, allocation failure rate, fragmentation level, and access latency; Based on the operating metrics of the multiple banks, adaptive weights for the multiple banks are determined.

5. The memory allocation method for a many-core processor according to claim 1, characterized in that, The many-core processor includes DRAM memory and SRAM memory; each DRAM corresponds to multiple channels, each channel corresponds to a bank, and each SRAM corresponds to a bank.

6. The memory allocation method for a many-core processor according to any one of claims 1-5, characterized in that, The method further includes: Based on the memory allocation strategy, multiple memory blocks to be allocated are determined; The multiple memory blocks are split or merged to obtain multiple target memory blocks; Remove the plurality of target memory blocks from the corresponding target free list; Determine the mapping relationship between the plurality of target memory blocks and the plurality of applications, and allocate each target memory block to the corresponding application.

7. The memory allocation method for a many-core processor according to any one of claims 1-5, characterized in that, The method further includes: Release the multiple memory blocks to be reclaimed corresponding to the multiple applications; A delayed reclamation mechanism is adopted, marking the multiple memory blocks to be reclaimed as reclaimable. If the multiple memory blocks to be reclaimed meet the reclamation conditions, the multiple memory blocks to be reclaimed are reclaimed in a unified manner.

8. The memory allocation method for a many-core processor according to claim 1, characterized in that, The training process of the memory allocation model includes: Obtain multiple sample memory allocation requests sent by multiple sample applications, and determine multiple sample free lists corresponding to multiple sample banks of the sample many-core processor; Determine the memory allocation strategy labels for the multiple sample memory allocation requests; The multiple sample memory allocation requests are matched with the multiple sample banks to obtain sample matching results. Based on the sample matching results, multiple sample target free lists are determined from the multiple sample free lists. Feature extraction is performed on the multiple sample memory allocation requests to obtain sample feature vectors of the multiple sample memory allocation requests; feature extraction is performed on the multiple sample target free lists to obtain sample feature vectors of the multiple sample target free lists. Using the sample feature vectors of the multiple sample memory allocation requests and the sample feature vectors of the multiple sample target free lists as training samples, and the memory allocation strategy labels of the multiple sample memory allocation requests as sample labels, an initial memory allocation model is trained. After training, the memory allocation model is obtained.

9. A memory allocation device for a many-core processor, characterized in that, include: The acquisition unit is used to acquire multiple memory allocation requests sent by multiple applications and determine multiple free lists corresponding to multiple banks of the many-core processor; A matching unit is used to match the plurality of memory allocation requests with the plurality of banks to obtain matching results, and to determine a plurality of target free lists from the plurality of free lists based on the matching results; The feature extraction unit is used to extract features from the plurality of memory allocation requests to obtain feature vectors of the plurality of memory allocation requests, and to extract features from the plurality of target free lists to obtain feature vectors of the plurality of target free lists; The allocation decision unit is used to input the feature vectors of the multiple memory allocation requests and the feature vectors of the multiple target free lists into a pre-built memory allocation model to obtain the memory allocation strategy corresponding to the multiple memory allocation requests output by the memory allocation model. The memory allocation model is trained based on the sample feature vectors of multiple sample memory allocation requests, the sample feature vectors of multiple sample target free lists, and the memory allocation strategy labels of the multiple sample memory allocation requests.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the memory allocation method of the many-core processor as described in any one of claims 1 to 8.

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