Test verification system and method of reactor core neutron fluence rate measurement system

Abstract

The invention relates to a test verification system and method for a reactor core neutron fluence rate measurement system. The test verification system comprises an upper computer software test verification unit, a lower computer software and hardware test verification unit and a communication verification unit, the upper computer software testing and verifying unit is used for testing and verifying functions of upper computer software; the lower computer software and hardware test verification unit is used for testing software functions, hardware functions and local functions of the lower computer; and the communication verification unit is used for testing a communication interface, a communication protocol and communication stability. According to the invention, a standard test scheme can be formed, complete evaluation of functions of the reactor core neutron fluence rate measurement system is realized, independent tests are carried out for communication, logic and software and hardware, and the requirement of rapid replacement of subsystems is met. And meanwhile, the fault point can be quickly positioned by disassembling and testing specific functions.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of nuclear power plant core monitoring, and more particularly to a test verification system and method for a reactor core neutron fluence rate measurement system. BACKGROUND

[0002] The neutron fluence rate measurement and control system of the CPR1000 unit is a key component to ensure the safe operation of the reactor. The main function of the reactor core neutron fluence rate measurement system (RIC) is to monitor the core power distribution: the detector obtains the core neutron fluence rate data, and then transmits the neutron fluence rate signal to the online power monitoring system to generate a three-dimensional core power distribution map.

[0003] The traditional neutron fluence rate measurement and control system test scheme mainly relies on experimental testing and experience judgment, and has the following problems:

[0004] There is no standard test scheme, which makes it impossible to comprehensively evaluate the functional integrity of the reactor core neutron fluence rate measurement system; there is a lack of segmented verification means: there is no independent test method for communication, logic, software and hardware, etc., which makes it difficult to meet the demand for rapid replacement of subsystems; software algorithm verification is limited: the traditional scheme is difficult to verify software algorithms (such as logic, packet loss rate, data analysis, etc.), which limits the intelligence of the system; fault location is difficult: the number of software logic combinations is large, and the circuit of the lower computer is complex, so there is a lack of effective means to quickly locate system abnormalities. SUMMARY

[0005] The technical problem to be solved by the present application is to provide a test verification system and method for a reactor core neutron fluence rate measurement system in view of the problems in the prior art.

[0006] The technical solution adopted by the present application to solve the technical problem is: a test verification system for a reactor core neutron fluence rate measurement system is constructed, comprising: an upper computer software test verification unit, a lower computer software and hardware test verification unit, and a communication verification unit;

[0007] The upper computer software test verification unit is used to test and verify the functions of the upper computer software;

[0008] The lower computer software and hardware test verification unit is used to test the software function, hardware function and local function of the lower computer;

[0009] The communication verification unit is used to test the communication interface, communication protocol and communication stability.

[0010] In the test verification system for a reactor core neutron fluence rate measurement system according to the present application, the upper computer software test verification unit comprises: a function test module, a compatibility test module and a performance test module;

[0011] The function test module is used for testing whether different mode functions are normal and checking instruction sending accuracy and feedback correctness;

[0012] The compatibility test module is used for testing operation of the upper computer in each operating system and testing connection of the upper computer with various hardware devices;

[0013] The performance test module is used for measuring whether instruction response time is up to standard and verifying performance performance when large data volume is processed.

[0014] In the test verification system of the reactor core neutron fluence rate measuring system, the function test module comprises a mode switching test submodule and an instruction sending and feedback test submodule;

[0015] The compatibility test module comprises a different operating system compatibility test submodule and a different hardware device compatibility test submodule;

[0016] The performance test module comprises a response time test submodule and a data processing capacity test submodule;

[0017] The mode switching test submodule is used for verifying whether different mode functions are normal; the instruction sending and feedback test submodule is used for checking instruction sending accuracy and feedback correctness;

[0018] The different operating system compatibility test submodule is used for testing operation of the upper computer in each operating system; the different hardware device compatibility test submodule is used for testing connection of the upper computer with various hardware devices;

[0019] The response time test submodule is used for measuring whether instruction response time is up to standard; the data processing capacity test submodule is used for verifying performance performance when large data volume is processed.

[0020] In the test verification system of the reactor core neutron fluence rate measuring system, the lower computer software and hardware test verification unit comprises a lower computer hardware test module, a lower computer software test module and a lower computer local test module;

[0021] The lower computer hardware test module is used for testing and verifying lower computer hardware functions, hardware electrical properties and hardware interfaces;

[0022] The lower computer software test module is used for testing and verifying lower computer software functions;

[0023] The lower computer local test module is used for testing and verifying lower computer local functions.

[0024] In the test verification system of the reactor core neutron flux measuring system, the lower computer hardware test module comprises a hardware function test module, a hardware electrical performance test module and a hardware interface test module.

[0025] The hardware function test module is used for testing and verifying the hardware function of the lower computer.

[0026] The hardware electrical performance test module is used for testing and verifying the electrical performance of the lower computer.

[0027] The hardware interface test module is used for testing and verifying the input / output interface of the lower computer.

[0028] In the test verification system of the reactor core neutron flux measuring system, the hardware function test module comprises a polarization voltage function test submodule, a current acquisition function test submodule and a self-encoder decoder function test submodule.

[0029] The hardware electrical performance test module comprises a dielectric strength test submodule, an insulation resistance test submodule and a ground continuity test submodule.

[0030] The hardware interface test module comprises an output relay interface test submodule and an input interface test submodule.

[0031] The polarization voltage function test submodule is used for performing a polarization voltage test to verify the accuracy of the polarization voltage output; the current acquisition function test submodule is used for performing a current acquisition test to verify the accuracy of the current acquisition; and the self-encoder decoder function test submodule is used for performing a self-encoder decoder test to check the accuracy of the position measurement of the self-encoder decoder.

[0032] The dielectric strength test submodule is used for measuring whether the strength meets the standard; the insulation resistance test submodule is used for detecting whether the insulation resistance meets the standard; and the ground continuity test submodule is used for verifying whether the ground continuity is good.

[0033] The output relay interface test submodule is used for checking the logic function of the output relay; and the input interface test submodule is used for testing the signal receiving capability of the input interface.

[0034] In the test verification system of the reactor core neutron flux measuring system, the lower computer software test module comprises a plurality of test channels, each test channel comprising a self-checking mode, a static mode, a dynamic mode, a plateau mode, an automatic range mode, a standard motion mode and a leakage monitoring mode.

[0035] In the test verification system of the reactor core neutron flux measuring system, the communication verification unit comprises a communication interface test module, a communication protocol test module and a communication stability test module.

[0036] The communication interface test module is used for RS422 communication test with the RB device and RS232 communication test with the host industrial computer.

[0037] The communication protocol test module is used for detecting whether the communication protocol analysis is correct and verifying whether the protocol data transmission is lost or incorrect.

[0038] The communication stability test module is used for monitoring whether a fault occurs during long-time communication and testing the reliability of communication in an interference environment.

[0039] In the test verification system of the reactor core neutron flux measuring system, the communication interface test module comprises an RS422 communication test submodule and an RS232 communication test submodule.

[0040] The communication protocol test module comprises a protocol analysis accuracy test submodule and a protocol data transmission test submodule.

[0041] The communication stability test module comprises a long-time communication stability test submodule and an interference environment communication stability test submodule.

[0042] The RS422 communication test submodule is used for RS422 communication test with the RB device, and the RS232 communication test submodule is used for RS232 communication test with the host industrial computer.

[0043] The protocol analysis accuracy test submodule is used for checking whether the communication protocol analysis is correct, and the protocol data transmission test submodule is used for verifying whether the protocol data transmission is lost or incorrect.

[0044] The long-time communication stability test submodule is used for monitoring whether a fault occurs during long-time communication, and the interference environment communication stability test submodule is used for testing the reliability of communication in an interference environment.

[0045] The application further provides a test verification method of a reactor core neutron flux measuring system, comprising the following steps:

[0046] The host computer software test verification unit tests and verifies the functions of the host computer software based on the host computer software function test logic.

[0047] The lower computer software and hardware test verification unit tests the software functions, hardware functions and local functions of the lower computer according to the software / hardware functions and local function test logic of the lower computer.

[0048] The communication verification unit tests the communication interface, the communication protocol and the communication stability according to the test logic of the communication function of the system.

[0049] The test verification system and method of the core neutron fluence rate measurement system of the application has the following beneficial effects: including: host computer software test verification unit, lower computer software and hardware test verification unit and communication verification unit; the host computer software test verification unit is used for testing and verifying the function of the host computer software; the lower computer software and hardware test verification unit is used for testing the lower computer software function, hardware function and local function; the communication verification unit is used for testing the communication interface, the communication protocol and the communication stability. Through the application, a standard test scheme can be formed, the function of the core neutron fluence rate measurement system is completely evaluated, the communication, logic, software and hardware are independently tested, the demand of rapid replacement of the subsystem is met. At the same time, through the disassembly test of the specific function, the fault point can be quickly located. BRIEF DESCRIPTION OF DRAWINGS

[0050] The application will be further described below in combination with the drawings and examples, and the drawings are as follows:

[0051] Figure 1 It is the logic block diagram of the test verification system of the core neutron fluence rate measurement system provided by the embodiment of the application;

[0052] Figure 2 It is the architecture diagram of the core neutron fluence rate measurement system;

[0053] Figure 3 It is the function module diagram of the host computer software test provided by the embodiment of the application;

[0054] Figure 4 It is the function module diagram of the lower computer software test provided by the embodiment of the application;

[0055] Figure 5 It is the hardware function module diagram of the lower computer provided by the embodiment of the application;

[0056] Figure 6 It is the software module test flowchart of the lower computer provided by the embodiment of the application;

[0057] Figure 7 It is the function module diagram of the communication test provided by the embodiment of the application;

[0058] Figure 8 It is the schematic diagram of the RS232 interface provided by the embodiment of the application;

[0059] Figure 9 It is the isolation RS233 circuit diagram provided by the embodiment of the application;

[0060] Figure 10RS422 interface schematic diagram provided by the embodiment of the present application;

[0061] Figure 11 Chassis address signal circuit diagram provided by the embodiment of the present application;

[0062] Figure 12 ETOR / STOR circuit diagram provided by the embodiment of the present application;

[0063] Figure 13 Flow chart of the test verification method of the reactor core neutron fluence rate measurement system provided by the embodiment of the present application. DETAILED DESCRIPTION

[0064] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0065] The present application designs a test verification system of a reactor core neutron fluence rate measurement system (RIC system) for the reactor core neutron fluence rate measurement system. The test verification system of the reactor core neutron fluence rate measurement system customizes a set of standardized test schemes to effectively evaluate software logic, algorithms, communication, hardware circuit, software and hardware joint debugging and other parts and locate abnormalities.

[0066] Reference Figure 1 , Figure 1 The logic block diagram of a preferred embodiment of the test verification system of the reactor core neutron fluence rate measurement system provided by the present application.

[0067] As shown in Figure 1 , the test verification system of the reactor core neutron fluence rate measurement system comprises an upper computer software test verification unit, a lower computer software and hardware test verification unit and a communication verification unit. The upper computer software test verification unit is used for testing and verifying the functions of the upper computer software; the lower computer software and hardware test verification unit is used for testing the functions of the lower computer software, the functions of the hardware and the local functions; and the communication verification unit is used for testing the communication interface, the communication protocol and the communication stability. The upper computer software verification, the lower computer software and hardware verification and the communication verification are realized through the upper computer software test verification unit, the lower computer software and hardware test verification unit and the communication verification unit.

[0068] Specifically, as Figure 2As shown, the reactor core neutron flux measurement system comprises an industrial computer, a display, a keyboard, a printer, a converter and a measurement and control cabinet, and further comprises a power supply (not shown in the figure). The display is mainly used for displaying the drive unit and the converter selection, the energy measurement curve, the detector position and the like.

[0069] In the embodiment of the present application, the host computer is the industrial computer in the Figure 2 The host computer mainly receives measurement data and position information from the electromechanical device and the leakage detector, and these data and information are transmitted through the measurement and control cabinet (i.e. the slave computer of the present application). The host computer mainly performs data processing, electromechanical device position monitoring, leakage detector monitoring and error reporting, manages display (the operator can operate and display the reactor flux map through the display screen), performs system management functions (activates the flux measurement program and controls the electromechanical device and the leakage detector), provides connection to the power plant computer system (DCS), parameter, position, result and logical flux map printing (printed by the printer, controlled by the host computer) and performs some reactor parameter calculations. The host computer software of the present application is mainly installed in the industrial computer, is the special software of the reactor core neutron flux measurement system, realizes human-computer interaction and neutron flux data acquisition control, and includes human-computer interface, communication and data acquisition and the like. The main functions realized by the host computer software include but are not limited to: help test, analog panel test, command test, manual command, regular sequence list, parameter test, archiving test, screen printing test, emergency stop test, return test and alarm test and the like.

[0070] Based on the above functions of the host computer, the present application designs a function test module, a compatibility test module and a performance test module, and the host computer software test and verification unit is composed of these modules, so as to realize specific host computer software test and verification. The function test module is used to test and verify whether the different mode functions are normal, and to check the accuracy of instruction sending and the correctness of feedback; the compatibility test module is used to test the operation of the host computer in each operating system and to test the connection of the host computer with various hardware devices; the performance test module is used to measure whether the instruction response time meets the standard and to verify the performance when a large amount of data is processed.

[0071] Optionally, in this embodiment of the invention, the functional testing module includes: a mode switching testing submodule and an instruction sending and feedback testing submodule; the compatibility testing module includes: a compatibility testing submodule for different operating systems and a compatibility testing submodule for different hardware devices; the performance testing module includes: a response time testing submodule and a data processing capability testing submodule; the mode switching testing submodule is used to verify whether the functions of different modes are normal; the instruction sending and feedback testing submodule is used to check the accuracy of instruction sending and the correctness of feedback; the compatibility testing submodule for different operating systems is used to test the operation of the host computer on various operating systems; the compatibility testing submodule for different hardware devices is used to test the connection between the host computer and various hardware devices; the response time testing submodule is used to measure whether the instruction response time meets the standard; and the data processing capability testing submodule is used to verify the performance when processing large amounts of data.

[0072] Specifically, such as Figure 3 As shown, starting with the host computer software, it is connected to the functional testing module, compatibility testing module, and performance testing module. The functional testing module is further connected to the mode switching testing submodule and the command sending and feedback testing submodule, and so on, demonstrating the connection relationships between the modules and reflecting the testing process. Specific test items include, but are not limited to: F1-Help test (to verify the usability of the help function), F2-Mimic panel test (to check the correctness of the simulated panel), F3-commands test (to evaluate the accuracy of command execution), Manual command test (to test the execution of manual commands), Usual Sequences list test (to test the execution of common operation sequences), Campaign test (to test the execution of specific tasks), F4-parameters test (to test parameter setting and reading functions), F5-Archives test (to test data archiving functions), F6-Print screen test (to test screen printing functions), F7-Immediate stop test (to test emergency stop functions), F9-Return test (to test the reliability of the return function), and alarm test (to perform alarm tests to ensure that the alarm system works properly).

[0073] Specifically, the lower-level machine consists of three measurement and control chassis (of which, Figure 2 Only one control and measurement unit (CMU) is shown, including the associated input / output circuitry. Each CMU manages a dual-channel energy measurement (or a single-channel one, as in CMU 3), including signal processing for two neutron detectors and signal processing for electromechanical equipment.

[0074] Each measurement and control chassis performs the following functions:

[0075] • Responsible for the interpretation of the orders of the supervisor PC to the electromechanical equipment (movement of the probe), acquisition of the flux measurement signal interface (high voltage polarization of the probe) and the corresponding configuration;

[0076] • Processing of the position signals of the probe and their time relationship with the flux measurement;

[0077] • Reception of the input status signals from the reactor (input ETOR);

[0078] • Monitoring of the effectiveness of the communication;

[0079] • Acquisition of the analog signal of the flux measurement;

[0080] • Digital filtering measures of the flux measurement;

[0081] • Management of the polarization voltage of the probe;

[0082] • Management of the range of the flux measurement;

[0083] • Correlation of the flux measurement with the position of the probe and creation of the dynamic measurement data table;

[0084] • Correlation of the flux measurement with the voltage plateau curve of the probe and creation of the dynamic measurement data table;

[0085] • Speed and stop management of the probe;

[0086] • Management of the local inputs and outputs, including the interpretation of the manual commands and the "watchdog", address of the control box, indicator lights, alarms of the control room;

[0087] • Preparation and sending of the commands to the RB (output STOR);

[0088] • Transmission of the different status values of the supervisor PC with each channel of the control box, communication and transmission of the flux measurement;

[0089] • Management of the monitoring of the leakage information.

[0090] The main test indicators include:

[0091] • Current input test: standard source table 0 to 1.5 mA in 4 ranges (decimal).

[0092] • Measurement accuracy (including linear error): full scale ≤ 0.25%, range 0.015 mA to 1.5 mA ≤ 1%. Linear in each range ≤ 0.25%.

[0093] • Response time ≤ 80 milliseconds (95%).

[0094] • Fluctuation rate < 0.5% x set value.

[0095] • The sinusoidal signal is 50Hz with a peak amplitude of approximately 50V (signals S1, S2, and S3 are relative to the housing and correspond to the position of the flux detector).

[0096] Relay output: Through six independent dry contacts, with a voltage isolation voltage ≥500VDC between the no-potential and chassis. Minimum breaking capacity is 0.5A at 48V continuous or 220V AC. All contacts are open when there is no power.

[0097] • The input impedance of each connection terminal of the synchro is >100KΩ.

[0098] Based on the aforementioned functions of the lower-level machine, this invention designs a lower-level machine hardware testing module, a lower-level machine software testing module, and a lower-level machine local testing module. These modules constitute a lower-level machine hardware and software testing and verification unit to realize specific lower-level machine hardware and software testing. Specifically, the lower-level machine hardware testing module is used to test and verify the lower-level machine's hardware functions, hardware electrical performance, and hardware interfaces; the lower-level machine software testing module is used to test and verify the lower-level machine's software functions; and the lower-level machine local testing module is used to test and verify the lower-level machine's local functions. Optionally, in this embodiment of the invention, the lower-level machine hardware testing module includes: a hardware function testing module, a hardware electrical performance testing module, and a hardware interface testing module; the hardware function testing module is used to test and verify the lower-level machine's hardware functions; the hardware electrical performance testing module is used to test and verify the lower-level machine's electrical performance; and the hardware interface testing module is used to test and verify the lower-level machine's input / output interfaces.

[0099] In this embodiment of the invention, the hardware function testing module includes: a polarization voltage function testing submodule, a current acquisition function testing submodule, and a synchro decoder function testing submodule; the hardware electrical performance testing module includes: a dielectric strength testing submodule, an insulation resistance testing submodule, and a grounding continuity testing submodule; the hardware interface testing module includes: an output relay interface testing submodule and an input interface testing submodule; the polarization voltage function testing submodule is used to perform a polarization voltage test to verify the accuracy of the polarization voltage output; the current acquisition function testing submodule is used to perform a current acquisition test to verify the accuracy of different current acquisitions; the synchro decoder function testing submodule is used to perform a synchro decoder test to check the accuracy of the synchro decoder position measurement; the dielectric strength testing submodule is used to measure whether the strength meets the standard; the insulation resistance testing submodule is used to detect whether the insulation resistance meets the standard; the grounding continuity testing submodule is used to verify whether the grounding continuity is good; the output relay interface testing submodule is used to check the logic function of the output relay; and the input interface testing submodule is used to test the signal receiving capability of the input interface.

[0100] Specifically, such as Figure 4As shown, the overall test procedure takes the hardware of the lower computer of the test and control case as the core, and diverges out three main test modules of hardware function test module, hardware electrical performance test module and hardware interface test module to the surroundings, each module continues to subdivide specific test submodules, and clearly shows the detailed architecture and procedure of the lower computer from the function, electrical performance to the interface.

[0101] It should be noted that the lower computer is in the "ready to use" state without packaging and power on, and needs to be visually inspected, and the standard is RCC-E MC 2000. The specific detection content is shown in Table 1 as follows:

[0102] Table 1. Appearance inspection

[0103]

[0104] After completing the appearance detection, the electrical inspection test is performed. The electrical inspection test includes: dielectric strength test, insulation resistance test, and ground continuity test. The method and condition of the dielectric strength test are performed according to the relevant provisions of RCC-E MC 3100, the method and condition of the insulation resistance test are performed according to the relevant provisions of RCC-3MC 3200, and the method and condition of the ground continuity test are performed according to the relevant provisions of RCC-E MC 3300. The test content and acceptance criteria are shown in Table 2 as follows:

[0105] Table 2. Electrical inspection test

[0106]

[0107]

[0108] After the electrical detection test is performed, the hardware test can be performed. The hardware test includes: polarization voltage test, current acquisition test, PLATEAU test, self-chronograph decoder test, case address, output relay and input, indicator light and nixie tube display screen. In the embodiment of the application, the lower computer hardware function module diagram is shown in Figure 5 As shown, it includes a processor, a main control module, a probe interface A, a probe interface B, a position measurement module, a voltage and current measurement module, and a front panel display module. The probe interface A is used to perform A probe polarization voltage and A probe measurement signal test, the probe interface B is used to perform B probe polarization voltage and B probe measurement signal test, the position measurement module is used to perform position signal A and position signal B test, and the front panel display module is used to perform digital display and lamp alarm test. The specific test is as follows:

[0109] Polarization voltage test: the polarization voltage of the control box is output by the upper computer PC, the measured value voltage is read by the back template J4, J5 of the box or the front panel Voltage of the box, at least 7 values in the range of 50V-200V are selected for 2-channel voltage test, the deviation between the measured value and the theoretical value is not more than 0.5V, and the ripple is not more than 0.5V.

[0110] Current acquisition test: the current acquisition circuit of the control box acquires the current value of the detector, which can be displayed and measured in software or on the front panel Current of the box. This part has 4 ranges: 0-1.5μA, 0-15μA, 0-150μA, and 0-1500μA, which are tested by outputting standard source tables. The specific test is as follows:

[0111] 0-1.5μA: 2-channel current test selects at least 9 values in the range of 5nA-140nA, the deviation between the measured value and the theoretical value is not more than 0.00375μA. 0-15μA: 2-channel current test selects at least 9 values in the range of 0.5μA-14μA, the deviation between the measured value and the theoretical value is not more than 0.0375μA. 0-150μA: 2-channel current test selects at least 9 values in the range of 5μA-140μA, the deviation between the measured value and the theoretical value is not more than 0.375μA. 0-1500μA: 2-channel current test selects at least 9 values in the range of 50μA-1400μA, the deviation between the measured value and the theoretical value is not more than 3.75μA.

[0112] PLATEAU test: add a 3.3MΩ resistor to the output end to test PLATEAU. Test by standard source table, according to 50V to 195V, with a scale of 1V. For every 1V increase in polarization voltage, the theoretical value increases by 0.303μA. 50V corresponds to 15.1515μA, and 195V corresponds to 59.0909μA.

[0113] Synchro decoder test: the synchro emits a sinusoidal signal of 50Hz with a peak amplitude of 50V (signals S1, S2 and S3 relative to the case), and one rotation of the synchro (one revolution of the original encoder) corresponds to 1000 steps, and one step corresponds to approximately 1mm of displacement of the neutron sensor. The synchro decoder displays the number of steps in software or on the front panel LED of the box. 2 channels are selected from 1010 steps to 10000 steps, with at least 6 values. The error between the saved position and the last position is not more than 10 steps.

[0114] Relay output and input test: 6 output relays are energized and attracted. 1 inhibit alarm is transmitted to the control room. The test logic and related requirements of the relays are shown in Table 3 as follows:

[0115] Table 3. Test logic and requirements of relays

[0116]

[0117]

[0118] Indicators and nixie display: 10 indicators, 2 five-digit LED nixie display. Among them, the test logic and related requirements of the indicator and nixie display are shown in Table 4 as follows:

[0119] Table 4. Test logic and related requirements of indicators and nixie display

[0120]

[0121]

[0122]

[0123] After completing the hardware function test of the lower machine, the software function test of the lower machine is executed. Among them, the software module test flow of the lower machine is as shown in Figure 6 Optionally, in the embodiment of the present application, the lower machine software test module includes: a plurality of test channels, each test channel includes: self-test mode, static mode, dynamic mode, plateau mode, automatic range mode, specification movement mode and leakage monitoring mode. That is, in the embodiment of the present application, each channel of the measurement and control machine case can have multiple operation modes. The requirements of each operation mode are as follows:

[0124] Self-test mode (AUTOTEST), two channels are shared. This mode will delete and prohibit all other current modes. It can be interrupted by the STOP command on any channel. It should be noted that if any new control mode of the host workbench is ignored during the self-test process.

[0125] Static mode (FLUX STATIC), which can be used for any channel. This mode will cancel other FLUX modes.

[0126] Dynamic mode (FLUX DYNAMIC), which can be used for any channel. This mode will cancel other FLUX modes.

[0127] Plateau mode (FLUX PLATEAU), which can be used for any channel. This mode will cancel other FLUX modes and MOVEON SPECIFICATION.

[0128] Automatic range mode RANGE AUTOMATIC, which can be used for any channel. This mode is only available in the FLUX STATIC static mode.

[0129] MOVE ON SPECIFICATION, which can be used in any channel. This mode can coexist with FLUX STATIC, FLUX DYNAMIC, and RANGE AUTOMATIC, canceling FLUX PLATEAU.

[0130] LEAK MONITING, which can be used in any channel. This mode opens canceling other modes, and is canceled by the STOP command.

[0131] The test logic of each operation mode is shown in Table 5 below.

[0132] Table 5. Test logic of each operation mode

[0133]

[0134] In the embodiment of the present application, the local instructions of the lower computer in the local test include Sequence instructions, electromechanical equipment basic instructions, electromechanical equipment chain instructions, etc. The specific test is shown in Table 6.

[0135] Table 6. Local test

[0136]

[0137]

[0138] Specifically, the main control board of the measurement and control case provides a 10M / 100M adaptive Ethernet interface and WebServer function. The main control board uses an STM32F4xx series ARM processor with a MAC interface and a PHY chip to realize Ethernet function. The test specifically includes: hardware connection verification test, magnetic permeability, communication parameter setting test, signal quality detection test, abnormal condition handling test, etc. In the hardware connection verification test: check the differential signal line sequence: the sending end T+ and T- must strictly correspond to the receiving end R+ and R-, and ensure that the polarity is not inverted. Check the terminal resistance configuration: the end of the communication link needs to be connected with a 120Ω impedance matching resistor (which must be configured for long distance communication). Detect the physical layer integrity: use a multimeter to measure the cable on-off state, eliminate short circuit / breakage hidden dangers, and tighten all interface connectors. In the communication parameter setting test: the communication parameters should be strictly matched: baud rate (9600 / 115200, etc.), data bits (8 bits), stop bits (1 bit), and check mode (none / odd / even check). Disable the hardware flow control function (RTS / CTS), and clearly define the master-slave device communication logic architecture. In the signal quality detection test: use an oscilloscope to observe the differential signal amplitude (typical value ≥ 200mV) and waveform integrity, and eliminate ground loop interference. Implement local loopback test: connect the sending end T+ directly to the receiving end R+ and T- to R-, and verify the basic communication capability of the device. Protocol consistency test. Verify the frame structure through standard test instruction set (suggested to include HEX and ASCII format), and monitor the data packet timing and error rate using a protocol analyzer. When the communication distance exceeds 100 meters, signal relay equipment or a working mode with a frequency of 4800bps or below is required. In the abnormal condition handling test: communication non-response: check the device power supply state, verify the signal ground connection reliability, and confirm the validity of the transmit and receive enable signal configuration. Data check exception: correct the communication parameter matching, use shielded twisted pair (characteristic impedance 120Ω), and implement single-point grounding. Occasional communication interruption: optimize the timeout retransmission mechanism (recommended 3 times of retransmission), and configure the data packet check redundancy field.

[0139] Based on the above principle, the application constructs a communication interface test module, a communication protocol test module and a communication stability test module to form a communication verification unit. The communication interface test module is used for RS422 communication test with the RB device and RS232 communication test with the host industrial computer; the communication protocol test module is used for detecting whether the communication protocol analysis is correct and verifying whether there is loss or error in the protocol data transmission; the communication stability test module is used for monitoring whether there is a fault in long-time communication and testing the reliability of communication in an interference environment. Optionally, the communication interface test module comprises an RS422 communication test submodule and an RS232 communication test submodule; the communication protocol test module comprises a protocol analysis accuracy test submodule and a protocol data transmission test submodule; the communication stability test module comprises a long-time communication stability test submodule and an interference environment communication stability test submodule; the RS422 communication test submodule is used for RS422 communication test with the RB device; the RS232 communication test submodule is used for RS232 communication test with the host industrial computer; the protocol analysis accuracy test submodule is used for checking whether the communication protocol analysis is correct; the protocol data transmission test submodule is used for verifying whether there is loss or error in the protocol data transmission; the long-time communication stability test submodule is used for monitoring whether there is a fault in long-time communication; and the interference environment communication stability test submodule is used for testing the reliability of communication in an interference environment. As shown in Figure 7 The control machine box is connected with the communication interface test module, the communication protocol test module and the communication stability test module. The communication interface test module is further connected with the RS422 and RS232 communication test submodules, and the connection relationship among the modules is shown to indicate the order and dependency of the test process.

[0140] In the embodiment of the application, the interface function test of the industrial computer is as follows:

[0141] The interface of the host control board and the industrial computer adopts a standard RS232 circuit, and the connector type is J30J-9ZKNP5-J. The interface definition is as shown in Figure 8 In order to ensure the EMC performance of the device, the RS232 interface designed in the application adopts an isolation technology, and the specific circuit is as shown in Figure 9

[0142] RS422 interface function test:

[0143] The "RS422 interface" of the host control board adopts a J30J-15ZKN-J connector. The signal definition of the 30J-15ZKN-J is as shown in Figure 10 Figure 10 The signal definition is shown in Table 7.

[0144] Table 7. RS422 interface definition

[0145] ​​

[0146] Wherein, STOR_GND and ETOR_GND are common ground.

[0147] The interface circuit of the chassis address is as shown in Figure 11 , Figure 11 Wherein, ENN_A, ENN_B, ENN_C and ENN_D are FPGA output signals, and RDBK_A, RDBK_B, RDBK_C and RDBK_D are FPGA readback signals. FPGA is the core device of the main control board. ADDRESS_A, ADDRESS_B, ADDRESS_C and ADDRESS_D are external interface signals. When the chassis address needs to be obtained, the FPGA lowers the ENN_A, ENN_B, ENN_C and ENN_D signals in turn, and reads back the RDBK_A, RDBK_B, RDBK_C and RDBK_D signals after each time. For example, if ADDRESS_A and ADDRESS_B are connected, when ENN_A is low, FPGA reads back RDBK_A and RDBK_B as low, so it can be determined that A / B is connected. In order to prevent wiring errors of external cables, TVS tubes are used for overvoltage or negative voltage protection of external interfaces; in order to prevent EMC problems from causing main control core failure, isolation technology is used in the circuit.

[0148] The ETOR and STOR signals are RS422 level signals, and the design uses a standard isolated RS422 interface circuit. The circuit is as shown in Figure 12 . Figure 12 Wherein, ETOR+, ETOR-, STOR_TX+, STOR_TX-, STOR_RX+ and STOR_RX- are external interface RS422 input and output signals; ETOR_RXD, STOR_TXD and STOR_RXD signals are connected with the FPGA. The circuit uses isolation technology, and the isolation voltage is 1500VDC. The input of the circuit provides resistance-capacitance filtering, and the input and output are protected by TVS tubes.

[0149] The communication of the measurement and control chassis is mainly realized through the SUB-D connectors of the rear panel J2, J3 and J10 of the chassis. The specific implementation is shown in Table 8.

[0150] Table 8

[0151]

[0152] With reference to Figure 13 , the application further provides a test verification method of a reactor core neutron fluence rate measurement system. Specifically, as shown in Figure 13 , the test verification method of the reactor core neutron fluence rate measurement system comprises the following steps:

[0153] Step S131: The host computer software function is tested and verified by the host computer software test and verification unit based on the host computer software function test logic.

[0154] Step S132: The lower-level machine software and hardware testing and verification unit tests the lower-level machine's software / hardware functions and local functions according to the lower-level machine's software / hardware function and local function testing logic.

[0155] Step S133: The communication verification unit tests the communication interface, communication protocol, and communication stability according to the system's communication function test logic.

[0156] This invention designs a comprehensive standard test scheme based on the software functions, hardware performance, and communication of the host and slave computers. This scheme enables a complete evaluation of the functional integrity of the reactor core neutron flux measurement system. Furthermore, communication, logic, and software / hardware components are tested independently, ensuring that updates or replacements of one subsystem do not affect the testing of other parts. The invention also decomposes the software functions, analyzes the implementation logic of each function, and tests them separately, enabling effective verification of the software algorithm and avoiding limitations on system intelligence. In addition, this invention, through the decomposition and testing of specific functions, can quickly locate fault points.

[0157] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0158] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0159] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0160] The above examples are only for illustrating the technical concept and characteristics of the present application, and the purpose is to enable those skilled in the art to understand the content of the present application and implement it accordingly, and cannot limit the protection scope of the present application. Any equivalent changes and modifications made within the scope of the claims of the present application shall belong to the scope of the claims of the present application.

Claims

1. A test and verification system for a reactor core neutron flux measurement system, characterized in that, include: The host computer software testing and verification unit, the slave computer software and hardware testing and verification unit, and the communication verification unit; The host computer software testing and verification unit is used to test and verify the functions of the host computer software. The lower-level machine software and hardware testing and verification unit is used to test the lower-level machine software functions, hardware functions, and local functions. The communication verification unit is used to test the communication interface, communication protocol, and communication stability.

2. The test and verification system for the reactor core neutron flux measurement system according to claim 1, characterized in that, The host computer software testing and verification unit includes: a functional testing module, a compatibility testing module, and a performance testing module; The functional testing module is used to test and verify whether the functions of different modes are normal and to check the accuracy of command transmission and the correctness of feedback. The compatibility testing module is used to test the operation of the host computer on various operating systems and to test the connection between the host computer and various hardware devices. The performance testing module is used to measure whether the instruction response time meets the standard and to verify the performance when processing large amounts of data.

3. The test and verification system for the reactor core neutron flux measurement system according to claim 2, characterized in that, The functional testing module includes: a mode switching testing submodule and a command sending and feedback testing submodule; The compatibility testing module includes: a sub-module for testing compatibility with different operating systems and a sub-module for testing compatibility with different hardware devices; The performance testing module includes: a response time testing submodule and a data processing capability testing submodule; The mode switching test submodule is used to verify whether the functions of different modes are normal; the command sending and feedback test submodule is used to check the accuracy of command sending and the correctness of feedback. The different operating system compatibility test submodule is used to test the operation of the host computer on various operating systems; the different hardware device compatibility test submodule is used to test the connection between the host computer and various hardware devices. The response time testing submodule is used to measure whether the instruction response time meets the standard; the data processing capability testing submodule is used to verify the performance when processing large amounts of data.

4. The test and verification system for the reactor core neutron flux measurement system according to claim 1, characterized in that, The lower-level hardware and software testing and verification unit includes: a lower-level hardware testing module, a lower-level software testing module, and a lower-level local testing module. The lower-level hardware testing module is used to test and verify the lower-level hardware functions, hardware electrical performance, and hardware interfaces. The lower-level software testing module is used to test and verify the functions of the lower-level software. The lower-level machine local testing module is used to test and verify the local functions of the lower-level machine.

5. The test and verification system for the reactor core neutron flux measurement system according to claim 4, characterized in that, The lower-level hardware testing module includes: a hardware function testing module, a hardware electrical performance testing module, and a hardware interface testing module; The hardware function testing module is used to test and verify the hardware functions of the lower-level machine. The hardware electrical performance testing module is used to test and verify the electrical performance of the lower-level machine; The hardware interface testing module is used to test and verify the input / output interfaces of the lower-level machine.

6. The test and verification system for the reactor core neutron flux measurement system according to claim 5, characterized in that, The hardware function test module includes: a polarization voltage function test submodule, a current acquisition function test submodule, and a synchro decoder function test submodule; The hardware electrical performance testing module includes: a dielectric strength testing submodule, an insulation resistance testing submodule, and a grounding continuity testing submodule; The hardware interface testing module includes: an output relay interface testing submodule and an input interface testing submodule; The polarization voltage function test submodule is used to perform polarization voltage tests to verify the accuracy of polarization voltage output; the current acquisition function test submodule is used to perform current acquisition tests to verify the accuracy of different current acquisitions; the synchro decoder function test submodule is used to perform synchro decoder tests to check the accuracy of synchro decoder position measurement. The dielectric strength testing submodule is used to measure whether the strength meets the standard; the insulation resistance testing submodule is used to detect whether the insulation resistance meets the standard; the grounding continuity testing submodule is used to verify whether the grounding continuity is good. The output relay interface test submodule is used to check the logic function of the output relay; the input interface test submodule is used to test the signal receiving capability of the input interface.

7. The test and verification system for the reactor core neutron flux measurement system according to claim 4, characterized in that, The lower-level software testing module includes multiple testing channels, each of which includes: self-test mode, static mode, dynamic mode, plateau mode, automatic tracing mode, standard motion mode, and leakage monitoring mode.

8. The test and verification system for the reactor core neutron flux measurement system according to claim 1, characterized in that, The communication verification unit includes: a communication interface testing module, a communication protocol testing module, and a communication stability testing module; The communication interface test module is used for RS422 communication testing with the RB device and RS232 communication testing with the main industrial control computer. The communication protocol testing module is used to detect whether the communication protocol parsing is correct and to verify whether there is any loss or error in the protocol data transmission. The communication stability test module is used to monitor whether a fault occurs during long-term communication and to test the reliability of communication under interference conditions.

9. The test and verification system for the reactor core neutron flux measurement system according to claim 8, characterized in that, The communication interface testing module includes: an RS422 communication testing submodule and an RS232 communication testing submodule; The communication protocol testing module includes: a protocol parsing accuracy testing submodule and a protocol data transmission performance testing submodule; The communication stability testing module includes: a long-term communication stability testing submodule and a communication stability testing submodule under interference conditions; The RS422 communication test submodule is used for RS422 communication testing with the RB device; the RS232 communication test submodule is used for RS232 communication testing with the main industrial control computer. The protocol parsing accuracy test submodule is used to check whether the communication protocol parsing is correct; the protocol data transmission performance test submodule is used to verify whether there is any loss or error in protocol data transmission. The long-term communication stability test submodule is used to monitor whether a fault occurs during long-term communication; the interference environment communication stability test submodule is used to test the reliability of communication under interference environment.

10. A test and verification method for a reactor core neutron flux measurement system, characterized in that, Includes the following steps: The host computer software testing and verification unit tests and verifies the functions of the host computer software based on the host computer software function testing logic. The lower-level machine software and hardware testing and verification unit tests the software, hardware and local functions of the lower-level machine according to the software / hardware functions and local function testing logic. The communication verification unit tests the communication interface, communication protocol, and communication stability according to the system's communication function test logic.

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