Quick-starting band-gap reference source circuit and starting method

Abstract

The invention provides a quick-starting band-gap reference source circuit and a starting method. The circuit comprises a band-gap reference core circuit and a starting circuit. The band-gap reference core circuit is used for generating reference voltage. The starting circuit comprises a starting state detection circuit and a current enhancement circuit. The starting state detection circuit is configured to automatically judge whether the circuit is in a starting stage or a stable working stage according to the working state in the band-gap reference core circuit. The current enhancement circuit responds to a judgment result of the starting state detection circuit and automatically increases bias current in the band-gap reference core circuit in a starting stage so as to accelerate establishment of reference voltage; and after the circuit enters a stable working stage, increasing of the bias current is automatically stopped, so that the circuit is recovered to a normal low-power-consumption mode. According to the reference source circuit, the contradiction between low power consumption and quick start in the prior art is solved, and the start time of the reference source circuit can be effectively shortened on the premise that steady-state power consumption is not increased.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor technology, and in particular to a bandgap reference source circuit and a starting method. BACKGROUND

[0002] In integrated circuit design, reference source circuit is a crucial basic module. It can generate stable reference voltage or reference current which does not change with power supply voltage, environmental temperature and process deviation, and provide accurate and reliable reference for other analog or digital modules in the circuit (such as analog-to-digital converter ADC, digital-to-analog converter DAC, phase-locked loop PLL, etc.).

[0003] Bandgap reference source circuit is one of the mainstream technical solutions to realize high-precision reference source. Figure 1 A structure schematic diagram of a typical bandgap reference source circuit in the prior art is shown. The core principle is to accurately compensate different characteristics of physical quantities to achieve stable output. This principle utilizes the negative temperature coefficient characteristic of the base-emitter voltage (Vbe) of bipolar junction transistor (BJT) and the positive temperature coefficient characteristic of the difference (ΔVbe) between the Vbe of two BJTs working at different current densities. Specifically, the circuit first generates a current component proportional to absolute temperature (PTAT), which is usually generated by carrying a voltage ΔVbe with positive temperature coefficient on a resistor (such as R1). At the same time, the circuit also generates a current component complementary to absolute temperature (CTAT), which is usually generated by carrying a voltage Vbe with negative temperature coefficient on a resistor (such as R2). Then, by weighting and summing the two current components (PTAT current and CTAT current) with opposite temperature coefficients according to a predetermined proportion, and by accurately configuring the resistance values of the related resistors (such as R1, R2) in the circuit, the two opposite temperature coefficients can be offset after summation. Thus, a total current (such as I3) with zero temperature coefficient (ZTC) in theory can be obtained. Finally, the total current with zero temperature coefficient flows through an output resistor (such as R3), and a stable reference voltage Vout which does not change with temperature can be generated at the output end (OUT).

[0004] However, the inventors have noticed that the existing bandgap reference source circuit (such as the structure shown in Figure 1 ), especially in the design for low-power consumption applications, in order to reduce the steady-state power consumption, the bias currents (such as I1, I2 and Ib in Figure 1 ) inside the circuit are usually designed to be very small. This directly leads to the core active devices in the circuit, such as the operational amplifier (such as Figure 1The bias current of the bandgap reference core circuit is small, and the amplification stage composed of M4-M9 has slow response speed and weak driving ability, which further causes the long establishment time of the whole reference source circuit. That is, after the circuit system is powered on, the output voltage of the reference source needs a long time to reach and stabilize at the preset reference value. This slow start-up characteristic seriously affects the performance of the whole system, and even causes the system to work abnormally in the system which needs fast power-on and response.

[0005] Therefore, how to effectively shorten the start-up time of the bandgap reference source circuit without significantly increasing the power consumption and complexity of the normal operation of the circuit is a technical problem to be solved by those skilled in the art at present. SUMMARY

[0006] The purpose of the present application is to provide a fast-starting bandgap reference source circuit and a starting method, which aims to solve the problem of slow start-up speed of the bandgap reference source circuit due to small bias current in the prior art.

[0007] To achieve the above-mentioned purpose, the present application provides a fast-starting bandgap reference source circuit, comprising:

[0008] A bandgap reference core circuit, comprising an operational amplifier, a first bipolar junction transistor and a second bipolar junction transistor, the operational amplifier being configured to force the collector voltages of the first bipolar junction transistor and the second bipolar junction transistor to be equal during operation, and the bandgap reference core circuit being configured to generate a reference voltage; and

[0009] A starting circuit electrically connected to the bandgap reference core circuit, the starting circuit being configured to:

[0010] During the start-up phase of the bandgap reference source circuit, the bias current in the operational amplifier is increased to accelerate the establishment process of the reference voltage; and

[0011] After the bandgap reference source circuit enters the stable working phase, the increase of the bias current is stopped.

[0012] Preferably, the starting circuit comprises:

[0013] A starting state detection circuit configured to generate a control signal for representing the start-up phase or the stable working phase according to the working state of the operational amplifier; and

[0014] A current enhancement circuit coupled between the starting state detection circuit and the bandgap reference core circuit, configured to receive the control signal and selectively increase the bias current according to the control signal.

[0015] Preferably, the bandgap reference core circuit comprises a bias current generation circuit composed of an eighth transistor and a ninth transistor.

[0016] The current boosting circuit comprises a switch transistor and a fifth resistor;

[0017] The gate of the ninth transistor is connected with its drain, and is connected with the drain of the switch transistor.

[0018] The control terminal of the switch transistor receives a control signal, and is turned on in the starting stage to inject additional current to the gate of the ninth transistor through the fifth resistor via its drain, so as to increase the bias current provided by the bias current generating circuit.

[0019] Preferably, the switch transistor is a PMOS transistor.

[0020] Preferably, the starting state detection circuit comprises:

[0021] The thirteenth transistor has its gate connected with the drain of the switch transistor, and is used to provide a first comparison current; and

[0022] The twelfth transistor has its gate connected with the common gate of the fourth transistor and the fifth transistor, wherein the gate of the fourth transistor is shorted with its drain, and the twelfth transistor is used to provide a second comparison current.

[0023] The output terminal of the thirteenth transistor is commonly connected with the output terminal of the twelfth transistor to form an output node of the control signal.

[0024] Preferably, the width-length ratio of the twelfth transistor is equal to the width-length ratio of the fourth transistor.

[0025] Preferably, in the starting stage, the second comparison current is smaller than the first comparison current, so that the output node of the control signal is pulled to a low level.

[0026] In the stable working stage, the second comparison current is greater than the first comparison current, so that the output node of the control signal is pulled to a high level.

[0027] Preferably, the operational amplifier comprises:

[0028] a differential input pair composed of the sixth transistor and the seventh transistor;

[0029] an active load current mirror composed of the fourth transistor and the fifth transistor;

[0030] The eighth transistor and the ninth transistor constitute a current mirror to provide a tail current for the differential input pair by using the bias current generating circuit, the gate of the eighth transistor is connected with the gate of the ninth transistor, and the drain of the eighth transistor is connected to the common source of the sixth transistor and the seventh transistor.

[0031] The drain of the fourth transistor is connected with the drain of the sixth transistor, and the drain of the fifth transistor is connected with the drain of the seventh transistor.

[0032] Preferably, the bandgap reference core circuit further comprises:

[0033] a current mirror composed of the first transistor, the second transistor and the third transistor, wherein the gates of the first transistor, the second transistor and the third transistor are connected to each other and to the common drain of the fifth transistor and the seventh transistor;

[0034] the first resistor, the second resistor and the third resistor;

[0035] wherein the drain of the first transistor is connected to the collector of the first bipolar junction transistor, the drain of the second transistor is connected to the collector of the second bipolar junction transistor via the first resistor, and the drain of the third transistor is grounded via the third resistor; the node between the drain of the second transistor and the first resistor is also grounded via the second resistor; the bases and the emitters of the first bipolar junction transistor and the second bipolar junction transistor are both grounded.

[0036] Preferably, the bandgap reference core circuit further comprises a start-up auxiliary circuit;

[0037] wherein the start-up auxiliary circuit comprises an eleventh transistor, the source of which is grounded, and the drain of which is connected to the power supply via a fourth resistor;

[0038] the start-up auxiliary circuit further comprises a tenth transistor, the gate of which is connected to the node between the drain of the eleventh transistor and the fourth resistor, the source of which is connected to the collector of the first bipolar junction transistor, and the drain of which is connected to the power supply.

[0039] Preferably, the width-length ratio of the thirteenth transistor has a preset first proportional relationship with the width-length ratio of the eighth transistor.

[0040] Preferably, the first proportional relationship is 1 / 4.

[0041] To achieve the above-mentioned purposes, the application further provides a fast start-up method of a bandgap reference source circuit, the circuit comprising a bandgap reference core circuit and a start-up circuit, the method comprising the following steps:

[0042] Step one, in the start-up phase of the bandgap reference source circuit, the start-up circuit compares the first current with the second current to generate a first control signal for characterizing the start-up phase;

[0043] Step two, in response to the first control signal, the start-up circuit increases the bias current in the bandgap reference core circuit to accelerate the output voltage to reach a preset stable reference value;

[0044] Step three, after the bandgap reference source circuit enters the stable working phase, the start-up circuit generates a second control signal, and in response to the second control signal, the bias current returns to the normal working level.

[0045] Preferably, in step one, the first current is derived from a branch associated with the generation of the bias current, and the second current is derived from a branch associated with the load of the operational amplifier in the bandgap reference core circuit.

[0046] Preferably, in step two, the increasing of the bias current specifically comprises:

[0047] The switch tube is turned on to inject an additional current to a node formed by the connection of the gate and the drain of the ninth transistor, so as to increase the voltage of the node.

[0048] As described above, the fast-starting bandgap reference source circuit and the starting method of the present application have the following beneficial effects:

[0049] The present application solves the problem of the traditional bandgap reference source circuit sacrificing the starting speed in order to maintain low power consumption by adding a starting circuit capable of automatically increasing the circuit bias current during the starting stage and automatically shutting down after the circuit is stable. The starting circuit can detect the working state of the circuit and only intervene in the work for a short time during the starting stage. Once the circuit enters the steady state, the starting circuit automatically stops affecting the core circuit and does not produce additional power consumption. Therefore, the technical solution of the present application effectively shortens the establishment time of the circuit and improves the starting performance of the reference source circuit without sacrificing the low power consumption performance in the steady state. BRIEF DESCRIPTION OF DRAWINGS

[0050] Figure 1 A structure schematic diagram of a bandgap reference source circuit in the prior art is shown;

[0051] Figure 2 A circuit diagram of a fast-starting bandgap reference source circuit in an embodiment of the present application is shown;

[0052] Figure 3 A simulation waveform comparison diagram of the output voltage starting process of the embodiment of the present application and the traditional architecture is shown;

[0053] Figure 4 A flowchart of a fast-starting method of a bandgap reference source circuit in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0054] The embodiments of the present application are described below through specific and concrete examples, and those skilled in the art can easily understand other advantages and effects of the present application from the disclosure in the specification. The present application can also be implemented or applied through other different specific embodiments, and each detail in the specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present application.

[0055] Figure 2A detailed circuit diagram of the fast-starting bandgap reference source circuit in one embodiment of the present application is shown.

[0056] The present application provides a fast-starting bandgap reference source circuit.

[0057] The circuit comprises a bandgap reference core circuit and a starting circuit.

[0058] The bandgap reference core circuit comprises an operational amplifier, a first bipolar junction transistor Q1 and a second bipolar junction transistor Q2, the operational amplifier being configured to force the collector voltages of the first bipolar junction transistor Q1 and the second bipolar junction transistor Q2 to be equal when in operation, and the bandgap reference core circuit being configured to generate a reference voltage.

[0059] The starting circuit is electrically connected to the bandgap reference core circuit, and is configured to increase the bias current in the operational amplifier to accelerate the establishment of the reference voltage during a starting phase of the bandgap reference source circuit, and to stop increasing the bias current after the bandgap reference source circuit enters a stable working phase.

[0060] The starting circuit is electrically connected to the bandgap reference core circuit, and is configured to increase the bias current in the operational amplifier to accelerate the establishment of the reference voltage during a starting phase of the bandgap reference source circuit, and to stop increasing the bias current after the bandgap reference source circuit enters a stable working phase.

[0061] With this design, the circuit can dynamically enhance the internal driving capability during the starting phase without affecting the normal working low-power characteristics, effectively solving the contradiction between low power consumption and fast starting in traditional designs. This decoupling design of starting and steady-state performance improves the adaptability of the circuit to fast power-on application scenarios, such as portable electronic devices or Internet of Things nodes that need frequent power management, which can significantly shorten the wake-up time of the system, improve user experience and system energy efficiency.

[0062] In some embodiments, the starting circuit comprises a starting state detection circuit and a current enhancement circuit. The starting state detection circuit is configured to generate a control signal DET representing the starting phase or the stable working phase according to the working state of the operational amplifier. The current enhancement circuit is coupled between the starting state detection circuit and the bandgap reference core circuit, configured to receive the control signal DET and selectively increase the bias current according to the control signal DET. This two-stage structure makes the starting logic clear, and the functions of state detection and current injection are independent of each other, facilitating the design, debugging and optimization of the circuit. The starting state detection circuit can automatically and sensitively capture the transition from instability to stability, and generate an accurate switching signal, while the current enhancement circuit serves as an execution unit to reliably complete the transient enhancement of the bias current.

[0063] In some embodiments, the bandgap reference core circuit comprises a bias current generation circuit composed of a ninth transistor M9 and an eighth transistor M8. The current boost circuit comprises a switch transistor M14 and a fifth resistor R5. The gate of the ninth transistor M9 is connected to its drain and to the drain of the switch transistor M14. The control terminal of the switch transistor M14 receives a control signal DET and is turned on in the starting stage to inject additional current to the gate of the ninth transistor M9 through its drain via the fifth resistor R5, thereby increasing the bias current provided by the bias current generation circuit. Specifically, when the switch transistor M14 is turned on, the current from the power supply is injected directly to the control node formed by the gate-drain connection of the ninth transistor M9 through the fifth resistor R5 and the turned-on switch transistor M14. This additional current quickly raises the voltage VB1 of the node, and since the node is also the gate of the eighth transistor M8 and the thirteenth transistor M13, the currents of M8, M9 and M13 will instantaneously increase. The increase in M8 current directly accelerates the response speed of the operational amplifier, thereby achieving accelerated start-up of the entire system.

[0064] In some embodiments, the switch transistor M14 is a PMOS transistor. The source of the PMOS transistor is conveniently connected to the power supply VDD, and when its gate receives a low-level active signal output by the start-up state detection circuit, a large overdrive voltage can be formed to reliably and quickly turn on the switch transistor and provide enhanced current for the bias circuit. Of course, an NMOS transistor can also be used, but an additional level conversion circuit may be needed to provide a suitable gate drive voltage. In contrast, the PMOS solution has a more compact structure.

[0065] In some embodiments, the start-up state detection circuit comprises a thirteenth transistor M13 and a twelfth transistor M12. The gate of the thirteenth transistor M13 is connected to the drain of the switch transistor M14 to provide a first comparison current. The gate of the twelfth transistor M12 is connected to the common gate of the fourth transistor M4 and the fifth transistor M5, where the gate of the fourth transistor M4 is shorted to its drain; the twelfth transistor M12 is used to provide a second comparison current. The output terminal of the thirteenth transistor M13 and the output terminal of the twelfth transistor M12 are commonly connected to form an output node of the control signal DET. This structure constitutes a current comparator. It compares the two key node voltages reflecting the bias current state and the operational amplifier working state, respectively, and converts them into currents for comparison, thereby determining whether the circuit has stabilized. This internal state self-detection method avoids the use of complex timing control or external enable signals, making the start-up process completely automatic and enhancing the independence and ease of use of the circuit.

[0066] In some embodiments, the width-to-length ratio of the twelfth transistor M12 is equal to that of the fourth transistor M4. By matching the size of M12 and M4 and making their gates receive the same voltage, one can ensure that when their drain-source voltages are close, the current flowing through M12 is in a precise proportional relationship with the current flowing through M4. This provides a process guarantee for the precise setting of the current comparison threshold, making the judgment of the start-up state more reliable and avoiding false triggering or switching failure caused by process deviation.

[0067] In some embodiments, during the start-up phase, the second comparison current is smaller than the first comparison current, so that the output node of the control signal DET is pulled to low level. During the stable working phase, the second comparison current is larger than the first comparison current, so that the output node of the control signal DET is pulled to high level. The detailed dynamic working process is as follows: when the circuit starts, due to the asymmetry in process and design, there is usually a difference between the voltages A and B of the two input nodes of the operational amplifier, for example, voltage A is greater than voltage B, which makes the seventh transistor M7, which is one of the input tubes of the operational amplifier, preferentially conduct. However, at the beginning of the start-up, the operational amplifier as a whole works slowly, and the voltages of its internal nodes, especially the gate voltages PB of the load tubes M4 / M5, are established slowly and at a low level. Since the gate of the twelfth transistor M12 is connected to the PB node, the driving capability of M12 is weak, and the second comparison current provided by M12 is much smaller than the first comparison current provided by the thirteenth transistor M13 driven by the bias circuit. Therefore, at the current comparison node DET, the pull-down capability of M13 is much stronger than the pull-up capability of M12, resulting in that the DET node is clamped at a low level. This low-level signal is applied to the gate of the switch tube M14, making it strongly conduct, and then performing the operation of increasing the bias current as described above, thereby accelerating the start-up process of the entire system.

[0068] Over time, the output voltage Vout gradually establishes to a normal value. Under the action of the negative feedback of the operational amplifier, the voltages of its input nodes A and B tend to be equal, and the voltages of the internal nodes also reach a stable state, especially the voltage of the PB node rises to a higher stable value. At this time, the twelfth transistor M12 is fully turned on, and the second comparison current provided by M12 exceeds the first comparison current. At the DET node, the pull-up capability of M12 is stronger than the pull-down capability of M13, thereby pulling the DET node to high level. This high-level signal makes the switch tube M14 cut off, stopping the injection of additional current. At this point, the fast start-up circuit is automatically disconnected and no longer affects the work of the core circuit, and the entire bandgap reference source circuit is equivalent to the traditional original circuit, entering a stable low-power working mode.

[0069] In some embodiments, the width-to-length ratio of the thirteenth transistor M13 has a preset first proportional relationship with the width-to-length ratio of the eighth transistor M8.

[0070] In some embodiments, the first proportional relationship is 1 / 4. Setting the width-length ratio of M13 to be 1 / 4 of M8 is intended to make the first comparison current a smaller value when the operational amplifier is working normally. In this way, when the operational amplifier is working normally, the second comparison current generated by M12 can easily exceed the first comparison current, ensuring that the DET node can be reliably pulled high. 1 / 4 is an optimized empirical ratio, and of course, depending on the specific process angle and design margin requirements, the ratio can also be designed to other values, such as 1 / 2, 1 / 8, etc., as long as the logic of reliable switching can be met.

[0071] In some embodiments, the operational amplifier includes a differential input pair composed of a sixth transistor M6 and a seventh transistor M7; an active load current mirror composed of a fourth transistor M4 and a fifth transistor M5; wherein an eighth transistor M8 and a ninth transistor M9 form a current mirror to provide a tail current for the differential input pair using a bias current generation circuit, the gate of the eighth transistor M8 is connected with the gate of the ninth transistor M9, and the drain of the eighth transistor M8 is connected to the common source of the sixth transistor M6 and the seventh transistor M7; and the drain of the fourth transistor M4 is connected with the drain of the sixth transistor M6, and the drain of the fifth transistor M5 is connected with the drain of the seventh transistor M7. Of course, in order to obtain higher gain, larger output swing or better power supply rejection ratio, the operational amplifier can also use other structures, such as folded cascode amplifier or two-stage amplifier, etc.

[0072] In some embodiments, the bandgap reference core circuit further includes a current mirror composed of a first transistor M1, a second transistor M2 and a third transistor M3, wherein the gates of the first transistor M1, the second transistor M2 and the third transistor M3 are connected with each other and connected with the common drain of the fifth transistor M5 and the seventh transistor M7. The circuit further includes a first resistor R1, a second resistor R2 and a third resistor R3. Wherein the drain of the first transistor M1 is connected to the collector of a first bipolar junction transistor Q1, the drain of the second transistor M2 is connected to the collector of a second bipolar junction transistor Q2 via the first resistor R1, and the drain of the third transistor M3 is grounded via the third resistor R3. The node between the drain of the second transistor M2 and the first resistor R1 is also grounded via the second resistor R2. The bases and emitters of the first bipolar junction transistor Q1 and the second bipolar junction transistor Q2 are both grounded. These elements together constitute the core of the bandgap reference source, which is used to generate a voltage / current with positive and negative temperature coefficients and to compensate, and finally generate a stable reference voltage on the third resistor R3.

[0073] The transistors in the circuit, such as PMOS transistors or NMOS transistors, can be manufactured in a standard CMOS, BiCMOS or BCD process. The bipolar junction transistors Q1, Q2 can be original NPN or PNP transistors, or parasitic PNP transistors commonly found in a standard CMOS process. The resistive elements R1, R2, R3, R4, R5 can be polycrystalline silicon resistors, diffusion resistors, well resistors, etc., and the specific selection depends on the requirements for resistance accuracy, matching and temperature coefficient.

[0074] In some embodiments, the circuit further comprises a start-up auxiliary circuit. The start-up auxiliary circuit comprises an eleventh transistor M11, the source of which is connected to ground, and the drain of which is connected to the power supply through a fourth resistor R4. The start-up auxiliary circuit further comprises a tenth transistor M10, the gate of which is connected to a node between the drain of the eleventh transistor M11 and the fourth resistor R4, the source of which is connected to the collector of the first bipolar junction transistor Q1, and the drain of which is connected to the power supply. The start-up auxiliary circuit is used to prevent the bandgap reference source circuit from entering a degenerate state in which all currents are zero at power-on. A simple inverter structure composed of M11 and R4 is used to detect whether the output is zero. Once a zero state is detected, a small start-up current is injected into the core circuit through M10, forcing the circuit to move away from the degenerate point and enter a normal working state. Once the circuit is working normally, the auxiliary circuit automatically turns off and does not produce additional power consumption.

[0075] In order to verify the beneficial effects of the present application, a transient simulation comparison is made between the circuit using the present application (inventive output) and the conventional architecture (conventional output) without a fast start-up circuit. Figure 3 The simulation waveform diagram under the same power voltage step excitation is shown. As Figure 3 shown, the uppermost yellow curve represents the power voltage VDDA50, which instantaneously jumps from 0V to a stable operating voltage at time 0 of the start of the simulation. The middle red curve OUT_TYP represents the output voltage waveform of the conventional architecture, and the lowermost green curve OUT_PAT represents the output voltage waveform of the embodiment of the present application. According to the accurate measurement of the simulation data, the time taken for the output voltage to reach 5% of the final value from the start-up to the steady state is 6.7μS for the conventional architecture, and 6.3μS for the circuit using the present application. By comparing the build-up times of the two outputs, it can be clearly seen that the start-up speed of the embodiment of the present application is faster. This result proves that the fast start-up circuit proposed in the present application can effectively shorten the start-up time of the bandgap reference source and improve the circuit performance without increasing the steady-state power consumption.

[0076] Figure 4 A flowchart of a fast start-up method for a bandgap reference source circuit according to an embodiment of the present application is shown. The circuit comprises a bandgap reference core circuit and a start-up circuit, and the method comprises the following steps:

[0077] Step one, in the start-up phase of the bandgap reference source circuit, the first control signal DET is generated by the start-up circuit to represent the start-up phase, by comparing the first current and the second current.

[0078] In some embodiments, in step one, the first current is derived from a branch associated with the generation of the bias current, and the second current is derived from a branch associated with the load of the operational amplifier in the bandgap reference core circuit.

[0079] Step two, in response to the first control signal DET, the bias current in the bandgap reference core circuit is increased by the start-up circuit to accelerate the output voltage to reach the preset stable reference value.

[0080] In some embodiments, in step two, the increase of the bias current specifically includes: turning on the switch tube M14 to inject an additional current to a node formed by the connection of the gate and the drain of the ninth transistor M9, so as to increase the voltage of the node.

[0081] Step three, after the bandgap reference source circuit enters the stable working phase, the second control signal DET is generated by the start-up circuit, and in response to the second control signal DET, the bias current is restored to the normal working level.

[0082] It should be noted that the diagrams provided in the present embodiment only illustrate the basic concept of the present application in a schematic manner, and only the components related to the present application are shown in the diagrams, rather than being drawn according to the number, shape and size of the components in actual implementation. The actual implementation of each component in the present application can be arbitrarily changed in terms of shape, number and proportion, and the layout pattern of the components can be more complex.

[0083] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical thought of the present application should be covered by the claims of the present application.

Claims

1. A fast-starting bandgap reference source circuit, characterized by, The application relates to a bandgap reference circuit, comprising: a bandgap reference core circuit, comprising an operational amplifier, a first bipolar junction transistor (Q1) and a second bipolar junction transistor (Q2), the operational amplifier being used to force the collector voltages of the first bipolar junction transistor (Q1) and the second bipolar junction transistor (Q2) to be equal during operation, the bandgap reference core circuit being used to generate a reference voltage; and a start-up circuit electrically connected to the bandgap reference core circuit, the start-up circuit being configured to: increase a bias current in the operational amplifier during a start-up phase of the bandgap reference source circuit to accelerate the establishment of the reference voltage; and stop increasing the bias current after the bandgap reference source circuit enters a stable operation phase. The start-up circuit comprises a start-up state detection circuit configured to generate a control signal (DET) representing the start-up phase or the stable operation phase according to the operating state of the operational amplifier, and a current enhancement circuit coupled between the start-up state detection circuit and the bandgap reference core circuit, configured to receive the control signal (DET) and selectively increase the bias current according to the control signal (DET). The bandgap reference core circuit comprises a bias current generation circuit composed of a ninth transistor (M9) and an eighth transistor (M8); the current enhancement circuit comprises a switch tube (M14) and a fifth resistor (R5); wherein the gate of the ninth transistor (M9) is connected with the drain thereof and connected with the drain of the switch tube (M14); the control end of the switch tube (M14) receives the control signal (DET) and is turned on during the start-up phase to inject an additional current to the gate of the ninth transistor (M9) through the drain thereof via the fifth resistor (R5), so as to increase the bias current provided by the bias current generation circuit.

2. The quickly starting bandgap reference source circuit of claim 1, wherein: The switch tube (M14) is a PMOS transistor.

3. The quickly starting bandgap reference source circuit of claim 2, wherein: The start-up state detection circuit comprises a thirteenth transistor (M13) having a gate connected with the drain of the switch tube (M14) and configured to provide a first comparison current, and a twelfth transistor (M12) having a gate connected with the common gate of a fourth transistor (M4) and a fifth transistor (M5), wherein the gate of the fourth transistor (M4) is short-circuited with the drain thereof; the twelfth transistor (M12) is configured to provide a second comparison current; wherein the output end of the thirteenth transistor (M13) and the output end of the twelfth transistor (M12) are commonly connected to form an output node of the control signal (DET).

4. The quickly starting bandgap reference source circuit of claim 3, wherein: The width-length ratio of the twelfth transistor (M12) is equal to the width-length ratio of the fourth transistor (M4).

5. The quickly starting bandgap reference source circuit of claim 3, wherein: During the start-up phase, the second comparison current is smaller than the first comparison current, so that the output node of the control signal (DET) is pulled to a low level; during the stable operation phase, the second comparison current is greater than the first comparison current, so that the output node of the control signal (DET) is pulled to a high level.

6. The quickly starting bandgap reference source circuit of claim 5, wherein: ​ 7. The quickly starting bandgap reference source circuit of claim 5, wherein: ​ 8. The quickly starting bandgap reference source circuit of claim 3, wherein: The operational amplifier comprises: a differential input pair composed of a sixth transistor (M6) and a seventh transistor (M7); an active load current mirror composed of a fourth transistor (M4) and a fifth transistor (M5); wherein the eighth transistor (M8) and the ninth transistor (M9) constitute a current mirror to provide a tail current for the differential input pair by using the bias current generation circuit, the gate of the eighth transistor (M8) is connected with the gate of the ninth transistor (M9), and the drain of the eighth transistor (M8) is connected to the common source of the sixth transistor (M6) and the seventh transistor (M7); and the drain of the fourth transistor (M4) is connected with the drain of the sixth transistor (M6), and the drain of the fifth transistor (M5) is connected with the drain of the seventh transistor (M7).

9. The quickly starting bandgap reference source circuit of claim 1, wherein: The bandgap reference core circuit further comprises: a current mirror composed of a first transistor (M1), a second transistor (M2) and a third transistor (M3), wherein the gates of the first transistor (M1), the second transistor (M2) and the third transistor (M3) are connected with each other and connected with the common drain of the fifth transistor (M5) and the seventh transistor (M7); a first resistor (R1), a second resistor (R2) and a third resistor (R3); wherein the drain of the first transistor (M1) is connected to the collector of the first bipolar junction transistor (Q1), the drain of the second transistor (M2) is connected to the collector of the second bipolar junction transistor (Q2) through the first resistor (R1), and the drain of the third transistor (M3) is grounded through the third resistor (R3); the node between the drain of the second transistor (M2) and the first resistor (R1) is also grounded through the second resistor (R2); the bases and emitters of the first bipolar junction transistor (Q1) and the second bipolar junction transistor (Q2) are grounded.

10. The quickly starting bandgap reference source circuit of claim 1, wherein: The starting auxiliary circuit further comprises an eleventh transistor (M11), the source of which is grounded, and the drain of which is connected to a power supply through a fourth resistor (R4); the starting auxiliary circuit further comprises a tenth transistor (M10), the gate of which is connected to a node between the drain of the eleventh transistor (M11) and the fourth resistor (R4), the source of which is connected to the collector of the first bipolar junction transistor (Q1), and the drain of which is connected to the power supply.

11. The quickly starting bandgap reference source circuit of claim 5, wherein: The width-length ratio of the thirteenth transistor (M13) has a preset first proportional relationship with the width-length ratio of the eighth transistor (M8).

12. The quickly starting bandgap reference source circuit of claim 11, wherein: The first proportional relationship is 1 / 4.

13. A method for fast start-up of a bandgap reference source circuit, said circuit comprising a bandgap reference core circuit and a start-up circuit, characterized in that, The method comprises: Step one, in the starting phase of the bandgap reference source circuit, the starting circuit compares the sizes of the first current and the second current to generate a first control signal for representing the starting phase; Step two, in response to the first control signal, the starting circuit increases the bias current in the bandgap reference core circuit to accelerate the output voltage to reach a preset stable reference value. Step three, after the bandgap reference source circuit enters a stable working stage, a second control signal is generated by the starting circuit, and the bias current is restored to a normal working level in response to the second control signal.

14. The method of claim 13, wherein: In step one, the first current is derived from a branch associated with the generation of the bias current, and the second current is derived from a branch associated with the load of an operational amplifier in the bandgap reference core circuit.

15. The method of claim 13, wherein: In step two, the increased bias current specifically includes: turning on a switch tube (M14) to inject an additional current to a node formed by the connection of the gate and the drain of a ninth transistor (M9), so as to raise the voltage of the node.

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