Inductance equalization type silicon-based traveling wave Mach-Zehnder modulator and design method thereof

Abstract

The invention provides an inductor equalization type silicon-based traveling wave Mach-Zehnder modulator and a design method thereof, and relates to the technical field of photoelectron integration, the modulator introduces a micro-inductor structure connected in series with a PN junction into a traditional traveling wave electrode modulator to form a distributed RLC resonance unit, and the high-frequency response roll-off of a device is compensated by using the resonance peaking effect of the modulator, so that the performance of the device is improved. And the electro-optical bandwidth is improved. Preferably, a plurality of micro-inductor structures can be arranged along the traveling wave electrode in a segmented manner and are cascaded periodically, and each structure can be realized through different metal layers and is connected with the PN junction through a via hole. The design method of the modulator comprises the following steps of: accurately calculating a required inductance value and integrating the inductance value into layout design to realize bandwidth optimization. According to the scheme, on the premise that modulation efficiency is not remarkably sacrificed and optical loss is not increased, bandwidth limitation of a traditional silicon-based modulator is broken through, the scheme is compatible with a standard CMOS technology, and a key technical solution is provided for a next-generation high-speed optical communication system.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic integration technology, and in particular to an inductor-balanced silicon-based traveling wave Mach-Zehnder modulator and its design method. Background Technology

[0002] With the rapid development of data centers and cloud computing technologies, higher demands are being placed on the transmission capacity and speed of optical communication systems. As the core component of optical transmitters, the performance of high-speed electro-optic modulators directly determines the upper limit of the entire system.

[0003] Currently, silicon-based photonics, with its advantages of compatibility with mature complementary metal-oxide-semiconductor (CMOS) processes, high integration, and low cost, has become one of the mainstream technology platforms for realizing next-generation high-speed optical interconnects. Among various silicon-based modulators, traveling-wave electrode Mach-Zehnder modulators are widely used due to their high speed and high stability. Their basic principle is to apply a reverse bias voltage to the PN junction, utilizing the plasma dispersion effect to change the effective refractive index of the optical waveguide, and then achieving light intensity modulation through the Mach-Zehnder interference structure.

[0004] However, the performance of traditional silicon-based traveling wave Mach-Zehnder modulators (MZMs) is severely constrained by the inherent trade-off between bandwidth, modulation efficiency, and optical loss, making it impossible to effectively improve the electro-optic bandwidth of the modulator. Summary of the Invention

[0005] This invention provides an inductor-balanced silicon-based traveling-wave Mach-Zehnder modulator to overcome the inherent trade-offs between bandwidth, modulation efficiency and optical loss in existing silicon-based traveling-wave Mach-Zehnder modulators. It improves the electro-optic bandwidth of the modulator through structural innovation without significantly sacrificing half-wave voltage performance or introducing excessive optical loss.

[0006] This invention provides an inductor-balanced silicon-based traveling-wave Mach-Zehnder modulator, the core of which lies in introducing a micro-inductor compensation mechanism into the traditional modulator structure. Specifically, the modulator includes a substrate, an optical waveguide formed on the substrate, a PN junction disposed along the optical waveguide, a traveling-wave electrode for applying a modulation signal to the PN junction, and at least one micro-inductor structure. The micro-inductor structure is electrically connected in series with the PN junction, such that the equivalent resistance and equivalent capacitance of the PN junction, together with the micro-inductor structure, constitute a resistance-inductance-capacitance (RLC) resonant unit, which is used to compensate for the high-frequency response roll-off of the modulator through the resonant peaking effect, thereby improving the electro-optic bandwidth.

[0007] In a preferred embodiment of the present invention, the number of micro-inductor structures is multiple.

[0008] In a preferred embodiment of the present invention, multiple micro-inductor structures are arranged in segments along the length direction of the traveling wave electrode, and each micro-inductor structure is connected in series with a PN junction to form an RLC resonant unit.

[0009] In another preferred embodiment of the present invention, multiple RLC resonant units formed by the micro-inductor structure and the corresponding PN junction are periodically cascaded along the traveling wave electrode.

[0010] In another preferred embodiment of the present invention, the traveling wave electrode is disposed on the first metal layer, and the micro-inductor structure is formed on a second metal layer different from the first metal layer.

[0011] In another preferred embodiment of the present invention, the traveling wave electrode is connected to the first end of the micro inductor structure through a first metal via, and the second end of the micro inductor structure is connected to the heavily doped region of the PN junction through a second metal via.

[0012] In another preferred embodiment of the present invention, the micro-inductor structure is a planar inductor structure.

[0013] In another preferred embodiment of the present invention, the shape of the planar inductor structure is a serpentine line, a spiral line, or a polygonal spiral line.

[0014] In another preferred embodiment of the present invention, the modulator further includes two parallel modulation arms, each modulation arm having an optical waveguide, a PN junction, a traveling wave electrode, and a micro inductor structure connected in series therewith.

[0015] In another preferred embodiment of the present invention, the traveling wave electrode adopts a coplanar waveguide structure, a microstrip line structure, or a grounded coplanar waveguide structure.

[0016] This invention provides a method for designing any of the above-mentioned inductively balanced silicon-based traveling-wave Mach-Zehnder modulators. The method includes: determining the equivalent circuit parameters of the PN junction; calculating the required micro-inductance value based on the target bandwidth and the equivalent circuit parameters of the PN junction, so that the constructed RLC resonant unit generates a resonant peaking effect in the target frequency band to compensate for high-frequency roll-off; designing the geometric layout of the micro-inductance structure according to the micro-inductance value; and embedding the geometric layout of the micro-inductance structure into the signal path of the traveling-wave electrode in the layout design of the modulator, so that it forms a series connection with the PN junction.

[0017] This invention provides an inductor-balanced silicon-based traveling-wave Mach-Zehnder modulator and its design method. By introducing a series micro-inductor structure to form an RLC resonant unit, the high-frequency response roll-off is effectively compensated using the resonance peaking effect, thus improving the modulator's electro-optic bandwidth. A segmented distributed compensation structure is employed to maintain good traveling-wave transmission characteristics while ensuring bandwidth improvement. Micro-inductor integration is achieved through multi-layer metal wiring, making it fully compatible with standard complementary metal-oxide-semiconductor (CMOS) processes and possessing excellent manufacturability. The design method, based on precise circuit analysis and parameter calculations, achieves quantitative design and optimization of performance. It successfully overcomes the inherent trade-off between bandwidth, modulation efficiency, and optical loss in traditional modulators, providing key technical support for next-generation high-speed optical communication systems. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the overall structure of an inductor-balanced silicon-based traveling wave Mach-Zehnder modulator provided in an embodiment of the present invention.

[0020] Figure 2 This is a cross-sectional structural diagram showing the connection relationship between the micro-inductor structure, the traveling wave electrode, and the PN junction in an embodiment of the present invention.

[0021] Figure 3 This is a top view schematic diagram of the micro-inductor structure in an embodiment of the present invention.

[0022] Figure 4 This is a top view schematic diagram of the segmented micro-inductance compensation unit distributed along the traveling wave electrode in an embodiment of the present invention.

[0023] Figure 5 This is a schematic diagram comparing the frequency response characteristics of the modulator provided in this embodiment of the invention with those of a traditional modulator.

[0024] Figure 6 This is a flowchart illustrating a method for designing an inductor-balanced silicon-based traveling wave Mach-Zehnder modulator, as provided in an embodiment of the present invention.

[0025] Figure label: 101. Substrate; 102. Optical waveguide; 103. PN junction; 104. Traveling wave electrode; 105. Micro-inductor structure; 106. RLC resonant unit; 107. First metal layer; 108. Second metal layer; 109. First metal via; 110. Second metal via; 111. Heavily doped region; 112. Modulation arm. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0027] The following is combined Figures 1 to 5 The inductor-balanced silicon-based traveling wave Mach-Zehnder modulator of the present invention will be described in detail.

[0028] like Figure 1 As shown in the figure, the present invention provides an overall structural schematic diagram of an inductor-balanced silicon-based traveling wave Mach-Zehnder modulator.

[0029] In some embodiments, the modulator is constructed based on a standard silicon-on-insulator substrate 101, the substrate structure comprising a bottom silicon substrate, a middle buried oxide layer and a top silicon device layer, the three-layer structure providing an ideal basis for the formation of an optical waveguide.

[0030] Specifically, the buried oxide layer not only provides the function of the lower cladding layer, but also effectively isolates the leakage of the optical field to the substrate, ensuring the efficient transmission of optical signals in the waveguide.

[0031] In the embodiments of this application, the optical waveguide 102 fabricated on the substrate 101 can adopt various structural forms, including but not limited to ridge waveguides, strip waveguides, or rib waveguides. The waveguide structure is formed through standard semiconductor processes such as thermal oxidation, photolithography, and reactive ion etching.

[0032] For example, the design of waveguide dimensions needs to take into account factors such as single-mode transmission conditions, optical field confinement factor, and manufacturing tolerances.

[0033] In practical design, waveguide width and height need to be precisely controlled to ensure stable single-mode transmission characteristics at the target operating wavelength.

[0034] Specifically, the optical waveguide 102 constitutes the basic optical path structure of the Mach-Zehnder interferometer. The complete interferometer structure includes an input waveguide, an input beam splitter, two parallel modulation arms 112, an output beam combiner, and an output waveguide.

[0035] For example, the input beam splitter can take the form of a multimode interference coupler or a directional coupler, and its splitting ratio needs to be precisely controlled at 50:50 to ensure that the two modulation arms receive equal optical power. The output beam combiner is usually in the form of a multimode interference coupler.

[0036] In this embodiment, each modulation arm 112 has a specific length design, and this length parameter needs to be optimized according to modulation efficiency requirements and system performance requirements.

[0037] In some embodiments, thermo-optic modulators are integrated on the two modulation arms 112 respectively, and these thermo-modulators precisely adjust the operating point through thermal effects.

[0038] For example, the thermal modulator employs a silicon-doped resistance heater structure, which generates heat by applying a DC or low-frequency AC signal, thereby changing the refractive index of the waveguide and achieving precise control of the operating point.

[0039] Specifically, a PN junction 103 is disposed along the optical waveguide 102 of each modulation arm 112, and the PN junction is formed by ion implantation. The doping structure of the PN junction 103 adopts a hierarchical doping design, including P-type doped regions and N-type doped regions. The P-type doped region includes a lightly doped P-type region and a heavily doped P+ contact region, and the N-type doped region similarly includes a lightly doped N-type region and a heavily doped N+ contact region.

[0040] In the embodiments of this application, the lightly doped region is mainly used to optimize the electro-optic modulation efficiency, while the heavily doped region is mainly used to form a good ohmic contact.

[0041] In some embodiments, a traveling wave electrode 104 is disposed above the PN junction 103, the electrode being used to apply a high-frequency modulation signal to the PN junction 103. The traveling wave electrode 104 adopts a coplanar waveguide structure, including a center signal line and ground lines on both sides.

[0042] Specifically, the width of the center signal line and the spacing between the signal line and the ground line need to be precisely designed according to the characteristic impedance requirements. Typically, the target impedance is designed to be 50 ohms to achieve good impedance matching with other parts of the system.

[0043] For example, the material selection for the traveling wave electrode 104 needs to take into account high-frequency characteristics, and low resistivity metal materials such as aluminum or copper are typically used to reduce microwave transmission loss.

[0044] The core innovation of this invention lies in the introduction of a micro-inductor structure 105.

[0045] like Figure 1 As shown, the micro-inductor structure 105 and the PN junction 103 are electrically connected in series. This connection method constitutes the basic architecture of the present invention.

[0046] Specifically, each modulation arm 112 is provided with at least one micro-inductor structure 105, which is electrically connected to the traveling wave electrode 104 and the heavily doped region of the PN junction 103 through a metal via system. This ensures that the high-frequency modulation signal must pass through the micro-inductor structure 105 to reach the PN junction 103, thereby achieving the effect of inductance equalization.

[0047] In some embodiments, the micro-inductor structure 105 and the equivalent resistance and equivalent capacitance of the PN junction 103 together constitute the RLC resonant unit 106. Its working principle is based on the RLC resonance characteristics in classical circuit theory.

[0048] Specifically, when operating at high frequencies, the PN junction 103 exhibits significant capacitive characteristics, and its equivalent capacitance forms a series resonant circuit with the inductance of the micro-inductor structure 105. This resonant circuit can generate an impedance peaking effect at a specific frequency point, thereby compensating for the response roll-off phenomenon of traditional modulators in the high-frequency range.

[0049] In this embodiment, the physical essence of this compensation mechanism lies in using the frequency characteristics of the inductor to balance the frequency characteristics of the capacitor. In the low-frequency range, the influence of the inductor is small, and the modulator exhibits conventional response characteristics; as the frequency increases, the inductive reactance of the inductor gradually increases, canceling out the capacitive reactance of the PN junction, thereby maintaining the stability of the modulation efficiency.

[0050] In practical design, the number of micro-inductor structures 105 can be flexibly configured according to specific bandwidth requirements.

[0051] In some embodiments, each modulation arm 112 is provided with a micro-inductor structure 105, a configuration suitable for application scenarios where bandwidth requirements are not particularly extreme.

[0052] In a preferred embodiment, such as Figure 4 As shown, each modulation arm 112 is provided with multiple micro inductor structures 105, which are arranged in segments along the length direction of the traveling wave electrode 104 to form a distributed compensation network.

[0053] Figure 2 This is a cross-sectional structural diagram showing the connection relationship between the micro-inductor structure, traveling wave electrode, and PN junction in an embodiment of the present invention. It details the stacking relationship and interconnection structure of each layer. From bottom to top, they are: substrate 101, optical waveguide 102, PN junction 103, dielectric layer, second metal layer 108, interlayer dielectric layer, and first metal layer 107.

[0054] For example, substrate 101 uses standard SOI material.

[0055] Specifically, the thickness of the top silicon layer needs to be optimized based on single-mode transmission conditions, typically chosen to be on the order of two hundred nanometers. The thickness of the buried oxide layer needs to ensure effective optical field confinement and electrical isolation. The thickness of the bottom silicon layer is usually kept within the standard wafer thickness range.

[0056] For example, the optical waveguide 102 is formed using advanced processes such as electron beam lithography and reactive ion etching. The waveguide's dimensional parameters need precise control; the width is typically chosen to be on the sub-micron scale to ensure single-mode transmission. The perpendicularity and roughness of the waveguide sidewalls have a significant impact on optical loss and need to be controlled through process optimization. After waveguide formation, surface treatment is required to reduce sidewall scattering loss.

[0057] In this embodiment, the PN junction 103 is formed through multiple ion implantation processes. First, light doping implantation is performed to form the intrinsic region of the PN junction. Then, heavy doping implantation is performed to form the ohmic contact region. Appropriate thermal annealing is required after each implantation to activate the dopant and repair lattice damage.

[0058] In some embodiments, the second metal layer 108 is used to fabricate the micro inductor structure 105, and the thickness of the metal layer needs to be selected by comprehensively considering the inductor performance and process feasibility.

[0059] For example, the micro inductor structure 105 is formed by photolithography and etching processes, and its geometric parameters, including line width, line spacing and number of turns, need to be optimized according to the target inductance value.

[0060] For example, the first metal layer 107 is used to fabricate the traveling wave electrode 104, and the thickness of the metal layer needs to be large enough to reduce microwave transmission loss.

[0061] In practical manufacturing processes, electroplating is typically used to obtain a thicker metal layer. The formation of the electrode pattern requires precise control, as edge roughness can affect high-frequency performance.

[0062] In this embodiment of the application, an interlayer dielectric layer is provided between the first metal layer 107 and the second metal layer 108, and the dielectric layer material is typically silicon dioxide.

[0063] Specifically, a first metal via 109 and a second metal via 110 are fabricated in the interlayer dielectric layer. The metal vias are formed by photolithography and etching processes, and then filled with metal material by electroplating or chemical vapor deposition.

[0064] In some embodiments, a first metal via 109 connects the traveling wave electrode 104 and the first end of the micro inductor structure 105, and a second metal via 110 connects the second end of the micro inductor structure 105 and the heavily doped region 111 of the PN junction 103.

[0065] For example, the heavily doped region 111 is formed by high-concentration ion implantation, and the doping concentration needs to be high enough to form a good ohmic contact.

[0066] Figure 3 This is a top view schematic diagram of the micro-inductor structure in an embodiment of the present invention.

[0067] In this embodiment, the micro-inductor structure 105 adopts a planar spiral inductor structure, specifically a polygonal spiral shape.

[0068] First, polygonal structures can provide a large inductance value within a limited area; second, this shape has a high self-resonant frequency, which can ensure stable inductance characteristics within the operating frequency band; finally, polygonal structures are relatively easy to manufacture and have good process tolerance.

[0069] In some embodiments, the external dimensions of the micro-inductor structure 105 are limited by the chip layout space, and the required inductance value needs to be achieved within a limited area.

[0070] For example, in actual design, the specific parameters of the micro-inductor structure 105 need to be optimized through electromagnetic field simulation. The simulation process uses parameter scanning analysis to find the optimal combination of geometric parameters, achieving a high quality factor and self-resonant frequency while meeting the inductance value requirements.

[0071] In the embodiments of this application, the determination of the inductance value needs to be based on accurate electromagnetic field calculations.

[0072] Specifically, simulation requires establishing a complete three-dimensional model, including all relevant structures such as the inductor structure, substrate, dielectric layer, and adjacent metal. Frequency domain simulation can obtain the frequency characteristics of the inductor, including key parameters such as complex impedance, quality factor, and self-resonant frequency.

[0073] In other embodiments, the shape of the micro-inductor structure 105 may also be a serpentine line or other types of spiral lines.

[0074] Specifically, the serpentine structure has a lower inductance value but occupies less area, making it suitable for space-constrained applications. The circular spiral has better symmetry, but its manufacturing process is relatively complex. The choice of shape depends on a trade-off between the actual layout space and performance requirements.

[0075] For example, the inductance value of the micro-inductor structure 105 needs to be precisely matched according to the capacitance characteristics of the PN junction 103 and the target bandwidth requirements.

[0076] The capacitance characteristics of the PN junction 103 include both junction capacitance and parasitic capacitance. The target bandwidth determines the choice of resonant frequency; typically, the resonant frequency is set near the edge of the bandwidth to achieve the best compensation effect.

[0077] Figure 4 This is a top view schematic diagram of the segmented micro-inductance compensation unit distributed along the traveling wave electrode in an embodiment of the present invention.

[0078] In this implementation, the entire modulator length is divided into multiple unit segments, each containing a complete compensation unit.

[0079] In this embodiment, the core idea of ​​the segmented design is to treat the entire modulator as a cascade of multiple basic units. Each basic unit includes a PN junction 103, a micro-inductor structure 105, and corresponding interconnection structures. The basic units are electrically connected in series and optically form a continuous waveguide.

[0080] Specifically, in each unit segment, the micro inductor structure 105 is connected to the traveling wave electrode 104 through the first metal via 109 and to the PN junction 103 of the corresponding segment through the second metal via 110, ensuring that each unit has independent compensation capability.

[0081] For example, multiple RLC resonant units 106 are periodically cascaded along the traveling wave electrode 104 to form a distributed compensation network.

[0082] First, distributed compensation allows for more precise control of frequency response and enables wider bandwidth expansion; second, cascaded structures can reduce the requirements for individual inductors and improve system reliability; finally, distributed design facilitates impedance matching and improves microwave transmission characteristics.

[0083] In some embodiments, the design of a distributed compensation network also needs to consider the impact of coupling between units. By optimizing the spacing and layout of adjacent units, the coupling strength can be controlled to have a positive impact on system performance.

[0084] In the inductor-balanced silicon-based traveling wave Mach-Zehnder modulator provided by this invention, an RLC resonant unit is formed by introducing a series micro-inductor structure. The resonant peaking effect is used to effectively compensate for the high-frequency response roll-off, thereby improving the electro-optic bandwidth of the modulator. A segmented distributed compensation structure is adopted to maintain good traveling wave transmission characteristics while ensuring bandwidth improvement. The micro-inductor integration is achieved through multilayer metal wiring, which is fully compatible with standard CMOS processes and has good manufacturability.

[0085] Figure 5 This is a schematic diagram comparing the frequency response characteristics of the modulator provided in this embodiment of the invention with those of a conventional modulator. The two modulators exhibit similar response characteristics in the low-frequency range, but show significant differences as the frequency increases.

[0086] In some embodiments, the frequency response curve of a conventional modulator exhibits typical low-pass characteristics. At low frequencies, the response is relatively flat, and the modulation efficiency remains stable. However, once the frequency exceeds a certain critical value, the response begins to drop rapidly.

[0087] Specifically, this decline is mainly due to two factors: first, the RC characteristics of the PN junction constitute a low-pass filter, which limits the loading efficiency of high-frequency signals; second, the microwave loss of the traveling wave electrode increases with increasing frequency.

[0088] For example, the modulator employing the technology of this invention exhibits a significant improvement in response at frequency bands where conventional modulators begin to show roll-off. The resonant peak of the RLC resonant unit effectively compensates for the roll-off of conventional modulators in this frequency band, extending the system's 3dB bandwidth.

[0089] In the embodiments of this application, the frequency response curve includes several important characteristics. First, the position of the resonant peak closely matches the design target, indicating that the inductance value calculation is accurate. Second, the width and height of the resonant peak are both within the ideal range, indicating that the compensation degree is just right. Excessive compensation will cause frequency response spikes, affecting system stability; insufficient compensation will fail to adequately expand the bandwidth.

[0090] Specifically, in addition to bandwidth expansion, the return loss of the system is optimized due to improved impedance matching in the high-frequency band caused by the resonance effect. Better impedance matching means less signal reflection, which helps improve system stability and signal integrity. At the same time, the linearity of the system is also improved because high-frequency compensation reduces signal distortion, which is particularly important for higher-order modulation formats.

[0091] Figure 6 This is a flowchart illustrating a method for designing an inductor-balanced silicon-based traveling-wave Mach-Zehnder modulator provided by the present invention, as shown below. Figure 6 As shown, the method includes the following: S601. Determine the equivalent circuit parameters of the PN junction.

[0092] In the embodiments of this application, the equivalent circuit parameters include equivalent resistance and equivalent capacitance.

[0093] Specifically, equivalent resistance refers to the characteristic parameter of a PN junction that impedes current flow under forward or reverse bias conditions. This parameter is mainly affected by factors such as the geometry of the PN junction, doping concentration distribution, carrier mobility, and operating temperature.

[0094] In actual devices, the equivalent resistance is composed of series resistance and junction resistance. The series resistance comes from the semiconductor bulk resistance and contact resistance, while the junction resistance is closely related to the bias voltage.

[0095] Specifically, equivalent capacitance refers to the charge storage characteristic parameter exhibited by a PN junction when a voltage is applied. This parameter mainly includes two components: barrier capacitance and diffusion capacitance.

[0096] The barrier capacitance originates from the charge change caused by the voltage variation in the depletion region width, and its magnitude is related to the doping concentration, junction area, and bias voltage. The diffusion capacitance, on the other hand, is caused by the charge storage effect generated during the diffusion of minority carriers, and is significant under forward bias.

[0097] For example, determining the equivalent circuit parameters of a PN junction requires a combination of various testing methods.

[0098] For example, a DC IV test is first used to obtain basic resistance parameters. By measuring the current values ​​under different bias voltages, parameters such as series resistance and ideality factor can be calculated. Next, CV tests are performed at multiple frequency points to measure the junction capacitance characteristics, distinguishing the contributions of barrier capacitance and diffusion capacitance. Finally, high-frequency S-parameter tests are performed to obtain parasitic parameters and frequency-dependent characteristics.

[0099] Specifically, a specialized test structure needs to be designed during the parameter extraction process to ensure measurement accuracy. The test structure includes PN junction devices of different sizes; by measuring devices of multiple sizes, the effects of edge effects and contact resistance can be eliminated.

[0100] In actual testing, because semiconductor parameters are very sensitive to temperature changes, it is necessary to precisely control the ambient temperature.

[0101] In addition, accurate physical models of devices can be established, and intrinsic parameters can be extracted from experimental data through curve fitting.

[0102] S602. Based on the target bandwidth and the equivalent circuit parameters of the PN junction, calculate the required micro-inductance value so that the constructed RLC resonant unit produces a resonant peaking effect in the target frequency band to compensate for the high-frequency roll-off.

[0103] In this embodiment, the target bandwidth can be determined according to the system specifications. Typically, the target bandwidth should be slightly higher than the bandwidth required by the system to allow for design margin.

[0104] For example, calculating the micro-inductance value requires establishing an accurate distributed circuit model. This model treats the entire modulator as a cascade of multiple basic units, each containing a PN junction, a micro-inductance structure, and corresponding interconnection structures.

[0105] For example, the propagation characteristics of microwave signals in a structure can be analyzed using transmission line theory, while considering impedance matching conditions and phase consistency requirements.

[0106] Specifically, the inductance value is calculated based on the RLC series resonance principle, with the goal of setting the resonant frequency in a frequency band where the modulator bandwidth attenuates significantly.

[0107] The calculation process is as follows: Analyze the frequency response characteristics of the traditional modulator to identify the critical frequency point where the response begins to roll off. Use electromagnetic simulation software to establish a complete model including PN junction distributed parameters and electrode transmission line effects, and perform frequency domain analysis to determine the optimal resonant frequency. Finally, calculate the required inductance value using the resonant frequency formula.

[0108] In actual calculations, parameter sensitivity analysis is also required to assess the impact of process fluctuations on inductance requirements and ensure the robustness of the design.

[0109] S603. Based on the micro-inductance value, design the geometric layout of the micro-inductor structure.

[0110] In the embodiments of this application, the design of the geometric layout of the micro-inductor structure is a multi-objective optimization process.

[0111] For example, the basic type of inductor structure, such as a serpentine inductor, a spiral inductor, or other special structures, is first determined based on the calculated inductance value. Then, specific geometric parameters, including the number of inductor turns, line width, line spacing, and inner and outer diameters, are determined through electromagnetic field simulation.

[0112] Specifically, the layout design process can employ an iterative optimization method. First, a set of initial geometric parameters is determined based on preliminary calculations, and then precise simulation is performed using three-dimensional full-wave electromagnetic simulation software.

[0113] In actual simulations, a complete structural model can be built, including the inductor itself, substrate, dielectric layer, and adjacent metal structures, to accurately account for various parasitic and coupling effects. Geometric parameters are then adjusted based on the simulation results until all design requirements are met.

[0114] In addition, it is important to ensure that the self-resonant frequency is significantly higher than the operating frequency, typically requiring it to be at least twice the operating frequency. Furthermore, the inductor's quality factor must be optimized to reduce losses and improve efficiency.

[0115] Optionally, while meeting electrical performance requirements, manufacturing limitations such as minimum line width and minimum spacing should also be considered to ensure the manufacturability of the design.

[0116] S604. In the layout design of the modulator, the geometric layout of the micro-inductor structure is embedded in the signal path of the traveling wave electrode, so that it forms a series connection with the PN junction.

[0117] In the embodiments of this application, the integration of the micro-inductor structure needs to take into account the optimization of the overall layout.

[0118] For example, the distribution of the micro-inductor structure on the modulation arm can be determined first, including the number of segments, spacing, and relative positions. Then, a metal via connection scheme can be designed to ensure a reliable series connection between the micro-inductor structure, the traveling wave electrode, and the PN junction.

[0119] During the layout process, special attention must be paid to impedance matching to avoid signal reflections caused by structural discontinuities. Thermal management must also be considered to ensure that power dissipation does not lead to localized overheating.

[0120] Specifically, the integration process can employ a system-level design approach.

[0121] For example, the optimized micro-inductor structure layout is first imported into the overall layout design and precisely placed in the predetermined position. Then, a first metal via is designed to connect the traveling wave electrode and the first end of the micro-inductor structure, and a second metal via is designed to connect the second end of the micro-inductor structure and the heavily doped region of the PN junction. Finally, design rule checks and large-scale parasitic parameter extraction are performed to ensure the correctness and reliability of the design.

[0122] Optionally, the symmetry of the two modulation arms needs to be maintained during the overall layout to preserve common-mode rejection characteristics. Electromagnetic compatibility analysis is also required to assess the potential interference of the micro-inductor structure to the optical waveguide, and necessary shielding measures should be taken.

[0123] In the method for designing an inductor-balanced silicon-based traveling-wave Mach-Zehnder modulator provided in this application embodiment, a significant improvement in modulator performance is achieved through a systematic design process and precise parameter optimization. First, by accurately extracting the equivalent circuit parameters of the PN junction, reliable input data is provided for subsequent design. Second, the calculation of the micro-inductance value based on the target bandwidth ensures the accuracy of resonance compensation, effectively extending the electro-optic bandwidth of the modulator. Furthermore, through optimized geometric layout design, the required inductance characteristics are achieved within a limited area while ensuring fabrication feasibility. Finally, careful integration design ensures the coordinated operation of the micro-inductor structure with other parts of the modulator. This not only improves design efficiency but also ensures the predictability and consistency of device performance through quantified design metrics.

[0124] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An inductively balanced silicon-based waveguide Mach-Zehnder modulator, characterized in that, The application relates to a silicon-based Mach-Zehnder modulator, comprising: a substrate (101); an optical waveguide (102) formed on the substrate (101); a PN junction (103) arranged along the optical waveguide (102); a traveling wave electrode (104) for applying a modulation signal to the PN junction (103); at least one micro-inductor structure (105) connected in series with the PN junction (103) in an electrical manner, so that the equivalent resistance and equivalent capacitance of the PN junction (103) and the micro-inductor structure (105) together form an RLC resonant unit (106) for compensating the high-frequency response roll-off of the modulator through a resonance peaking effect, so as to improve the electro-optical bandwidth.

2. The inductively balanced silicon-based waveguide Mach-Zehnder modulator of claim 1, wherein, The number of the micro-inductor structures (105) is multiple; the multiple micro-inductor structures (105) are arranged in segments along the length direction of the traveling wave electrode (104).

3. The inductively balanced silicon-based waveguide Mach-Zehnder modulator of claim 2, wherein, Each micro-inductor structure (105) is connected in series with a segment of the PN junction (103) to form one RLC resonant unit (106).

4. The inductively balanced silicon-based waveguide Mach-Zehnder modulator of claim 3, wherein, The multiple RLC resonant units (106) formed by the micro-inductor structures (105) and the corresponding segments of the PN junction (103) are cascaded periodically along the traveling wave electrode (104).

5. The silicon-based Mach-Zehnder modulator with inductive equalization according to claim 1, wherein: the traveling wave electrode (104) is arranged on a first metal layer (107); the micro-inductor structure (105) is formed on a second metal layer (108) different from the first metal layer (107).

6. The silicon-based Mach-Zehnder modulator with inductive equalization according to claim 5, wherein: the traveling wave electrode (104) is connected with the first end of the micro-inductor structure (105) through a first metal via (109); the second end of the micro-inductor structure (105) is connected with the heavily doped region (111) of the PN junction (103) through a second metal via (110).

7. The inductively balanced silicon-based waveguide Mach-Zehnder modulator of claim 1, wherein, The micro-inductor structure (105) is a planar inductor structure.

8. The inductively balanced silicon-based waveguide Mach-Zehnder modulator of claim 7, wherein, The shape of the planar inductor structure is a serpentine line, a spiral line or a polygonal spiral line.

9. The inductively balanced silicon-based waveguide Mach-Zehnder modulator of claim 1, wherein, The application further comprises: two parallel modulation arms (112); each modulation arm (112) is provided with the optical waveguide (102), the PN junction (103), the traveling wave electrode (104) and the micro-inductor structure (105) connected in series.

10. The inductively balanced silicon-based waveguide Mach-Zehnder modulator according to any one of claims 1 to 9, characterized in that, The traveling wave electrode (104) adopts a coplanar waveguide structure, a microstrip line structure or a grounded coplanar waveguide structure.

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