BFO (bismuth ferrite)-based high-temperature self-stabilization ferroelectric domain wall memory and preparation method thereof

Abstract

The invention relates to a high-temperature self-stabilization ferroelectric domain wall memory based on bismuth oxide (BFO) and a preparation method thereof, a memory function layer is formed by sequentially depositing an STO buffer layer with the thickness of 5 nm, a BFO film with the thickness of 100 nm and a planar Pt electrode pair on a strontium titanate (STO) substrate in the [001] direction, the STO substrate is obliquely cut by 0.2 degree in the [100] direction, the BFO film is of a stripe domain structure, and the electrode gap is not smaller than 500 nm. Through the limiting effect of a beveled substrate step, the BFO ferroelectric film only forms two polarization orientations, a periodic stripe domain structure is obtained, the polarization overturning controllability is improved, the electrode is prepared by adopting an electron beam photoetching and ion etching combined process, the electric domain overturning is ensured to penetrate through the film thickness, and the performance of the BFO ferroelectric film is improved. After 105 times of voltage pulse cycles at a high temperature of 135 DEG C, the device still keeps a rectification ratio greater than or equal to 25: 1, the turnover polarization retentivity is high, and the domain wall current attenuation rate is small. The bottleneck that a traditional FeRAM fails in a high-temperature environment is broken through, the storage density potential is larger than 1 Gb, and the FeRAM has the effect of being suitable for high-temperature application scenes such as aerospace, vehicle-mounted electronics and geothermal exploration.

Description

Technical Field

[0001] This application relates to the field of novel non-volatile memory technology, and in particular to a high-temperature self-stabilizing ferroelectric domain wall memory based on bismuth ferrite (BFO) and its preparation method. Background Technology

[0002] Traditional ferroelectric random access memory (FeRAM) is based on PbZrTiO3 (PZT) material with a Curie temperature of only 350°C. In high-temperature environments (such as space and automotive electronics), its reliability is insufficient due to a sharp drop in polarization stability, and its capacitor structure limits storage density to the 16 Mb level. Although bismuth ferrite (BFO), a multiferroic material, has an ultra-high Curie temperature of 830°C, providing an ideal solution for high-temperature memory, the problems of current decay and domain retention of its artificial domain walls at high temperatures have not yet been overcome. Summary of the Invention

[0003] To address the technical problem of a sharp drop in reliability caused by polarization instability in traditional ferroelectric memories at high temperatures of ≥135℃, this application provides a high-temperature self-stabilizing ferroelectric domain wall memory based on bismuth ferrite (BFO) and its preparation method.

[0004] This application provides a high-temperature self-stabilizing ferroelectric domain wall memory based on epitaxial bismuth ferrite (BFO) thin film and its fabrication method, employing the following technical solution: A high-temperature self-stabilized ferroelectric domain wall memory based on epitaxial bismuth ferrite (BFO) thin film and its fabrication method, the structure of which includes, in sequence: 1.1 Strontium titanate (SrTiO3, STO) substrate with a 0.2° bevel cut along the

[100] direction; 1.2 A 5 nm thick epitaxial STO buffer layer deposited on the substrate; 1.3 A 100 nm thick epitaxial BFO ​​film deposited on the buffer layer, the BFO film having a periodic stripe domain structure; 1.4 A planar electrode pair disposed on the surface of the BFO film, wherein the electrode pair is a platinum (Pt) electrode, and the gap between the two electrodes is ≥500 nm and the electrode width is approximately 500 nm.

[0005] By employing the above technical solution, a high-temperature self-stabilizing ferroelectric domain wall memory based on bismuth ferrite (BFO) was constructed. Utilizing a 0.2° beveled strontium titanate (STO) substrate and a 5 nm STO buffer layer deposited on it, film growth defects were effectively reduced, inducing a stable and controllable striped domain structure in the BFO film. Only two polarization orientations were retained, improving the controllability and stability of domain switching. The 100 nm thick BFO film, with its high Curie temperature of 830 °C, endowed the device with excellent high-temperature polarization characteristics, ensuring excellent fatigue characteristics under extreme conditions of 135 °C. The planar Pt electrode pair design employed an electrode gap of ≥500 nm, allowing domain switching to penetrate the film thickness, avoiding rapid relaxation of domains at high temperatures, suppressing short-circuit risks, and improving memory retention. The nanoelectrode structure fabricated by electron beam lithography and ion etching processes ensured stable and highly repeatable domain wall conductive paths. Combining these measures, the device could achieve polarization switching at 135 °C, forming conductive domain walls with a domain wall current decay rate of less than 20%. 5 The secondary pulse cycle maintains a rectification ratio of ≥25:1, demonstrating excellent high-temperature fatigue resistance. Furthermore, after high-temperature reversal, the polarization reversal duration is up to 36 hours.

[0006] Optionally, the 0.2° oblique substrate is an STO single crystal substrate along the (001) direction.

[0007] By adopting the above technical solution, the 0.2° oblique cut STO single crystal substrate can introduce the anisotropic effect of the step boundary during the epitaxial growth of thin film, effectively eliminating six of the eight polarization orientations of BFO, retaining only two polarization directions, forming a regular and stable striped domain structure, improving the controllability and repeatability of domain flipping, reducing the defect density of thin film, and enhancing the retention of domains and the stability of domain wall conductivity at high temperature.

[0008] Optionally, the BFO film has only two polarization orientations, thereby forming a regular striped domain structure to enhance the controllability of domain flipping at high temperatures.

[0009] By adopting the above technical solution, the BFO thin film has only two polarization orientations, forming a regular striped domain structure under the action of an external electric field. This avoids the domain wall disorder and uncontrollable flipping problems caused by multiple polarization orientations. The regular striped domains improve the stability and predictability of the domain flipping process and reduce the possibility of random polarization relaxation under high temperature conditions.

[0010] Optionally, the electrode pair is fabricated by electron beam lithography (EBL), and a 20 nm thick Cr mask layer is evaporated on its surface to assist in pattern transfer.

[0011] By adopting the above technical solutions, electron beam lithography (EBL) enables the precise fabrication of electrode pairs at the nanoscale, ensuring high consistency in electrode gap and width, effectively controlling the size and position of the domain flipping region, and enhancing the resolution and corrosion resistance of pattern transfer by introducing a Cr mask layer. This avoids irregular or distorted electrode boundaries during etching, improves the processing accuracy and stability of the electrode structure, ensures clear and controllable domain wall conductive paths, and enhances the device's retention and repeatability under high-temperature conditions.

[0012] Optionally, the electrode pair is formed by an ion etching process. Ar and O2 are introduced at flow rates of 10 and 40 sccm, respectively, with a pressure of 3 Pa, a power of 50 W, an etching rate of 0.5 nm / min, and an etching time of 5 min. Then, Ar is introduced at a flow rate of 40 sccm, a pressure of 4 Pa, a power of 25 W, an etching rate of 1 nm / min, and an etching time of 2 min. The time ratio of the two steps can be adjusted to control the gap between the electrodes. This process is repeated until Pt without Cr as a mask is etched, exposing the BFO film. By adopting the above technical solutions, the ion etching process achieves precise layer-by-layer removal of Pt electrodes, the Ar / O2 mixed gas etching ensures the removal of deposits in the electrode area, and the pure Ar etching is used for rapid material etching. This achieves rapid etching while ensuring the smoothness of the electrode edges and the controllability of the gap size.

[0013] Optionally, after polarization reversal at 135℃, the conductive domain walls formed by the reversed polarization can maintain a value of 1.31 × 10⁻⁶. 5 The domain wall current decay rate is less than 20% in seconds (36 hours).

[0014] By adopting the above technical solution, the device can achieve stable operation at a high temperature of 135℃, and its domain wall current is 1.31×10⁻⁶ during continuous operation. 5 With a decay rate of less than 20% after a second, the conductive channel is not easily affected by defect migration or depolarization field driven by high temperature. The stability ensures the reliable maintenance of the domain state under high temperature conditions, avoiding the functional failure caused by polarization instability in traditional ferroelectric memories, and realizing long-term reliable data storage and operation in extreme environments.

[0015] Optionally, the memory is subjected to a high temperature of 135°C for 10... 5 After the voltage pulse cycle, its domain wall current still maintains a rectification ratio of ≥25:1.

[0016] By adopting the above technical solution, the memory was tested at a high temperature of 135℃ for 10... 5Even after a voltage pulse cycle, the rectification ratio remains ≥25:1. Its domain wall conductivity exhibits excellent fatigue resistance under high-temperature electrical stress, effectively suppressing current decay caused by defect accumulation or polarization relaxation. This ensures the electrical stability and switching reliability of the device during long-term high-temperature cycling, enabling durable operation of high-density storage in extreme environments.

[0017] Optionally, the memory can achieve stable domain flipping at 135°C after applying a 15 V external bias voltage, and retains domain wall conductivity after cooling to room temperature.

[0018] By adopting the above technical solution, the problem of rapid relaxation or disappearance of electric domains under high temperature environment is effectively avoided, ensuring long-term stable storage after data writing. The reversible electric domain flipping capability improves the read and write reliability of the device under extreme conditions, providing support for high-temperature non-volatile storage applications.

[0019] Optionally, the device has a storage density potential greater than 1 Gb based on a domain wall conductivity mechanism.

[0020] By adopting the above technical solution, the domain wall, as a natural nanoscale conductive channel, achieves stable switching and holding characteristics at an extremely small scale, breaking through the bottleneck of traditional FeRAM in terms of storage density, improving the information storage capacity per unit area, and providing important technical support for realizing a new type of high-density, low-power non-volatile memory.

[0021] Optionally, the BFO film can be replaced with other ferroelectric thin film materials with a Curie temperature higher than 600°C to improve the high-temperature performance of the device.

[0022] By adopting the above technical solutions, stable polarization and domain wall conductivity characteristics can be maintained even in high-temperature environments. Furthermore, the heat resistance and reliability of the device can be improved, enabling the memory to achieve long-term stable high-temperature operating performance and data retention capability under extreme conditions.

[0023] In summary, this application has the following technical effects: 1. By using the striped domain structure induced by the oblique cut STO substrate and STO buffer layer, combined with the intrinsic high Curie temperature characteristics of BFO, the polarization can be maintained for more than 36 hours after the domain wall is formed at 135℃, and the domain wall current decay rate is less than 20%, breaking through the bottleneck of polarization instability of traditional ferroelectric memory at high temperature. 2. After being subjected to a high temperature of 135℃ for 10... 5 After the voltage pulse cycle, the domain wall current still maintains a rectification ratio of ≥25:1, demonstrating excellent high-temperature cycling stability and fatigue resistance. 3. A Pt planar electrode design with a gap of ≥500 nm enables domain flipping across the entire film thickness, ensuring domain stability at high temperatures. Reversible domain flipping is achieved after applying a 15 V bias voltage, while maintaining domain wall conductivity at room temperature, thus improving data retention reliability. 4. Utilizing domain wall conductivity as a storage unit, it breaks through the limitations of the traditional FeRAM capacitor structure, possessing a potential storage density of >1 Gb, and meeting the requirements of high-density, low-power storage. 5. Electron beam lithography and two-step ion etching processes are used to ensure precise and controllable electrode patterns, improve the stability and repeatability of the domain flipping region, and enable wider applications by replacing the high Curie temperature ferroelectric thin film material. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of an embodiment of this application.

[0025] Figure 2 This is a schematic diagram of the device fabrication process according to an embodiment of this application.

[0026] Figure 3 This is a schematic diagram of the high-temperature performance of a planar BFO device with a Pt electrode width / gap of 500 nm / 500 nm. Detailed Implementation

[0027] The following is in conjunction with the appendix Figure 1-3 This application will be described in further detail.

[0028] This application discloses a high-temperature self-stabilizing ferroelectric domain wall memory based on bismuth ferrite (BFO) and its fabrication method. (Refer to...) Figure 1 To facilitate subsequent retention testing and ensure that the film has as few defects as possible, a 5 nm thick STO film is first epitaxially grown on an STO substrate, and then a 100 nm thick BFO film is grown in situ. The substrate of the STO with the

[001] direction is obliquely cut at 0.2° in the 100 direction. Six of the eight polarizations in the BFO film are eliminated by the anisotropy of the step edge, thus presenting a striped domain structure with only two domains in the period, which is beneficial to control the polarization reversal of the film.

[0029] Reference Figure 2 Device fabrication process: First, a layer of Pt is deposited on the thin film surface at a high temperature of 350℃ and a thickness of 30nm using magnetron sputtering technology. The nanoelectrode pair was then fabricated by photolithography on the Pt surface using EBL technology; a 20 nm thick Cr mask layer was then thermally evaporated at an evaporation rate of 0.01 nm / s. After removing the resist, etching is performed. A mixture of Ar and O2 gas is introduced at flow rates of 10 and 40 sccm, respectively. The gas pressure is set to 3 Pa, the power to 50 W, the etching rate to 0.5 nm / min, and the etching time to 5 min. Then, Ar is introduced at a flow rate of 40 sccm, a pressure of 4 Pa, a power of 25 W, an etching rate of 1 nm / min, and an etching time of 2 min. The time ratio of the two steps can be adjusted to control the gap between the electrodes. The above process is repeated until Pt without Cr as a mask is etched, thus exposing the BFO film.

[0030] Reference Figure 3 High-temperature performance of a planar BFO device with Pt electrode width / gap of 500 nm / 500 nm; (a) Original out-of-plane PFM full amplitude, (b) Original out-of-plane PFM phase; (c) In-plane PFM full amplitude and (d) In-plane PFM phase measured at room temperature after applying a 15 V bias voltage to flip the domains at 135 °C; (e) Current fatigue and (f) Retention characteristic test of the prototype memory device at 135 °C. To evaluate the device's suitability for storage applications at high temperatures, we reversed the polarization between electrode pairs using a 15 V voltage at 135 °C, and then cooled the in-plane and out-of-plane domains to room temperature as follows: Figure 3 As shown in (a)-4(d), it can be observed that the flipped domains between the electrode pairs still exist after the external voltage is removed, and the conductive domain walls remain connected to the electrode pairs, indicating that the device still has strong retention after being subjected to a high temperature of 135°C; fatigue testing of the device was continued at 135°C, as shown in... Figure 3 As shown in (e), although the domain wall current of the device decays after voltage pulse cycling, it still maintains a rectification ratio of 25:1, indicating that the device has excellent fatigue resistance at high temperatures. Simultaneously, the retention characteristics of the interdomain current were tested, such as... Figure 3 As shown in (f), at 1.31 × 10 5 During the test period, although the depolarization field at the artificial domain wall drives the redistribution of defects, causing a slight decrease in the current amplitude, the device remains in the on state and has a large rectification ratio.

[0031] The technical effect of this application achieves a revolutionary breakthrough in ferroelectric memory at extreme high temperatures of 135℃, as detailed below: 1. High-temperature stability: After polarization reversal at 135℃, the polarization retention is as high as 36 hours (1.31×10⁻⁶). 5 (seconds), domain wall current decay rate <20%, far superior to traditional PZT memory (high temperature failure). 2. Storage reliability: Stable polarization is maintained at 135℃ through a wide-gap electrode design. Figure 3 After fatigue testing, the rectification ratio still reached 25:1 (>10). 5 (nth iteration) 3. Density Breakthrough: Utilizing a nanometer-level domain wall conductivity mechanism, the storage density potential is >1Gb, breaking through the 16Mb upper limit of traditional FeRAM.

[0032] The above benefits provide the first high-density ferroelectric storage solution that can operate reliably for aerospace engine control, automotive high-temperature electronic systems, and geothermal exploration equipment over a long period of time.

[0033] The key technical points of this application are: 1. Pre-depositing a 5nm STO thin film improves film quality, enhances the periodicity of the ferroelectric thin film structure, reduces defects, and improves fatigue resistance at high temperatures; 2 BFO has a total of 8 polarization directions. By using a slanted substrate, the polarization can be reduced to 2 through the self-limiting effect of the steps by introducing a slant in a specific direction of the substrate, which makes the domain structure more controllable. The key technical solution of this application is: high-temperature resistant device structure: STO substrate (0.2° bevel angle) → STO buffer layer (5nm) → BFO stripe domain film (100nm) → Pt electrode pair (gap ≥500nm).

[0034] The implementation principle of the high-temperature self-stabilizing ferroelectric domain wall memory based on bismuth ferrite (BFO) and its fabrication method in this application is as follows: A 5 nm STO buffer layer is epitaxially grown on a 0.2° obliquely cut SrTiO3 single crystal substrate, inducing the BFO film to form a two-polarization orientation structure with periodic striped domains. This reduces the instability of defects and multi-polarization domain walls from the source, enhancing the controllability and high-temperature retention of polarization reversal. The 100 nm thick BFO film, with a high Curie temperature of 830 °C, can maintain the stability of the ferroelectric domain structure even at 135 °C, avoiding the functional degradation caused by polarization instability in traditional ferroelectric materials. The device uses nanoscale Pt planar electrode pairs (width / gap 500 nm / 500 nm). Under the influence of an applied electric field, the domains are driven to flip and activate the domain wall conductive channels. Information storage is achieved by utilizing the natural nanoscale conductivity mechanism of the domain walls. Electron beam lithography and two-step ion etching processes are used to precisely control the electrode structure and gap size, ensuring the repeatability and reliability of the domain wall conductive path. Ultimately, ultra-high retention is achieved for 36 hours, with a domain wall current decay rate of <20%, and after 10 hours at 135°C. 5 Even after a secondary voltage pulse cycle, it maintains an excellent rectification ratio of ≥25:1, thus laying the foundation for its application as a high-density, long-life non-volatile memory in extreme high-temperature environments.

[0035] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.

Claims

1. A high-temperature self-stabilizing ferroelectric domain wall memory based on bismuth ferrite oxidase (BFO) and its fabrication method, characterized in that: Its structure includes, in sequence: 1.1 Strontium titanate (SrTiO3, STO) substrate with a 0.2° bevel cut in the [100] direction; 1.2 A 5 nm thick epitaxial STO buffer layer deposited on the above substrate; 1.3 An epitaxial 100 nm thick BFO film deposited on the buffer layer, the BFO film having a periodic stripe domain structure; 1.4 A planar electrode pair disposed on the surface of the BFO thin film, wherein the electrode pair is a platinum (Pt) electrode, and the gap between the two electrodes is ≥500 nm, the electrode width is about 500 nm, and the electrode pair is along the substrate [100] direction.

2. The ferroelectric domain wall memory according to claim 1, characterized in that: The 0.2° obliquely cut substrate is an STO single crystal substrate along the (001) direction.

3. The ferroelectric domain wall memory according to claim 1, characterized in that: The BFO film has only two polarization orientations, thereby forming a regular striped domain structure to enhance the controllability of domain flipping at high temperatures.

4. The ferroelectric domain wall memory according to claim 1, characterized in that: The electrode pair was fabricated by electron beam lithography (EBL), and a 20 nm thick Cr mask layer was evaporated on its surface to assist in pattern transfer.

5. The ferroelectric domain wall memory according to claim 1, characterized in that: The electrode pair was formed using an ion etching process. Ar and O2 were introduced at flow rates of 10 and 40 sccm, respectively, with a pressure of 3 Pa, a power of 50 W, an etching rate of 0.5 nm / min, and an etching time of 5 min. Then, Ar was introduced at a flow rate of 40 sccm, a pressure of 4 Pa, a power of 25 W, an etching rate of 1 nm / min, and an etching time of 2 min. The time ratio of the two steps could be adjusted to control the gap between the electrodes. This process was repeated alternately until Pt without Cr as a mask was etched, exposing the BFO film.

6. The ferroelectric domain wall memory according to claim 1, characterized in that: Polarization reversal forms conductive domain walls of 1.31 × 10⁻⁶. 5 After 36 seconds, its domain wall current decay rate is less than 20%.

7. The ferroelectric domain wall memory according to claim 1, characterized in that: The memory was subjected to a high temperature of 135°C for 10... 5 After the voltage pulse cycle, its domain wall current still maintains a rectification ratio of ≥25:

1.

8. The ferroelectric domain wall memory according to claim 1, characterized in that: The memory, after being subjected to an external bias voltage of 15 V, can achieve stable domain flipping at 135°C and retains domain wall conductivity after cooling to room temperature.

9. The ferroelectric domain wall memory according to claim 1, characterized in that: The device has a storage density potential greater than 1 Gb based on a domain wall conductivity mechanism.

10. The ferroelectric domain wall memory according to any one of claims 1 to 9, characterized in that: The BFO film can be replaced by other ferroelectric thin film materials with a Curie temperature higher than 600°C to improve the high-temperature performance of the device.

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