High-reliability multi-data flow diagram execution device and method

Abstract

The invention provides a high-reliability multi-data flow diagram execution device, which is characterized in that a proxy distribution module is used for storing a pre-generated data flow diagram pool when a current program is executed, and a plurality of data flow diagrams in the data flow diagram pool are loaded to a reconfigurable array in parallel under the control of a feedback control module; when the data flow diagram is wrongly calculated, other data flow diagrams which belong to the same program with the data flow diagram which is wrongly calculated are scheduled; the reconfigurable computing array is used for executing a plurality of heterogeneous data flow diagrams corresponding to the same to-be-executed program in parallel; the strategy judgment module is used for judging whether calculation is correct or not, outputting a result when the calculation is correct, marking a data flow diagram of a calculation error when the calculation result is wrong, and feeding back the data flow diagram to the reconfigurable calculation array and the feedback control module; and the feedback control module is used for controlling the operation of the whole device and sending the received feedback information to the proxy distribution module so as to control the proxy distribution module to schedule and calculate other data flow diagrams, belonging to the same program, of the wrong data flow diagrams in the diagram pool.

Description

Technical Field

[0001] This invention relates to the field of computer architecture technology, specifically to highly reliable data flow execution technology, and more specifically to a highly reliable multi-dataflow graph execution device and method. Background Technology

[0002] In Dataflow Architecture, applications are transformed into DataFlow Graphs (DFGs) for execution, where nodes represent computational operations and edges represent data dependencies.

[0003] Traditional dataflow execution models typically employ a Single Program Single Graph (SPSG) mechanism, where each program generates a unique dataflow graph, relying on a scheduler to schedule and execute the program based on dependency rules. However, this mechanism suffers from the following serious problems in scenarios requiring high security and reliability:

[0004] 1) If the data flow graph is interfered with by soft errors, attacked and tampered with, or a node fails during execution, the entire graph may produce erroneous output or even the system may crash.

[0005] 2) Due to the simple graph structure and lack of redundant backup graphs for comparison and recovery, errors cannot be detected or corrected during operation, requiring the entire program to be stopped.

[0006] 3) In high-risk mission scenarios, such as military equipment, aerospace control, and chip verification, the reliability and fault tolerance of this type of architecture are clearly insufficient.

[0007] Therefore, for chip systems with high security and reliability requirements, such as edge computing, defense equipment, and avionics chips, the single-program, single-dataflow graph mechanism is no longer suitable, and a dataflow graph execution scheme with higher reliability and security is needed. It should be noted that this background information is only used to introduce relevant information of the present invention to help understand the technical solution of the present invention, but does not mean that the relevant information is necessarily prior art. In the absence of evidence that the relevant information was disclosed before the filing date of this invention, the relevant information should not be regarded as prior art. Summary of the Invention

[0008] Therefore, the purpose of this invention is to overcome the shortcomings of the prior art and provide a new highly reliable majority flow graph execution device and method.

[0009] The objective of this invention is achieved through the following technical solution:

[0010] According to a first aspect of the present invention, a multi-dataflow graph execution apparatus is provided for acquiring and executing multiple dataflow graphs corresponding to a pre-generated program to be executed. The apparatus includes a proxy distribution module, a reconfigurable computing array, a policy adjudication module, and a feedback control module. The proxy distribution module stores a pool of dataflow graphs pre-generated during the current program execution and, under the control of the feedback control module, loads multiple dataflow graphs from the pool into the reconfigurable array in parallel. It also schedules other dataflow graphs belonging to the same program as the dataflow graph with the calculation error when a dataflow graph calculation is incorrect. The reconfigurable computing array includes multiple parallel-executable computing units (PEs) and is used to execute multiple heterogeneous dataflow graphs corresponding to the same program to be executed in parallel. The policy adjudication module determines whether the calculation is correct based on the calculation results of key nodes in each dataflow graph, outputs the result when the calculation is correct, and marks the dataflow graph with the calculation error when the calculation result is incorrect, feeding it back to the reconfigurable computing array and the feedback control module. The feedback control module sends the received feedback information to the proxy distribution module to control the proxy distribution module to schedule other dataflow graphs belonging to the same program as the dataflow graph with the calculation error in the graph pool.

[0011] Preferably, the multiple heterogeneous data flow graphs for each program to be executed are generated and stored in the graph pool in the following manner: S1. Obtain the program to be executed, perform front-end parsing to complete lexical analysis and syntax parsing, and generate an intermediate representation program; S2. Construct an initial data flow graph based on the dependencies in the intermediate representation program generated in step S1, wherein each node represents an operation and each edge represents the dependency relationship between data; S3. Generate multiple new heterogeneous data flow graphs based on the initial data flow graph; S4. Perform consistency verification on the multiple heterogeneous data flow graphs generated in step S3, and discard the data flow graphs that fail the consistency verification; S5. Store the multiple heterogeneous data flow graphs that pass the consistency verification into the data flow graph pool.

[0012] Preferably, in step S3, data flow graph nodes that can be replaced by operators are selected, and the selected nodes are replaced by equivalent operators to generate new heterogeneous data flow graphs.

[0013] Preferably, in step S3, at least three heterogeneous data flow graphs are generated for a program.

[0014] Preferably, in step S4, the consistency of multiple heterogeneous data flow graphs is verified as follows: each data flow graph is scheduled to run the same program on any executable array, and the output results are compared with the expected results. The data flow graph whose output results are consistent with the expected results passes the consistency verification.

[0015] Preferably, in step S5, when storing multiple heterogeneous data flow graphs that have passed the consistency check into the graph pool, each data flow graph is labeled with a program tag and a graph tag. Different data flow graphs corresponding to the same program share the same program tag, different data flow graphs corresponding to the same program have different graph tags, and data flow graphs of different programs use different program tags.

[0016] Preferably, the key nodes of the data flow graph are determined through a majority voting strategy.

[0017] According to a second aspect of the present invention, a highly reliable multi-dataflow graph execution method based on the apparatus described in the first aspect of the present invention is provided. The method includes: T1, acquiring multiple heterogeneous dataflow graphs for each program to be executed; T2, scheduling multiple heterogeneous dataflow graphs belonging to the same program to be executed in parallel for execution; T3, judging whether the calculation results of key nodes in each dataflow graph are correct, and outputting the results when the calculation is correct, and marking the dataflow graph with the calculation error when the calculation result is incorrect, and rescheduling other dataflow graphs belonging to the same program as the dataflow graph with the calculation error for execution.

[0018] Compared with existing technologies, the advantages of this invention are as follows: By introducing mechanisms such as multi-graph redundant execution, adjudication comparison, and anomaly cleaning during program execution, this invention achieves the system's self-monitoring, autonomous recovery, and stable execution capabilities, thereby significantly improving the availability and robustness of the chip system under non-ideal environments. By using the device based on the single-program multi-dataflow graph execution model of this invention, the output results can be guaranteed to be unaffected by error information during operation. It can perform parallel loading, independent execution, adjudication comparison, and anomaly cleaning operations on multiple graphs, thereby achieving highly reliable execution throughout the entire process and improving the system's reliability and security. Attached Figure Description

[0019] The embodiments of the present invention will be further described below with reference to the accompanying drawings, wherein:

[0020] Figure 1 This is a schematic diagram of a highly reliable multi-data flow graph execution device according to an embodiment of the present invention;

[0021] Figure 2 A schematic diagram illustrating the process of generating a multi-dataflow graph for a highly reliable multi-dataflow graph execution model according to an embodiment of the present invention;

[0022] Figure 3 This is a schematic diagram illustrating the generation of a heterogeneous data flow graph according to an embodiment of the present invention;

[0023] Figure 4 This is an example schematic diagram illustrating the generation of heterogeneous data flow graphs according to an embodiment of the present invention;

[0024] Figure 5This is a schematic diagram of the initialization of a high-reliability multi-dataflow graph execution device according to an embodiment of the present invention;

[0025] Figure 6 This is a schematic diagram of the abnormal cleaning process of a high-reliability majority flow graph execution device according to an embodiment of the present invention. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the invention.

[0027] As described in the background section, the existing single-program, single-dataflow graph mechanism has the following drawbacks in high-security and high-reliability scenarios: 1) If the dataflow graph is interfered with by soft errors, attacked and tampered with, or if a node fails during execution, the entire graph may output errors or even cause system crashes; 2) Due to the single graph structure and lack of redundant backup graphs for comparison and recovery, errors cannot be detected or corrected during operation, requiring the entire program to be terminated; 3) In high-risk mission scenarios, such as military equipment, aerospace control, and chip verification, the reliability and fault tolerance of this type of architecture are clearly insufficient.

[0028] Intrinsic security theory is a new technological development direction in the field of cybersecurity, first proposed by Academician Wu Jiangxing in 2013. Its core idea is to build a secure system by introducing necessary and diverse environments onto an existing imperfect system. During their research on data flow execution models and their security mechanisms, the inventors discovered that traditional models map all computational structures to a single data flow graph, leading to concentrated single-point risks and difficulty in detecting anomalies. Further in-depth research revealed that the root cause lies in the lack of diverse redundant graph support and dynamic comparison mechanisms. To address this, the inventors, combining intrinsic security theory, proposed a novel data flow execution model—the Single Program Multiple Graphs (SPMG) execution model—and designed a highly reliable device suitable for this model to improve execution security and overall system fault tolerance.

[0029] According to an embodiment of the present invention, a multi-dataflow graph execution apparatus is provided for acquiring and executing multiple dataflow graphs corresponding to a pre-generated program to be executed, such as... Figure 1As shown, the device includes a proxy distribution module, a reconfigurable computing array, a policy adjudication module, and a feedback control module. The proxy distribution module stores a pre-generated data flow graph pool during program execution and, under the control of the feedback control module, loads multiple data flow graphs from the pool into the reconfigurable array in parallel. It also schedules other data flow graphs belonging to the same program as the erroneous data flow graph when a data flow graph calculation error occurs. The reconfigurable computing array includes multiple parallel-executable PE computing units and is used to execute multiple heterogeneous data flow graphs corresponding to the same program in parallel. The policy adjudication module determines whether the calculation is correct based on the calculation results of key nodes in each data flow graph. If the calculation is correct, it outputs the result; if the calculation result is incorrect, it marks the erroneous data flow graph and feeds it back to the reconfigurable computing array and the feedback control module. The feedback control module controls the operation of the entire device and sends the received feedback information to the proxy distribution module to control the proxy distribution module to schedule other data flow graphs belonging to the same program as the erroneous data flow graph in the graph pool. In simple terms, after the SPMG data flow graph is generated, the entire device is controlled by the feedback control module, which selects several data flow graphs to be executed on the array at one time. The data flow graphs are deployed to the reconfigurable array for execution. During the execution process, strategy decisions are made continuously. If there is an error, it is corrected and the correct result after correction is output. During error correction, the execution unit that caused the error is cleaned and other backup data flow graphs are rescheduled for execution. The application's multi-dataflow graph generation model is responsible for generating heterogeneous dataflow graphs, and the graph pool is responsible for storing these graphs. The proxy distribution module is responsible for storing the graph pool generated by a single application and loading multiple dataflow graphs from the graph pool into the reconfigurable array, allocating computing resources, and ensuring synchronous startup. The reconfigurable computing array is responsible for providing multiple computing units that can be executed in parallel, with no interference between the operation of each computing unit. Data transmission and configuration between computing units can be performed through on-chip networks. The policy adjudication module is tightly coupled to the reconfigurable computing array. The output of the reconfigurable computing array must be judged by the adjudication module before it can be output. The policy adjudication module compares the outputs of multiple dataflow graphs running in parallel on the reconfigurable array in real time and uses a majority voting method to detect abnormal dataflow graph outputs. If an execution abnormality is detected, the policy adjudication module sends the program label and graph label of the abnormal dataflow graph to the feedback control module. The feedback control module is responsible for sending the feedback information to the proxy distribution module, which controls the proxy distribution module to find the dataflow graph with the same program label in the dataflow graph pool and schedule it.

[0030] It should be noted that the generation of the heterogeneous data flow graph in this invention can be completed by an application on any external storage device with storage space other than the execution device, as long as it can be accessed by the execution device.

[0031] The core objective of this invention is to propose a highly reliable data flow execution model and its apparatus. By introducing mechanisms such as multi-graph redundant execution, adjudication comparison, and anomaly cleaning during program execution, the system achieves self-monitoring, autonomous recovery, and stable execution capabilities, thereby significantly improving the availability and robustness of the chip system in non-ideal environments.

[0032] On the one hand, this invention proposes a novel dataflow execution model: a single-program, multi-dataflow graph execution model. This model, by introducing a structural diversification mechanism, generates multiple semantically equivalent but structurally different dataflow graphs from a single program, avoiding system interruption issues caused by single dataflow graph execution failures. According to one embodiment of the invention, as... Figure 2 As shown, the single-program multiple data flow graph model of the invention consists of the following four steps to generate multiple heterogeneous data flow graphs for each program to be executed and store them in a graph pool:

[0033] Step S1: Front-end parsing and intermediate representation generation. Similar to the conventional data flow graph generation process, the input program is first fed into the front-end compiler for lexical and syntactic analysis, generating the corresponding intermediate representation program. Then, an initial data flow graph is constructed based on the dependencies in the intermediate representation program. In the data flow graph, each node represents an operation, and each edge represents a dependency between data. By compiling the application represented by the high-level language and generating the initial data flow graph, preliminary preparations are made for the subsequent generation of differentiated data flow graphs.

[0034] Step S2: Data Flow Graph Differentiation Generation. Based on the initial data flow graph generated in Step 1, multiple heterogeneous data flow graphs are constructed using operator substitution. During the differentiation generation process, data flow graph nodes that can be replaced by operators are first selected, and then these nodes are replaced with equivalent replacements to generate new heterogeneous data flow graphs.

[0035] Step S3: Heterogeneous Data Stream Figure 1 Consistency Verification. This step verifies the semantic equivalence of the generated heterogeneous data flow graphs to ensure functional consistency among them. During verification, the generated heterogeneous data flow graphs are sequentially scheduled to run the same program on the executable array, and the output is compared with the expected result to determine whether the data flow graph accurately represents the program's semantics. Data flow graphs that pass the consistency verification are added to the graph pool, and data flow graphs with discrepancies are discarded in this step.

[0036] Step S4: Heterogeneous Data Flow Graphs Stored in a Graph Pool. Data flow graphs that pass consistency checks are stored in the graph pool. To facilitate subsequent execution, data flow graphs implementing the same function are assigned the same program label and different graph labels. Both program and graph label indices increment from zero. Data flow graphs implementing the same program share the same program label, while graph labels differ to distinguish between them. Data flow graphs implementing different programs use different program labels, but can use the same graph label.

[0037] Simply put, such as Figure 3 As shown, this illustrates the specific implementation method from data flow graph differentiation generation to data flow graph pooling and storage. First, compilation and parsing are performed to generate an initial data flow graph. Then, operator replacement is performed based on the initial data flow graph to generate differentiated data flow graphs, thus generating multiple heterogeneous data flow graphs. Figure 3 Only three heterogeneous data flow graphs are shown schematically; in actual applications, more can be generated as needed. Then, consistency verification is performed, and data flow graphs that fail the consistency verification are discarded. Heterogeneous data flow graphs that pass the consistency verification are labeled with program and graph labels. Figure 3 In this example, there is only one program, starting with number 0. Therefore, the program label for each heterogeneous data flow graph is 0, and the graph labels increment sequentially from 0, namely 0, 1, 2, etc. If there are multiple programs, the program labels increment from 0, and the graph labels corresponding to each program also increment from 0.

[0038] To give a specific example, such as Figure 4 As shown, the operation b = a * 2 / 4 needs to be implemented. Here, the multiplication and division operators are replaced with various alternatives, including using addition to perform equivalent multiplication and shift operations to perform equivalent division. By combining different selected operators, differentiated data streams can be obtained. Figure 1 Data Flow Figure 2 Data Flow Figure 3 .

[0039] like Figure 4 As shown, execute as follows Figure 3 The generated heterogeneous data flow graph, as shown, is initialized during configuration by the proxy distribution module, which distributes the data flow. Figure 1 Data Flow Figure 2 Data Flow Figure 3 The heterogeneous executors 1, 2, and 3 in the reconfigurable array are respectively scheduled for execution, and the strategy adjudication module detects this. Figure 6 As shown, if a data stream is detected Figure 2In the event of an execution exception, the strategy adjudication module sends the program label 0 and graph label 1 of the exception data flow graph to the reconfigurable array and feedback control module. The reconfigurable array is responsible for terminating the execution of the corresponding heterogeneous executor and waiting for the next scheduling by the proxy distribution module. The feedback control module is responsible for sending the feedback information to the proxy distribution module, controlling the proxy distribution module to find the data flow graph with the same program label in the data flow graph pool and schedule it. Figure 6 As shown, the data flow graph with program label 0 and graph label 3 is successfully scheduled to the heterogeneous execution body 2 of the reconfigurable array for execution.

[0040] According to an embodiment of the present invention, the process of performing multi-dataflow graph execution based on the apparatus of the present invention can be divided into the following steps:

[0041] Step 1: Multiple Flow Graph Generation and Heterogeneous Transformation. The target program is generated into multiple data flow graph groups through a single-program, multiple data flow graph generation process. At least three data flow graphs should be generated during this process, ensuring functional equivalence and consistent logical output among them.

[0042] Step Two: Parallel Launch and Execution. Under the control of the agent distribution module, several data flow graphs with the same program tag are uniformly loaded and synchronously launched onto the reconfigurable array. Within the reconfigurable array, each graph is allocated independent computing resources, and during execution, each graph runs independently without interfering with the others.

[0043] Step 3: Strategy Decision-Making. After running for a period of time, the data flow graph loaded onto the reconfigurable array outputs the results of key nodes to the strategy decision-making module for correctness judgment. The selection of key nodes can be configured according to actual conditions. According to an embodiment of the present invention, the present invention provides a strategy decision-making method applied to the data flow execution model and its device: a majority voting strategy scheme. Specifically, by comparing the results of all data flow graphs at the decision point, if the output of a graph is inconsistent with the majority result, it is marked as an "abnormal graph" and proceeds to step 4 for cleaning; if all are consistent, it proceeds to step 5 to continue execution.

[0044] Step 4: Abnormal Data Flow Graph Cleaning. Once the policy adjudication module determines that a graph outputs abnormally, it feeds back the relevant tags of the abnormal data flow graph to the reconfigurable cell array. After receiving the relevant information, the array suspends the scheduling and execution of that graph and reclaims its resources. At the same time, the agent distribution module also receives the same feedback signal, selects a backup data flow graph with the same program tag from the data flow graph pool, and launches it to the reconfigurable array to replace it for continued execution.

[0045] Step 5: Normal Completion and Result Submission. After the data flow graph on the reconfigurable array has been executed, the corrected result is obtained and output to other devices that need to use it later.

[0046] By using the device based on the single-program multi-dataflow graph execution model of the present invention, it is possible to ensure that the output results are not affected by error information during the operation, and to perform parallel loading, independent operation, adjudication comparison and anomaly cleaning operations on multiple graphs, thereby achieving highly reliable execution of the entire process and improving the reliability and security of the system.

[0047] It should be noted that although the steps are described in a specific order above, it does not mean that the steps must be executed in the above specific order. In fact, some of these steps can be executed concurrently, or even in a different order, as long as the required function can be achieved.

[0048] This invention can be a system, method, and / or computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of the invention.

[0049] Computer-readable storage media can be tangible devices that hold and store instructions for use by an instruction execution device. Computer-readable storage media can include, for example, but not limited to, electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination thereof.

[0050] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or technical improvements to the embodiments in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A highly reliable multi-dataflow graph execution device, used to acquire and execute multiple dataflow graphs corresponding to a pre-generated program to be executed, characterized in that, The device comprises an agent distribution module, a reconfigurable computing array, a policy decision module, and a feedback control module, wherein: The agent distribution module is configured to store a pool of data flow graphs generated in advance for a current program execution, and to load multiple data flow graphs in the pool onto the reconfigurable array in parallel under the control of the feedback control module; and to schedule other data flow graphs of the same program as the data flow graph with a calculation error when the data flow graph has a calculation error; The reconfigurable computing array comprises multiple computing units PE that can be executed in parallel, and is configured to execute multiple heterogeneous data flow graphs corresponding to the same program to be executed in parallel; The policy decision module is configured to determine whether the calculation is correct according to the calculation result of a key node in each data flow graph, and to output the result when the calculation is correct, and to mark the data flow graph with a calculation error and feed back to the reconfigurable computing array and the feedback control module when the calculation result is incorrect; The feedback control module is configured to send the received feedback information to the agent distribution module to control the agent distribution module to schedule other data flow graphs of the same program as the data flow graph with a calculation error in the pool.

2. The high-reliability multi-data-flow graph execution apparatus of claim 1, wherein, The multiple heterogeneous data flow graphs of each program to be executed are generated and stored in the pool in the following manner: S1, obtaining a program to be executed, performing front-end analysis to complete lexical analysis and syntax analysis and generating an intermediate representation program; S2, constructing an initial data flow graph based on the dependency relationship in the intermediate representation program generated in step S1, wherein each node represents an operation and each edge represents a dependency relationship between data; S3, generating multiple new heterogeneous data flow graphs based on the initial data flow graph; S4, performing consistency checking on the multiple heterogeneous data flow graphs generated in step S3, and discarding the data flow graphs that do not pass the consistency checking; S5, storing the multiple heterogeneous data flow graphs that pass the consistency checking in the data flow graph pool.

3. The high-reliability multi-data-flow graph execution apparatus of claim 2, wherein, In step S3, the data flow graph nodes that can be replaced by operators are screened, and the screened nodes are replaced by operator equivalent replacement to generate new heterogeneous data flow graphs.

4. The high-reliability multi-data-flow graph execution apparatus of claim 3, wherein, In step S3, at least three heterogeneous data flow graphs are generated for one program.

5. The high-reliability multi-data-flow graph execution apparatus of claim 4, wherein, In step S4, the consistency of the multiple heterogeneous data flow graphs is checked in the following manner: Run the same program on any one of the executable arrays, and compare the output result with the expected result, and the data flow graph whose output result is consistent with the expected result passes the consistency checking.

6. The high-reliability multi-data-flow graph execution apparatus of claim 4, wherein, In step S5, when storing the multiple heterogeneous data flow graphs that pass the consistency checking in the pool, each data flow graph is labeled with a program label and a graph label, wherein different data flow graphs corresponding to the same program share the same program label, different data flow graphs corresponding to the same program have different graph labels, and data flow graphs of different programs use different program labels.

7. The high-reliability multi-data-flow graph execution apparatus of claim 6, wherein, The key nodes of the data flow graph are determined by a majority voting strategy.

8. A method for high reliable multi-dataflow graph execution based on the apparatus of any one of claims 1-7, characterized in that, The method comprises: T1, obtaining multiple heterogeneous data flow graphs of each program to be executed; T2, scheduling the multiple heterogeneous data flow graphs belonging to the same program to be executed in parallel for execution; T3, judging whether the calculation is correct according to the calculation result of the key node in each data flow graph, and outputting the result when the calculation is correct, and marking the data flow graph with calculation error and rescheduling other data flow graphs belonging to the same program as the data flow graph with calculation error for execution when the calculation is incorrect.

9. A computer-readable storage medium, characterized in that, A computer program is stored thereon, which can be executed by the processor to implement the steps of the method of claim 8.

10. An electronic device, comprising: Comprising: a memory storing a plurality of heterogeneous data flow graphs of a program to be executed which are generated in advance ； The apparatus of any one of claims 1-7, for executing the heterogeneous data flow graphs in the memory.

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