Redundant link protection potential error detection optimization method and device

By setting dual timers in the IEEE 802.1CB protocol to optimize the potential error detection function, the problem of the potential error detection function failing to provide timely alarms is solved, and real-time detection of link anomalies is achieved.

CN121691114APending Publication Date: 2026-03-17KUNGAO XINXIN MICROELECTRONICS (JIANGSU) CO LTD
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Patent Information

Application Number
CN202511918643.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-18
Publication Date
2026-03-17

AI Technical Summary

Technical Problem

The existing IEEE 802.1CB protocol's potential error detection function may fail to trigger alarms in a timely manner under certain circumstances, resulting in delays in link anomaly detection.

Method used

By setting up dual timers to periodically trigger the LatentErrorReset and LatentErrorTest functions respectively, the algorithm process is optimized, enabling immediate exception alerts even under unfavorable timing conditions.

Benefits of technology

In the event of a link anomaly, the system can immediately alert the user via an interruption alarm, avoiding delayed alarms caused by algorithm defects and improving the timeliness of detection.

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Abstract

The invention discloses a redundant link protection potential error detection optimization method and a redundant link protection potential error detection optimization device, according to the method, by optimizing a LatentErrorTest and an algorithm function of a LatentErrorReset in an 802.1 CB protocol, an abnormal alarm can still be completed immediately under the condition that the time arrangement of the LatentErrorTest and the LatentErrorReset is not good, and the abnormal alarm can be completed without two LatentErrorTest periods. When 802.1 CB redundancy protection equipment is used, through algorithm optimization of the invention, when link abnormity is generated under some special conditions, a user can be prompted to complete link abnormity detection by interrupting an alarm to a CPU immediately, so that delayed alarm caused by previous algorithm defects is avoided.
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Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a method and apparatus for optimizing the detection of potential errors in redundant link protection. Background Technology

[0002] Time-sensitive reliability, defined by the IEEE 802.1CB protocol (frame duplication and elimination), supports seamless data redundancy. It detects and mitigates problems caused by Cyclic Redundancy Check (CRC) errors, disconnections, and loose connections. Time-critical data frames are extended to include a sequence number and duplicated each frame following a separate path in the network. At any bridge or merging point in the network, when these separate paths converge again, duplicate frames are eliminated from the data stream, allowing applications to receive data frames without loss. Potential error detection provides alerts when the protection path malfunctions, assisting users in timely detection and restoration of link problems. Potential error detection operates based on the assumption that in a functional composite stream entering the current system using N paths, each packet passing through the basic recovery function will discard N-1 packets. When this assumption is violated, potential error detection will issue an alert.

[0003] The potential error detection function is performed by two periodic functions. The first, `LatentErrorTest`, checks the number of packets that pass through and are dropped. If the difference between these counters exceeds a set threshold, a potential error is reported. The second periodic function, `LatentErrorReset`, resets the variables used by the first function, so that occasional random packet loss does not accumulate indefinitely. These functions are driven by timers, not by packet reception or transmission. The current algorithm design has a quantization error. If a `LatentErrorTest` should have detected a data anomaly, but a `LatentErrorReset` has been executed beforehand, the current `LatentErrorTest` will fail to detect the anomaly. The anomaly will only be detected and an alarm triggered in the next cycle or the cycle after that. This algorithmic flaw causes alarms to not be triggered promptly. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides an optimized method and apparatus for detecting potential errors in redundant link protection. It proposes an optimized algorithm for LatentErrorTest and LatentErrorReset in the 802.1CB protocol, thereby enabling immediate error alarms even when the timing of LatentErrorTest and LatentErrorReset is unfortunate, instead of requiring two LatentErrorTest cycles to complete the error alarm.

[0005] To achieve the above objectives, the technical solution of this invention provides an optimized method for detecting potential errors in redundant link protection. This method uses dual timers to periodically trigger the LatentErrorReset function and the LatentErrorTest function. When periodically triggering the LatentErrorReset function, the following steps are executed: S11: If the chip detects a redundant link protection entry and enables the potential error detection function, the LatentErrorTest function is executed once to determine if the alarm event triggering conditions are met. If so, an interrupt alarm is directly triggered; otherwise, proceed to step S12. S12: Record the current first difference value diffB and set the reset flag ResetFlag to 1. The first difference value diffB is the difference between the CurBaseDifference updated when the previous LatentErrorReset function was executed and the current LatentErrorReset function. The difference between CurBaseDifference during the function; S13: Continue to execute the remaining logic of the LatentErrorReset function; When the LatentErrorTest function is periodically triggered, the following steps are executed: S21: If the chip scans a redundant link protection entry and enables the potential error detection function, first determine whether the alarm event triggering condition is met. If yes, directly trigger the interrupt alarm and set ResetFlag to 0. If no, proceed to step S22; S22: Further check whether ResetFlag is 1. If it is 1, proceed to step S23. Otherwise, end the current process; S23: Set ResetFlag to 0, and add the current second difference value diffA to the first difference value diffB recorded when the LatentErrorReset function was triggered last time to obtain the third difference value diffC. Then, based on the third difference value diffC, determine whether the alarm triggering condition is met. The second difference value diffA is the value of the previous LatentErrorReset function. The difference between the CurBaseDifference updated when the LatentErrorTest function is triggered and the CurBaseDifference when the LatentErrorTest function is triggered.

[0006] Furthermore, in step S11, when executing the LatentErrorTest function, the condition for triggering an alarm event is determined by judging whether the first difference diffB reaches the alarm threshold.

[0007] Furthermore, in step S21, the condition for triggering an alarm event is determined by judging whether the second difference value diffA reaches the alarm threshold; and in step S23, the condition for triggering an alarm event is determined by judging whether the third difference value diffC reaches the alarm threshold.

[0008] Furthermore, CurBaseDifference = number of forwarded packets * backup path – number of redundant dropped packets.

[0009] Furthermore, in step S13, the remaining logic of the LatentErrorReset function continues to be executed, including updating the CurBaseDifference value and counting the corresponding number of resets.

[0010] The technical solution of this invention also provides a redundant link protection potential error detection optimization device. The device includes dual timers, a potential error reset (LatentErrorReset) function module, and a potential error test (LatentErrorTest) function module. The dual timers are used to periodically trigger the LatentErrorReset function and the LatentErrorTest function, respectively. The LatentErrorReset function module performs the following steps when periodically triggering the LatentErrorReset function: S11: If the chip scans a redundant link protection entry and enables the potential error detection function, the LatentErrorTest function is executed once to determine if the alarm event triggering condition is met. If so, an interrupt alarm is directly triggered; otherwise, proceed to step S12; S12: Record the current first difference value (diffB) and set the reset flag (ResetFlag) to 1. The first difference value (diffB) is the difference between the CurBaseDifference updated when the last LatentErrorReset function was executed and the current LatentErrorReset function. The difference between CurBaseDifference during the function; S13: Continue executing the remaining logic of the LatentErrorReset function; The LatentErrorTest function module is used to perform the following steps when the LatentErrorTest function is periodically triggered: S21: If the chip scans a redundant link protection entry and enables the potential error detection function, it first determines whether the alarm event triggering condition is met. If yes, it directly triggers an interrupt alarm and sets ResetFlag to 0. If no, it proceeds to step S22; S22: Further check whether ResetFlag is 1. If it is 1, it proceeds to step S23. Otherwise, it ends the current process; S23: Set ResetFlag to 0, and add the current second difference value diffA to the first difference value diffB recorded when the LatentErrorReset function was triggered last time to obtain the third difference value diffC. Then, based on the third difference value diffC, it determines whether the alarm triggering condition is met. The second difference value diffA is the result of executing the last LatentErrorReset function. The difference between the CurBaseDifference updated when the LatentErrorTest function is triggered and the CurBaseDifference when the LatentErrorTest function is triggered.

[0011] Furthermore, in step S11, when executing the LatentErrorTest function, the condition for triggering an alarm event is determined by judging whether the first difference diffB reaches the alarm threshold.

[0012] Furthermore, in step S21, the condition for triggering an alarm event is determined by judging whether the second difference value diffA reaches the alarm threshold; and in step S23, the condition for triggering an alarm event is determined by judging whether the third difference value diffC reaches the alarm threshold.

[0013] Furthermore, CurBaseDifference = number of forwarded packets * backup path – number of redundant dropped packets.

[0014] Furthermore, in step S13, the remaining logic of the LatentErrorReset function continues to be executed, including updating the CurBaseDifference value and counting the corresponding number of resets. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the LatentErrorReset processing flow of the switching chip of the present invention;

[0017] Figure 2 This is a schematic diagram of the LatentErrorTest processing flow of the switching chip of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] In this invention, the chip is equipped with two timers that periodically scan the redundant link protection entries that enable potential error detection. One timer implements the LatentErrorReset function on 802.1CB, and the other implements the LatentErrorTest function.

[0020] The implementation process of LatentErrorReset is as follows: When the chip scans for the redundant link protection entry and enables the potential error detection function (which refers to the function implemented by combining LatentErrorReset and LatentErrorTest), it first executes the LatentErrorTest function. The LatentErrorTest function checks if the interrupt alarm conditions are met. If not, it records the calculated diffB in LatentErrorTest into a register, sets the ResetFlag register to 1, and calculates curBaseDifference (number of forwarded packets * backup path – number of redundant dropped packets) according to the LatentErrorReset function on 802.1CB, and counts the corresponding number of resets. After completing the above steps, it proceeds to process the next redundant link protection entry. Here, diffB is the difference between the curBaseDifference updated in the last LatentErrorReset execution (the current base difference) and the current (number of forwarded packets * backup path – number of redundant dropped packets) (i.e., the current curBaseDifference).

[0021] The LatentErrorTest implementation process is as follows: When the chip scans the redundant link protection entry and enables the potential error detection function, it calculates the difference (diffA) between the updated curBaseDifference in LatentErrorReset and the current (number of forwarded packets * backup path – number of redundant discarded packets) (i.e., the current curBaseDifference). It then determines whether the current diffA meets the alarm triggering condition. If it does, an interrupt alarm is triggered directly, and ResetFlag is set to 0. If not, it checks if ResetFlag is 1. If it is 1, it first sets ResetFlag to 0, then reads the diffB recorded in the register from the previous LatentErrorReset, and adds diffB to diffA to obtain diffC. It then checks whether diffC meets the alarm triggering condition. If it does, an alarm is triggered; otherwise, the current processing flow ends. After completing the above steps, the next redundant link protection entry is processed.

[0022] Where diffA, diffB, and diffC are all signed integers.

[0023] like Figure 1As shown, it illustrates the LatentErrorReset processing flow in the switching chip. The chip periodically executes the LatentErrorReset processing flow. First, the LatentErrorTest process is executed once. It determines whether the current difference value diffB meets the alarm triggering condition (reaching the alarm threshold). If it does, an interrupt alarm is triggered directly. If it does not meet the condition, the current difference value diffB is recorded in the corresponding chip register, and the chip register ResetFlag is set to 1. Then, the remaining LatentErrorReset logic is executed according to the algorithm in the 802.1CB protocol, that is, calculating and updating the CurBaseDifference value (number of forwarded packets * backup path – number of redundant discarded packets) and counting the corresponding reset counts.

[0024] like Figure 2 The diagram illustrates the LatentErrorTest processing flow within the chip. The chip executes the LatentErrorTest processing flow periodically. First, it calculates the difference value diffA according to the algorithm in the 802.1CB protocol. It then determines whether the current diffA meets the alarm triggering condition (reaching the alarm threshold). If it does, an interrupt alarm is triggered directly, and ResetFlag is set to 0. If not, it checks if ResetFlag is 1. If it is 1, it first sets ResetFlag to 0, reads diffB recorded in the previous LatentErrorReset, and adds diffB to diffA to obtain diffC. It then checks whether diffC meets the alarm triggering condition. If it does, an alarm is triggered; otherwise, the current processing flow ends.

[0025] When using 802.1CB redundant protection devices, by using the algorithm optimization of this invention, in the event of link anomalies under certain special circumstances, an interrupt alarm can be immediately sent to the CPU to prompt the user to complete the link anomaly detection, thereby avoiding delayed alarms caused by previous algorithm defects.

[0026] In an embodiment of the present invention, a method for optimizing the detection of potential errors in redundant link protection is provided. This method uses dual timers to periodically trigger the LatentErrorReset function and the LatentErrorTest function, respectively. When the LatentErrorReset function is periodically triggered, the following steps are performed: S11: If the chip detects a redundant link protection entry and enables the potential error detection function, the LatentErrorTest function is first executed to determine if the conditions for triggering an alarm event are met. If so, an interrupt alarm is directly triggered; otherwise, proceed to step S12. S12: The current first difference value (diffB) is recorded, and the reset flag (ResetFlag) is set to 1. The first difference value (diffB) is the difference between the CurBaseDifference updated when the previous LatentErrorReset function was executed and the current LatentErrorReset function. The difference between CurBaseDifference during the function; S13: Continue to execute the remaining logic of the LatentErrorReset function; When the LatentErrorTest function is periodically triggered, the following steps are executed: S21: If the chip scans a redundant link protection entry and enables the potential error detection function, first determine whether the alarm event triggering condition is met. If yes, directly trigger the interrupt alarm and set ResetFlag to 0. If no, proceed to step S22; S22: Further check whether ResetFlag is 1. If it is 1, proceed to step S23. Otherwise, end the current process; S23: Set ResetFlag to 0, and add the current second difference value diffA to the first difference value diffB recorded when the LatentErrorReset function was triggered last time to obtain the third difference value diffC. Then, based on the third difference value diffC, determine whether the alarm triggering condition is met. The second difference value diffA is the value of the previous LatentErrorReset function. The difference between the CurBaseDifference updated when the LatentErrorTest function is triggered and the CurBaseDifference when the LatentErrorTest function is triggered.

[0027] Furthermore, in step S11, when executing the LatentErrorTest function, the condition for triggering an alarm event is determined by judging whether the first difference diffB reaches the alarm threshold.

[0028] Furthermore, in step S21, the condition for triggering an alarm event is determined by judging whether the second difference value diffA reaches the alarm threshold; and in step S23, the condition for triggering an alarm event is determined by judging whether the third difference value diffC reaches the alarm threshold.

[0029] Furthermore, CurBaseDifference = number of forwarded packets * backup path – number of redundant dropped packets.

[0030] Furthermore, in step S13, the remaining logic of the LatentErrorReset function continues to be executed, including updating the CurBaseDifference value and counting the corresponding number of resets.

[0031] In another embodiment of the present invention, a redundant link protection potential error detection optimization device is also provided. The device is equipped with dual timers, a potential error reset (LatentErrorReset) function module, and a potential error test (LatentErrorTest) function module. The dual timers are used to periodically trigger the LatentErrorReset function and the LatentErrorTest function, respectively. The LatentErrorReset function module is used to perform the following steps when the LatentErrorReset function is periodically triggered: S11: If the chip scans a redundant link protection entry and enables the potential error detection function, the LatentErrorTest function is first executed once to determine whether the alarm event triggering condition is met. If so, an interrupt alarm is directly triggered; otherwise, proceed to step S12; S12: Record the current first difference value diffB and set the reset flag ResetFlag to 1. The first difference value diffB is the difference between the CurBaseDifference updated when the last LatentErrorReset function was executed and the current LatentErrorReset function. The difference between CurBaseDifference during the function; S13: Continue executing the remaining logic of the LatentErrorReset function; The LatentErrorTest function module is used to perform the following steps when the LatentErrorTest function is periodically triggered: S21: If the chip scans a redundant link protection entry and enables the potential error detection function, it first determines whether the alarm event triggering condition is met. If yes, it directly triggers an interrupt alarm and sets ResetFlag to 0. If no, it proceeds to step S22; S22: Further check whether ResetFlag is 1. If it is 1, it proceeds to step S23. Otherwise, it ends the current process; S23: Set ResetFlag to 0, and add the current second difference value diffA to the first difference value diffB recorded when the LatentErrorReset function was triggered last time to obtain the third difference value diffC. Then, based on the third difference value diffC, it determines whether the alarm triggering condition is met. The second difference value diffA is the result of executing the last LatentErrorReset function. The difference between the CurBaseDifference updated when the LatentErrorTest function is triggered and the CurBaseDifference when the LatentErrorTest function is triggered.

[0032] Furthermore, in step S11, when executing the LatentErrorTest function, the condition for triggering an alarm event is determined by judging whether the first difference diffB reaches the alarm threshold.

[0033] Furthermore, in step S21, the condition for triggering an alarm event is determined by judging whether the second difference value diffA reaches the alarm threshold; and in step S23, the condition for triggering an alarm event is determined by judging whether the third difference value diffC reaches the alarm threshold.

[0034] Furthermore, CurBaseDifference = number of forwarded packets * backup path – number of redundant dropped packets.

[0035] Furthermore, in step S13, the remaining logic of the LatentErrorReset function continues to be executed, including updating the CurBaseDifference value and counting the corresponding number of resets.

[0036] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A method for optimizing potential error detection in redundant link protection, characterized in that, By setting two timers to periodically trigger the LatentErrorReset function and the LatentErrorTest function respectively, wherein, When the LatentErrorReset function is periodically triggered, the following steps are performed: S11: If the chip scans a redundant link protection entry and the latent error detection function is enabled, first perform the LatentErrorTest function once to determine whether the triggering alarm event condition is met, if yes, directly trigger an interrupt alarm, otherwise proceed to step S12; S12: Record the current first difference diffB and set the reset flag ResetFlag to 1, wherein the first difference diffB is the difference between the CurBaseDifference updated when the last LatentErrorReset function is performed and the CurBaseDifference when the current LatentErrorReset function is triggered; S13: Continue to perform the remaining logic of the LatentErrorReset function; When the LatentErrorTest function is periodically triggered, the following steps are performed: S21: If the chip scans a redundant link protection entry and the latent error detection function is enabled, first determine whether the triggering alarm event condition is met, if yes, directly trigger an interrupt alarm and set ResetFlag to 0, if not, proceed to step S22; S22: Further check whether ResetFlag is 1, if yes, proceed to step S23, otherwise end the current process; S23: Set ResetFlag to 0 and add the current second difference diffA and the first difference diffB recorded when the last LatentErrorReset function is triggered to obtain a third difference diffC, and then determine whether the triggering alarm condition is met based on the third difference diffC, wherein the second difference diffA is the difference between the CurBaseDifference updated when the last LatentErrorReset function is performed and the CurBaseDifference when the current LatentErrorTest function is triggered.

2. The method of claim 1, wherein, In step S11, when the LatentErrorTest function is performed, whether the triggering alarm event condition is met is determined by judging whether the first difference diffB reaches an alarm threshold.

3. The method of claim 2, wherein, In step S21, whether the triggering alarm event condition is met is determined by judging whether the second difference diffA reaches an alarm threshold; and In step S23, whether the triggering alarm event condition is met is determined by judging whether the third difference diffC reaches an alarm threshold.

4. The method of claim 3, wherein, CurBaseDifference = number of forwarded packets * backup path - number of redundant discarded packets.

5. The method of claim 4, wherein, In step S13, the remaining logic of the LatentErrorReset function continues to include updating the CurBaseDifference value and counting the corresponding reset number.

6. A redundant link protection potential error detection optimization apparatus characterized by, The device is provided with a double timer, a LatentErrorReset function module and a LatentErrorTest function module, the double timer is used to periodically trigger the LatentErrorReset function and the LatentErrorTest function respectively, wherein, The LatentErrorReset function module is used to execute the following steps when the LatentErrorReset function is periodically triggered: S11: If the chip scans a redundant link protection entry and the latent error detection function is enabled, first execute the LatentErrorTest function once to determine whether the triggering alarm event condition is met, if yes, directly trigger the interrupt alarm, otherwise proceed to step S12; S12: Record the current first difference diffB, and set the reset flag ResetFlag to 1, wherein the first difference diffB is the difference between the CurBaseDifference updated when the last LatentErrorReset function is executed and the CurBaseDifference when the current LatentErrorReset function is triggered; S13: Continue to execute the remaining logic of the LatentErrorReset function; The LatentErrorTest function module is used to execute the following steps when the LatentErrorTest function is periodically triggered: S21: If the chip scans a redundant link protection entry and the latent error detection function is enabled, first determine whether the triggering alarm event condition is met, if yes, directly trigger the interrupt alarm and set ResetFlag to 0, if not, proceed to step S22; S22: Further check whether ResetFlag is 1, if yes, proceed to step S23, otherwise end the current process; S23: Set ResetFlag to 0, and add the current second difference diffA and the first difference diffB recorded when the last LatentErrorReset function is triggered to obtain a third difference diffC, and then determine whether the triggering alarm condition is met based on the third difference diffC, wherein the second difference diffA is the difference between the CurBaseDifference updated when the last LatentErrorReset function is executed and the CurBaseDifference when the current LatentErrorTest function is triggered.

7. The apparatus of claim 6, wherein, In step S11, when the LatentErrorTest function is executed, whether the triggering alarm event condition is met is determined by judging whether the first difference diffB reaches the alarm threshold.

8. The apparatus of claim 7, wherein, In step S21, it is judged whether the triggering condition of the alarm event is met by judging whether the second difference diffA reaches the alarm threshold value. In step S23, it is judged whether the triggering condition of the alarm event is met by judging whether the third difference diffC reaches the alarm threshold value.

9. The apparatus of claim 8, wherein, CurBaseDifference = number of forwarded packets * backup path - number of redundant discarded packets.

10. The apparatus of claim 9, wherein, In step S13, the remaining logic of the LatentErrorReset function includes updating the CurBaseDifference value and counting the corresponding reset times.