High-speed non-2-power point FFT device based on small SPRAM

Abstract

According to the high-speed non-2-power point FFT device based on the small SPRAM, only the word SPRAM is used as a data buffer area, and consumption of storage resources is low. According to the method, a mapping mode of conflict-free access to the SPRAM is designed, three block mapping modes are given, and the data throughput rate is increased; according to the method, the calculation sequence of butterfly operation of each dimension and each level is optimized, high-order base butterfly operation is adopted, low-order base butterfly operation is processed in parallel, and the calculation time is shortened. The method is compatible with various points, and can be applied to LTE communication and broadcasting systems.

Description

Technical Field

[0001] This invention relates to the field of digital signal processing, and in particular to a high-speed Fast Fourier Transform (FFT) device based on a small number of single-port random access memory (SPRAM) compatible with various non-power-2 point numbers. Background Technology

[0002] FFT is an indispensable key technology in modern communication systems, playing an important role in fields such as communication, broadcasting, data compression, and image processing.

[0003] Typically, FFT-based systems employ various point counts. Power-2 point FFTs are relatively mature and easy to implement, while non-power-2 point FFTs are significantly more difficult to implement. Because SPRAM offers advantages such as low power consumption and small area, SPRAM-based non-power-2 point FFT devices are the preferred solution. However, in recent years, high-speed SPRAM-based FFT devices have required more... The word SPRAM serves as a data buffer, in which, This refers to the number of FFT points. In the paper by Yifan Guo, Zhijun Wang, Qinzhi Hong, Hanqing Luo, Xin Qiu, and Liping Liang (A 60-Mode High-Throughput Parallel-Processing FFT Processor for 5G / 4G Applications [J]. IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 31, no. 2, pp. 219–232, Feb. 2023.), the FFT device supports 60 different point counts, which can meet the needs of 4G / 5G small cell base stations, but requires the use of… The FFT device supports 61 point counts, but also requires the use of SPRAM. In the paper by Chen Yang, Junfeng Wu, Siwei Xiang, Liyan Liang, and Li Geng (A High-Throughput and Flexible Architecture Based on a Reconfigurable Mixed-RadixFFT With Twiddle Factor Compression and Conflict-Free Access [J]. IEEE Trans.Very Large Scale Integr. (VLSI) Syst., vol. 31, no. 10, pp. 1472–1485, Oct. 2023.), the FFT device supports 61 point counts, but also requires the use of SPRAM. SPRAM. Excessive SPRAM consumption leads to high device costs and high power consumption, which has a particularly significant impact on receiving terminals. Summary of the Invention

[0004] To address the problems of existing high-speed FFT devices based on SPRAM, this invention provides a method based on... A high-speed FFT device for word SPRAM that supports non-power-2 point numbers and is compatible with multiple point numbers.

[0005] like Figure 2 As shown, the high-speed non-power-2 point-count FFT device based on small SPRAM mainly consists of... It consists of a block SPRAM, an input commutator, an output commutator, an interface combiner, an interface splitter, a butterfly combiner, a butterfly splitter, an adjustment unit, a butterfly unit, a rotation factor generator, and a rotation factor multiplier.

[0006] This invention designs a conflict-free SPRAM access mapping method and optimizes the computation order of butterfly operations at each dimension and level. This invention presents three block mapping methods, achieving high data throughput; it employs high-order basis butterfly operations and parallel processes low-order basis butterfly operations, resulting in fast computation speed; and it utilizes... Using SPRAM as a data buffer consumes relatively few storage resources. This invention has advantages such as fast processing speed, low cost, and good compatibility, and can be applied to LTE communication and broadcasting systems.

[0007] The advantages and methods of this invention can be further understood through the following detailed description of the invention and the accompanying drawings. Attached Figure Description

[0008] Figure 1 It is the processing procedure of PRRC-CRT and CRT-PRRC DIF FFT;

[0009] Figure 2 This is a functional block diagram of a high-speed non-power-2 point FFT device based on small SPRAM;

[0010] Figure 3 Is when A schematic diagram of the block mapping method for all sequences;

[0011] Figure 4 Is when A schematic diagram of the block mapping method for all sequences;

[0012] Figure 5 It is a calculation indivual Before the point DFT Pseudocode for higher-order basis butterfly operations;

[0013] Figure 6 Parallel computing indivual Pseudocode for the final-order low-basis butterfly operation of point DFT;

[0014] Figure 7 It is a calculation indivual Before the point DFT Pseudocode for higher-order basis butterfly operations;

[0015] Figure 8 Parallel computing indivual Pseudocode for the final-order low-basis butterfly operation of point DFT. Detailed Implementation

[0016] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby providing a clearer and more explicit definition of the scope of protection of the present invention.

[0017] Point DFT can be defined as

[0018] (1)

[0019] in, , For rotation factor, , and These are samples of the input and output sequences, respectively. and These are their indices.

[0020] LTE system involves The DFT with a factor of 9. Without loss of generality, for

[0021] (2)

[0022] The Prime Factor Algorithm (PFA) transforms a one-dimensional large DFT into a two-dimensional small DFT. Dimensions need to be calculated Second-rate Point DFT, where, , , , , , Goode's proposed index mapping is based on the Ruritanian Correspondence (RC) and the Chinese Remainder Theorem (CRT). Input and output index mappings can be based on RC and CRT respectively, or CRT and RC respectively.

[0023] The Cooley-Tukey Algorithm (CTA) can further... Point DFT decomposition into butterfly operation, in the first stage Level secondary base - Butterfly operation yields a sequence ,in, , Co-address CTA enables all Shared storage space, using the same index ,

[0024] (3)

[0025] in, Indicates rounding down. Modulo operation is represented. , This refers to the number of SPRAM blocks. In this invention, The same-address CTA can be input in prime-reversed (PR) order and output in natural order, or input in natural order and output in PR order.

[0026] Figure 1The processing procedures of two hybrid-basis FFT algorithms, namely nested PFA and Decimation-in-Frequency (DIF) type co-address CTA, are presented. One algorithm is PRRC-CRT DIF FFT, where the input and output index mappings are based on PRRC and CRT, respectively; the other is CRT-PRRC DIF FFT, where the two index mappings are based on CRT and PRRC, respectively. Both FFT algorithms first process the input sequence... Rearranged as Then calculate sequentially. , , Finally Rearranged into the output sequence ,in,

[0027] (4)

[0028] (5)

[0029] In equations (3), (4) and (5), and and The relationship is

[0030] (6)

[0031] (7)

[0032] in, yes mold The number theory reciprocal, that is , yes PR version

[0033] (8)

[0034] (9)

[0035] .

[0036] Besides the base of the final-level butterfly operation, In addition, the basis of other levels of butterfly operations is ,in,

[0037] (10)

[0038] (11)

[0039] To improve processing speed, higher-order bases should be used to reduce the number of stages. That is, while satisfying... and Under the premise, It should be as large as possible. Since Then the basis of the final-level butterfly operation is The bases for butterfly operations are 4, 8, 16, 3, or 9, while the bases for other levels of butterfly operations are 1. or ,Right now and .

[0040] All butterfly operations in each level are equally divided. Groups, each group consists of It consists of butterfly operations with the same rotation factor, where...

[0041] (12)

[0042] (13)

[0043] Indicates rounding up. , For PRRC-CRT DIF FFT, the input and output of the butterfly operation are in PR order and natural order, respectively. For CRT-PRRC DIF FFT, the input and output of the butterfly operation are in natural order and PR order, respectively. The formula is as follows:

[0044] (14)

[0045] in, , and All Metavector, This indicates that the vectors are arranged in PR order. elements, Represents a small-point FFT in vector form. This represents the Hadamard product, where elements... For rotation factor,

[0046] (15)

[0047] , , , .Depend on Figure 1 It can be seen that the elements Corresponding samples Besides elements and Corresponding samples and In addition, other elements Corresponding samples Local index Corresponding global index .

[0048] Figure 2 This is a functional block diagram of a high-speed non-power-2 point FFT device based on small SPRAM. It mainly consists of... It consists of a block SPRAM, an input commutator, an output commutator, an interface combiner, an interface splitter, a butterfly combiner, a butterfly splitter, an adjustment unit, a butterfly unit, a rotation factor generator, and a rotation factor multiplier.

[0049] The butterfly unit computes the small-point FFT, the twiddle factor generator provides the twiddle factor, and the twiddle factor multiplier performs the multiplication operation between the butterfly unit's output and the twiddle factor. These three components together form the processing unit, which processes data in parallel. individual bases - Butterfly operations, where, The butterfly cell supports 8-radix-2, 4-radix-4, 2-radix-8, 1-radix-16, 3-radix-3, or 1-radix-9 FFT.

[0050] The FFT device has three operating states: Input / Output (IO), Compute (COM), and Tunnel (TUN). Regardless of the operating state, the FFT device reads and writes SPRAM during odd and even clock cycles, respectively.

[0051] When the FFT device is in the I / O state, odd-numbered clock cycles are read. Block SPRAM and output commutator The word data is sent to the interface splitter, and the interface splitter outputs data every clock cycle. Word data, input to the interface combiner per clock cycle Word data, output in even-numbered clock cycles Word data is written to the same address via the input commutator. Block SPRAM, where, .

[0052] When the FFT device is in the TUN state, odd-numbered clock cycles are read. Block SPRAM and output commutator to connect the same address The data stored in each unit is sent to the adjustment unit, and the adjustment unit performs cyclic shifting. The data is written to the input commutator at the same address after an even-numbered clock cycle. Block SPRAM.

[0053] When the FFT device is in COM state, odd-numbered clock cycles are read. Block SPRAM and output commutator The data required for each butterfly operation is sent to the butterfly splitter. Each butterfly splitter... Output per clock cycle The data is then sent to the processing unit, and the processing unit processes each... Completed in one clock cycle Each butterfly operation, each butterfly combiner Input per clock cycle Word data, output in even-numbered clock cycles Word data is written to the same address via the input commutator. Block SPRAM.

[0054] This means that the twitch factors involved in the final-level butterfly operation are all 1, and the twitch factor generation unit is easily provided. For other levels of butterfly operations, because... Therefore, each rotation factor generating unit Provided per clock cycle One rotation factor. Specifically, when At that time, the rotation factor generation unit only needs to provide 15 rotation factors within at least 18 clock cycles; when At this time, the spin factor generation unit only needs to provide 8 spin factors within at least 16 clock cycles. Therefore, it can be seen that a lookup table can be used to implement the spin factor generation unit.

[0055] The depth of each SPRAM block is The block number and cell address are respectively and ,in, , Enter index and output index First, it is mapped to an index as shown in equation (3). Then it is mapped to the first Address of block SPRAM Therefore, SPRAM mapping is divided into two parts: block mapping and address mapping.

[0056] The address mapping method is

[0057] (16)

[0058] There are three block mapping methods: N, I, and II. Block mapping method N is...

[0059] (17)

[0060] Block mapping method I is

[0061] (18)

[0062] Block mapping mode II is

[0063] (19)

[0064] When the FFT device is in I / O state, it can simultaneously input and output in each clock cycle. Samples, consecutive Each input or output sample must be stored in a different block of SPRAM. When the index mapping mode and block mapping mode are CRT and I respectively, The maximum value is When the index mapping mode and block mapping mode are PR RC and II respectively, To ensure compatibility with all DFT points, all should be taken. The minimum value.

[0065] Because of the block mapping method used to access SPRAM in I / O state It is I or II, not Therefore, the block mapping method must be changed when entering and exiting COM state. Performing first-level butterfly operations in COM state requires reading multiple data points from SPRAM in odd-numbered clock cycles, whose index 'e' bits are sometimes the same and sometimes different. If all the different bits participate... If the expression does not generate an SPRAM access conflict, then the first-level butterfly operation reads and writes to SPRAM using block mapping. and This achieves seamless transition between IO and COM states; otherwise, a TUN state must be inserted between them, incurring additional time to change the block mapping method. Adjusted to Soon to be located at the same address Data cyclic movement Block SPRAM. Similarly, performing the final-level butterfly operation requires writing multiple data entries to the SPRAM in even-numbered clock cycles. This is if all the distinct bits of their indices are involved. The expression then uses the final-level butterfly operation to read and write SPRAM respectively. and Otherwise, the block mapping method must be changed from TUN state. Adjusted to Soon to be at the same address Data cyclic movement Block SPRAM. In COM state, this invention first calculates the first part of the second-dimensional FFT. The process involves performing a first-level butterfly operation, then calculating the first-dimensional FFT, and finally performing a final-level butterfly operation on the second-dimensional FFT. The aim is to avoid inserting TUN states as much as possible, thereby saving processing time.

[0066] To improve throughput, this invention alternates between PRRC-CRT and CRT-PRRC DIF FFT on consecutive FFT blocks with the same number of points, allowing for the output of samples from the current block. Simultaneously input the next sample block And for different point numbers Use the appropriate block mapping method with the index mapping method, such as Figure 3 and Figure 4 As shown.

[0067] like Figure 3 As shown, when At that time, for PRRC-CRT DIF FFT, the sequence The block mapping method is adjusted from II to N in the TUN state, sequence Using block mapping method I, for CRT-PRRC DIF FFT, the sequence Using block mapping method I, sequence The block mapping method is adjusted from N to II in the TUN state, and other sequences All use block mapping method N, where, , .

[0068] like Figure 4 As shown, when At that time, for PRRC-CRT DIF FFT, the sequence The block mapping method is adjusted from II to N in the TUN state, sequence Using block mapping method I, for CRT-PRRC DIF FFT, the sequence The block mapping method is adjusted from I to N in the TUN state, sequence Using block mapping method II, other sequences All use block mapping method N, where, .

[0069] for ,when When, in equation (3) satisfy

[0070] (20)

[0071] in, , , For equations (3) and (20), when other variables are constant, the variable... All indexes determined Mapped to Each of the following is a different SPRAM block number. Calculate... indivual Before the point DFT The pseudocode for higher-order basis butterfly operations is as follows: Figure 5 As shown.

[0072] for In equation (3) satisfy

[0073] ,(twenty one)

[0074] in, , , For equations (3) and (21), when other variables are constant, the variable... and All indexes determined Mapped to Different SPRAM block numbers. Parallel computing. indivual The pseudocode for the final-order lower-order basis butterfly operation of the point DFT is as follows: Figure 6 As shown.

[0075] The index is

[0076] ,(twenty two)

[0077] in, , , .when hour,

[0078] ,(twenty three)

[0079] in, , , For the above two equations, when other variables are constant, the variable... and All indexes determined Mapped to Each of the following is a different SPRAM block number. Calculate... indivual Before the point DFT The pseudocode for higher-order basis butterfly operations is as follows: Figure 7 As shown.

[0080] for In equation (22) satisfy

[0081] ,(twenty four)

[0082] in, , , For equations (22) and (24), when other variables are constant, the variable... , and All indexes determined Mapped to Different SPRAM block numbers. Parallel computing. indivual The pseudocode for the final-order lower-order basis butterfly operation of the point DFT is as follows: Figure 8 As shown.

[0083] Figure 5 and Figure 7 The pseudocode in the code processes the butterfly operations with the same twitch factor first, and then processes the next group. This maximizes the time interval between generating each group of twitch factors.

[0084] Taking the 82944-point DFT used in the 5G LTE system as an example, , The number of clock cycles during which the COM state lasts is less than 60%. It is evident that the computational speed of this invention is fast. This invention uses 18 SPRAM blocks with a depth of 4608, totaling... Word memory, characterized by low storage resource consumption. The 5G LTE system also employs 2048, 4096, 12288, and 24576-point DFTs, which can be implemented using 16 of the 18 SPRAM blocks. Therefore, this invention is compatible with multiple point counts.

[0085] The above description is merely one specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be conceived by those skilled in the art within the technical scope disclosed in the present invention without creative effort should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A high-speed non-power-2 point FFT device based on small SPRAM, which alternately performs PRRC-CRT and CRT-PRRC DIF FFT on consecutive FFT blocks with the same number of points, allowing for the output of samples of the current block. Simultaneously input the next sample block In the Vidi Level secondary base - Butterfly operation yields a sequence Except for the base of the final-level butterfly operation, In addition, the basis of other levels of butterfly operations is ,in, PR stands for reciprocal prime, RC stands for Ruritanian Correspondence, CRT stands for Chinese Remainder Theorem, and DIF stands for decimation of frequency. , , , , , , , , , , , The device is characterized in that it comprises the following components: The system includes a block SPRAM, input commutator, output commutator, interface combiner, interface splitter, butterfly combiner, butterfly splitter, adjustment unit, butterfly unit, rotation factor generator, and rotation factor multiplier. ; The butterfly unit computes the small-point FFT, the twiddle factor generator provides the twiddle factor, and the twiddle factor multiplier performs the multiplication operation between the output of the butterfly unit and the twiddle factor. These three components together form the processing unit, which completes the butterfly operation. The processing unit performs parallel processing. individual bases - Butterfly operations, where, , Indicates rounding down; When the FFT device is in the I / O state, odd-numbered clock cycles are read. Block SPRAM and output commutator The word data is sent to the interface splitter, and the interface splitter outputs data every clock cycle. Word data, input to the interface combiner per clock cycle Word data, output in even-numbered clock cycles Word data is written to the same address via the input commutator. Block SPRAM, where, ; When the FFT device is in the TUN state, odd-numbered clock cycles are read. Block SPRAM and output commutator to connect the same address The data stored in each unit is sent to the adjustment unit, and the adjustment unit performs cyclic shifting. The data is written to the input commutator at the same address after an even-numbered clock cycle. Block SPRAM; When the FFT device is in COM state, odd-numbered clock cycles are read. Block SPRAM and output commutator The data required for each butterfly operation is sent to the butterfly splitter. Each butterfly splitter... Output per clock cycle The data is then sent to the processing unit, and the processing unit processes each... Completed in one clock cycle Each butterfly operation, each butterfly combiner Input per clock cycle Word data, output in even-numbered clock cycles Word data is written to the same address via the input commutator. Block SPRAM.

2. The high-speed non-power-2 point FFT device based on small SPRAM as described in claim 1, characterized in that, index for ， in, Modulo operation is represented. It is related to the input index. and output index The relationship is ， ， in, yes mold The number theory reciprocal, that is .

3. The high-speed non-power-2 point FFT device based on small SPRAM as described in claim 1, characterized in that, The depth of each SPRAM block is The block number and cell address are respectively and ,in, , SPRAM mapping is divided into two parts: block mapping and address mapping. The address mapping method is ， in, ， ； There are three block mapping methods: N, I, and II. Block mapping method N is... ； Block mapping method I is ； Block mapping mode II is ； when At that time, for PRRC-CRT DIF FFT, the sequence The block mapping method is adjusted from II to N in the TUN state, sequence Using block mapping method I, for CRT-PRRC DIF FFT, the sequence Using block mapping method I, sequence The block mapping method is adjusted from N to II in the TUN state, and other sequences All use block mapping method N, where, , ; when At that time, for PRRC-CRT DIF FFT, the sequence The block mapping method is adjusted from II to N in the TUN state, sequence Using block mapping method I, for CRT-PRRC DIF FFT, the sequence The block mapping method is adjusted from I to N in the TUN state, sequence Using block mapping method II, other sequences All use block mapping method N, where, .

4. The high-speed non-power-2 point FFT device based on small SPRAM as described in claim 1, characterized in that, In COM state, first calculate the first part of the second-dimensional FFT. First, perform a butterfly operation, then calculate the first-dimensional FFT, and finally perform a final butterfly operation on the second-dimensional FFT.

5. The high-speed non-power-2 point FFT device based on small SPRAM as described in claim 1, characterized in that, For PRRC-CRT DIF FFT, the input and output of the butterfly operation are in PR order and natural order, respectively. For CRT-PRRCDIF FFT, the input and output of the butterfly operation are in natural order and PR order, respectively. The formula is as follows: ， in, , and All Metavector, This indicates that the vectors are arranged in PR order. elements, Represents a small-point FFT in vector form. Hadamard product, elements For rotation factor, ,element Corresponding samples Besides elements and Corresponding samples and In addition, other elements Corresponding samples Local index Corresponding global index , ， ； for ,when hour, ， in, , , ,for , ， in, , , ; The index is ， in, , , ,when hour, ， in, , , ,for , ， in, , , .

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