Direct current power supply system and air conditioner
By using the control module and DC combiner of the DC power supply system, the stability and efficiency of the power supply of the data center air conditioning system were achieved, the power outage and power quality problems during power switching were solved, and the reliability of equipment operation and energy utilization efficiency were improved.
Patent Information
- Application Number
- CN202511857496.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-10
- Publication Date
- 2026-04-14
AI Technical Summary
Existing data center air conditioning systems suffer from problems such as short-term power outages, equipment shocks, interruptions in cooling cycles, three-phase current imbalance, large harmonic currents, and low power factors during power switching, which affect equipment operating efficiency and the stability of data center power supply.
A DC power supply system is adopted, including a control module, a DC combiner and at least two power modules. Through power factor correction and multi-layer control loops, current sharing regulation is achieved, and multiple DC power sources are converged into a single DC bus to avoid overload of individual power modules and ensure continuous power supply to the power system.
It reduces copper losses, lowers hardware costs, extends equipment lifespan, improves the stability and energy efficiency of the power system, and ensures that the power system can still supply power continuously when some power modules fail.
Smart Images

Figure CN121863877A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power supply circuit technology, and in particular to a DC power supply system and an air conditioner. Background Technology
[0002] Existing data center air conditioning systems use Automatic Transfer Switches (ATS) as switching devices for multiple power sources. ATS switches power through mechanical contact action, with switching times typically ranging from 100 milliseconds to 3 seconds. During this process, the air conditioning system experiences a brief power outage, which may cause equipment damage, interruption of the cooling cycle, and other defects. Furthermore, the equipment in the air conditioning system usually uses unidirectional power supply, resulting in defects such as three-phase current imbalance, large harmonic currents, and low power factor.
[0003] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention
[0004] The purpose of this application is to at least partially solve one of the technical problems in the related art.
[0005] Therefore, the first objective of this application is to propose a DC power supply system.
[0006] The second objective of this application is to propose an air conditioner.
[0007] To achieve the above objectives, a first aspect of this application provides a DC power supply system, including a control module, a DC combiner, and at least two power modules, wherein: Each of the power modules is used to convert external mains power into first DC power; The control module is connected to the input and output terminals of each of the power modules and is used to perform power factor correction on the external mains power to optimize the power quality on the grid side, and to perform current sharing regulation on each of the first DC power modules by setting up multi-layer control loops. The DC combiner is connected to the control module and each of the power modules, and is used to combine the first DC power after current sharing into a DC bus, wherein the DC bus is used to provide load to the DC load.
[0008] To achieve the above objectives, a second aspect of this application provides an air conditioner that includes the DC power supply system proposed in the first aspect of this application.
[0009] In this embodiment, the control module performs active power factor correction on the external mains power, ensuring that the input current waveform and voltage waveform of the external mains power are highly synchronized, thus eliminating reactive power loss. The control module dynamically adjusts the output current of each power module through a multi-layer control loop to achieve current sharing, preventing overload operation of individual power modules, extending their service life, and ensuring continuous power supply even if some power modules fail, as the remaining power modules can still share the DC load. The first DC power after multiple current sharing is aggregated into a single DC bus, replacing traditional AC power supply or distributed DC power supply schemes, minimizing copper losses; and eliminating the need for separate power supplies for each load, reducing intermediate components such as transformers and rectifiers, and lowering hardware costs; if a new load is added, it can be directly connected to the DC bus without system reconfiguration.
[0010] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0011] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein: Figure 1 This is a schematic diagram of a DC power supply system provided in an embodiment of this application; Figure 2 This is a schematic diagram of a DC combiner provided according to an embodiment of this application; Figure 3 This is a schematic diagram of a power circuit according to an embodiment of this application; Figure 4 This is a schematic diagram of a driving circuit provided according to an embodiment of this application; Figure 5 This is a schematic diagram of the operation of the control module provided according to an embodiment of this application. Detailed Implementation
[0012] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this application as detailed in the appended claims.
[0013] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to limit the embodiments of this application. The singular forms “a” and “the” as used in the embodiments of this application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.
[0014] It should be understood that although the terms first, second, third, etc., may be used to describe various information in the embodiments of this application, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of the embodiments of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the words "if" and "suppose" as used herein can be interpreted as "when," "when," or "in response to a determination."
[0015] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.
[0016] Current data center air conditioning systems commonly use Automatic Transfer Switches (ATS) as the core switching device for multiple power supplies. Their working principle is based on the physical action of mechanical contacts to switch and connect power circuits. Due to the inherent characteristics of the mechanical structure, the switching time of an ATS typically ranges from 100 milliseconds to 3 seconds, with the specific duration affected by various factors such as contact wear, the type of load being switched, and the stability of the power supply voltage.
[0017] In some scenarios, the switching time of the ATS (Air Conditioning System) may be close to the lower limit under light load conditions, while the switching time of the ATS under heavy load or aging conditions can be extended to 1 to 3 seconds. This can cause the air conditioning system to experience a short power outage, which, although brief, still poses a significant risk to the high reliability requirements of data center operations.
[0018] For example, when core equipment such as refrigeration compressors and fans are restarted after a power outage, they will face instantaneous voltage surges and current surges. Long-term repeated impacts can easily cause aging of motor winding insulation, accelerated bearing wear, and even hardware damage such as contactor adhesion and frequency converter failure, thus shortening the service life of the equipment.
[0019] For example, a sudden interruption of the cooling cycle can cause refrigerant flow disorder and sudden temperature changes in the heat exchanger within the air conditioning system. After power is restored, a stable cooling circuit needs to be re-established. During this period, the temperature in the data center may rise briefly, especially in high-density server rack areas, where temperature fluctuations may exceed the equipment's allowable operating range, indirectly affecting the operational stability of core loads such as servers and storage devices.
[0020] In some scenarios, the power supply architecture of data center air conditioning systems still uses a unidirectional power supply mode for most devices, which further leads to multiple power quality defects.
[0021] For example, the problem of three-phase current imbalance is prominent. Because the installation layout and load distribution of air conditioning equipment are difficult to be completely symmetrical, some phases are overloaded while the load of other phases is relatively light. This not only reduces the utilization efficiency of power supply equipment such as transformers and distribution cabinets, but may also cause problems such as excessive neutral current and increased line losses. In severe cases, it may even lead to local overheating of the power supply system.
[0022] As an example, harmonic current pollution is quite serious. When nonlinear loads such as frequency converters and electronic control units in air conditioning systems are running, they inject a large number of harmonic components into the power grid. These harmonics not only interfere with the normal operation of precision instruments, but also accelerate the aging of electrical equipment and increase the probability of circuit failures.
[0023] For example, a low power factor can occur. In unidirectionally powered air conditioning equipment, the proportion of reactive power increases during light loads or start-up / shutdown phases, leading to a decrease in the power factor. This increases energy consumption during power transmission, thereby increasing the operating costs of the data center.
[0024] In summary, the aforementioned defects not only affect the operating efficiency and reliability of the air conditioning system itself, but also have a chain reaction on the power supply stability and energy utilization efficiency of the entire data center, becoming one of the important factors restricting the green, low-carbon, and highly reliable operation of the data center.
[0025] The DC power supply system and air conditioner of the present application are described below with reference to the accompanying drawings.
[0026] Figure 1 This is a schematic diagram of a DC power supply system provided in an embodiment of this application.
[0027] like Figure 1As shown, the DC power supply system includes a control module, a DC combiner, and at least two power modules. Each power module receives external mains power input and converts it into first DC power that conforms to power system standards through rectification and filtering. The control module is connected to the input and output terminals of each power module. It performs power factor correction on the external mains power to optimize the power quality on the grid side by actively compensating for reactive power and suppressing harmonic pollution. It also performs current sharing regulation on the first DC power output from each power module through a multi-layer control loop to ensure that the load current borne by each power module is balanced. The DC combiner is connected to the control module and each power module. Through an internal bus circuit, it aggregates the dispersed and current-shared first DC power into a single DC bus, which provides load to the DC load.
[0028] It should be noted that the power module includes a power input port and an ACDC converter. The power input port is responsible for establishing a physical connection with the external mains power, providing a path for energy input, and also has overvoltage and overcurrent protection functions to ensure the input safety of subsequent conversion stages. The ACDC converter uses power electronic conversion processes such as rectification, filtering, and voltage regulation to convert the input external mains power into first DC power that conforms to the system standard. The current component of the first DC power is represented by Iout1, and the voltage component is represented by Udc1_F.
[0029] In one feasible implementation, Figure 2 This is a schematic diagram of a DC combiner provided according to an embodiment of this application. Figure 2 As shown, the DC combiner includes at least two power circuits and at least two drive circuits. The number of power circuits and drive circuits is equal to the number of power modules. Each power circuit is connected to the output terminal of the corresponding power module. By filtering the first DC power, ripple components and noise interference are further filtered out, thus ensuring that the first DC power that meets the purity requirements is connected to the DC bus. Each drive circuit is connected to the corresponding power circuit to monitor the operating status of the power circuit, such as voltage, current, and temperature. When the first DC power meets the requirements of the DC load, an electrical connection is established between the power module and the DC bus. When the first DC power does not meet the requirements of the DC load (such as when overvoltage, undervoltage, or excessive ripple is detected), the electrical connection between the power module and the DC bus is disconnected to prevent unqualified power from damaging the DC load.
[0030] In some embodiments, Figure 3 This is a schematic diagram of a power circuit according to an embodiment of this application. Figure 3As shown, the power circuit includes a filter inductor L, a first capacitor C1, a sampling resistor Rs1, and a PMOS transistor P1. The first terminal of the filter inductor L is connected to the output terminal of the power module. The first capacitor C1 is connected between the second terminal of the filter inductor L and a reference ground. The first terminal of the sampling resistor Rs1 is connected to the second terminal of the filter inductor L. A sampling signal Vs1_F is obtained at the first terminal of the sampling resistor Rs1, and a sampling signal Vs1_B is obtained at the second terminal of the sampling resistor Rs1. Vs1_F - Vs1_B = Iout1 × Rs1, where Iout1 is the current component in the first DC power. The source of the PMOS transistor P1 is connected to the second terminal of the sampling resistor Rs1. The gate of the PMOS transistor P1 is connected to the drive signal CNTRL. The drain of the PMOS transistor P1 is connected to the DC bus. The output voltage of the DC combiner is represented as Udc1_B. When the first DC power meets the requirements of the DC load, the PMOS transistor P1 is turned on; when the first DC power does not meet the requirements of the DC load, the PMOS transistor P1 is turned off.
[0031] In some embodiments, Figure 4 This is a schematic diagram of a driving circuit according to an embodiment of this application. Figure 4 As shown, the driving circuit includes a first sub-circuit, a second sub-circuit, and a third sub-circuit. The first sub-circuit includes an input terminal, an output terminal, and an enable terminal. The input terminal of the first sub-circuit is connected to the source of the PMOS transistor and receives the first DC power. By comparing the source voltage of the PMOS transistor with the voltage of the DC bus, it is determined whether the amplitude, stability, and other indicators of the first DC power meet the requirements of the DC load. The corresponding driving signal CNTRL is output through the output terminal of the first sub-circuit. The driving signal CNTRL is used to control the conduction and turn-off of the PMOS transistor P1.
[0032] It should be noted that, as Figure 3 As shown, the voltage component Udc1_F in the first DC power supply is transmitted to the source of PMOS transistor P1 through the filter inductor L and the sampling resistor Rs1, and the output voltage Udc1_B of the DC combiner is obtained through the drain of PMOS transistor P1. Therefore, by comparing the source voltage of PMOS transistor (i.e., the voltage of the sampling signal Vs1_B) and the output voltage Udc1_B of the DC combiner, it can be determined whether the amplitude, stability, and other indicators of the voltage component Udc1_F in the first DC power supply meet the requirements of the DC load.
[0033] In some embodiments, such as Figure 4As shown, the second sub-circuit is connected to the enable terminal of the first sub-circuit, providing enable support for the startup, operation, and state switching of the first sub-circuit. The third sub-circuit is connected to the output terminal of the first sub-circuit. When the first DC power supply does not meet the requirements of the DC load, the third sub-circuit will respond quickly by lowering the drive signal strength of the PMOS transistor's gate to increase the turn-off speed of the PMOS transistor, thus preventing unqualified power from continuously being input into the DC bus.
[0034] In some embodiments, such as Figure 4 As shown, the first sub-circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, an operational amplifier OP1, a first diode D1, a PNP transistor Q1, and a first NPN transistor T1. The first terminal of the first resistor R1 is connected to the source of the PMOS transistor and is connected to the sampling signal Vs1_B. The first terminal of the second resistor R2 is connected to the output voltage Udc1_B of the DC combiner. The non-inverting input terminal of the operational amplifier OP1 is connected to the second terminal of the first resistor R1, and the inverting input terminal of the operational amplifier OP1 is connected to the second terminal of the second resistor R2. The output terminal of the operational amplifier OP1 is the enable terminal of the first sub-circuit. The third resistor R3 is connected between the operating voltage Vcc and the output terminal of operational amplifier OP1; the first terminal of the fourth resistor R4 is connected to the output terminal of operational amplifier OP1; the collector of the first NPN transistor T1 is connected to the operating voltage Vcc, and the base of the first NPN transistor T1 is connected to the second terminal of the fourth resistor R4; the emitter of the PNP transistor Q1 is connected to the emitter of the first NPN transistor T1, the base of the PNP transistor Q1 is connected to the base of the first NPN transistor T1, and the collector of the PNP transistor Q1 is connected to the reference ground; the first terminal of the fifth resistor R5 is connected to the emitter of the PNP transistor Q1, wherein the second terminal of the fifth resistor R5 is the output terminal of the first sub-circuit, that is, the drive signal CNTRL is output through the second terminal of the fifth resistor R5; the anode of the first diode D1 is connected to the second terminal of the fifth resistor R5, and the cathode of the first diode D1 is connected to the first terminal of the fifth resistor R5.
[0035] Exemplary illustration, such as Figure 4As shown, if the voltage of the sampling signal Vs1_B is greater than the output voltage Udc1_B of the DC combiner, then the operational amplifier OP1 outputs a low level, the first NPN transistor T1 is turned off, the PNP transistor Q1 is turned on, and the fourth resistor R4 acts as a current limiting circuit to constrain the current of the PNP transistor Q1 from exceeding the limit. The output of the operational amplifier OP1 is amplified by push-pull to obtain the drive signal CNTRL. This drive signal is divided by the fifth resistor R5 and the gate-source resistor Rgs1 of the PMOS transistor P1 to charge the parasitic capacitance of the PMOS transistor P1. The fourth diode D4 in the third sub-circuit is used to ensure that the gate voltage of the PMOS transistor P1 does not exceed the limit. When the drive signal CNTRL is low, the PMOS transistor P1 is in the on state.
[0036] Exemplary illustration, such as Figure 4 As shown, if the voltage of the sampling signal Vs1_B is less than the output voltage Udc1_B of the DC combiner, then the operational amplifier OP1 outputs a high level, the first NPN transistor T1 is turned on, the PNP transistor Q1 is turned off, the drive signal CNTRL is high, and the parasitic capacitance of the PMOS transistor P1 enters the discharge state. The released electrical energy enters the reference ground through the first diode D1 and the first NPN transistor T1.
[0037] In some embodiments, such as Figure 4 As shown, the second sub-circuit includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, an NMOS transistor N1, and a second NPN transistor T2. The collector of the second NPN transistor T2 is connected to the enable terminal of the first sub-circuit (i.e., the collector of the second NPN transistor T2 is connected to the output terminal of operational amplifier OP1), and the emitter of the second NPN transistor T2 is connected to reference ground. The sixth resistor R6 is connected between the operating voltage Vcc and the base of the second NPN transistor T2. The seventh resistor R7 is connected between reference ground and the base of the second NPN transistor T2. The drain of the NMOS transistor N1 is connected to the base of the second NPN transistor T2, and the source of the NMOS transistor N1 is connected to reference ground. The first terminal of the eighth resistor R8 is connected to the gate of the NMOS transistor N1, and the operating mode is configured through the second terminal of the eighth resistor R8. The ninth resistor R9 is connected between reference ground and the gate of the NMOS transistor N1.
[0038] Exemplary illustration, such as Figure 4As shown, the second end of the eighth resistor R8 is connected to port EN1. When port EN1 is connected to a high level, this high level, after being divided by the eighth resistor R8 and the ninth resistor R9, controls the NMOS transistor N1 to conduct. The operating voltage Vcc is connected to the reference ground through the sixth resistor R6, while the seventh resistor R7 is bypassed. The base voltage of the second NPN transistor T2 is low, and the second NPN transistor T2 is turned off. The operating voltage Vcc is connected to the output of the operational amplifier OP1 through the third resistor R3, thereby enhancing the driving capability of the operational amplifier OP1. At this time, the DC combiner is in the enabled state.
[0039] Exemplary illustration, such as Figure 4 As shown, when port EN1 is connected to a low level, NMOS transistor N1 is turned off. The operating voltage Vcc is divided by resistors R6 and R7, which in turn drives the second NPN transistor T2 to conduct, clamping the output of operational amplifier OP1 to a low level and causing operational amplifier OP1 to lose its comparator function. At this time, the drive signal CNTRL remains low. The DC combiner operates in an uncontrolled mode and remains on.
[0040] In some embodiments, such as Figure 4 As shown, the third sub-circuit includes a tenth resistor R10, an eleventh resistor R11, a second capacitor C2, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, and a third NPN transistor T3. The anode of the second diode D2 is connected to the output terminal of the first sub-circuit (i.e., the anode of the second diode D2 is connected to the second terminal of the fifth resistor R5); the collector of the third NPN transistor T3 is connected to the cathode of the second diode D2, and the emitter of the third NPN transistor T3 is connected to the source of the PMOS transistor P1; the first terminal of the tenth resistor R10... The base of the third NPN transistor T3 is connected; the eleventh resistor R11 is connected between the reference ground and the second terminal of the tenth resistor R10; the anode of the third diode D3 is connected to the output terminal of the first sub-circuit (i.e., the anode of the third diode D3 is connected to the second terminal of the fifth resistor R5); the cathode of the fourth diode D4 is connected to the cathode of the third diode D3, and the anode of the fourth diode D4 is connected to the emitter of the third NPN transistor T3; the anode of the fifth diode D5 is connected to the anode of the fourth diode D4; and the second capacitor C2 is connected between the reference ground and the cathode of the fifth diode D5.
[0041] As illustrated, the third sub-circuit is used to turn off PMOS transistor P1 with a faster response time, thereby enhancing the robustness of the DC power supply system. For example... Figure 4 As shown, when the DC power supply system is operating normally, the sampling signal Vs1_B charges the second capacitor C2 through the fifth diode D5, and the third NPN transistor T3 is in the off state. At this time, the first sub-circuit is operating normally.
[0042] Exemplary illustration, such as Figure 4 As shown, when the load on the DC bus fluctuates significantly and the AC-DC converter in the power supply module fails to respond in time, the voltage component Udc1_F of the first DC power supply fluctuates beyond the specified range, causing fluctuations in the voltage amplitude of the sampling signal Vs1_B. However, the voltage stored in the second capacitor C2 cannot change abruptly, resulting in a voltage drop across the fifth diode D5. This voltage drop drives the third NPN transistor T3 to conduct through the tenth resistor R10, which in turn pulls the drive signal CNTRL low, pulls down the gate voltage of the PMOS transistor P1, and turns off the PMOS transistor P1. Because there is a certain delay between the voltage comparison stage and the push-pull amplification stage in the first sub-circuit, the third sub-circuit has a faster response speed and can cope with the problem of energy backflow into the PMOS transistor P1 that may occur under abnormal conditions (energy backflow refers to energy flowing into the DC combiner from the DC bus).
[0043] In one feasible implementation, the control module includes an output current control loop, a bus current control loop, a droop control loop, a line loss compensation loop, and a voltage-current dual closed loop. The output current control loop converts the current component of the first DC power into a first adjustment signal that is linearly related to the load rate based on a preset proportional coefficient. The bus current control loop obtains a second adjustment signal based on the difference between the DC bus current and the first adjustment signal. The droop control loop inputs the current component of the first DC power into a preset droop curve function to obtain a third adjustment signal. The line loss compensation loop determines a fourth adjustment signal based on the difference between the voltage component of the first DC power and the output power of the DC combiner. Among them, the voltage component, the second adjustment signal, the third adjustment signal and the fourth adjustment signal in the first DC power are weighted and summed to obtain the first control signal for performing current sharing regulation on each first DC power; The voltage and current dual closed loop obtains a second control signal based on the external mains power and the first control signal to perform power factor correction and optimize the power quality on the grid side.
[0044] In some embodiments, Figure 5 This is a schematic diagram illustrating the operation of the control module provided according to an embodiment of this application. Figure 5 As shown, the current control loop adopts closed-loop control. By acquiring the current component Iout1 in the first DC power, the current component Iout1 in the first DC power is converted into a first adjustment signal V_Iout1 that is linearly related to the load rate based on a preset proportional coefficient. The first adjustment signal V_Iout1 is connected to the current of the DC bus through diode Di1.
[0045] In some embodiments, such as Figure 5As shown, the bus current control loop adopts closed-loop control. The difference between the DC bus current V_Ibus and the first adjustment signal V_Iout1 is obtained by acquiring the difference and then applying proportional-integral adjustment to obtain the second adjustment signal Vic1. It should be noted that the DC bus voltage is represented by Ubus. If there are two power modules, the current component Iout1 in the first DC power of the first power module and the current component Iout2 in the first DC power of the second power module are obtained. The first adjustment signal V_Iout2 is obtained based on Iout2. The first adjustment signals V_Iout1 and V_Iout2 are then connected to diodes (including diode Di1 and diode Di2, where diode Di2 is not connected to the diode). Figure 5 (As shown in the image) The current V_Ibus of the DC bus is obtained by connecting it in parallel.
[0046] For example, if there are two power supply modules, and V_Ibus > V_Iout1, it means that the output current of the AC-DC converter in the second power supply module is greater than the output current of the AC-DC converter in the first power supply module. The output voltage Udc1_B of the DC combiner is used as the voltage reference value Udc1_ref. The second adjustment signal Vic1 increases its own output voltage by superimposing the voltage reference value Udc1_ref, thereby increasing the load capacity and achieving load current sharing.
[0047] In some embodiments, such as Figure 5 As shown, the droop control loop uses open-loop control. Although the ACDC converters in each power module use the same configuration, due to certain design tolerances in the components, consistent output characteristics cannot be guaranteed. A preset droop curve function is used to compensate for the current component Iout1 in the first DC power supply.
[0048] Exemplary illustration, such as Figure 5 As shown, the preset droop curve function includes a linear function or a piecewise linear function, used to control the output voltage to decrease as the input current increases. The input current is the current component Iout1 in the first DC power. The droop coefficient is obtained based on the preset droop curve function, and the third adjustment signal Vdroop1 is obtained based on the droop coefficient and the current component Iout1 in the first DC power.
[0049] In some embodiments, such as Figure 5 As shown, the line loss compensation loop employs closed-loop control. The difference between the voltage component Udc1_F in the first DC power input and the output voltage Udc1_B of the DC combiner is obtained. This difference is then converted to a fourth adjustment signal Vuc1 using a voltage compensation coefficient. The larger the difference, the larger the fourth adjustment signal Vuc1. This line loss compensation loop is used to compensate for the voltage drop of the DC combiner.
[0050] For example, the voltage component Udc1_F in the first DC power, the voltage reference value Udc1_ref (i.e., the output voltage Udc1_B of the DC combiner), the second adjustment signal Vic1, the third adjustment signal Vdroop1, and the fourth adjustment signal Vuc1 are weighted and summed to obtain the first control signal for performing current sharing regulation on each of the first DC power. The first control signal = Udc1_ref + Vic1 - Vdroop1 + Vuc1 - Udc1_F.
[0051] In some embodiments, such as Figure 5 As shown, the voltage and current dual closed-loop control employs closed-loop control, including an outer voltage loop and an inner current loop. The voltage Uabc1 and current Iabc1 of the external mains power supply at the input terminal of the power module are acquired. The current Iabc1 and the voltage Uabc1 synchronized by the phase-locked loop are transformed using coordinate transformation to obtain the compensation values for the outer voltage loop and the inner current loop. The compensation value of the outer voltage loop and the first control signal are processed through the voltage loop compensation network to obtain the d-axis current reference value idref and the q-axis current reference value (the q-axis current reference value is 0). The d-axis current reference value idref, the q-axis current reference value, and the compensation value of the inner current loop are processed through the current loop compensation network, feedforward decoupling, and signal modulation to obtain the second control signal.
[0052] Exemplary illustration, such as Figure 5 As shown, the second control signal is a space vector pulse width modulation signal, which is used to drive the AC-CDC converter in the power module. By adjusting the switching efficiency of the power devices in the AC-CDC converter, the power factor is corrected, thereby optimizing the power quality on the grid side.
[0053] In one feasible implementation, the DC power supply system of this application embodiment further includes at least one backup power module, which is connected to the DC bus and is used to be in a charging state when the external mains power is normal, and to convert the stored electrical energy into a second DC power to provide load to the DC load when the external mains power is abnormal.
[0054] In some embodiments, the connection between the backup power module and the DC bus is achieved using a bidirectional DC-DC converter. The backup power source includes energy storage batteries, photovoltaics, etc. When the external mains power is normal, the bidirectional DC-DC converter operates in Buck mode, reducing the DC bus voltage to the charging voltage of the backup power source to achieve energy storage. When the external mains power is abnormal, the bidirectional DC-DC converter operates in Boost mode, boosting the energy storage voltage to the bus voltage to provide a second DC power supply to the DC load.
[0055] As an example, if there are two power supply modules, the DC power supply system uses dual power switching control, and the ACDC converters of both power supply modules monitor the status of the external mains power in real time. When both power supply modules are normal, the DC combiner is turned on, and each power supply module undertakes 50% of the DC load.
[0056] When a fault is detected in one of the power modules, the ACDC converter of the faulty power module cannot maintain normal initial DC power output, and its voltage component is lower than the DC bus voltage. The PMOS transistor is disconnected through the first sub-circuit in the DC combiner. When the faulty power module returns to normal, the output of the ACDC converter is first connected to the DC bus through the diode in the bus current control loop. After current sharing control is implemented, the first sub-circuit is disconnected and the PMOS transistor is turned on, thereby restoring the DC power supply system to normal.
[0057] Specifically, according to embodiments of this application, the DC power supply system described above with reference to the structural schematic diagram can be implemented as an air conditioner, in which the compressor, variable frequency refrigerant pump, fan, heating element, and low-voltage equipment (including the main control board, touch screen, etc.) are all connected to the DC bus. It should be noted that the compressor and variable frequency refrigerant pump are both connected to the DC bus via a DC inverter and a DC circuit breaker; the fan and heating element are connected to the DC bus via a DC circuit breaker; and the low-voltage equipment is connected to the DC bus via a bidirectional DC-DC converter and a DC circuit breaker.
[0058] In summary, the DC power supply system and air conditioner provided in this application embodiment utilize an active power factor correction module to ensure that the input current waveform and voltage waveform of the external mains power are highly synchronized, thus eliminating reactive power loss. The control module dynamically adjusts the output current of each power module through a multi-layer control loop to achieve current sharing, preventing overload operation of individual power modules and extending their service life. Even if some power modules fail, the remaining power modules can still share the DC load, ensuring continuous power supply to the power system. By converging the first DC power after multiple current sharing into a single DC bus, replacing traditional AC power supply or distributed DC power supply schemes, copper losses can be minimized. Furthermore, there is no need to configure a separate power supply for each load, reducing intermediate links such as transformers and rectifiers, and lowering hardware costs. If a new load is added, it can be directly connected to the DC bus without system reconfiguration.
[0059] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.
[0060] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.
Claims
1. A DC power supply system, characterized in that, Includes a control module, a DC combiner, and at least two power supply modules, wherein: Each of the power modules is used to convert external mains power into first DC power; The control module is connected to the input and output terminals of each of the power modules and is used to perform power factor correction on the external mains power to optimize the power quality on the grid side, and to perform current sharing regulation on each of the first DC power modules by setting up multi-layer control loops. The DC combiner is connected to the control module and each of the power modules, and is used to combine the first DC power after current sharing into a DC bus, wherein the DC bus is used to provide load to the DC load.
2. The DC power supply system according to claim 1, characterized in that, The DC combiner includes at least two power circuits and at least two drive circuits. The number of power circuits and drive circuits is equal to the number of power modules. Each power circuit is connected to the output terminal of the corresponding power module and filters the first DC power to connect to the DC bus. Each drive circuit is connected to the corresponding power circuit and monitors the operating status of the power circuit. When the first DC power meets the requirements of the DC load, an electrical connection is established between the power module and the DC bus. When the first DC power does not meet the requirements of the DC load, the electrical connection between the power module and the DC bus is disconnected.
3. The DC power supply system according to claim 2, characterized in that, The power circuit includes a filter inductor, a first capacitor, a sampling resistor, and a PMOS transistor. The first terminal of the filter inductor is connected to the output terminal of the power module. The first capacitor is connected between the second terminal of the filter inductor and a reference ground. The first terminal of the sampling resistor is connected to the second terminal of the filter inductor. The source of the PMOS transistor is connected to the second terminal of the sampling resistor. The gate of the PMOS transistor is connected to a drive signal, and the drain of the PMOS transistor is connected to a DC bus. The PMOS transistor is turned on when the first DC power meets the requirements of the DC load, and turned off when the first DC power does not meet the requirements of the DC load.
4. The DC power supply system according to claim 3, characterized in that, The driving circuit includes a first sub-circuit, a second sub-circuit, and a third sub-circuit. The first sub-circuit includes an input terminal, an output terminal, and an enable terminal. The input terminal is connected to the source of the PMOS transistor and receives a first DC power supply. By comparing the source voltage of the PMOS transistor with the voltage of the DC bus, it is determined whether the first DC power supply meets the requirements of the DC load, and a corresponding driving signal is output through the output terminal. The second sub-circuit is connected to the enable terminal of the first sub-circuit. The third sub-circuit is connected to the output terminal of the first sub-circuit and is used to increase the turn-off speed of the PMOS transistor by pulling down the drive signal of the gate of the PMOS transistor when the first DC power supply does not meet the requirements of the DC load.
5. The DC power supply system according to claim 4, characterized in that, The first sub-circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, an operational amplifier, a first diode, a PNP transistor, and a first NPN transistor. The first terminal of the first resistor is connected to the source of the PNP transistor. The first terminal of the second resistor is connected to the DC bus voltage. The non-inverting input of the operational amplifier is connected to the second terminal of the first resistor, and the inverting input of the operational amplifier is connected to the second terminal of the second resistor. The output of the operational amplifier is the enable terminal of the first sub-circuit. The third resistor is connected between the operating voltage and the output of the operational amplifier. The first terminal of the fourth resistor is connected to the operational amplifier... The output terminal of the amplifier is connected; the collector of the first NPN transistor is connected to the operating voltage, and the base of the first NPN transistor is connected to the second terminal of the fourth resistor; the emitter of the PNP transistor is connected to the emitter of the first NPN transistor, the base of the PNP transistor is connected to the base of the first NPN transistor, and the collector of the PNP transistor is connected to the reference ground; the first terminal of the fifth resistor is connected to the emitter of the PNP transistor, wherein the second terminal of the fifth resistor is the output terminal of the first sub-circuit; the anode of the first diode is connected to the second terminal of the fifth resistor, and the cathode of the first diode is connected to the first terminal of the fifth resistor.
6. The DC power supply system according to claim 4, characterized in that, The second sub-circuit includes a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, an NMOS transistor, and a second NPN transistor. The collector of the second NPN transistor is connected to the enable terminal of the first sub-circuit, and the emitter of the second NPN transistor is connected to reference ground. The sixth resistor is connected between the operating voltage and the base of the second NPN transistor. The seventh resistor is connected between the reference ground and the base of the second NPN transistor. The drain of the NMOS transistor is connected to the base of the second NPN transistor, and the source of the NMOS transistor is connected to reference ground. The first terminal of the eighth resistor is connected to the gate of the NMOS transistor, and the second terminal of the eighth resistor configures the operating mode. The ninth resistor is connected between the reference ground and the gate of the NMOS transistor.
7. The DC power supply system according to claim 5, characterized in that, The third sub-circuit includes a tenth resistor, an eleventh resistor, a second capacitor, a second diode, a third diode, a fourth diode, a fifth diode, and a third NPN transistor. The anode of the second diode is connected to the output terminal of the first sub-circuit; the collector of the third NPN transistor is connected to the cathode of the second diode, and the emitter of the third NPN transistor is connected to the source of the PMOS transistor; the first terminal of the tenth resistor is connected to the base of the third NPN transistor; the eleventh resistor is connected between a reference ground and the second terminal of the tenth resistor; the anode of the third diode is connected to the output terminal of the first sub-circuit; the cathode of the fourth diode is connected to the cathode of the third diode, and the anode of the fourth diode is connected to the emitter of the third NPN transistor; the anode of the fifth diode is connected to the anode of the fourth diode; and the second capacitor is connected between a reference ground and the cathode of the fifth diode.
8. The DC power supply system according to claim 1, characterized in that, The control module includes an output current control loop, a bus current control loop, a droop control loop, a line loss compensation loop, and a voltage and current dual closed loop. Specifically, the output current control loop converts the current component of the first DC power into a first adjustment signal that is linearly related to the load rate based on a preset proportional coefficient; the bus current control loop obtains a second adjustment signal based on the difference between the DC bus current and the first adjustment signal; the droop control loop inputs the current component of the first DC power into a preset droop curve function to obtain a third adjustment signal; and the line loss compensation loop determines a fourth adjustment signal based on the difference between the voltage component of the first DC power and the output power of the DC combiner. Specifically, the voltage component in the first DC power, the output voltage of the DC combiner, the second adjustment signal, the third adjustment signal, and the fourth adjustment signal are weighted and summed to obtain a first control signal for performing current sharing regulation on each of the first DC power components; The voltage and current dual closed loop obtains a second control signal based on the external mains power and the first control signal, which is used to perform power factor correction to optimize the power quality on the grid side.
9. The DC power supply system according to claim 1, characterized in that, Also includes: At least one backup power module is connected to a DC bus and is used to be in a charging state when the external mains power is normal, and to convert the stored electrical energy into a second DC power to provide load to the DC load when the external mains power is abnormal.
10. An air conditioner, characterized in that, The air conditioner includes a DC power supply system as described in any one of claims 1 to 9.