A multi-interrupt-based I2C slave communication device and method on an MCU
By employing a multi-interrupt approach in I2C slave communication, and utilizing a global state manager and high-priority configuration, the problem of insufficient communication stability in existing technologies is solved, achieving high reliability and low CPU usage, making it suitable for communication in scenarios with multiple interrupts and high real-time requirements.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- JIANGSU XINSHENG INTELLIGENT TECH CO LTD
- Filing Date
- 2026-02-05
- Publication Date
- 2026-05-26
Smart Images

Figure CN122086815A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of embedded system communication technology, and in particular to an I2C slave communication device and method based on multiple interrupts on an MCU. Background Technology
[0002] In embedded systems, the I2C bus is widely used for data exchange between MCUs and between MCUs and peripherals due to its simple structure, low cost, and ability to support multi-master and multi-slave communication. The communication implementation methods for I2C slave devices are mainly divided into two categories: polling and interrupt-driven. Existing technologies have at least the following drawbacks:
[0003] Technical drawbacks of the query method include: the presence of other time-consuming operations (such as sensor sampling and algorithm calculations) in the main loop, or interruptions (such as timers and UARTs), leading to a high risk of data loss; simultaneously, the query method has high CPU resource consumption, affecting the execution efficiency of other business functions. Similarly, the polling method has weak anti-interference capabilities; any interruption will disrupt the query process, further increasing the probability of data loss.
[0004] Technical shortcomings of the single interrupt handling method: Some existing solutions adopt the design of "handling all I2C events with a single interrupt" to solve the pain points of the polling method (that is, handling all events such as address matching, data reception, data transmission, NACK, STOP, etc. through a single interrupt service function). However, it still has problems such as high logical coupling, risk of response delay, and untimely exception handling.
[0005] In other words, due to the above-mentioned defects, the existing I2C slave communication schemes are unable to simultaneously meet the practical application requirements of high reliability (no packet loss), low CPU usage, low coupling, and anti-interference. In particular, the problem of insufficient communication stability is especially prominent in scenarios with multiple interrupts and high real-time requirements. Summary of the Invention
[0006] The purpose of this invention is to overcome the shortcomings of the prior art and provide an I2C slave communication device and method based on multiple interrupts on an MCU. It is particularly suitable for terminal devices such as IoT devices, industrial control modules, and smart sensors that have high requirements for real-time and reliability communication and are subject to multiple interrupt interference scenarios, and can maintain highly reliable and stable communication.
[0007] The objective of this invention is achieved through the following technical solution:
[0008] Firstly, a multi-interrupt-based I2C slave communication device for an MCU is disclosed, comprising an I2C communication module, an interrupt controller, and a user data buffer. It also includes a global state manager for synchronizing the communication state, transmission mode, and buffer information between the interrupt service functions and the main loop. Furthermore, the interrupt controller executes multiple independent interrupt service functions, respectively handling events / errors, data reception, and data transmission in I2C communication. The interrupt priority of these multiple interrupt service functions is set to be higher than the priority of other interrupts in the MCU system.
[0009] Furthermore, the interrupt service functions include: an event / error interrupt function for handling at least one of address matching, NACK response, and STOP signal; a receive full interrupt function for reading data and writing it into the user data buffer when the I2C receive buffer is full; and a transmit complete interrupt function for reading the next byte from the user data buffer and transmitting it when a single byte has been transmitted.
[0010] Furthermore, when the event / error interrupt function detects a NACK or STOP event, it clears the interrupt flag, disables the relevant interrupt, and resets the communication state to an idle state; the receive full interrupt function reads the next byte to be sent from the user data buffer according to the current data index, writes it into the data transmission register of the I2C communication module, and updates the data index at the same time.
[0011] Furthermore, the user data buffer writes data in index order during reception and reads data in index order during transmission, and has a buffer boundary check mechanism; wherein, the boundary check mechanism is configured to stop the corresponding data writing or reading operation when the data index reaches a preset transmission data length.
[0012] Furthermore, it also includes a communication processing module, which executes in the main loop: when receiving a host communication start instruction, it configures the global state manager and sets the communication state to busy; when the global state manager indicates that communication has ended, it reads data from the user data buffer and performs protocol parsing or business data processing.
[0013] Furthermore, when configuring the global state manager, the communication control module is also used to: set the transmission mode to receive mode or send mode according to the type of host request, and initialize the user data buffer pointer, transmission data length and data index.
[0014] Secondly, this application discloses a multi-interrupt-based I2C slave communication method on an MCU, implemented based on the aforementioned multi-interrupt-based I2C slave communication device on an MCU, comprising: configuring event / error interrupts, receive full interrupts, and transmit completion interrupts with a preemption priority higher than all other interrupts in the MCU system except reset in the interrupt controller; recording and synchronizing communication status, transmission mode, user data buffer pointer, and data index through the global state manager; executing an event / error interrupt function when an I2C address match, NACK, or STOP event occurs; executing a receive full interrupt function when an I2C receive buffer full event occurs, storing the received data into the user data buffer; and executing a transmit completion interrupt function when an I2C single-byte transmit completion event occurs, loading the next byte of data from the user data buffer for transmission.
[0015] Furthermore, it also includes initializing the global state manager, including setting the transmission mode, the transmission data length, and resetting the user data buffer pointer and data index.
[0016] The beneficial effects of this invention are:
[0017] I2C communication events are categorized into EEI event / error interrupts, RXI receive full interrupts, and TEI transmit complete interrupts. Each interrupt focuses on handling a specific event, achieving decoupling of event handling and precise response. A global state manager integrates core information such as communication status, transmission mode, and buffer parameters, ensuring synchronization between interrupts and the main loop to avoid logical conflicts. I2C-related interrupts are configured with the highest system preemption priority to ensure communication is not interfered with by other interrupts and guarantee timing stability. Exception handling is integrated into the EEI interrupt to ensure timely reset in case of communication errors, preventing system freezes. The communication processing module handles the host's data writing and reading processes. Attached Figure Description
[0018] Figure 1 This is a schematic diagram of the hardware environment layout of the I2C slave communication device based on multiple interrupts on an MCU according to an embodiment of this application;
[0019] Figure 2 This is a schematic diagram of the EEI interrupt handling process according to an embodiment of this application;
[0020] Figure 3 The following is the RXI interrupt handling flow according to the embodiments of this application;
[0021] Figure 4 The TEI interrupt handling process according to the embodiments of this application;
[0022] Figure 5This is a global communication status manager according to embodiments of this application;
[0023] Figure 6 This is a process flow for processing host read commands according to an embodiment of this application;
[0024] Figure 7 This describes the process for writing commands to the host according to an embodiment of this application. Detailed Implementation
[0025] The technical solution of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0026] An I2C slave communication device based on multiple interrupts on an MCU according to an embodiment of this application includes an I2C communication module, an interrupt controller, a user data buffer, and a global state manager.
[0027] The global state manager is used to synchronize the communication status, transmission mode, and buffer information between the interrupt service function and the main loop; and the interrupt controller executes multiple independent interrupt service functions, which are used to handle events / errors, data reception, and data transmission in I2C communication, respectively; wherein the interrupt priority of the multiple interrupt service functions is set to be higher than the priority of other interrupts in the MCU system.
[0028] In this embodiment, based on the event types of I2C communication (such as address matching / error, data reception, and data transmission), interrupt handling is split into three independent interrupt service functions to achieve decoupling of event handling:
[0029] Event / Error Interrupt (EEI) is specifically designed to handle core events and exceptions such as I2C address matching, NACK response, and STOP signal, ensuring priority response to critical events; Receive Full Interrupt (RXI) is specifically designed to handle I2C receive buffer full events, reading received data in real time and writing it to the user data buffer to avoid data overflow; Transmit Complete Interrupt (TEI) is specifically designed to handle I2C transmit complete events, automatically reading the next byte of data from the user data buffer and sending it, ensuring timing consistency for continuous transmission.
[0030] Furthermore, based on the global communication state manager, core parameters such as communication state (e.g., idle / busy), transmission mode (e.g., receive / send), data buffer pointer, data index, and transmission length are integrated to achieve state synchronization between the interrupt service function and the main loop, avoiding communication logic disorder caused by scattered states.
[0031] Furthermore, the preemption priority of the three I2C-related interrupts (EEI, RXI, TEI) is configured to be the highest level in the MCU system, higher than all other interrupts (such as timers, ADCs, UARTs, etc.). That is, they have the highest preemption priority except for the system reset interrupt, ensuring that I2C communication is not interfered with by other interrupts and guaranteeing the stability of communication timing.
[0032] Next, refer to Figures 1-7 This application provides a detailed description of the I2C slave communication device based on multiple interrupts on an MCU according to embodiments of the present application.
[0033] refer to Figure 1 The IC2 bus is connected to an external 3.3V power supply. The main controller is an HC32F460 series (one model) MCU, which has built-in I2C peripherals, an NVIC interrupt controller, and GPIO multiplexing functionality, supporting the I2C standard protocol. For the I2C bus configuration, two GPIO pins are selected as the SCL (clock line) and SDA (data line) of the I2C bus, configured for I2C communication via GPIO multiplexing. These pins are connected to external 4.7kΩ pull-up resistors to ensure the bus is high when idle, conforming to the I2C protocol requirements. The interrupt controller uses the MCU's built-in NVIC (nested vector interrupt controller), supporting interrupt priority configuration; this embodiment uses the highest preemption priority. Of course, this solution is not limited to this MCU model; other MCUs with I2C peripherals and interrupt controllers can also be used.
[0034] The interrupt service functions include an event / error interrupt function, a receive full interrupt function, and a send complete interrupt function.
[0035] like Figure 2 The interrupt / error service function (EEI) is used to handle at least one of the following: address mismatch, NACK response, and STOP signal. Specifically, EEI interrupt trigger execution includes three possibilities: Figure 2 The first branch, the ADDR MATCH event, determines whether the current mode is MD_TX and the host communication direction is read. If so, the following operations are performed: enable the TEI interrupt, read the first byte from the user data buffer and write it to the DTR register, enable the STOP and NACK interrupts, and the process merges to the end; otherwise, proceed to the next step to determine whether the current mode is MD_RX and the host communication direction is write. If so, the following operations are performed: enable the STOP and NACK interrupts and the process merges to the end; otherwise, directly merge to the end. Figure 2The second branch starts from the NACK event. First, clear the NACK interrupt flag, then determine whether the host communication direction is read. If so, perform the following operations: disable the TEI interrupt, release the I2C bus, and merge the process to the end; otherwise, perform the following operations: disable the RXI interrupt, and merge the process to the end. Figure 2 The third branch starts with the STOP event. First, it disables the relevant interrupts, such as disabling TEI / RXI / STOP / NACK interrupts. Then, it clears the STOP interrupt flag, disables the I2C module, and finally updates the communication status to IDEL merge to end.
[0036] The receive full interrupt function (corresponding to RXI) is used to read data and write it to the user data buffer when the I2C receive buffer is full; the transmit complete interrupt function is used to read the next byte from the user data buffer and transmit it after a single byte has been transmitted. (See reference) Figure 3 After the RXI interrupt, one byte of data is read from the DRR register and then written to the user data buffer.
[0037] Transmission completion interrupt function (corresponding to TEI), such as Figure 4 When a single byte is sent, the interrupt is triggered, the next byte of data is read from the user data buffer and written to the DTR register, maintaining the timing of continuous transmission and ensuring orderly data transmission.
[0038] In other words, the DTR register (Data Transmission Register) is involved in I2C data transmission, and the DRR register (Data Receive Register) is involved in data reception. When the event / error interrupt function detects a NACK or STOP event, it clears the interrupt flag, disables the relevant interrupt, and resets the communication state to idle. The receive-full interrupt function reads the DRR data and writes it to the user data buffer upon triggering. The transmit-complete interrupt function reads the next byte to be sent from the user data buffer and writes it to the DTR register of the I2C communication module, while simultaneously updating the data index. The processing logic for NACK, STOP, and other events is integrated into the EEI interrupt. When a relevant event is detected, the interrupt flag is cleared promptly, the relevant interrupt is disabled, and the communication state is reset, preventing communication from stalling and improving system robustness. Specifically, in Event / Error Interrupt (EEI): When an address match event (ADDR MATCH) is detected, the corresponding interrupt function is dynamically enabled based on the current transmission mode (receive / transmit) and host communication direction (read / write) (e.g., enabling STOP / NACK interrupt in receive mode, and enabling TEI interrupt for transmit completion in transmit mode). When a NACK or STOP exception event is detected, the interrupt flag is cleared promptly, the relevant interrupt is disabled to avoid invalid data transmission, ensure normal termination of communication, and update the communication status to IDEL to unblock the communication processing module. Receive Full Interrupt (RXI): This interrupt is triggered when the I2C receive buffer is full. DRR data is read and written to a preset user data buffer, preparing to receive the next byte of data, ensuring real-time data reception without overflow.
[0039] In some embodiments, the user data buffer writes data in indexed order during reception and reads data in indexed order during transmission, and has a buffer boundary check mechanism; wherein, the boundary check mechanism is configured to stop the corresponding data writing or reading operation when the data index reaches a preset transmission data length. Based on this, a global communication state manager is constructed, such as... Figure 5 This system integrates key parameters during the communication process to achieve state synchronization and data interaction between modules, ensuring consistency between interrupt service functions and the main loop operations. Specific managed parameters include: communication status: Idle (IDEL) / Busy (BUSY); transmission mode: Receive (MD_RX) / Send (MD_TX); data buffer pointer; transmission data length; and data index (current send / receive position). The user data buffer enables ordered data storage and retrieval: during reception, received data is written to the buffer according to the data index, which automatically increments; during transmission, data is read from the buffer according to the data index, which increments synchronously. Buffer boundary checks are also implemented to prevent data overflow or index corruption.
[0040] In a further embodiment, the I2C slave communication device on the MCU based on multiple interrupts further includes a communication processing module. This communication processing module executes the following in its main loop: upon receiving a host communication start instruction, it configures the global state manager and sets the communication state to a busy state; after the global state manager indicates that communication has ended, it reads data from the user data buffer and performs protocol parsing or service data processing. When configuring the global state manager, the communication control module is also used to: set the transmission mode to receive mode or send mode according to the type of host request, and initialize the user data buffer pointer, transmission data length, and data index.
[0041] For example, a typical I2C master-slave communication protocol is as follows: Master write data process: START → Slave address (W) → Register address → Data → STOP. Master read data process: START → Slave address (W) → Register address → STOP → RESTART → Slave address (R) → Read data → STOP.
[0042] The communication processing module is called in the MCU main loop. This module is compatible with the typical I2C communication protocol process described above. The following section will take the host write data process and host read data process as examples to introduce one working mechanism of the main loop communication processing module.
[0043] Processing the host data read flow, such as Figure 6 ,include:
[0044] The first step is to enable the I2C receiving function.
[0045] First, modify the global communication status manager, setting the communication status to BUSY, the transmission mode to MD_RX, the transmission length to 256, and the data index to 0. 2. Enable the I2C module, and simultaneously enable ADDR_MATCH and RXI interrupts. During this process, the host will enter an EEI interrupt after sending I2C START + slave address (W), and will enter an RXI interrupt after sending a register address or data. The communication status will be set to IDEL after the host sends STOP to end the current communication.
[0046] The second step is to wait for the communication status to be IDEL.
[0047] The third step is to read data from the user data buffer (including register address + data).
[0048] The fourth step is to parse the register address and data sent by the host. Here, it is a read-type register address, which is used to prepare the corresponding business data to be returned to the host.
[0049] Fifth step, start the I2C sending function.
[0050] Specifically, modify the global communication status manager, setting the communication status to BUSY, the transmission mode to MD_TX, the transmission length to 256, and the data index to 0. Then enable the I2C module and the ADDR_MATCH interrupt. During this process, the master will enter the EEI interrupt after sending I2C START + slave address (R), and the slave will enter the TEI interrupt after sending one byte of data. The communication status will be set to IDEL after the master sends STOP to end the communication.
[0051] Step 6: Wait for the communication status to be IDEL.
[0052] Step 7: Loop back to the beginning and prepare for the next communication.
[0053] Furthermore, the process of handling host write data is as follows: Figure 7 ,include:
[0054] Step 1. Enable I2C receive function.
[0055] Specifically, modify the global communication status manager, setting the communication status to BUSY, the transmission mode to MD_RX, the transmission length to 256, and the data index to 0. Then enable the I2C module, along with ADDR_MATCH and RXI interrupts. During this process, the host will enter an EEI interrupt after sending I2C START + slave address (W), and will enter an RXI interrupt after sending a register address or data. The communication status will be set to IDEL after the host sends STOP to end the current communication.
[0056] The second step is to wait for the communication status to be IDEL.
[0057] The third step is to read data from the user data buffer (including register address + data).
[0058] The fourth step is to parse the register address and data sent by the host, which is a write-type register address, and then perform the relevant write operation.
[0059] Fifth step: loop back to the beginning and prepare for the next communication.
[0060] A multi-interrupt-based I2C slave communication method on an MCU according to an embodiment of this application is implemented based on the aforementioned multi-interrupt-based I2C slave communication device on an MCU. The method includes:
[0061] First, initialization is performed, including initializing the global state manager. Specifically, this involves setting the transmission mode, transmission data length, and resetting the user data buffer pointer and data index. In the interrupt controller, event / error interrupts, receive-full interrupts, and transmit-complete interrupts are configured with a higher preemption priority than all other interrupts in the MCU system except for reset. The global state manager records and synchronizes the communication status, transmission mode, user data buffer pointer, and data index. When an I2C address match, NACK, or STOP event occurs, the interrupt controller executes the event / error interrupt service function. When an I2C receive buffer full event occurs, the interrupt controller executes the receive-full interrupt service function, storing the received data into the user data buffer. When an I2C single-byte transmit-complete event occurs, the interrupt controller executes the transmit-complete interrupt service function, loading the next byte of data from the user data buffer for transmission.
[0062] In some embodiments, the method further includes initializing the global state manager, including setting the transmission mode, the transmission data length, and resetting the user data buffer pointer and data index.
[0063] Its effects include at least the following: (1) Significantly improved communication reliability, completely solving the packet loss problem. The interrupt-driven approach avoids packet loss caused by scanning delay; the I2C interrupt is configured with the highest preemption priority, and is not affected by other interrupts; the three-level interrupt division of labor and the perfect exception handling mechanism ensure that events such as address matching, data transmission and reception, and abnormal termination are handled in a timely manner, avoiding communication deadlock and achieving highly reliable communication. (2) Reduced CPU resource utilization. (3) Low code coupling, strong maintainability and scalability. (4) Strong anti-interference ability, adaptable to complex application scenarios. The highest preemption priority configuration isolates other interrupts from interfering with I2C communication, and is suitable for multi-interrupt, high real-time scenarios. Therefore, I2C communication events are categorized into EEI event / error interrupts, RXI receive full interrupts, and TEI transmit complete interrupts. Each interrupt focuses on handling a specific event, achieving decoupling of event handling and precise response. A global state manager integrates core information such as communication status, transmission mode, and buffer parameters, ensuring synchronization between interrupts and the main loop to avoid logical conflicts. I2C-related interrupts are configured with the highest system preemption priority to ensure communication is not interfered with by other interrupts and guarantee timing stability. Exception handling is integrated into the EEI interrupt to ensure timely reset in case of communication errors, preventing system freezes. The communication processing module handles the host's data writing and reading processes.
[0064] The above description is merely a preferred embodiment of the present invention. It should be understood that the present invention is not limited to the forms disclosed herein and should not be construed as excluding other embodiments. It can be used in various other combinations, modifications, and environments, and can be altered within the scope of the concept described herein through the above teachings or related technologies or knowledge. Modifications and variations made by those skilled in the art that do not depart from the spirit and scope of the present invention should be within the protection scope of the appended claims.
Claims
1. A multi-interrupt-based I2C slave communication device on an MCU, comprising an I2C communication module, an interrupt controller, and a user data buffer, characterized in that, Also includes: A global state manager is used to synchronize the communication status, transmission mode, and buffer information between the interrupt service function and the main loop; Furthermore, the interrupt controller executes multiple independent interrupt service functions, which are used to handle events / errors, data reception, and data transmission in I2C communication, respectively. The interrupt priority of the multiple interrupt service functions is set to be higher than the priority of other interrupts in the MCU system.
2. The I2C slave communication device based on multiple interrupts on an MCU according to claim 1, characterized in that, The interrupt service function includes: Event / error interrupt function, used to handle at least one of address match, NACK response and STOP signal; The receive full interrupt function is used to read data and write it to the user data buffer when the I2C receive buffer is full. The transmit completion interrupt function is used to read the next byte from the user data buffer and send it when a single byte has been transmitted.
3. The I2C slave communication device based on multiple interrupts on an MCU according to claim 2, characterized in that, When the event / error interrupt function detects a NACK or STOP event, it clears the interrupt flag, disables the relevant interrupt, and resets the communication state to an idle state. The receive full interrupt function reads the next byte to be sent from the user data buffer according to the current data index, writes it into the data transmission register of the I2C communication module, and updates the data index at the same time.
4. The I2C slave communication device based on multiple interrupts on an MCU according to claim 1, characterized in that, The user data buffer writes data in index order during reception and reads data in index order during transmission, and has a buffer boundary checking mechanism. The boundary check mechanism is configured to stop the corresponding data write or read operation when the data index reaches a preset transmission data length.
5. The I2C slave communication device based on multiple interrupts on an MCU according to claim 1, characterized in that, It also includes a communication processing module, which executes in the main loop: Upon receiving a host communication start instruction, configure the global state manager and set the communication state to busy. After the global state manager indicates that communication has ended, data is read from the user data buffer and then parsed or processed for protocol parsing or business data processing.
6. The I2C slave communication device based on multiple interrupts on an MCU according to claim 5, characterized in that, When configuring the global state manager, the communication control module is also used to: The transmission mode is set to receive mode or send mode according to the type of host request, and the user data buffer pointer, transmission data length and data index are initialized.
7. A multi-interrupt-based I2C slave communication method on an MCU, characterized in that, Based on the I2C slave communication device on the MCU based on any one of claims 1-6, it includes: In the interrupt controller, the preemption priority of event / error interrupt, receive full interrupt and transmit complete interrupt is configured to be higher than that of all other interrupts in the MCU system except for reset; The global state manager records and synchronizes communication status, transmission mode, user data buffer pointer, and data index. When an I2C address match, NACK, or STOP event occurs, the interrupt controller executes the event / error interrupt function; When an I2C receive buffer full event occurs, the interrupt controller executes the receive full interrupt function to store the received data into the user data buffer. When an I2C single-byte transmission completion event occurs, the interrupt controller executes the transmission completion interrupt function to load the next byte of data from the user data buffer for transmission.
8. The I2C slave communication method based on multiple interrupts on an MCU according to claim 7, characterized in that, It also includes initializing the global state manager, including setting the transmission mode, the transmission data length, and resetting the user data buffer pointer and data index.