Laser bonding apparatus, laser bonding tool, and related methods

Abstract

Laser bonding apparatus, laser bonding tools, and related methods. In one example, a system can include a laser assisted bonding (LAB) tool including a stage block and a laser source facing the stage block. The stage block can be configured to support a first substrate and a first electronic component coupled with the first substrate, the first electronic component including a first interconnect. The laser source can be configured to emit a first laser toward the stage block to induce a first heat on the first interconnect to bond the first interconnect with the first substrate. Other examples and related methods are also disclosed herein.

Description

[0001] This application is a divisional application of patent application No. 202110620393.6, filed on June 3, 2021, with a priority date of June 23, 2020, entitled "Laser bonding apparatus, laser bonding tool and related method". Cross-references and citations of related applications

[0002] This application claims priority to U.S. Patent Application No. 16 / 908,928, filed June 23, 2020, entitled "Hybrid Bonding Interconnection Using Laser And Thermal Compression," and U.S. Patent Application No. 17 / 244,463, filed April 29, 2021, entitled "LASER BONDED DEVICES, LASER BONDING TOOLS, AND RELATEDMETHODS," the entire contents of which are incorporated herein by reference.

[0003] Various aspects of this application relate to U.S. Patent Application No. 17 / 005,021, filed August 27, 2020, entitled “System and Method For Laser Assisted Bonding Of An Electronic Device”, published as U.S. 2021 / 0082717 A1, the entire contents of which are hereby incorporated by reference. Technical Field

[0004] This disclosure generally relates to electronic devices, and more specifically, to bonding tools and methods for bonding semiconductor devices. Background Technology

[0005] Previous semiconductor packaging and methods for forming semiconductor packages have shortcomings, such as resulting in excessive costs, reduced reliability, relatively low performance, or excessively large package sizes. Further limitations and disadvantages of conventional and traditional methods will become apparent to those skilled in the art by comparing such methods with this disclosure and referring to the accompanying drawings. Summary of the Invention

[0006] According to an embodiment of the present invention, a system includes: a laser-assisted bonding (LAB) tool comprising: a stage block; and a laser source facing the stage block; wherein: the stage block is configured to support a first substrate and a first electronic component coupled to the first substrate, the first electronic component including a first interconnect; and the laser source is configured to emit a first laser beam toward the stage block to induce a first heat on the first interconnect thereby bonding the first interconnect to the first substrate. In this system, the first substrate and the first electronic component are on a top side of the stage block; and the laser source emits the first laser beam toward a bottom side of the stage block. In this system, the first electronic component is on a top side of the stage block; the substrate is on a top side of the first electronic component; and the laser source emits the first laser beam toward the top side of the stage block. In this system, the stage block includes a transparent material portion that allows the first laser beam to pass through and reach the first substrate. In this system, the stage block includes an opaque material portion that blocks the first laser beam from passing through and reaching the first substrate. In this system, the stage block includes: an opaque material portion that blocks the first laser from passing through and reaching the first substrate; and a transparent material portion that allows the first laser to pass through and reach the opaque material. In this system, the stage block includes an opaque material portion; the opaque material portion includes opaque material and a grating defining an opening pattern through the opaque material; the opaque material blocks the first laser from passing through and reaching the first substrate; and the grating allows the first laser to pass through the opening pattern and reach through the first substrate. In this system, the stage block includes a transparent material portion that allows the first laser to pass through and reach the first substrate through the grating of the opaque material portion. In this system, the opening of the grating is configured to be vertically aligned with an interconnect of the first electronic component above the first substrate. In this system, the opaque material is configured to be vertically aligned with a portion of the first substrate that is not aligned with the interconnect of the first electronic component. In this system, the laser source includes a laser emitter array comprising: a first laser emitter configured to emit the first laser beam toward a first target region in the form of a vertical first laser beam; and a second laser emitter configured to emit a vertical second laser beam toward a second target region that does not overlap with the first target region. In this system, the LAB tool is configured to: emit the first laser beam from the first laser emitter in the form of a high-power beam; and emit the second laser beam from the second laser emitter in the form of a low-power beam.In this system, the LAB tool is configured to: emit a first laser beam in the form of a high-power beam from the first laser emitter when the first laser emitter is vertically aligned within the periphery of the first interconnect of the first electronic component; and emit a second laser beam in the form of a low-power beam from the second laser emitter when the second laser emitter is vertically aligned outside the periphery of the first interconnect of the first electronic component. In this system, the LAB tool is configured to: emit the first laser beam in the form of a high-power beam from the first laser emitter when the first laser emitter is vertically aligned within the periphery of the first electronic component; and emit the second laser beam in the form of a low-power beam from the second laser emitter when the second laser emitter is vertically aligned outside the periphery of the first electronic component. In this system, the LAB tool is configured to: emit the first laser beam in the form of a high-power beam from the first laser emitter when the first laser emitter is vertically aligned within the periphery of the first electronic component; and emit the second laser beam in the form of a low-power beam from the second laser emitter when the second laser emitter is vertically aligned within the periphery of the first electronic component but outside the periphery of the first interconnect of the first electronic component. In this system, the stage block is configured to support a second electronic component coupled to the first substrate and adjacent to the first electronic component, the second electronic component including a second interconnect; the laser emitter array includes a third laser emitter configured to emit a vertical third laser beam toward a third target region; and the LAB tool is configured to: emit the first laser beam in the form of a high-power beam from the first laser emitter vertically aligned within the periphery of the first electronic component; emit the second laser beam in the form of a high-power beam from the second laser emitter vertically aligned within the periphery of the second electronic component; and emit the third laser beam in the form of a low-power beam from the third laser emitter when the third laser emitter is vertically aligned within the boundary region between the first electronic component and the second electronic component.In this system, the laser emitter array includes: a third laser emitter configured to emit a vertical third laser beam toward a third target region; and a fourth laser emitter configured to emit a vertical fourth laser beam toward a fourth target region; a first electronic component includes a second interconnect; and the LAB tool is configured to: emit the first laser beam in the form of a high-power beam from the first laser emitter vertically aligned within the periphery of the first interconnect; emit the second laser beam in the form of a high-power beam from the second laser emitter vertically aligned within the periphery of the second interconnect; emit the third laser beam in the form of a medium-power beam from the third laser emitter vertically aligned within the periphery of the first electronic component but outside the periphery of the first and second interconnects; and emit the fourth laser beam in the form of a low-power beam from the fourth laser emitter vertically aligned outside the periphery of the first electronic component. In this system, the LAB tool is configured to: monitor the temperature of multiple target regions of the first electronic component, the multiple regions including: a first target region of a first laser beam; and a second target region of a second laser beam; and in real time: adjust the power of the first laser beam to bring a first deviation temperature range of the first target region of the first electronic component into a target temperature range; and adjust the power of the second laser beam to bring a second deviation temperature range of the second target region of the first electronic component into the target temperature range. In this system, the LAB tool is configured to: increase the power of the first laser beam in real time to bring the first deviation temperature range of the first target region from below the target temperature range into the target temperature range; and decrease the power of the second laser beam in real time to bring the second deviation temperature range of the second target region from above the target temperature range into the target temperature range.

[0007] According to another aspect of the invention, a semiconductor device includes: a substrate including a top side and a bottom side; and a first electronic component including a first interconnect bonded to the top side of the substrate by a first laser beam emitted toward the bottom side of the substrate. The method includes: providing the electronic component above the substrate, wherein the interconnect of the electronic component contacts a conductive structure of the substrate; providing the substrate on a laser-assisted bonding (LAB) tool, wherein the LAB tool includes a stage block having a window; and heating the interconnect using a laser beam passing through the window until the interconnect is bonded to the conductive structure. In this method, the laser beam has a depth of field (DOF), and the interconnect is within the DOF when heated. In this method, the window comprises quartz. In this method, the electronic component is above a first side of the substrate, and the laser beam is applied to the interconnect from a second side of the substrate opposite to the first side. In this method, the stage block supports the window and the substrate above the laser beam. The method further includes maintaining a temperature of the substrate below the temperature of the interconnect when heat is applied to the interconnect from the laser beam. The method further includes maintaining the temperature of the electronic component below the temperature of the interconnect when heat is applied to the interconnect from the laser beam. The method further includes maintaining the temperature of a molding compound adjacent to the electronic component at a temperature lower than the temperature of the interconnect when heat is applied to the interconnect from the laser beam.

[0008] According to another aspect of the present invention, a method of manufacturing a semiconductor device includes: providing an electronic component over a first substrate side of a substrate, wherein interconnects of the electronic component contact a conductive structure of the substrate; providing the substrate in a hybrid bonding tool, the hybrid bonding tool including a laser-assisted bonding (LAB) tool and a thermo-pressure bonding (TCB) tool; applying a first heat to the interconnects through a second substrate side opposite to the first substrate side using a laser beam from the LAB tool; and applying a second heat or pressure to the interconnects through the electronic component using the TCB tool. In this method, the laser beam has a depth of field (DOF), and the interconnects are within the DOF when heated. In this method, the LAB tool includes a window, and the laser beam is applied to the interconnects through the window. In this method, the TCB tool includes a heater source and a heat / pressure plate, wherein the second heat is applied through the heat / pressure plate using the heater source, and the pressure is applied by pressing the heat / pressure plate onto the electronic component. In this method, the LAB tool and the TCB tool are applied simultaneously. The method further includes maintaining the temperature of the substrate below the temperature of the interconnect when applying a first heat from the LAB tool to the interconnect. The method further includes maintaining the temperature of the electronic component below the temperature of the interconnect using the TCB tool when applying the first heat from the LAB tool to the interconnect. In this method, the window contacts the second side of the substrate when the first heat is applied.

[0009] According to yet another aspect of the invention, a system includes: a laser-assisted bonding (LAB) tool comprising: a laser source; a stage block having a window above the laser source; wherein the laser source is configured to direct a laser beam to the window to apply a first heat to an interconnect of a workpiece supported by the stage block. In this system, the workpiece includes: a substrate having a first side, a second side opposite the first side, and a conductive structure; and an electronic component above the first side of the substrate and in contact with the conductive structure via the interconnect; wherein the laser source is configured to emit the laser beam to apply the first heat to the interconnect through the second side of the substrate. The system further includes: a thermal / pressure bonding (TCB) tool comprising a heat / pressure plate; wherein: the heat / pressure plate is configured to press a top side of the electronic component opposite the interconnect when the laser source applies the first heat to the interconnect, and the heat / pressure plate is configured to transfer a second heat or pressure to the interconnect when the heat / pressure plate presses the top side of the electronic component. In this system, the window comprises quartz or ceramic. Attached Figure Description

[0010] Figures 1A to 1CA cross-sectional view of an example semiconductor device is shown.

[0011] Figures 2A to 2B A cross-sectional view of an example bonding tool used to bond an example semiconductor device is shown.

[0012] Figures 3A to 3C A cross-sectional view is shown of an example method for bonding an example semiconductor device.

[0013] Figures 4A to 4C A cross-sectional view is shown of an example method for bonding an example semiconductor device.

[0014] Figures 5A to 5C A cross-sectional view is shown of an example method for bonding an example semiconductor device.

[0015] Figures 6A to 6D A detailed cross-sectional view of an example bonding level for a semiconductor device using a bonding tool is shown.

[0016] Figures 7A to 7C Cross-sectional and planar views of an example bonding stage for a semiconductor device using a bonding tool are shown. Detailed Implementation

[0017] The following discussion presents various examples of semiconductor devices and methods of manufacturing semiconductor devices. These examples are not limiting, and the scope of the appended claims should not be limited to the specific examples disclosed. In the following discussion, the terms "example" and "for example" are non-limiting.

[0018] The accompanying drawings illustrate general construction methods and may omit descriptions and details of well-known features and techniques to avoid unnecessarily obscuring this disclosure. Furthermore, elements in the drawings are not necessarily drawn to scale. For example, some elements in each figure may be enlarged relative to other elements to aid in understanding the examples discussed in this disclosure. The same reference numerals in different figures denote the same elements.

[0019] The term "or" refers to any one or more items in a list connected by "or". For example, "x or y" means any element in the three-element set {(x), (y), (x, y)}. As another example, "x, y or z" means any element in the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.

[0020] The terms “comprises / comprising” and “includes / including” are “open” terms and specify the presence of the stated feature, but do not exclude the presence or addition of one or more other features. The terms “first,” “second,” etc., may be used herein to describe various elements, and these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Thus, for example, a first element discussed in this disclosure may be referred to as a second element without departing from the teachings of this disclosure.

[0021] Unless otherwise specified, the term "coupled" may be used to describe two elements that are in direct contact with each other or to describe two elements that are indirectly connected by one or more other elements. For example, if element A is coupled to element B, then element A may be in direct contact with element B or indirectly connected to element B through intervening element C. Similarly, the terms "above" or "on" may be used to describe two elements that are in direct contact with each other or to describe two elements that are indirectly connected by one or more other elements.

[0022] In one example, a method of manufacturing a semiconductor device includes: providing an electronic component over a substrate, wherein interconnects of the electronic component contact a conductive structure of the substrate; providing the substrate on a laser-assisted bonding (LAB) tool, wherein the LAB tool includes a stage block having a window; and heating the interconnects using a laser beam passing through the window until the interconnects are bonded to the conductive structure.

[0023] In another example, a method of manufacturing a semiconductor device includes: providing an electronic component over a first substrate side of a substrate, wherein interconnects of the electronic component contact conductive structures of the substrate; providing the substrate in a hybrid bonding tool, the hybrid bonding tool including a laser-assisted bonding (LAB) tool and a thermal / pressure bonding (TCB) tool; applying a first heat to the interconnects through a second substrate side opposite to the first substrate side using a laser beam from the LAB tool; and applying a second heat or pressure to the interconnects through the electronic component using the TCB tool.

[0024] In another example, a system includes: a laser-assisted bonding (LAB) tool, the LAB tool including a laser source; a stage block having a window above the laser source; wherein the laser source is configured to emit a laser beam through the window to apply a first heat to an interconnect of a workpiece supported by the stage block.

[0025] In one example, a system may include a laser-assisted bonding (LAB) tool comprising a stage block and a laser source facing the stage block. The stage block may be configured to support a first substrate and a first electronic component coupled to the first substrate, the first electronic component including a first interconnect. The laser source may be configured to emit a first laser beam toward the stage block to induce a first heat on the first interconnect, thereby bonding the first interconnect to the first substrate.

[0026] In one example, a semiconductor device may include: a substrate including a top side and a bottom side; and a first electronic component including a first interconnect connected to the top side of the substrate by a first laser beam emitted toward the bottom side of the substrate.

[0027] This disclosure also includes other examples. Such examples can be found in the accompanying drawings, claims, or description of this disclosure.

[0028] Figure 1A A cross-sectional view of an example semiconductor device 10 is shown. Figure 1A In the illustrated example, semiconductor device 10 may include a substrate 11, electronic component 12 or 13, and interconnect 121 or 131. Substrate 11 may include a dielectric structure 111 and a conductive structure 112. Substrate 11 and interconnect 121 or 131 may provide electrical coupling between external components and electronic component 12 or 13. In some examples, at least one of electronic component 12 or electronic component 13 may include a molding compound or a molded package including a molding compound. In such examples, the molding compound or molded package may optionally contain one of electronic component 12 or electronic component 13 located within, above, or below the molding compound or molded package.

[0029] Figure 1B A cross-sectional view of example semiconductor device 20 is shown. Figure 1B In the example shown, semiconductor device 20 may include substrate 11, electronic components 12, 13, or 14, and interconnects 121 or 131. Substrate 11 and electronic components 12 or 13 may be similar to... Figure 1A The substrate 11 and electronic components 12 or 13 are shown. Electronic components 14 may include interconnects 141.

[0030] Figure 1C A cross-sectional view of an example semiconductor device 30 is shown. Figure 1C In the example shown, the semiconductor device 30 may include a substrate 11, an electronic component 12, and an interconnect 121. The substrate 11 and the electronic component 12 may be similar to... Figure 1A The substrate 11 and electronic components 12 or 13 are shown. Furthermore, electronic component 12 may be... Figure 1A The electronic components shown, 12 or 13, are longer or thinner.

[0031] In some instances, substrate 11 may be a preformed substrate. The preformed substrate may be manufactured prior to attachment to an electronic device and may include a dielectric layer between respective conductive layers. The conductive layer may include copper and may be formed using an electroplating process. The dielectric layer may be a relatively thick, non-optically definable layer that can be preformed in thin film form rather than being attached in liquid form, and may contain a resin with fillers such as strands, fabrics, and / or other inorganic particles for rigid and / or structural support. Because the dielectric layer is non-optically definable, features such as through-holes or openings can be formed using drilling or lasers. In some instances, the dielectric layer may include a prepreg material or an ajinomoto deposited film (ABF). The preformed substrate may include a permanent core structure or carrier, such as a dielectric material comprising bismaleimide triazine (BT) or FR4, and the dielectric and conductive layers may be formed on the permanent core structure. In other instances, the preformed substrate may be a coreless substrate with a permanent core structure omitted, and the dielectric and conductive layers may be formed on a sacrificial carrier and removed after the dielectric and conductive layers are formed and before attachment to an electronic device. The preformed substrate may also be referred to as a printed circuit board (PCB) or a laminated substrate. Such preformed substrates can be formed using semi-additive or modified semi-additive processes.

[0032] In some instances, substrate 11 may be a redistribution layer (“RDL”) substrate. In some instances, the RDL substrate may include one or more conductive redistribution layers and one or more dielectric layers formed layer-by-layer over an electronic device to which the RDL substrate may be electrically coupled. In some instances, the RDL substrate may include one or more conductive redistribution layers and one or more dielectric layers formed layer-by-layer over a carrier, wherein the one or more conductive redistribution layers and one or more dielectric layers may be completely or at least partially removed after the electronic device and the RDL substrate are coupled together. In some instances, Figure 2AThe window 153 shown may include or may be part of such a carrier. The RDL substrate can be fabricated layer-by-layer as a wafer-level substrate on a circular wafer in a wafer-level process, or as a panel-level substrate on a rectangular or square panel carrier in a panel-level process. The RDL substrate can be formed in an additive stacking process, which may include alternating stacking of one or more dielectric layers with one or more conductive layers defining corresponding conductive redistribution patterns or traces, the conductive redistribution patterns or traces being configured to collectively (a) fan the traces out of the electronic device's footprint, or (b) fan the traces into the electronic device's footprint. The conductive patterns can be formed using plating processes such as electroplating or electrodeless plating. The conductive patterns may include conductive materials, such as copper or other platingable metals. The location of the conductive patterns can be determined using photolithography processes, such as photolithography, and photoresist materials for forming photomasks. The dielectric layers of the RDL substrate can be patterned using photolithography processes that may include photomasks through which light is exposed to desired features of the photopattern, such as vias in the dielectric layers. The dielectric layer can be made of a light-definable organic dielectric material such as polyimide (PI), benzocyclobutene (BCB), or polybenzoxazole (PBO). Such dielectric materials can be spin-coated or otherwise coated in liquid form, rather than attached as a pre-formed film. To allow the desired light-definable features to be properly formed, such light-definable dielectric materials may omit structural reinforcing agents, or may be filler-free and free of strands, fabrics, or other particles that could interfere with light from the photopatterning process. In some instances, this filler-free characteristic of filler-free dielectric materials allows for a reduced thickness of the resulting dielectric layer. Although the light-definable dielectric materials described above can be organic materials, in other instances, the dielectric material of the RDL substrate may include one or more inorganic dielectric layers. Some examples of inorganic dielectric layers may include silicon nitride (Si3N4), silicon oxide (SiO2), or silicon oxynitride (SiON). Instead of using light-definable organic dielectric materials, one or more inorganic dielectric layers can be formed by growing inorganic dielectric layers using oxidation or nitridation processes. Such inorganic dielectric layers can be filler-free, without strands, fabrics, or other dissimilar inorganic particles. In some instances, the RDL substrate may omit a permanent core structure or carrier, such as dielectric materials comprising bismaleimide triazine (BT) or FR4, and these types of RDL substrates may be referred to as coreless substrates. Other substrates in this disclosure may also include RDL substrates.

[0033] It should be noted that the various semiconductor devices 10, 20, or 30 described herein are for the purpose of understanding this disclosure, and various other semiconductor devices may also be used in this disclosure. This disclosure can be applied to other semiconductor devices in which electronic components are connected to a substrate via interconnects.

[0034] Figure 2A A cross-sectional view of an example bonding tool used for bonding an example semiconductor device is shown. Figure 2A In the example shown, the laser-assisted bonding (LAB) tool 15 may include a laser source 151, a stage block (or base chuck) 152, and a window 153.

[0035] Laser source 151 can illuminate laser beam 151A through window 153, such as Figure 3B As shown. Stage block 152 may include or accommodate window 153. In some instances, window 153 may include an opening through stage block 152. In some instances, the opening may be filled or covered with a transparent material such as glass or quartz, or a grating or similar structure that allows light to pass through. In some instances, stage block 152 may include ceramic material, or a portion of stage block 152 (e.g., window 153) may include ceramic material. In such instances, the ceramic stage tool may be heated by an external heat source (e.g., laser source 151) using a laser beam 151A to accelerate the bonding process by heating the ceramic material. In some instances where window 153 includes ceramic, the laser beam 151A does not pass through window 153 but is used to heat the ceramic window 153, which in turn heats the semiconductor device 30. In contrast, when window 152 is transparent, the semiconductor device 30 can be heated by allowing the laser beam 151A to pass through window 152, thereby heating the semiconductor device 30 during the bonding process. In some instances, the opening in stage 152 can be optional, wherein stage 152 itself can be made of a transparent material, or wherein window 153 defines the upper surface of stage 152. Window 153 can be used to support one or more substrates, for example... Figures 1A to 1C The substrate 11 described in the text. For example... Figures 1A to 1C As shown, a laser beam 151A generated from laser source 151 can be transmitted through window 153 to engage interconnects 121, 131, or 141 of electronic components 12, 13, or 14 with terminals of conductive structure 112 of substrate 11. In some instances, window 153 may comprise a material exhibiting any amount of light transmittance to allow light of a desired wavelength (e.g., at or near the wavelength of laser beam 151A) to pass through.

[0036] Figure 2B A cross-sectional view of an example hybrid bonding tool used for bonding example semiconductor devices is shown. Figure 2B In the example shown, the hybrid bonding tool 40 may include a laser-assisted bonding (LAB) tool 15 and a heat / pressure bonding (TCB) tool 35.

[0037] LAB tool 15 may include a laser source 151, a stage block 152, and a window 153. LAB tool 15 can be similar to Figure 2AThe LAB tool 15 is shown. The heat / pressure joint tool 35 may include a heat / vibration / pressure plate 351 and a heater source 352.

[0038] Figures 3A to 3C A cross-sectional view is shown of an example method for bonding an example semiconductor device. Figures 3A to 3C In the example, the semiconductor device can be Figure 1A The semiconductor device 10 shown.

[0039] Figure 3A The diagram illustrates a semiconductor device 10 prior to laser beam irradiation in a bonding process, and a laser-assisted bonding (LAB) tool 15. Electronic components 12 or 13 are shown placed on a substrate 11 but not yet fully bonded to the substrate 11 via interconnects 121 or 131, respectively. In some instances, electronic components 12 or 13 may be temporarily bonded or pre-bonded to the substrate 11 via interconnects 121 or 131, respectively. In some instances, electronic components 12 or 13 are provided above the substrate 11 such that interconnects 121 or 131 of the electronic components contact conductive structures 112 of the substrate 11. The substrate 11 may be provided on the LAB tool 15, which includes a stage 152 comprising a window 153.

[0040] The substrate 11 includes a conductive structure 112 having one or more conductive layers or patterns, and a dielectric structure 111 having one or more dielectric layers interlaced with the conductive structure 112. In some instances, the substrate 11 may have a thickness ranging from about 10 micrometers (µm) to about 2,000 µm. The electronic component 12 or 13 may include, or be referred to as, a semiconductor die, a semiconductor chip, or a semiconductor package. In some instances, such a semiconductor package may include one or more semiconductor dies or chips coupled to the substrate and packaged together with exposed interconnects 121 or 131. In some instances, the interconnects 121 or 131 of the electronic component 12 or 13 may be disposed in a flip-chip type configuration on terminals such as pads or UBM (under-bump metallization) of the conductive structure 112 of the substrate 11.

[0041] In some instances, electronic component 12 or 13 may include an application-specific integrated circuit (ASIC), a logic die, a microcontroller unit, a memory, a digital signal processor, a network processor, a power management unit, an audio processor, a radio frequency (RF) circuit, or a wireless baseband system-on-a-chip processor. In some instances, electronic component 12 or 13 may include active or passive components. Electronic component 12 or 13 may have a thickness ranging from about 10 µm to about 1,000 µm.

[0042] Interconnectors 121 or 131 can electrically connect electronic components 12 or 13 to conductive structures 112 on substrate 11, respectively. Interconnectors 121 or 131 may include conductive balls or bumps, such as solder balls or bumps; conductive pillars or supports, such as copper pillars or supports with solder tips; or metal-core solder balls or bumps with a core comprising, for example, copper or aluminum surrounded by a solder shell. Interconnectors 121 or 131 may have a diameter ranging from about 10 µm to about 1,000 µm. In some instances, interconnectors 121 or 131 may be first formed on or attached to electronic components 12 or 13, and then interconnectors 121 or 131 may be placed on substrate 11.

[0043] exist Figure 3A In the illustrated example, the LAB tool 15 may be positioned below the semiconductor device 10. The LAB tool 15 may irradiate a laser beam from a laser source 151 to melt or reflow interconnects 121 or 131 and bond electronic components 12 or 13 to the substrate 11. Melting may include heating the interconnects to at least partially melt them, thus enabling them to bond with adjacent conductive structures, such as conductive structures 112 of the substrate 11. In some examples, melting may be referred to as reflow. In some examples, electronic components 12 or 13 may be permanently bonded to the substrate 11.

[0044] exist Figure 3A In the illustrated example, stage 152 can be spaced apart from laser source 151 and can be placed above laser source 151. Stage 152 can be separated from laser source 151 by a working distance. In some examples, the working distance can be between about 100 mm and about 1000 mm. The working distance can be preset or changed before or during laser irradiation. Stage 152 can be mounted to cover or support the periphery of window 153. Stage 152 can be provided to cover at least some portion or the entire periphery of window 153. In some examples, the periphery of window 153 or substrate 11 can rest on stage 152.

[0045] exist Figure 3A In the example shown, window 153 can be coupled to stage 152. Window 153 can be separated from laser source 151 by a working distance. The working distance between window 153 and laser source 151 can be similar to the working distance between stage 152 and laser source 151. Window 153 can support semiconductor device 10.

[0046] Window 153 may be made of a material capable of allowing a laser beam to pass through. In some instances, window 153 may be made of quartz or glass. In some instances, window 153 may be a gap or channel defined by the inner sidewall of stage 152. In some instances, window 153 may include a material exhibiting any amount of light transmittance to allow light of a desired wavelength (e.g., at or near the wavelength of laser beam 151A) to pass through. In some instances, the transmittance of window 153 to the laser beam may be about 90% or greater to facilitate LAB processing. In some instances, the transmittance of window 153 may be less than 90%. In some instances, window 153 may include a grating or other structure that allows at least some amount of light to pass through. In some instances, window 153 may have a thickness ranging from about 1 mm to about 300 mm. In some instances, stage 152 may support a workpiece processed by LAB tool 15. The workpiece includes, for example, substrate 11, or electronic components 12 or 13 above substrate 11, including interconnects 121 or 131.

[0047] Figure 3B The diagram illustrates the semiconductor device 10 and LAB tool 15 when irradiated with a laser beam during a bonding process. Figure 3BAs shown, a laser beam 151A is irradiated from a laser source 151, and heat can be applied or transferred to interconnects 121 or 131 through window 153 and substrate 11. In some instances, when the laser beam 151A is irradiated from the laser source 151, the substrate 11 can be heated, and this heat can be transferred to interconnects 121 or 131. In some instances, when the laser beam 151A is irradiated from the laser source 151, heat can be applied to interconnects 121 or 131. In some instances, this heat can be applied to interconnects 121 or 131 while keeping the temperature of substrate 11 lower than the temperature of the heated interconnects 121 or 131. For example, interconnects 121 or 131 can be positioned at the focal length or focusing distance within the depth of field (DOF) range of the laser beam 151A. In some instances, focusing the laser beam 151A onto interconnects 121 or 131 can allow for greater heating of interconnects 121 or 131 compared to substrate 11 or electronic components 12 or 13. This heating by laser beam 151A can melt interconnects 121 or 131 for bonding between substrate 11 and electronic components 12 or 13; in some instances, this bonding can be permanent. The laser source 151 can be larger than the overall size of substrate 11, or can be configured to irradiate the entire bottom side of substrate 11 exposed through window 153 using laser beam 151A. The interconnects 121 or 131 of electronic components 12 or 13 can be heated by laser beam 151A through window 153 of stage 152 until the interconnects 121 or 131 are bonded to the conductive structure 112 of substrate 11. In some instances, the interconnects 121 or 131 can be within a depth of field (DOF) range when heated.

[0048] exist Figure 3B In the illustrated example, laser beam 151A is indicated by an arrow. The substrate 11 and interconnects 121 or 131 can be positioned within an area that maintains a suitable temperature for melting interconnects 121 or 131 when irradiated by laser beam 151A. The irradiation range of laser beam 151A can vary depending on the thickness and transmittance of window 153 or the working distance. Laser beam 151A can be generated by pulsed or continuous laser. In some embodiments, electronic components 12 or 13 can be located above a first side of substrate 11, and laser beam 151A can be applied to interconnects 121 or 131 from a second side of substrate 11 opposite to the first side. In some embodiments, stage 152 can support window 153 and substrate 11 above laser beam 151A.

[0049] In some instances, the laser beam 151A may have energy ranging from about 0.1 kilowatts (kW) to about 16 kW to adequately heat or melt the interconnects 121 or 131 and avoid overheating or damage to the dielectric structure 111 or conductive structure 112 of the substrate 11. In some instances, the laser source 151 may output one or more laser beams 151A with energy ranging from approximately 0.1 kW to about 100 kW, whether targeted at a specific area of ​​the stage 152 or the substrate 11 or uniformly distributed thereon. In some instances, the laser beam 151A may have a wavelength ranging from about 600 µm to about 2,000 µm to adequately heat or melt the interconnects 121 or 131 and avoid overheating or damage to the dielectric structure 111 or conductive structure 112 of the substrate 11. In some instances, the laser beam 151A may irradiate for a period ranging from approximately 100 milliseconds (ms) to approximately 30,000 ms to adequately heat or melt the interconnects 121 or 131 and avoid overheating or damage to the dielectric structure 111 or conductive structure 112 of the substrate 11. For example, the laser beam 151A may irradiate for approximately 2000 ms or less, or approximately 1000 ms or less, to adequately heat the interconnects 121 or 131 and bond them to the substrate 11. In some instances, when heat is applied to the interconnects 121 or 131 from the laser beam 151A, the temperature of the substrate 11 may be maintained at a temperature lower than that of the interconnects 121 or 131. In some instances, when heat is applied to the interconnects 121 or 131 from the laser beam 151A, the temperature of the electronic component 12 or 13 may be maintained at a temperature lower than that of the interconnects 121 or 131. In a further example, when heat is applied to interconnect 121 or 131 from laser beam 151A, the temperature of the molding compound or molded package of adjacent electronic component 12 or 13 can be kept lower than the temperature of interconnect 121 or 131.

[0050] In some instances, when the laser beam 151A is irradiated, the temperature of the substrate 11 can be in the range of about 30 degrees Celsius (°C) to about 300°C, to properly heat or melt the interconnects 121 or 131 and avoid overheating or damage to the dielectric structure 111 or conductive structure 112 of the substrate 11. For example, the heat caused by the laser beam 151A on the substrate 11 or interconnects 121, 131 can be in the range of about 150°C to about 350°C, for example, about 230°C to about 280°C. In some instances, when the laser beam is irradiated, the temperature of the window 153 can be in the range of about 30°C to about 300°C. In some instances, the temperature of the window 153 can be maintained in the range of about 25°C to about 150°C, for example, about 70°C to about 130°C, below the melting temperature of the interconnects 121 or 131.

[0051] Figure 3C The LAB tool 15 is shown after the joining process is completed. Figure 3CIn the illustrated example, when the bonding between the substrate 11 and the electronic component 12 or 13 is completed, the irradiation of the laser beam 151A can be stopped, and the semiconductor device 10 can be transferred to the next stage. When the irradiation of the laser beam 151A stops, the heat supply from the laser beam can be immediately interrupted. Therefore, since the heat supply from the laser beam has stopped, the interconnect 121 or 131 can be re-cured. Curing the interconnect 121 or 131 allows for electrical or mechanical interconnection between the electronic component 12 or 13 and the substrate 11. The bonding of the next semiconductor device can be performed immediately using the laser beam 151A without a separate cooling process.

[0052] Figures 4A to 4C A cross-sectional view is shown of an example method for bonding an example semiconductor device. Figures 4A to 4C The example semiconductor device 20 shown can be similar to Figure 1B The semiconductor device 20 shown.

[0053] Figure 4A The semiconductor device 20 and the laser-assisted bonding (LAB) tool 15 are shown before the laser beam 151A is irradiated during the bonding process. Figure 4B The semiconductor device 20 and LAB tool 15 are shown when the laser beam 151A is irradiated during the bonding process. Figure 4C The LAB tool 15 is shown after the joining process is completed. Figures 4A to 4C In the example shown, the substrate 11, electronic components 12 or 13, and interconnects 121 or 131 of the semiconductor device 20 can be similar to Figures 3A to 3C The semiconductor device 10 shown includes a substrate, electronic components, and interconnects.

[0054] Electronic component 14 may include passive components or passive devices. Electronic component 14 may be temporarily connected to the conductive structure 112 of substrate 11 via interconnect 141. In some instances, electronic component 14 may include at least one of a resistor, capacitor, inductor, or connector. Electronic component 14 may have a thickness ranging from about 0.1 mm to about 3 mm.

[0055] exist Figure 4A In the example shown, the LAB tool 15 may be located below the semiconductor device 20. The LAB tool 15 may irradiate a laser beam 151A from a laser source 151 to melt interconnects 121 or 131, 141 and bond electronic components 12 or 13, 14 to the substrate 11.

[0056] exist Figures 4A to 4C In the example shown, the laser source 151, stage block 152, and window 153 of LAB tool 15 can be similar to those shown about... Figures 3A to 3C The description of LAB tool 15 includes the laser source, stage block, and window. Figures 4A to 4CThe example method shown can be similar to the one about Figures 3A to 3C Example methods described.

[0057] Figures 5A to 5C A cross-sectional view is shown of an example method for bonding an example semiconductor device. Figures 5A to 5C The example semiconductor device shown can be similar to Figure 1C The semiconductor device 30 shown.

[0058] Figure 5A The image shows a semiconductor device 30 and a hybrid bonding tool 40 prior to laser beam irradiation during the bonding process. Figures 5A to 5C In the example shown, the substrate 11, electronic components 12, 13, and interconnects 121, 131 of the semiconductor device 30 can be similar to Figures 3A to 3C The semiconductor device 10 shown includes a substrate 11, electronic components 12 or 13, and interconnects 121 or 131. In some embodiments, electronic components 12 or 13 may be provided above one side of the substrate 11, such that the interconnects 121 or 131 of the electronic components 12 or 13 contact the conductive structure 112 of the substrate 11.

[0059] In some instances, when using LAB tool 15 and Figures 3A to 3C During laser bonding, electronic components 12 or 13 may be prone to warping. For example, during the bonding process, components from... Figure 3B The heat from the laser beam 151A can be transferred to electronic components 12 or 13, causing them to warp. This warping can occur, for example, if the area of ​​electronic components 12 or 13 is sufficiently large, or if their thickness is sufficiently thin, relative to the heat transferred during LAB bonding. To avoid or prevent warping, the bonding process of the semiconductor device 30 can be performed using a hybrid bonding tool 40. Furthermore, although... Figures 5A to 5C The semiconductor device 30 shown includes two separate and smaller electronic components 12 and 13, but in some instances, the semiconductor device 30 may include a single electronic component 12, which may be comparable to Figures 5A to 5C The illustrated electronic component 12 or 13 is longer, larger, or thinner. In such instances, a longer, larger, or thinner die (e.g., electronic component 12) may be susceptible to warping and the effects of non-wet interconnects 121, for example, near the edge of electronic component 12. In some instances, semiconductor device 30 may include a single electronic component 12, or semiconductor device 30 may include multiple electronic components 12 and 13, such as... Figure 5AAs shown. In some instances where the semiconductor device 30 includes a single electronic component, the electronic component 12 may include a larger area or a thinner die thickness. For example, the electronic component 12 may include an area of ​​about 1 mm × 1 mm up to about 300 mm × 300 mm or a thickness of about 30 µm to about 1 mm or 10 mm. In some instances, in addition to the die, the semiconductor device 30 may also include a package, such as an electronic component including the die or electronic component 12, an inserter, a substrate, or interconnects in a package structure. The sensitivity of such a large-area semiconductor device 30 to warpage and non-wet interconnects 121 can be avoided or mitigated by using a vacuum. For example, window 153 may include one or more vacuum holes therethrough to allow a vacuum to be applied to the semiconductor device 30. LAB tool 15 may include a vacuum mechanism to apply a vacuum through the vacuum holes of window 153 to force the semiconductor device 30 containing substrate 11 against window 153 during heating, thereby preventing substrate 11 from warping. In some instances, the TCB tool 35 may also include a vacuum mechanism, or may employ the same vacuum mechanism as the LAB tool 15, to apply a vacuum to the semiconductor device 30 from the side opposite to the LAB tool 15. In such instances, the plate 351 may include one or more vacuum holes for applying a vacuum to hold or force the electronic components 12, 13 against the plate 351, thereby preventing the electronic components 12, 13 from warping and preventing the interconnects 121, 131 from becoming unwetted during heating.

[0060] exist Figure 5A In the illustrated example, the hybrid bonder tool 40 may include a LAB tool 15 for irradiating a laser beam 151A from a laser source 151 below the semiconductor device 30 to bond electronic components 12 or 13 to the substrate 11. The hybrid bonder tool 40 may also include a TCB tool 35, also for bonding electronic components 12 or 13 to the substrate 11 while preventing warping of the electronic components 12 or 13. The TCB tool 35 may include a plate 351 and a heater source 352, and may press the electronic components 12, 13 from above or provide a backing while applying heat to limit warping of the electronic components 12, 13 during the bonding process. The plate 351 may be configured to press the top side of the electronic components 12 or 13 against the opposite side of the interconnects 121 or 131 when the laser 151A of the LAB tool 15 heats the interconnects 121 or 131. The plate 351 can be configured to transfer heat, vibration or pressure to the interconnect 121 or 131 when the hot / press plate 315 presses the top side of the electronic component 12 or 13.

[0061] The TCB tool 35 can be positioned above the LAB tool 15. In some instances, the plate 351 can initially be spaced apart from the electronic components 12, 13, and then the plate can be lowered after the semiconductor device 30 is placed on the window 153. The plate 351 can be brought into contact with the top of the electronic components 12, 13 to maintain pressure of the electronic components 12, 13 on the substrate 11. The plate 351 can apply pressure to the electronic components 12, 13 at a level as low as about 0.1 Newtons (N) (e.g., in the range of about 1 N to about 500 N). In some instances, the plate 351 can have a thickness in the range of about 1 mm to about 5 mm.

[0062] In some instances, plate 351 can vacuum-lock electronic components 12, 13 while simultaneously pressing them down. In some instances, vacuum locking can be achieved by coupling plate 351 to a vacuum generator that creates a vacuum suction through an opening on the bottom side of plate 351 and exposing the top side of electronic component 12 or 13 to such a vacuum opening in plate 351. When heat is transferred to electronic component 12 or 13, plate 351 can remain locked to electronic component 12 or 13 while simultaneously pressing it down from above to prevent warping of electronic component 12 or 13.

[0063] Plate 351 can be coupled to heater source 352 for heating heat / pressure plate 351, which can be transferred to electronic component 12 or 13 when plate 351 is brought into contact with electronic component 12 or 13. In some instances, heater source 352 can be maintained at a preset temperature in the range of about 10°C to about 450°C.

[0064] In some instances, the TCB tool 35 may be configured to vibrate the plate 351 or induce vibrations of the electronic components 12 or 13 against the substrate 11, wherein such vibrations may induce heat due to friction on the interconnects 121 or 131. In some instances, such heat from induced vibrations on the interconnects 121 or 131 may cause or facilitate bonding of the interconnects 121 or 131 to the substrate 11.

[0065] Heat transferred from board 351 to electronic component 12 or 13 can prevent warping that may occur due to temperature mismatch between the top and bottom sides of electronic component 12 or 13. For example, when using only LAB tool 15, laser beam 151A may heat and thus expand the bottom side of electronic component 12 or 13 more than the top side, where this difference may induce warping. This warping tendency can be controlled by applying compensating heat to the top side of electronic component 12 or 13 with board 351. In some instances, when heat is applied to interconnect 121 or 131 from LAB tool 15, the temperature of substrate 11 can be kept lower than the temperature of interconnect 121 or 131. In some instances, when heat is applied to interconnect 121 or 131 from LAB tool 15, the temperature of electronic component 12 or 13 using TCB tool 35 can be kept lower than the temperature of interconnect 121 or 131.

[0066] Figure 5B The semiconductor device 30 and LAB tool 15 are shown when the laser beam 151A is irradiated during the bonding process. Figure 5B In the example shown, the exemplary method of bonding the semiconductor device 30 to the substrate 11 by irradiating a laser beam 151A from a laser source 151 to melt the interconnects 121, 131 of the semiconductor device 30 can be similar to... Figure 3B and 4B The example method shown. In Figure 5B In the examples shown, during the bonding process, the thermal / pressure bonding tool 35 can press or heat the electronic device 12 or 13 from above. In some examples, heat can be applied to the interconnect 121 or 131 via a laser beam 151A from the LAB tool 15 through the substrate side opposite to the side where the electronic component 12 or 13 is placed. Heat, vibration, or pressure can be applied to the interconnect 121 or 131 through the electronic component 12 or 13 using the TCB tool 35. In some examples, the laser beam 151A can have a depth of field (DOF), and the interconnect 121 or 131 can be within the DOF when heated. In some examples, the LAB tool 15 and the TCB tool 35 can be applied simultaneously. In some examples, when heat is applied via the LAB tool 15, the window 153 can face or contact the side of the substrate 11 opposite to the side of the substrate 11 where the electronic component 12 or 13 is located.

[0067] Figure 5C The LAB tool 15 is shown after the joining process is completed. Figure 5C In the example shown, once the bonding of the substrate 11 and the electronic component 12 or 13 is completed, the irradiation of the laser beam 151A can be interrupted, and the thermo / pressure bonding tool 35 can be separated from the semiconductor device 30 and then raised. After the thermo / pressure bonding tool 35 is separated from the semiconductor device 30, the semiconductor device 30 can be passed to the next stage.

[0068] Figures 6A to 6D A detailed cross-sectional view of an example joint level using LAB tool 15 is shown, further illustrating the details regarding... Figure 3B , Figure 4B , Figure 5B The described junction stages are for semiconductor devices 10, 20, and 30.

[0069] Figure 6A Semiconductor devices 10, 20, 30 and LAB tool 15 are shown when a laser beam is irradiated during the bonding process. Figure 6A and Figure 3B , Figure 4B , Figure 5B Similar and shared descriptions. LAB tool 15 shares the corresponding features and elements as described with respect to FIG2. Optionally, TCB tool 35 may be included, together with LAB tool 15, for hybrid bonding of semiconductor device 30 as previously described with respect to FIG5.

[0070] As previously described with respect to stage 152, in some instances, stage 152a may comprise a transparent material such as glass or quartz, which allows the laser beam 151A to pass through stage 152a. As previously mentioned, in some instances, the transmittance of the laser beam 151a through stage 152a may be about 90% or greater to facilitate the LAB bonding process.

[0071] As shown in the figure, a laser beam 151A is irradiated from a laser source 151 toward a stage 152a, and this laser beam 151A can pass through the stage 152a, for example, through the window 153 portion of the stage 152a, to reach the substrate 11 of the semiconductor devices 10, 20, 30. The laser beam 151A can transfer or induce heat on the interconnects 121, 131, 141. In some instances, the laser beam 151A can reach the substrate 11 through the stage 152a, then pass through the substrate 11, and subsequently reach the interconnects 121, 131, 141, heating the interconnects by thermal irradiation. In some instances, interconnects 121, 131, and 141 can be positioned at the focal length or focused distance within the depth of field (DOF) of the laser beam 151A, and this focusing of the laser beam 151A on the interconnects 121, 131, and 141 can allow the interconnects 121, 131, and 141 to be heated more than the substrate 11 or electronic components 12, 13, and 14. In some instances, the laser beam 151A can reach the substrate 11 through stage 152a, and can then induce heat in one or more areas of the substrate 11, and such heated substrate areas can heat the interconnects 121, 131, and 141 through thermal conduction.

[0072] The interconnects 121, 131, and 141 can be heated until they bond to the conductive structure 112 of the substrate 11. Thermal and time parameters can be appropriately controlled to minimize bonding time for rapid throughput, while avoiding exposure to higher temperatures to minimize excessive thermal expansion or warping of the substrate 11. In some instances, the laser beam 151A may irradiate for about 2000 ms or less, or about 1000 ms or less, to induce appropriate heating of the interconnects 121, 131, and 141 and bonding with the substrate 11. In some instances, the heat induced by the laser beam 151A on the interconnects 121, 131, 141, or the substrate 11 can be controlled to remain below about 300°C or 350°C, for example, in the range of about 150°C to about 350°C or about 230°C to about 280°C.

[0073] Figure 6B Semiconductor devices 10, 20, 30 and LAB tool 15 are shown when a laser beam is irradiated during the bonding process. Figure 6B and Figure 3B , Figure 4B , Figure 5B Similar and shared descriptions. LAB tool 15 shares the corresponding features and elements as described with respect to FIG2. Optionally, TCB tool 35 may be included, together with LAB tool 15, for hybrid bonding of semiconductor device 30 as previously described with respect to FIG5.

[0074] As previously described, regarding stage 152, in some instances, stage 152b may comprise an opaque material, such as ceramic, that blocks or obstructs the laser beam 151A from passing through stage 152b. In some instances, the opaque material of stage 152b may comprise a metallic material. Also as previously described, in some instances, the transmittance of laser beam 151A through stage 152 may be less than 90%, for example, 0%.

[0075] As shown, a laser beam 151A is irradiated from a laser source 151 toward a stage block 152b (e.g., toward a window 153 portion of the stage block 152b). This laser beam 151A is substantially blocked by the stage block 152b, but it can heat the stage block 152b, for example, through thermal irradiation. This heat (indicated by the upward wavy arrows) in turn can be transferred from the heated stage block 152b to heat the interconnects 121, 131, and 141. In some instances, heat from the stage block 152b reaches and extends through the substrate 11 to heat the interconnects 121, 131, and 141 by thermal conduction.

[0076] Interconnects 121, 131, and 141 can be heated until they bond to the conductive structure 112 of the substrate 11. Thermal and time parameters can be appropriately controlled to reduce bonding time while avoiding exposure to higher temperatures to minimize excessive thermal expansion or warping of the substrate 11. In some instances, the laser beam 151A can irradiate for approximately 10,000 ms to approximately 30,000 ms or even longer for approximately 10 minutes to induce appropriate heating of the interconnects 121, 131, and 141 and bonding with the substrate 11. In some instances, the heat induced by the laser beam 151A on the interconnects 121, 131, 141, or the substrate 11 can be controlled to remain below approximately 300°C or 350°C, for example, in the range of approximately 150°C to approximately 350°C or approximately 230°C to approximately 280°C.

[0077] Figure 6C Semiconductor devices 10, 20, 30 and LAB tool 15 are shown when a laser beam is irradiated during the bonding process. Figure 6C and Figure 3B , Figure 4B , Figure 5B Similar and shared descriptions. LAB tool 15 shares the corresponding features and elements as described with respect to FIG2. Optionally, TCB tool 35 may be included, together with LAB tool 15, for hybrid bonding of semiconductor device 30 as previously described with respect to FIG5.

[0078] In some instances, stage block 152c may include a combination of transparent and opaque materials. For example, stage block 152c may include a stack of transparent material portions 152x and opaque material portions 152y. The features, materials, or properties of the transparent portion 152x may be similar to those described with respect to stage block 152a. The features, materials, or properties of the opaque portion 152y may be similar to those described with respect to stage block 152b.

[0079] As shown, a laser beam 151A is irradiated from a laser source 151 toward a stage block 152c, and this laser beam 151A can pass through the transparent material portion 152x of the stage block 152c to reach the opaque material portion 152y. The laser beam 151A is essentially blocked by the opaque material portion 152y, but it can be heated, for example by thermal irradiation, to either the opaque material portion 152y or the transparent material portion 152x, thereby heating the top of the stage block 152c. This heat, indicated by the upward wavy arrow, can then be transferred to the thermal interconnects 121, 131, and 141. In some instances, heat from the stage block 152c is transferred via thermal conduction to extend through the substrate 11 and heat the interconnects 121, 131, and 141. The interconnects 121, 131, and 141 can be heated until they bond with the conductive structure 112 of the substrate 11. In some instances, because the laser beam 151A is blocked by the opaque material portion 152y and cannot reach the substrate 11, the heating of the substrate 11 or the interconnects 121, 131, 141 via thermal conduction can be controlled to remain below the level where the laser beam 151A reaches and heats the substrate 11 through thermal irradiation. This thermal control can be used to prevent or limit excessive thermal expansion or warping of the substrate 11.

[0080] There may be instances where the thickness of the transparent portion 152x is greater than the thickness of the opaque portion 152y. For example, the thickness of the transparent portion 152x may range from about 1 mm to about 300 mm, and the thickness of the opaque portion 152y may range from about 100 µm to about 100 mm. In some instances, the opaque portion 152y may include one or more coatings covering the transparent portion 152x.

[0081] The interconnects 121, 131, and 141 can be heated until they bond to the conductive structure 112 of the substrate 11. Thermal and time parameters can be appropriately controlled to reduce bonding time while avoiding exposure to higher temperatures to minimize excessive thermal expansion or warping of the substrate 11. In some examples, the laser beam 151A can irradiate for approximately 5000 ms to approximately 20000 ms to induce appropriate heating of the interconnects 121, 131, and 141 and bonding with the substrate 11. In some examples, the heat induced by the laser beam 151A on the interconnects 121, 131, 141, or the substrate 11 can be controlled to remain below approximately 300°C or 350°C, for example, in the range of approximately 150°C to approximately 350°C or approximately 230°C to approximately 280°C.

[0082] Figure 6D Semiconductor devices 10, 20, 30 and LAB tool 15 are shown when a laser beam is irradiated during the bonding process. Figure 6D and Figure 3B , Figure 4B , Figure 5BSimilar and shared descriptions. LAB tool 15 shares the corresponding features and elements as described with respect to FIG2. Optionally, TCB tool 35 may be included, together with LAB tool 15, for hybrid bonding of semiconductor device 30 as previously described with respect to FIG5.

[0083] Stage block 152d may be an embodiment of stage block 152 described with respect to Figures 1 through 5. As previously described with respect to stage block 152, in some instances, stage block 152d may include a grating that allows a certain amount of laser light to pass through. In some instances, stage block 152d may include a combination of transparent and opaque materials. For example, stage block 152d may include a stack of transparent material portions 152x and opaque material portions 152z. The features, materials, or properties of the transparent portion 152x may be similar to those described with respect to stage block 152a. The features, materials, or properties of the opaque portion 152z may be similar to those described with respect to stage block 152b or opaque portion 152y.

[0084] The opaque portion 152z includes a grating or pattern of openings in the opaque material that selectively allow a laser beam 151A aligned with such openings to pass through stage 152d. In some instances, such openings may be perpendicularly aligned with interconnects 121, 131, 141 or with semiconductor devices 10, 20, 30 on substrate 11. In some instances, the opaque material is configured to be perpendicularly aligned with portions of the first substrate that are not aligned with interconnects 121, 131, 141 or with semiconductor devices 10, 20, 30.

[0085] Such as about crossing Figure 6A As described in the description of the laser beam 151A of the stage block 152a, such an aligned laser beam 151A will cause heating and bonding of the interconnects 121, 131, 141. Conversely, a laser beam 151A that is misaligned with such an opening will be blocked by the opaque material of the opaque portion 152z and will not pass through the stage block 152d.

[0086] As shown, a laser beam 151A is irradiated from a laser source 151 toward a stage block 152d, and this laser beam 151A can pass through the transparent material portion 152x of the stage block 152d. A laser beam 151A aligned with an opening defined by a grating in the opaque portion 152z can pass through the stage block 152d to reach the substrate 11 and cause heating of the interconnects 121, 131, and 141 for bonding. A laser beam 151A misaligned with the opening of the grating in the opaque portion 152z will be substantially blocked from passing through the stage block 152d. The interconnects 121, 131, and 141 can be heated until they bond with the conductive structure 112 of the substrate 11.

[0087] The grating of the opaque portion 152z can be configured such that the areas of the substrate 11 that need to be exposed for heating the interconnects 121, 131, 141 via the laser beam 151A passing through the stage block 152d are aligned with the opening pattern. Other areas of the substrate 11 that do not need to be exposed for bonding can be aligned with the opaque material of the opaque portion 152z, or misaligned with the opening pattern, to block or shield the laser beam 151A. Such features can limit unnecessary thermal exposure of the shielded areas of the substrate 11, thereby limiting excessive thermal expansion or warping.

[0088] In some instances, the grating of the opaque portion 152z can be configured such that the opening pattern exposes a portion of the substrate 11 on which the semiconductor devices 10, 20, and 30 are located, while other portions of the substrate 11 outside the semiconductor devices 10, 20, and 30 remain shielded by the material of the opaque portion 152z.

[0089] In some instances, the grating of the opaque portion 152z can be configured such that the opening pattern exposes portions of the substrate 11 containing the interconnects 121, 131, 141, while other portions of the substrate 11 outside the periphery of the interconnects 121, 131, 141 remain shielded by the material of the opaque portion 152z. For example, as seen with respect to the semiconductor device 20, the grating is configured such that the opaque portion 152z: (a) exposes portions of the substrate 11 below the semiconductor devices 12, 13 within the periphery of the interconnects 121, 131, and (b) shields portions of the substrate 11 below the semiconductor devices 12, 13 outside the periphery of the interconnects 121, 131.

[0090] Instances may exist in which the thickness of the transparent portion 152x may be greater than the thickness of the opaque portion 152z. For example, the thickness of the transparent portion 152x may range from about 1 mm to about 300 mm, and the thickness of the opaque portion 152z may range from about 100 µm to about 100 mm. In some instances, the opaque portion 152z may include one or more patterned coatings covering the transparent portion 152x.

[0091] The interconnects 121, 131, and 141 can be heated until they bond to the conductive structure 112 of the substrate 11. Thermal and time parameters can be appropriately controlled to minimize bonding time for rapid throughput, while avoiding exposure to higher temperatures to minimize excessive thermal expansion or warping of the substrate 11. In some instances, the laser beam 151A may irradiate for about 2000 ms or less, or about 1000 ms or less, to induce appropriate heating of the interconnects 121, 131, and 141 and bonding with the substrate 11. In some instances, the heat induced by the laser beam 151A on the interconnects 121, 131, 141, or the substrate 11 can be controlled to remain below about 300°C or 350°C, for example, in the range of about 150°C to about 350°C or about 230°C to about 280°C.

[0092] In some instances, the LAB tool 15 may include a laser source 151U, which may be similar to laser source 151 but may be configured to emit a laser beam 151B toward the top side of the semiconductor devices 10, 20, 30 or the top side of the stage 152a. The laser beam 151B may be similar to laser beam 151A and may induce heating of the interconnects 121, 131, 141 from the top of the respective semiconductor devices 10, 20, 30 to aid in bonding the interconnects 121, 131, 141 to the substrate 11.

[0093] like Figures 6A to 6D As shown, LAB tool 15 may be provided together with pressure tool 65 as part of hybrid connector tool 60. In some embodiments, hybrid connector tool 60 may include or may resemble hybrid connector tool 40, as per [reference to...]. Figure 2B Or as depicted in Figure 5. For example, pressure tool 65 may include or may resemble TCB tool 35. Pressure tool 65 may include plate 651, which may resemble plate 351 or may provide one or more of pressure, heat, or vibration to semiconductor device 30. In some instances, plate 651 of pressure tool 65 may serve as a counterweight plate to provide pressure to the top of semiconductor device 30 (e.g., to the top of semiconductor assembly 12 or 13) without simultaneously providing heat or vibration. In some instances, the inherent weight of plate 651 may provide pressure to the top of semiconductor device 30 without requiring any additional force to push plate 651 onto semiconductor device 30. The pressure applied by plate 651 on the top side of semiconductor device 30 may prevent or limit excessive warping of semiconductor device 30, semiconductor assembly 12, 13, or substrate 11 during bonding.

[0094] In some embodiments, the laser source 151U may be used in conjunction with the pressure tool 65 during bonding. For example, the characteristics, properties, or materials of the plate 651 of the pressure tool 65 may be similar in transmittance to those described with respect to stages 152a, 152b, 152c, or 152d, such that the laser beam 151B can induce bonding of the semiconductor device 30 to the substrate 11 through the pressure tool 65.

[0095] For example, such as Figure 6A As shown, plate 651 may be transparent or comprise transparent material, similar to stage 152a. Laser beam 151B from laser source 151U may pass through plate 651 and reach semiconductor device 30 or semiconductor assembly 12, 13 to induce heat for bonding interconnects 121, 131, similar to that described with respect to stage 152a and laser beam 151A.

[0096] As another example, such as Figure 6B As shown, plate 651 may be opaque or comprise opaque material, similar to stage 152b. The laser beam 151B from laser source 151U may be shielded or blocked by plate 651, but may heat plate 651 to induce heat transfer for joining interconnects 121, 131, similar to that described with respect to stage 152b and laser beam 151A.

[0097] As another example, such as Figure 6C As shown, plate 651 may comprise a combination or stack of transparent and opaque materials or layers, similar to stage 152c. A laser beam 151B from laser source 151U can pass through the transparent material of plate 651 and reach the opaque material of plate 651. At the opaque material, the laser beam may be blocked, but plate 651 can be heated to induce heat transfer for joining interconnects 121, 131, similar to what is described with respect to stage 152c and laser beam 151A.

[0098] As another example, such as Figure 6D As shown, plate 651 may comprise a combination or stack of transparent and opaque materials or layers, defining a grating with transparent and opaque portions, similar to stage block 152d. A portion of the laser beam 151B from laser source 151U may be blocked by the opaque material of the grating of plate 651. However, a portion of the laser beam 151B from laser source 151U may pass through the transparent material and opening pattern in the grating of plate 651 to reach the top of semiconductor device 30 or semiconductor components 12, 13 to induce heat transfer for bonding interconnects 121, 131, similar to that described with respect to stage block 152d and laser beam 151A.

[0099] Figure 7AA cross-sectional view is shown of a bonding stage for bonding interconnects of a semiconductor device using a LAB tool 75. The LAB tool 75 may include a laser source 751L configured to emit a laser beam 751A, or a laser source 751U configured to emit a laser beam 751B. Figure 7B Plan views illustrating different exemplary operating conditions of the LAB tool 75 utilizing laser beam 751A from laser source 751L or laser beam 751B from laser source 751U. The LAB joining tool 75 is in... Figure 7A The diagram shows the interconnects of semiconductor devices 10', 10, 20, and 30 being bonded to their respective substrates 11.

[0100] Semiconductor device 10' is shown as being placed on stage 152 and may be similar to semiconductor device 10, 20, or 30 or variations thereof. Semiconductor device 10' may include electronic components 12 or 13 on a first side of substrate 11' and may include interconnects 101' or electronic components 13' on a second side of substrate 11'. For example, in some instances, semiconductor device 10' may lack electronic components 13' on the second side of substrate 11' or may lack electronic components 13' on the first side of substrate 11', such that electronic components 12 are attached to stage 152. In some instances, interconnects 121, 131, 131', or 141 may be simultaneously bonded to the corresponding side of substrate 11' via laser beams 751A or 751B from laser sources 751L or 751U. In some instances, the interconnects 121 or 131 of electronic components 12 or 13 can be pre-bonded to a first side of substrate 11' using any of the first LAB bonding or hybrid bonding processes or tools described herein. Then, semiconductor device 10' can be reversed and placed on stage block 152 such that a second side of substrate 11' faces the laser source 751U of LAB tool 75, as... Figure 7A As shown, it is used to join interconnects 101' or 131' by means of a laser beam 751B.

[0101] LAB tool 75 may be similar to LAB tool 15 and may include a laser source 751L for aiming stage block 152. Stage block 152 may include any one of one or more variations, including but not limited to those relating to... Figures 6A to 6D For those described in stages 152a, 152b, 152c, and 152d. The laser source 751L may be similar to laser source 151 and may include a laser emitter array of laser emitters 755L. In some instances, the laser source 751L may be referred to as a laser emitter array, a laser emitter panel, or a laser diode panel.

[0102] Laser emitter 755L can emit a corresponding laser beam 751A individually, which may be similar to laser beam 151A. Laser emitter 755L and corresponding laser beam 751A can be individually vertically aligned with a portion of a target, such as a portion of stage 152 or a portion of semiconductor devices 10, 10', 20, 30. In some instances, laser beam 751A emitted by laser source 751L can leave the corresponding laser emitter 755L and proceed individually toward its corresponding target. In some instances, laser source 751L does not necessarily rely on filters, collimators, or lenses to group, aim, or guide a group of laser beams 751A. Laser source 751L may include a sufficiently large area to process many substrates simultaneously, such as RDL substrates, preformed substrates, or wafers. In some instances, the length and width of laser source 751L may be at least approximately 300 mm × 300 mm. For example, the length and width of laser source 751L may be at least approximately 600 mm × 600 mm.

[0103] In some instances, a single laser emitter 755L may include a laser diode, such as an indium phosphide (InP), gallium nitride (GaN), zinc selenide (ZnSe), aluminum gallium arsenide (AlGaAs), indium gallium nitride (InGaN), or zinc oxide (ZnO) diode. Examples exist where a single laser emitter 755L may include more than one laser diode. In some instances, a single laser emitter 755L may include a length or width of about 100 µm to about 2 mm. In some instances, the target area of ​​a single laser emitter may include a length or width of about 100 µm to about 2 mm. In some instances, a single laser emitter 755L may emit a laser beam 751A with a power of about 10 milliwatts to about 2 watts. In some instances, a single laser emitter 755L may emit a laser beam 751A with a wavelength of about 600 µm to about 2,000 µm.

[0104] like Figure 7A and Figure 7BAs shown, the LAB tool 75 can control the laser source 751L, enabling different laser emitters 755L to selectively emit corresponding laser beams 751A toward different target regions at different power levels. For example, the LAB tool 75 can configure different individual laser emitters 755L to emit corresponding laser beams 751A at different laser power levels, such as a high-power beam 751x, a medium-power beam 751y (with lower power than the high-power beam 751x), or a low-power beam 751y (with lower power than the high-power beam 751x or the medium-power beam 751y). In some instances, such laser configurations can achieve different, adjustable, or varying power or temperature gradients on the target. In some instances, one or more laser beams 751A emitted as a low-power beam 751z may correspond to an unpowered or "off" state.

[0105] In some instances or regions, the LAB tool 75 can control the laser source 751L such that the laser emitter 755L, which is vertically aligned within the periphery of the interconnects 121, 131, 141, emits a corresponding laser beam 751A in the form of a high-power beam 751x to heat the interconnects 121, 131, 141 and bond them to the substrate 11.

[0106] In some instances or regions, such as with regard to semiconductor device 20, LAB tool 75 can control laser source 751L such that laser emitter 755L, which is vertically aligned within the periphery of electronic components 12, 13, 14, emits a corresponding laser beam 751A in the form of a high-power beam 751x to bond electronic components 12, 13, 14 to substrate 11.

[0107] In some instances, the LAB tool 75 can control the laser source 751L, causing the laser emitter 755L, which is perpendicularly aligned with the area outside the periphery of the interconnects 121, 131, 141, to emit a corresponding laser beam 751A in the form of a medium-power beam 751y or a low-power beam 751z.

[0108] For example, in Figure 7A In the semiconductor device 10, a laser emitter 755L, which is perpendicularly aligned with electronic components 12 and 13 and located outside the periphery of interconnects 121 and 131, emits a corresponding laser beam 751A in the form of a medium-power beam 751y.

[0109] For example, in Figure 7A In the semiconductor device 30, a laser emitter 755L, which is perpendicularly aligned with electronic components 12 and 13 and located outside the periphery of interconnects 121 and 131, emits a corresponding laser beam 751A in the form of a low-power beam 751z.

[0110] In some instances, such as with regard to semiconductor device 20, LAB tool 75 can control laser source 751L such that laser emitter 755L, which is perpendicularly aligned with the area between the periphery of electronic components 12, 13, 14, emits a corresponding laser beam 751A in the form of a low-power beam 751z.

[0111] In some instances, such as with regard to semiconductor device 30, LAB tool 75 can control laser source 751L such that laser emitter 755L, which is perpendicularly aligned with the area between the periphery of electronic components 12, 13, emits a corresponding laser beam 751A in the form of a medium-power beam 751y.

[0112] In some instances or regions, the LAB tool 75 can control the laser source 751L so that the laser emitter 755L, which is perpendicularly aligned with the boundary region between the semiconductor devices 10, 10', 20, 30, emits a corresponding laser beam 751A in the form of a low-power beam 751z.

[0113] In some instances, LAB tool 75 may include a laser source 751U located above stage block 152. In some instances, laser source 751U may be similar to laser source 151 or 151U. In some instances, laser source 751U may be similar to laser source 751L and may include a laser emitter array including laser emitter 755U (which may be similar to laser emitter 755L). There may be embodiments where LAB tool 75 may include laser source 751U but not laser source 751L, or embodiments that may include laser source 751L but not laser source 751U.

[0114] Laser emitter 755U can emit a corresponding laser beam 751B individually, which can be similar to laser beam 751A. Laser emitter 755U and the corresponding laser beam 751B can be individually aligned perpendicularly to a portion of a target, such as a portion of stage 152 or a portion of semiconductor devices 10, 10', 20, 30. In some instances, laser beam 751B emitted by laser source 751U can leave the corresponding laser emitter 755U and proceed independently toward its corresponding target. In some instances, laser source 751U does not necessarily rely on filters, collimators, or lenses to group, aim, or guide a group of laser beams 751B.

[0115] The upper laser emitter 755U of the upper laser source 751U can be aimed at the top side of the stage block 152, and the lower laser emitter 755L of the lower laser source 751L can be aimed at the bottom side of the stage block 152. The LAB tool 75 can control the laser sources 751U and 751L to simultaneously emit or modulate the laser beam 751A or 751B during the engagement of the substrate 11 with the semiconductor devices 10, 10', 20, 30 or with the interconnects 121, 131, 101' or 141.

[0116] like Figure 7A and Figure 7B As shown, the LAB tool 75 can control the laser source 751U, enabling different laser emitters 755U to selectively emit corresponding laser beams 751B toward different target areas at different power levels. For example, the LAB tool 75 can configure different individual laser emitters 755U to emit corresponding laser beams 751B at different laser power levels, such as a high-power beam 751x, a medium-power beam 751y (with lower power than the high-power beam 751x), or a low-power beam 751y (with lower power than the high-power beam 751x or the medium-power beam 751y). In some instances, such laser configurations can achieve different, adjustable, or varying power or temperature gradients on the target. In some instances, one or more laser beams 751B emitted as a low-power beam 751z may correspond to an unpowered or "off" state.

[0117] In some instances or regions, the LAB tool 75 can control the laser source 751U such that the laser emitter 755U, which is vertically aligned within the periphery of the interconnects 121, 131, 101', 141, emits a corresponding laser beam 751B in the form of a high-power beam 751x to heat the interconnects 121, 131, 101', 141 and bond them to the substrate 11.

[0118] In some instances or regions, such as with regard to semiconductor device 20, LAB tool 75 can control laser source 751U such that laser emitter 755U, vertically aligned within the periphery of target electronic components 12, 14, emits a corresponding laser beam 751B in the form of a high-power beam 751x to bond electronic components 12, 14 to substrate 11. In some cases, not all components of the device need to be targeted. For example, also with regard to semiconductor device 20, LAB tool 75 can control laser source 751U such that laser emitter 755U, vertically aligned within the periphery of electronic component 13, emits a corresponding laser beam 751B in the form of a low-power beam 751z or a medium-power beam 751y. This adjustment can be made, for example, when electronic component 13 includes a material sensitive to laser beam 751B, or a material that can block, reflect, or impede the passage of laser beam 751B. In some instances, such materials may include molding compounds or metals, for example, for heat dissipation or for electromagnetic interference (EMI) shielding.

[0119] In some instances, the LAB tool 75 can control the laser source 751U, causing the laser emitter 755U, which is perpendicularly aligned with the area outside the periphery of the interconnects 121, 131, 101', 141, to emit a corresponding laser beam 751A in the form of a medium-power beam 751y or a low-power beam 751z.

[0120] like Figure 7A As shown, pressure tool 65 may be supplied together with LAB tool 75 as part of mixing connector tool 70. Pressure tool 65 may be as described with respect to FIG. 6.

[0121] The pressure tool 65 may include or be similar to the TCB tool 35, wherein the plate 651 may be similar to plate 351 or may provide one or more of pressure, heat, or vibration to the semiconductor device 30 during bonding. In some instances, the plate 651 of the pressure tool 65 may serve as a counterweight plate to apply pressure to the top of the semiconductor device 30 (e.g., to the top of semiconductor assembly 12 or 13) without simultaneously providing heat or vibration. In some instances, the inherent weight of the plate 651 may apply pressure to the top of the semiconductor device 30 without requiring any additional force to push the plate 651 onto the semiconductor device 30. The pressure applied by the plate 651 on the top side of the semiconductor device 30 may prevent or limit excessive warping of the semiconductor device 30, semiconductor assembly 12, 13, or substrate 11 during bonding.

[0122] In some embodiments, the laser source 751U can be used with the pressure tool 65 during bonding. For example, the characteristics, properties, or materials of the plate 651 of the pressure tool 65 can be similar to those described above. Figures 6A-6DThose depicted in any of the figures enable the laser beam 751B to induce bonding between the semiconductor device 30 and the substrate 11 via the pressure tool 65.

[0123] As an example, similar to about Figure 6A As described, plate 651 may be transparent or comprise transparent materials. A laser beam 751B (e.g., a high-power beam 751x or a medium-power beam 751y) from laser source 751U may pass through plate 651 and reach the respective target areas of semiconductor device 30 or semiconductor components 12, 13 to induce heat for bonding interconnects 121, 131.

[0124] As another example, similar to the discussion about Figure 6B As described, plate 651 may be opaque or comprise opaque materials. A laser beam 751B (e.g., a high-power beam 751x or a medium-power beam 751y) from laser source 751U may be shielded or blocked by plate 651, but plate 651 may be heated to induce heat transfer for joining interconnects 121, 131.

[0125] As another example, similar to the discussion about Figure 6C As described, plate 651 may comprise a combination or stack of transparent and opaque materials or layers. A laser beam 751B (e.g., a high-power beam 751x or a medium-power beam 751y) from laser source 751U can pass through the transparent material of plate 651 and reach the opaque material of plate 651. The laser beam may be blocked at the opaque material, but plate 651 can be heated to induce heat transfer for joining interconnects 121, 131.

[0126] As another example, similar to the discussion about Figure 6D As described, plate 651 may include a combination or stack of transparent and opaque materials or layers defining a grating with transparent and opaque portions. A portion of the laser beam 751B from laser source 751U may be blocked by the opaque material of the grating of plate 651. However, a portion of the laser beam 751B from laser source 751U (e.g., a high-power beam 751x or a medium-power beam 751y) may pass through the transparent material and opening pattern in the grating of plate 651 to reach the top of semiconductor device 30 or semiconductor assembly 12, 13 to induce heat transfer for bonding interconnects 121, 131.

[0127] Figure 7C The diagram shows corresponding plan views of the semiconductor device 20 (including electronic components 12, 13, 14 on the substrate 11) and the laser source 152 (including a corresponding laser emitter 755 perpendicularly aligned with the semiconductor device 20), wherein such plan views correspond to... Figure 7AThe corresponding portion of the side view. Laser source 751 may correspond to either laser source 751L or laser source 751U. Laser emitter 755 may correspond to either laser emitter 755L or 755U.

[0128] In this example, LAB tool 75 controls laser emitter 755, which is perpendicularly aligned with electronic components 12, 13, and 14, to emit a laser beam in the form of a high-power beam 751x (e.g., Figure 7A The laser beam 75 (either 751A or 751B) is used to bond electronic components 12, 13, and 14 to the substrate 11. In this example, the LAB tool 75 also controls a laser emitter 755, which is not perpendicularly aligned with electronic components 12, 13, and 14, to emit a laser beam (e.g., a low-power beam 751z) in the form of a laser beam (e.g., laser beam 751A or 751B). Figure 7A The laser beam in the 751A or 751B).

[0129] In some instances, the LAB tool 75 may include a bonding monitor 75i that measures the temperature of multiple regions of the semiconductor device 20 in real time during bonding. The bonding monitor 75i may include, for example, an optical infrared imager or a monitor. The bonding monitor 75i may be configured to determine whether the laser beam of the laser emitter 755 has achieved the target temperature for each of these multiple regions of the semiconductor device 20. This monitoring can be used to confirm the appropriate temperature at which interconnect bonding has been achieved and to prevent temperatures that could cause overheating, thermal expansion, warping, or damage to the substrate 11 or electronic components 12, 13, 14. If the bonding monitor 75i determines that some target regions of the semiconductor device 20 are measured to be outside their target temperature range (“off-range”) during bonding, the LAB tool 75 may react in real time and selectively control individual laser emitters 755 aligned with such off-range regions to increase or decrease the power of the laser beam emitted toward such off-range regions to direct them into the target temperature range.

[0130] Examples from steps 7C1-7C4 illustrate this type of operation. For example... Figure 7C As seen, the amplification section 12Z of the electronic component 12 and the amplification section 755Z of the laser source 751 are shown. The amplification section 755Z presents a laser emitter 755 that is perpendicularly aligned with the electronic component 12.

[0131] In step 7C1, as seen in amplification section 755Z, laser emitter 755 emits a laser beam at an initial or baseline power toward the region corresponding to electronic component 12, and as seen in amplification section 12Z, such laser beam in electronic component 12 generates heat accordingly.

[0132] In step 7C2, the bonding monitor 75i monitors the temperature of multiple regions of the electronic component 12 during bonding, identifying off-range regions 12-1 at temperatures above their target temperature range and off-range regions 12-2 at temperatures below their target temperature range.

[0133] In step 7C3, based on monitoring information from the engagement monitor 75i, the LAB tool 75 selectively controls laser emitters 755-1 and 755-2 to adjust the power of their respective laser beams. Laser emitter 755-1 is vertically aligned with the off-range region 12-1 of the electronic component 12, and laser emitter 755-2 is vertically aligned with the off-range region 12-2 of the electronic component 12. To counteract the high temperature measured at the off-range region 12-1 of the electronic component 12, the LAB tool 75 can selectively control laser emitter 755-1 to reduce its laser beam power. To counteract the low temperature measured at the off-range region 12-2 of the electronic component 12, the LAB tool 75 can selectively control laser emitter 755-2 to increase its laser beam power.

[0134] In step 7C4, due to the laser beam adjustment of the corresponding laser emitters 755-1 and 755-2, the off-range regions 12-1 and 12-2 of the electronic component 12 reach their target temperatures. The bonding monitor 75i can continuously monitor multiple regions of the electronic component 12, allowing the LAB tool 75 to selectively control the power of the respective laser emitters 755 as needed to keep multiple regions of the electronic component 12 within their target temperature range during bonding.

[0135] This disclosure includes references to certain examples. However, those skilled in the art will understand that various changes can be made and equivalents can be substituted without departing from the scope of this disclosure. Those skilled in the art will also understand that several variations or options are inherently disclosed by the drawings supported by the specification for simplicity and clarity. For example, any of the semiconductor devices 10, 10', 20, 30 may include a dielectric, such as an underfill or similar molding compound encapsulation, surrounding any of the respective interconnects 121, 131, 141, 101' to further secure them to the respective substrates 11, 11'. As another example, any of the semiconductor devices 10, 10', 20, or 30 may include, for example, an encapsulation of a molding compound covering one or more sides of substrates 11, 11' and one or more sides of elements 12, 13, 13', 14, 101'. Furthermore, modifications can be made to the disclosed examples without departing from the scope of this disclosure. Therefore, it is intended that this disclosure be limited to the disclosed examples, but rather that it encompass all examples falling within the scope of the appended claims.

Claims

1. A method for manufacturing a semiconductor device, characterized in that, include: An electronic component is provided above a substrate, wherein the electronic component includes a silicon body and metal interconnects, wherein the interconnects of the electronic component contact a conductive structure of the substrate. The substrate is provided on a laser-assisted bonding tool, wherein the laser-assisted bonding tool includes a stage block having a window, wherein the window of the stage block comprises a solid translucent material; and The interconnect is heated using a laser beam passing through the window until the interconnect is bonded to the conductive structure; The stage block supports the window and the substrate located above the laser beam, and the laser beam points to the interconnect through the bottom side of the window and through the substrate; Wherein, the substrate is located on the window, and the window is configured to support the substrate; and The space occupied by the window is equal to or greater than the space occupied by the substrate.

2. The method according to claim 1, characterized in that, The laser beam has a depth of field, and the interconnect is located within the depth of field when heated.

3. The method according to claim 1, characterized in that, The window comprises quartz.

4. The method according to claim 1, characterized in that, The electronic component is above a first side of the substrate, and the laser beam is applied to the interconnect from a second side of the substrate opposite to the first side.

5. The method according to claim 1, characterized in that, The heat applied to the interconnect is greater than the heat applied to the body of the electronic component.

6. The method according to claim 1, characterized in that, The method further includes maintaining the temperature of the substrate directly adjacent to the interconnect below the temperature of the interconnect when heat is applied to the interconnect from the laser beam.

7. The method according to claim 1, characterized in that, It further includes maintaining the temperature of the electronic components directly adjacent to the interconnect below the temperature of the interconnect when heat is applied to the interconnect from the laser beam.

8. The method according to claim 1, characterized in that, The method further includes maintaining the temperature of the molding compound adjacent to the electronic component and directly adjacent to the interconnect at a lower temperature than that of the interconnect when heat is applied to the interconnect from the laser beam.

9. The method according to claim 1, characterized in that, The laser beam illuminates the interconnect through the bottom side of the window and through the substrate, without passing through the electronic components.

10. A method for manufacturing a semiconductor device, characterized in that, include: An electronic component is provided above a first substrate side of a substrate, wherein the electronic component comprises a semiconductor material, and wherein interconnects of the electronic component contact a conductive structure of the substrate. The substrate is provided in a hybrid bonding tool, the hybrid bonding tool comprising a laser-assisted bonding tool and a heat / pressure bonding tool; A first heat is applied to the interconnect via a laser beam from the laser-assisted bonding tool through a second substrate side opposite to the first substrate side; as well as The heat / pressure bonding tool is used to apply a second heat and pressure to the interconnect via the electronic components; The laser-assisted bonding tool includes a window comprising a solid semi-transparent material, wherein the substrate is located on the window, and the laser beam is applied to the interconnect through the window; and The laser beam points to the interconnect via the bottom side of the window and the substrate.

11. The method according to claim 10, characterized in that, The laser beam has a depth of field, and the interconnect is located within the depth of field when heated.

12. The method according to claim 10, characterized in that, The heat / pressure bonding tool includes a heater source and a heat / pressure plate, wherein the second heat is applied through the heat / pressure plate using the heater source, and the pressure is applied by pressing the heat / pressure plate onto the electronic component.

13. The method according to claim 10, characterized in that, The laser-assisted bonding tool and the heat / pressure bonding tool are used simultaneously.

14. The method according to claim 10, characterized in that, The method further includes maintaining the temperature of the substrate directly adjacent to the interconnect below the temperature of the interconnect when the first heat is applied to the interconnect from the laser-assisted bonding tool.

15. The method according to claim 10, characterized in that, The method further includes using the heat / pressure bonding tool to maintain the temperature of the electronic component directly adjacent to the interconnect below the temperature of the interconnect when the first heat is applied to the interconnect from the laser-assisted bonding tool.

16. The method according to claim 10, characterized in that, When the first heat is applied, the window contacts the second side of the substrate.

17. The method according to claim 10, characterized in that, The laser beam illuminates the interconnect through the bottom side of the window and through the substrate, without passing through the electronic components.

18. The method according to claim 10, characterized in that, The window is used to support the substrate.

19. The method according to claim 10, characterized in that, The space occupied by the window is equal to or greater than the space occupied by the substrate.

20. A method for manufacturing a semiconductor device using a laser-assisted bonding tool, characterized in that, The method includes: Provide laser source; A block including a physical window is provided above the laser source; The laser source is configured to direct a laser beam to the physical window to apply a first heat to the interconnects of the workpiece supported by the stage block; The workpiece includes: An electronic component and a substrate, the electronic component including the interconnect, and the substrate including a conductive structure in contact with the interconnect; The laser beam is directed from below the workpiece toward the interconnect and passes through the physical window; Wherein, when the laser beam applies the first heat to the interconnect, the temperature of the portion of the workpiece directly adjacent to the interconnect remains lower than the temperature of the interconnect; The laser beam is directed toward the interconnect via the bottom side of the physical window and through the substrate; Wherein, the workpiece is located on the physical window, and the physical window is configured to support the workpiece; and The physical window occupies a space equal to or greater than the workpiece's space.

21. The method according to claim 20, characterized in that: The substrate includes a first side and a second side opposite to the first side; The electronic component is located above the first side of the substrate and contacts the conductive structure via the interconnect; and The laser source is configured to emit the laser beam to apply the first heat to the interconnect through the second side of the substrate.

22. The method according to claim 20, characterized in that, Further includes: Provide a heat / pressure bonding tool, which includes a heat / pressure plate; wherein: The heat / pressure plate is configured to press the top side of the electronic component opposite the interconnect when the laser source applies the first heat to the interconnect, and The heat / pressure plate is configured to transfer a second heat and pressure to the interconnect when the heat / pressure plate presses against the top side of the electronic component.

23. The method according to claim 20, characterized in that, The physical window includes ceramic.

24. The method according to claim 20, characterized in that, The electronic component includes silicon, and the substrate includes a non-silicon material.

25. The method according to claim 20, characterized in that, The laser beam is directed toward the interconnect via the bottom side of the physical window and through the substrate, without passing through the electronic components.

26. A system, characterized in that, include: Laser-assisted bonding tools, including: A block hierarchy, including windows, wherein: The window of the block comprises a solid translucent material; The stage block supports the window and the substrate; The substrate is located on the window, and the window is used to support the substrate. The space occupied by the window is equal to or greater than the space occupied by the substrate; An electronic component is disposed above the substrate, the electronic component comprising a silicon-based body and metal interconnects; and The interconnect of the electronic component contacts the conductive structure of the substrate; A laser source is configured to direct a laser beam through the bottom side of the window and through the substrate toward the interconnect to apply a first heat to the interconnect, thereby bonding the interconnect to the conductive structure of the substrate.

27. The system according to claim 26, characterized in that, The laser source is configured to emit the laser beam and apply the first heat to the interconnect through the bottom side of the substrate.

28. The system according to claim 26, characterized in that, Further includes: Heat / pressure bonding tools, including heat / pressure plates; in: When the laser source applies the first heat to the interconnect, the heat / pressure plate is configured to press against the top side of the electronic component opposite the interconnect; and When the heat / pressure plate presses against the top side of the electronic component, the heat / pressure plate is configured to transfer a second heat or pressure to the interconnect.

29. The system according to claim 26, characterized in that, The window may be made of quartz or ceramic.

30. A system, characterized in that, include: Laser-assisted bonding tools, including: A stage block having a first side and a second side opposite to the first side, wherein the first side of the stage block is configured to support a first substrate and a first electronic component coupled to the first substrate, the first electronic component including a first interconnect; and A first laser source, facing the first side of the stage block, is configured to emit a first laser beam toward the first side of the stage block to induce a first heat on the first interconnect; and A second laser source, facing the second side of the stage block, is configured to emit a second laser beam toward the second side of the stage block to induce a second heat on the first interconnect. The first heat and the second heat bond the first interconnect to the first substrate.

31. The system according to claim 30, characterized in that: The first laser is a first vertical laser beam, and The second laser is a second vertical laser beam.

32. The system according to claim 30, characterized in that, The stage includes a transparent material portion that allows the second laser to pass through and reach the first substrate.

33. The system according to claim 30, characterized in that, The stage block includes an opaque material portion that blocks the second laser from passing through and reaching the first substrate.

34. The system according to claim 30, characterized in that: The level block includes: The opaque material portion serves to block the second laser from passing through and reaching the first substrate; and A transparent material portion is provided to allow the second laser to pass through and reach the opaque material portion.

35. The system according to claim 30, characterized in that: The block includes an opaque material portion; The opaque material portion includes an opaque material and a grating defining an opening pattern through the opaque material; The opaque material prevents the second laser from passing through and reaching the first substrate; as well as The grating allows the second laser to pass through the opening pattern and reach the first substrate.

36. The system according to claim 35, characterized in that, The stage block includes a transparent material portion that allows a second laser to pass through and reach the first substrate via the grating in the opaque material portion.

37. The system according to claim 35, characterized in that, One opening of the grating is configured to be perpendicularly aligned with the first interconnect of the first electronic component located above the first substrate.

38. The system according to claim 35, characterized in that, The opaque material is configured to be perpendicularly aligned with the portion of the first substrate that is not aligned with the first interconnect of the first electronic component.

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