Current acquisition sensor for railway signal block signals

Abstract

The application discloses a current collection sensor and railway signal section signal machine, and belongs to the field of devices for measuring current. In order to solve the problems of high single-point failure risk, easy common interference synchronous failure, insufficient high-voltage insulation protection, and mismatch between high-precision design and actual demand of the existing railway signal current collection scheme, the application provides a full-link heterogeneous redundant current collection sensor. The sensor comprises a double induction module, a double heterogeneous collection and conditioning module, a double processing module, and a data fusion output module. The application fundamentally avoids common interference synchronous failure, significantly improves the reliability and high-voltage safety of the system under the premise of meeting moderate accuracy, effectively controls the cost, and guarantees the collection continuity under single-path failure, and is particularly suitable for high-reliability monitoring scenarios of the lighting state of railway signal section passing signal machines.

Description

Technical Field

[0001] This invention relates to the field of devices for measuring current, and more specifically to a current acquisition sensor and a railway signal section signal. Background Technology

[0002] Railway signaling systems are core infrastructure for ensuring train operation safety and improving transportation efficiency. Within railway sections, the status of signal lights directly controls train movement permissions, and the accuracy of their monitoring is crucial to the safety of the entire railway transportation system. Currently, railway section signals generally use 220V / 50Hz AC power supply. The actual on / off status of the signal is determined by detecting the current value in the lighting circuit: when the signal is on, the line operating current is typically no less than 140mA; when off, the line current is generally no more than 80mA. This current detection value is connected to the signal monitoring system to determine whether the signal is on or off as required. If any abnormality occurs (such as a signal not being on when it should be on, or not being off when it should be off), the system will trigger safety protection actions to prevent trains from overstepping the signal and ensure operational safety.

[0003] Therefore, the reliability of current acquisition directly determines the accuracy of status judgment, thus affecting train operation safety. In this specific application scenario, due to the significant difference in current thresholds between the lit and unlit states (approximately 60mA), the system does not require high absolute accuracy in current acquisition; milliampere level is usually sufficient for the discrimination needs. However, the long-term reliability and anti-interference capability of the acquisition system are extremely important. Large acquisition deviations (e.g., mistakenly acquiring 100mA or 50mA of an actual 150mA current) must be avoided. Otherwise, the monitoring equipment will misjudge the signal status, incorrectly output protection commands, and seriously threaten train operation safety. Therefore, the core requirements for current acquisition in this scenario can be summarized as "moderate accuracy (±1mA) and extremely high reliability."

[0004] Currently, the sensors used for acquiring 220V AC current in railway signals have undergone two stages of technological evolution, both of which have inherent defects:

[0005] The first stage is the single-channel induction acquisition scheme. This is the most common traditional scheme, typically employing an architecture of "single induction coil, single signal conditioning circuit, and single processing unit." This type of scheme is simple in structure and low in cost, but it has a significant risk of single-point failure. The induction coil is susceptible to electromagnetic interference and power frequency fluctuations in the field; failure of any component in the single signal conditioning link will directly lead to the loss of the entire acquisition function; if the single processing unit experiences a program crash or hardware failure, there will be no backup output. Its reliability is insufficient to meet the high security requirements of continuous and uninterrupted monitoring of railway signals.

[0006] The second stage is the homogeneous redundancy acquisition scheme. This scheme typically uses two identical induction coils, the same model conditioning chip, and processors of the same series or even the same model to form dual acquisition channels. Although this design avoids single points of failure to some extent, its "homogeneous" nature means that the two channels are equally vulnerable to common interferences (such as power grid harmonics, temperature drift, power supply noise, etc.). Once such interference is encountered, the dual acquisition data may simultaneously deviate in a directional manner, thus losing the value of mutual verification and failing to achieve true fault tolerance. In addition, most existing redundancy schemes follow the design concept of high-precision measuring instruments, pursuing measurement accuracy of ±0.1mA or even higher, and therefore generally adopt high-resolution analog-to-digital converters, complex software calibration algorithms, and high-cost isolated power supply modules. This not only increases costs, but the complex circuits and algorithms also introduce more potential failure points, which does not meet the actual requirements of "moderate accuracy and extremely high reliability" in railway applications, resulting in unnecessary cost waste and reliability risks.

[0007] Furthermore, the 220V AC power supply environment for railway signaling has a high voltage to ground, requiring the data acquisition sensor to have sufficient insulation strength to prevent high-voltage breakdown. Most existing solutions simply wrap the induction coil with insulating glue or use ordinary plastic shells, without specific design considerations regarding insulation materials, packaging processes, and creepage distances. Under long-term operation and harsh environments (humidity, dust, temperature variations), the insulation material is prone to aging and deterioration, posing a risk of high-voltage breakdown damaging the sensor and even causing damage to secondary equipment or personal injury. In summary, existing AC current acquisition sensors, whether single-channel or homogeneous redundant, cannot simultaneously achieve the extremely high operational reliability, strong anti-interference capability, and long-term high-voltage insulation safety required for railway signaling applications while meeting adequate accuracy requirements.

[0008] Therefore, there is an urgent need for a current acquisition sensor solution that is optimized for the characteristics of railway signal current acquisition scenarios. Summary of the Invention

[0009] To alleviate or partially alleviate the above-mentioned technical problems, the solution of the present invention is as follows:

[0010] On one hand, the present invention discloses a current acquisition sensor, comprising:

[0011] A dual-sensor module, comprising a first induction coil and a second induction coil, is used to synchronously sense the current signal in the AC conductor to be detected. The first induction coil generates a first induced voltage, and the second induction coil generates a second induced voltage.

[0012] A dual heterogeneous acquisition and conditioning module includes a first conditioning circuit and a second conditioning circuit with heterogeneous circuit topologies. The first conditioning circuit conditions the first induced voltage and outputs a first analog voltage, and the second conditioning circuit conditions the second induced voltage and outputs a second analog voltage.

[0013] The dual processing module includes a first CPU and a second CPU with heterogeneous architecture. The first CPU performs analog-to-digital conversion and RMS value calculation on the first analog voltage and outputs a first sampled current value. The second CPU performs analog-to-digital conversion and RMS value calculation on the second analog voltage and outputs a second sampled current value.

[0014] The data fusion output module is communicatively connected to the first CPU and the second CPU respectively, receives the first and second acquired current values, performs difference verification on the two current values, and outputs the final current value and / or fault alarm signal according to the verification result.

[0015] In one embodiment, the first induction coil and the second induction coil have the same structural parameters, both including a magnetic core made of soft magnetic material and enameled copper wire wound on the magnetic core, and the first induction coil and the second induction coil are arranged side by side with a fixed spacing and the same winding direction.

[0016] In one embodiment, both the first induction coil and the second induction coil include an insulating encapsulation layer that covers the magnetic core and the enameled copper wire.

[0017] In one embodiment, the first conditioning circuit includes a full-wave rectifier circuit, a resistor-capacitor low-pass filter circuit, and an operational amplifier circuit; the second conditioning circuit includes a precision full-wave rectifier circuit, an active filter circuit, and an instrumentation amplifier circuit.

[0018] In the first conditioning circuit, the full-wave rectifier circuit includes a rectifier diode with a withstand voltage of not less than 1000V, and the operational amplifier circuit has an amplification factor of 11 times; in the second conditioning circuit, the precision full-wave rectifier circuit includes a precision operational amplifier, and the instrumentation amplifier circuit has an amplification factor of 51 times.

[0019] In one embodiment, the first conditioning circuit is powered by a first power supply, and the second conditioning circuit is powered by a second power supply, wherein the voltage values ​​of the first power supply and the second power supply are different.

[0020] In one embodiment, the first CPU is an ARM architecture microcontroller, and the second CPU is a PIC architecture microcontroller.

[0021] In one embodiment, both the first CPU and the second CPU have built-in analog-to-digital converters and calculate the effective value of the current using the root mean square algorithm, and the number of sampling points of the analog-to-digital converter is greater than or equal to 10 power frequency cycles.

[0022] In one embodiment, a hardware interlock signal channel is provided between the first CPU and the second CPU, and the hardware interlock signal channel is connected to the input / output pins of the first CPU and the input / output pins of the second CPU, respectively.

[0023] In one embodiment, the data fusion output module includes a microcontroller and a communication interface circuit, wherein the microcontroller is configured to:

[0024] Calculate the difference between the first acquired current value and the second acquired current value;

[0025] If the difference is less than or equal to a preset tolerance threshold, the arithmetic mean of the first and second current values ​​is output.

[0026] If the difference is greater than the preset tolerance threshold, a fault alarm signal is output and a resampling command is sent to the dual processing module.

[0027] If at least three consecutive samples show a difference greater than the preset tolerance threshold, or if the hardware interlock signal channel confirms that either the first CPU or the second CPU has no output, then the sampling current value of the other CPU is locked and output, and the fault alarm signal is maintained.

[0028] On the other hand, the present invention discloses a railway signal section signal: comprising the current acquisition sensor as described above.

[0029] The railway signal section signal has a 220V / 50Hz AC lighting circuit, and the current acquisition sensor has an operating current range of 0~150mA;

[0030] The dual-sensor module of the current acquisition sensor is sleeved on the wire of the lighting circuit.

[0031] The technical solution of this invention has one or more of the following beneficial technical effects:

[0032] (1) The system's reliability and fault tolerance have been improved. The differentiated design of the two acquisition links makes them different in their sensitivity to various faults, ensuring that the current acquisition results will not deviate significantly and meeting the high reliability requirements of railway signal safety monitoring.

[0033] (2) For high-voltage application scenarios, the insulation packaging of the dual-sensor module and the high-voltage withstand design of the circuit have been optimized, which significantly improves the safety and environmental adaptability of the equipment. At the same time, high-precision components and complex algorithms have been abandoned, and mature general-purpose devices have been adopted, which has achieved cost control while ensuring core reliability and meeting the requirements of "moderate accuracy and ultra-high reliability".

[0034] (3) With the help of the hardware interlocking mechanism in the dual processing module and the verification strategy of the data fusion output module, the system can judge and respond to single-path faults. It can realize real-time fault alarms and ensure the continuity of monitoring through seamless link switching or self-recovery mechanism, thereby greatly improving the availability and maintainability of the system.

[0035] Furthermore, other beneficial effects of the present invention will be mentioned in the specific embodiments. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the system composition and signal flow of the current sensor of the present invention;

[0037] Figure 2 This is a schematic diagram of the system structure of one embodiment of the present invention. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0039] To facilitate a clear description of the technical solutions in the embodiments of the present invention, the terms "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order.

[0040] The term "Central Processing Unit" (CPU) is the core computing and control component of computers and electronic devices. It undertakes core functions such as instruction execution, data processing, and signal scheduling, and is the "core carrier of data processing and logical judgment" in electronic systems. In this invention, it refers to an industrial-grade microprocessor embedded in a current acquisition sensor, responsible for data sampling, processing, and logical judgment. Its core value is not in pursuing extreme computing speed or high-precision floating-point calculations, but rather in becoming the core computing unit that ensures functional continuity in a highly reliable current acquisition link through a "dual-processor heterogeneous redundancy" architecture. For ease of explanation, it will be referred to as CPU below.

[0041] The term "Advanced Reduced Instruction Set Machines" (ARM) refers to a processor architecture standard based on Reduced Instruction Set Computing (RISC). It is widely used in industrial control, embedded devices, and other applications where reliability and power consumption are critical. In the embedded processor field, it is often simply referred to as the "ARM architecture." For ease of explanation, it will be abbreviated as ARM below.

[0042] In this invention, the first CPU of the dual processing module uses an ARM architecture processor, specifically the ARM Cortex-M3 architecture of the first CPU (e.g., model STM32F103C8T6). This architecture has a processing speed of 72MHz and a built-in 12-bit digital-to-analog converter module (reference voltage can be 3.3V, sampling frequency can be 200Hz). The core is used to receive the stable DC analog voltage signal output by the dual heterogeneous acquisition and conditioning modules, complete the conversion of analog signal to digital signal and calculate the effective value of 220V AC current through the root mean square algorithm, and send the calculation result to the data fusion output module through the asynchronous serial communication interface (often referred to as "UART serial port" in the embedded communication field).

[0043] The term "Peripheral Interface Controller" (PIC) is essentially a general-purpose embedded processor architecture based on Reduced Instruction Set Computing (RISC). Characterized by its streamlined efficiency, strong anti-interference capabilities, and adaptability to industrial control scenarios, it is widely used in electronic devices with stringent reliability and stability requirements. In the embedded processor field, it is often simply referred to as the "PIC architecture." For ease of explanation, it will be abbreviated as PIC below.

[0044] In this invention, the second CPU of the dual processing module uses a PIC architecture and PIC chip series processor. Specifically, it can be a PIC RISC architecture mounted on the second CPU (such as a PIC16F877A microcontroller). This architecture has a computing speed of 20MHz and a built-in 12-bit digital-to-analog (AD) conversion module (the reference voltage can be 3.3V and the sampling frequency can be set to 200Hz). Its core function is to receive the stable DC analog voltage signal output by the dual heterogeneous acquisition and conditioning modules, complete the conversion of analog signal to digital signal and calculate the effective value of 220V AC current through the root mean square algorithm (such as the number of sampling points ≥ 10 power frequency cycles), and send the calculation result to the data fusion output module through the asynchronous serial communication interface (often referred to as "UART serial port" in the embedded communication field).

[0045] This invention provides a current acquisition sensor, the core of which lies in constructing a full-link heterogeneous redundancy system. The system employs dual sensing modules (with high-voltage insulated coils), dual heterogeneous acquisition and conditioning modules (e.g., ordinary and precision rectification architectures), and dual processing modules (e.g., ARM and PIC heterogeneous architectures) working collaboratively, and finally verifies and outputs data through a data fusion output module. By designing two independent and differentiated acquisition and processing links, the system can achieve synchronous acquisition, real-time comparison, and fault diagnosis. When one link fails, the other link can seamlessly take over, thus significantly improving the overall anti-interference capability and long-term operational reliability of the system while meeting milliampere-level measurement accuracy. Furthermore, by selecting general-purpose components and simplifying unnecessary high-precision designs, costs are effectively controlled while ensuring core reliability. This system is particularly suitable for scenarios with extremely high reliability requirements, such as current monitoring and status determination of the 220V / 50Hz AC lighting circuit of signal lights in railway signal sections.

[0046] Figure 1 This is a schematic diagram of the system composition and signal flow of the current sensor of this invention. As shown in the figure, this invention mainly includes a dual-sensor module, a dual heterogeneous acquisition and conditioning module, a dual-processing module, and a data fusion output module connected in sequence. The 220V AC conductor to be detected passes through the dual-sensor module. The sensed signal is converted into a DC voltage signal by two independent heterogeneous conditioning circuits, which are then sampled and calculated by two CPUs with different architectures. Finally, the data fusion output module verifies and outputs the results from both circuits, thereby achieving end-to-end redundancy and heterogeneous fault tolerance from signal sensing to result output.

[0047] Figure 2This is a schematic diagram of a system structure according to one embodiment of the present invention. As shown in the figure, a 0-150mA power frequency current is passed through the 220V AC conductor to be detected. This current signal is synchronously sensed by the first and second induction coils in the dual-induction module, generating a first induced voltage and a second induced voltage, respectively. The first induced voltage enters the first conditioning circuit in the dual heterogeneous acquisition and conditioning module, and after conditioning, outputs a first analog voltage; the second induced voltage enters the second conditioning circuit in the same module, and after conditioning, outputs a second analog voltage. The first analog voltage is sent to the first CPU in the dual-processing module, and after sampling and calculation, generates a first acquired current value; the second analog voltage is sent to the second CPU in the same module, and after sampling and calculation, generates a second acquired current value. The first and second acquired current values ​​are jointly input into the data fusion output module, which performs heterogeneous link difference verification and fusion calculation, and finally outputs the fused current value. It can also output corresponding interactive information (such as alarm commands, fault codes, etc.) based on the verification results.

[0048] In one specific embodiment of the present invention, the dual-induction module adopts a high-voltage insulated structure, including a first induction coil and a second induction coil. The two coils maintain consistent structural parameters; for example, they can both be wound in parallel using enameled copper wire (e.g., 0.1mm in diameter) (e.g., in a 6-strand parallel winding manner), with 800 turns, and wound on a core made of soft magnetic material, such as a Ni-Zn ferrite core with specifications of Φ5mm×20mm and a preset air gap (e.g., 0.1mm) to adapt to the induction requirements of a 50Hz power frequency AC magnetic field, thus avoiding core saturation (in a 220V AC circuit, the core operates in the unsaturated region under a magnetic field strength corresponding to a 150mA current). The first and second induction coils are arranged side-by-side with a fixed spacing (e.g., 5mm) and the same winding direction on the outside of the conductor to be detected (e.g., a 220V AC conductor), and the central axis of the first and second induction coils coincides with that of the conductor to be detected, ensuring high synchronization of their induction signals (e.g., phase difference controlled within 1 degree). To achieve safe isolation under high-voltage conditions, both the first and second induction coils adopt an insulating encapsulation structure. For example, epoxy resin can be used for overall potting, with a potting layer thickness of not less than 2mm, so that its insulation strength reaches more than 5kV, which can meet the insulation protection requirements of 220V AC power.

[0049] After potting, perform an insulation test (e.g., apply 5kV voltage for 1 minute without breakdown). A load resistor (e.g., 10kΩ) and a high-frequency filter capacitor (e.g., 0.01μF) can be connected in parallel at the coil output to stabilize the initial AC induction signal.

[0050] The dual heterogeneous acquisition and conditioning module includes a first conditioning circuit and a second conditioning circuit with heterogeneous circuit topology. The two circuits independently perform differentiated conditioning on the induced signals (first induced voltage and second induced voltage) output by the first induction coil and the second induction coil, and convert them into DC voltage signals (first analog voltage and second analog voltage) suitable for analog-to-digital conversion, so as to adapt to different interference scenarios.

[0051] The first conditioning circuit employs a simplified architecture (lower cost and simpler structure). For example, it may include a full-wave rectifier circuit composed of general-purpose rectifier diodes (such as the 1N4007 series with a withstand voltage of 1000V, suitable for AC high voltage), an RC low-pass filter circuit composed of resistors and capacitors (parameters could be R=1kΩ, C=0.1μF, cutoff frequency approximately 1592Hz) to filter out power frequency harmonics, and an amplifier circuit composed of general-purpose operational amplifiers (such as the LM324 series) (e.g., a non-inverting amplifier circuit). For example, setting the input resistor to 1kΩ and the feedback resistor to 10kΩ, with an amplification factor of 11, can amplify the rectified and filtered DC signal to the 0-3.3V range. This first conditioning circuit is powered by a single 3.3V power supply.

[0052] The second conditioning circuit can employ a higher-performance, more robust anti-interference precision architecture. For example, it can include a precision full-wave rectifier circuit built with a precision operational amplifier (such as the OPA227 series) to eliminate errors introduced by the forward voltage drop of ordinary diodes. The rectified signal is then fed into a second-order active filter circuit (a second-order Butterworth active low-pass filter, with parameters set to R1=R2=10kΩ, C1=C2=0.33μF, and a cutoff frequency of approximately 48Hz) composed of an operational amplifier and an RC network, which can more effectively filter out interference other than power frequency and its harmonics. The filtered signal is finally amplified by an instrumentation amplifier (such as the INA128 series), with a gain resistor Rg set to 1kΩ to achieve a gain of 51 times. To ensure output level matching, this second conditioning circuit uses a second power supply (5V, with voltage division and 3.3V Zener diode limiting at the output stage), enabling a stable 0-3.3V DC signal to be output after rectification and amplification.

[0053] In one embodiment, both conditioning circuits employ single-point grounding to reduce ground noise, and decoupling capacitors (e.g., 0.1μF) are connected in parallel at their respective power inputs to suppress power ripple. The heterogeneous power supply design (e.g., the first conditioning circuit is directly powered by 3.3V, and the second conditioning circuit is powered by 5V to 3.3V) further reduces the risk of both circuits failing simultaneously due to a common power supply failure.

[0054] The dual-processing module includes a first CPU and a second CPU with heterogeneous architectures. The first CPU can be a microcontroller based on a high-performance processor core, such as the STM32F103 series microcontroller (72MHz processing speed) based on the ARM Cortex-M3 core; the second CPU can be a microcontroller based on a different reduced instruction set architecture, such as the PIC16F877A series microcontroller (20MHz processing speed) based on the PIC RISC architecture. Both the first and second CPUs have built-in analog-to-digital converters (ADCs), for example, 12-bit resolution, with a reference voltage of 3.3V. They synchronously sample the conditioned DC voltages (first analog voltage and second analog voltage) at a frequency (e.g., 200Hz) that satisfies the Nyquist sampling theorem. Both calculate the effective value of the current (220V AC) through software algorithms (such as the root mean square algorithm, with the number of sampling points covering at least 10 power frequency cycles to ensure the accuracy of the effective value calculation), and output the data through a serial communication interface (such as UART, with a baud rate of 9600bps) (the first CPU outputs the first sampled current value, and the second CPU outputs the second sampled current value).

[0055] In one embodiment, to further improve reliability, a hardware interlock signal channel can be set between the first CPU and the second CPU, for example, by direct connection via a general purpose input / output pin (GPIO). Its response time is less than 1 microsecond, and it is used to monitor the other's working status in real time (such as whether sampling is triggered on time, whether the program is running normally). When one CPU malfunctions (fails to output data on time), the other CPU outputs data separately and immediately triggers an alarm.

[0056] The data fusion output module is based on a microprocessor (e.g., an STM32F030 series microcontroller). It receives the effective current values ​​(first and second sampled current values) from the first and second CPUs of the dual-processing module through at least two serial communication interfaces. The module internally runs data fusion and fault decision logic: it continuously calculates the difference between the two data streams and compares it with a preset tolerance threshold (e.g., 1mA). If the difference is less than or equal to the preset tolerance threshold, both data streams are considered valid, and the arithmetic mean of the two data streams is output as the final result. If the difference exceeds the threshold, a link abnormality is detected. In this case, the module outputs an alarm signal (e.g., driving an external LED indicator, which can be driven by an S9013 NPN series transistor and reported via an RS485 interface), and sends a command to the dual-processing module to trigger resampling. If the abnormality persists (the difference exceeds the limit in three consecutive samples) or if an interlock signal confirms that one of the CPUs has completely failed, the module will automatically lock and output data from the normal link while maintaining the alarm state. In one embodiment, the module can also be expanded with an industrial fieldbus interface, for example, to achieve remote data transmission via an RS-485 transceiver (such as the MAX485 chip) (communication distance up to 1200 meters, baud rate set to 9600bps, adaptable to the remote networking requirements of railway signal monitoring systems). The output information includes the final RMS current value (in mA) and an alarm code indicating the fault type (distinguishing between coil faults, CPU faults, and conditioning circuit faults). The data fusion output module can be powered by a 3.3V power supply, and the power supply module can be an LDO regulator chip (output ripple not exceeding 10mV).

[0057] The following section provides a complete explanation of the system's operating logic, using a typical working scenario of this invention as an example:

[0058] A power frequency current with a range of 0-150mA is passed through the 220V / 50Hz AC conductor to be tested. The first and second induction coils in the dual induction module synchronously generate an AC voltage signal that is proportional to the instantaneous value of the current based on the principle of electromagnetic induction (150mA corresponds to an induced voltage amplitude of about 65mV).

[0059] The AC voltage signals are processed independently by the dual heterogeneous acquisition and conditioning modules. Specifically, the AC voltage signal generated by the first induction coil enters the first conditioning circuit, and the AC voltage signal generated by the second induction coil enters the second conditioning circuit. In the first conditioning circuit, the signal is rectified by a 1N4007 diode full-wave rectifier, RC filtered, and amplified by an LM324 operational amplifier to output a DC voltage of 0-3.3V (corresponding to 150mA) (first analog voltage). In the second conditioning circuit, the signal is precisely rectified by an OPA227 operational amplifier to eliminate the error introduced by the diode forward voltage drop, and then filtered by a second-order Butterworth active filter to remove harmonic interference. Finally, it is amplified 51 times by an INA128 instrumentation amplifier to output a DC voltage of 0-3.3V (corresponding to 150mA) (second analog voltage).

[0060] The first CPU (STM32F103C8T6) and the second CPU (PIC16F877A) in the dual-processing module perform synchronous analog-to-digital conversion on the two DC voltage signals (first analog voltage and second analog voltage) at a sampling frequency of 200Hz, and calculate the effective value of the current using the root mean square algorithm. Each CPU continuously samples for 10 power frequency cycles (a total of 200 sampling points) to ensure calculation accuracy, and sends the calculated effective digital current value to the data fusion output module via serial port.

[0061] The data fusion output module receives two channels of effective current data and performs real-time comparison and decision-making: if the difference between the two data channels does not exceed 1mA (for example, the first CPU outputs 120.3mA and the second CPU outputs 120.8mA), it is determined that both acquisitions are valid, and its arithmetic mean (120.55mA, which can be rounded to 121mA) is output as the final result; if the difference is greater than 1mA (for example, the first CPU outputs 150mA and the second CPU outputs 100mA), it is immediately determined that the link is abnormal. At this time, the module drives the LED alarm indicator to light up and sends a fault alarm command through the RS485 interface, while sending a command to the dual processing module to trigger resampling; if the difference exceeds the limit in three consecutive samplings, or if the interlock signal detects that a certain CPU has no output (the interlock signal is pulled low), the module automatically locks and outputs the data of the other reliable CPU and maintains the alarm state.

[0062] During the entire operation, if the first CPU fails due to program abnormalities or other reasons, the second CPU will detect the fault in a very short time (≤1μs) through a hardware interlock signal, and then independently perform sampling, calculation and data output, and trigger an alarm, thereby ensuring that current acquisition is not interrupted.

[0063] This invention features a full-link heterogeneous redundancy design from signal sensing, conditioning and conversion, data processing to result output. This design enables the system to have strong fault tolerance for various faults such as accidental component failures, common circuit interference, and abnormal software operation. As a result, it is particularly suitable for industrial monitoring scenarios with extremely stringent requirements for operational reliability, such as railway signals.

[0064] Compared with the prior art, the present invention has the following significant advantages:

[0065] First, this invention breaks through the homogeneous redundancy architecture commonly used in existing AC current acquisition sensors, constructing a full-link heterogeneous redundancy system from dual sensing modules, dual heterogeneous acquisition and conditioning modules to dual processing modules. Specifically, the first and second conditioning circuits in the dual heterogeneous acquisition and conditioning modules adopt differentiated topologies of ordinary rectification and precision rectification, and RC filtering and active filtering, respectively. The dual processing modules adopt heterogeneous processors with ARM architecture and PIC architecture, respectively. This design makes the two acquisition links completely different in their sensitivity to various faults and interferences. For example, when the first link has errors due to diode forward voltage drop drift, the precision rectification of the second link can still work stably; when the high-speed processing unit based on the ARM architecture experiences a computational abnormality, the simplified processing unit based on the PIC architecture can still independently maintain the acquisition function. Thus, this invention fundamentally avoids the risk of dual-path synchronous failure in traditional homogeneous redundancy systems when encountering common interferences (such as power grid harmonics, temperature drift, and power supply noise), ensuring that the current acquisition results will not deviate significantly and significantly improving the inherent reliability of the system.

[0066] Secondly, this invention addresses the high-voltage characteristics of the 220V AC power supply environment for signal controllers by implementing double insulation reinforcement and safety adaptation in both the sensing and circuit stages. Both the first and second induction coils of the dual-induction module employ an epoxy resin integral potting insulation encapsulation structure with a potting layer thickness of no less than 2mm and an insulation strength exceeding 5kV. Simultaneously, a 1000V withstand voltage rectifier diode is selected in the conditioning circuit, and a surge protection device is added at the power input terminal. This design effectively solves the problems of aging breakdown, equipment damage, and even safety hazards caused by insufficient insulation protection and improper selection of high-voltage components in existing solutions, comprehensively ensuring the safety and environmental adaptability of the sensor during long-term operation and in harsh environments.

[0067] Third, this invention precisely matches the core requirements of "moderate accuracy (±1mA) and extremely high reliability" in railway signal current acquisition scenarios, avoiding functional redundancy and cost waste. Unlike existing high-precision redundant solutions that generally pursue ±0.1mA-level measurement accuracy and rely on high-resolution ADCs, complex calibration algorithms, and isolated power supply modules, this invention uses mature general-purpose components and a simplified circuit topology, significantly reducing device costs and circuit complexity while ensuring milliampere-level measurement accuracy and system reliability. In one embodiment, the device cost of a single sensor is less than 50% of that of existing high-precision AC acquisition sensors of the same type, achieving a good balance between reliability, applicability, and economy.

[0068] Fourth, this invention achieves real-time fault response and continuous data acquisition through a rapid diagnostic mechanism of hardware interlock between the first and second CPUs within the dual-processing module and an intelligent verification strategy in the data fusion output module. When a single link malfunctions, the system can not only output a clear fault indication through alarm indicator lights and the RS485 interface, but also complete the fault link determination within microseconds through interlock signals, and seamlessly take over data output from another healthy link. The built-in difference verification and abnormal retry logic in the data fusion output module further avoids misjudgments caused by momentary interference. This design fundamentally overcomes the functional defects of traditional redundancy schemes that "only alarm, not continue data acquisition," ensuring the continuity, availability, and maintainability of signal status monitoring, and is particularly suitable for the stringent requirements of railway signaling systems for uninterrupted data acquisition.

[0069] To better illustrate the present invention, numerous specific details have been provided in the detailed embodiments described above. Those skilled in the art should understand that the present invention can be practiced even without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art have not been described in detail in order to highlight the main points of the present invention.

[0070] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A current acquisition sensor, characterized in that, Include: A dual-sensor module, comprising a first induction coil and a second induction coil, is used to synchronously sense the current signal in the AC conductor to be detected. The first induction coil generates a first induced voltage, and the second induction coil generates a second induced voltage. A dual heterogeneous acquisition and conditioning module includes a first conditioning circuit and a second conditioning circuit with heterogeneous circuit topologies. The first conditioning circuit conditions the first induced voltage and outputs a first analog voltage, and the second conditioning circuit conditions the second induced voltage and outputs a second analog voltage. The dual processing module includes a first CPU and a second CPU with heterogeneous architecture. The first CPU performs analog-to-digital conversion and RMS value calculation on the first analog voltage and outputs a first sampled current value. The second CPU performs analog-to-digital conversion and RMS value calculation on the second analog voltage and outputs a second sampled current value. The data fusion output module is communicatively connected to the first CPU and the second CPU respectively, receives the first and second acquired current values, performs difference verification on the two current values, and outputs the final current value and / or fault alarm signal according to the verification result.

2. The current acquisition sensor according to claim 1, characterized in that... : In the dual-induction module, the first induction coil and the second induction coil have the same structural parameters. Both include a magnetic core made of soft magnetic material and enameled copper wire wound on the magnetic core. The first induction coil and the second induction coil are arranged side by side with a fixed spacing and the same winding direction.

3. The current acquisition sensor according to claim 2, characterized in that... : Both the first induction coil and the second induction coil include an insulating encapsulation layer, which covers the magnetic core and the enameled copper wire.

4. The current acquisition sensor according to claim 1, characterized in that: The first conditioning circuit includes a full-wave rectifier circuit, a resistor-capacitor low-pass filter circuit, and an operational amplifier circuit; the second conditioning circuit includes a precision full-wave rectifier circuit, an active filter circuit, and an instrumentation amplifier circuit. In the first conditioning circuit, the full-wave rectifier circuit includes a rectifier diode with a withstand voltage of not less than 1000V, and the operational amplifier circuit has an amplification factor of 11 times; in the second conditioning circuit, the precision full-wave rectifier circuit includes a precision operational amplifier, and the instrumentation amplifier circuit has an amplification factor of 51 times.

5. The current acquisition sensor according to claim 4, characterized in that, The first conditioning circuit is powered by a first power supply, and the second conditioning circuit is powered by a second power supply. The voltage values ​​of the first power supply and the second power supply are different.

6. The current acquisition sensor according to claim 1, characterized in that: The first CPU is an ARM architecture microcontroller, and the second CPU is a PIC architecture microcontroller.

7. The current acquisition sensor according to claim 1, characterized in that: Both the first CPU and the second CPU have built-in analog-to-digital converters and calculate the effective value of the current using the root mean square algorithm. The number of sampling points of the analog-to-digital converter is greater than or equal to 10 power frequency cycles.

8. The current acquisition sensor according to claim 7, characterized in that: A hardware interlock signal channel is provided between the first CPU and the second CPU, and the hardware interlock signal channel is connected to the input / output pins of the first CPU and the input / output pins of the second CPU respectively.

9. The current acquisition sensor according to claim 8, characterized in that, The data fusion output module includes a microcontroller and a communication interface circuit. The microcontroller is configured as follows: Calculate the difference between the first acquired current value and the second acquired current value; If the difference is less than or equal to a preset tolerance threshold, the arithmetic mean of the first and second current values ​​is output. If the difference is greater than the preset tolerance threshold, a fault alarm signal is output and a resampling command is sent to the dual processing module. If at least three consecutive samples show a difference greater than the preset tolerance threshold, or if the hardware interlock signal channel confirms that either the first CPU or the second CPU has no output, then the sampling current value of the other CPU is locked and output, and the fault alarm signal is maintained.

10. A railway signal section signal, characterized in that: Includes a current acquisition sensor as described in any one of claims 1 to 9; The railway signal section signal has a 220V / 50Hz AC lighting circuit, and the current acquisition sensor has an operating current range of 0~150mA; The dual-sensor module of the current acquisition sensor is sleeved on the wire of the lighting circuit.

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