Surge arrester on-line detection multiple ratio selection device

Abstract

This application relates to a multi-rate selection device for online detection of surge arresters. The device includes: an input interface module for receiving positive / negative signals from a Rogowski coil and outputting a differential input signal; a signal conditioning module for integrating and filtering the differential input signal and outputting a differential conditioned signal; a multi-rate amplification and selection module including at least two amplification channels with different gains, the input terminals of each amplification channel being connected in parallel to the signal conditioning module for receiving the differential conditioned signal; a multi-channel differential analog switch, whose multiple differential input terminals are respectively connected to the output terminals of each amplification channel, and whose differential output terminal is used to output the ADC input signal; an analog-to-digital converter module for converting the ADC input signal into digital data; and a microcontroller module for dynamically selecting and activating one of the amplification channels based on the digital data. This application can solve the problem of limited dynamic range in range acquisition schemes, thereby improving measurement accuracy.

Description

Technical Field

[0001] This application relates to the field of online monitoring technology for power equipment, and in particular to a multi-rate selection device for online detection of surge arresters. Background Technology

[0002] In modern power systems, ensuring the safe and stable operation of power equipment is of paramount importance. Metal oxide surge arresters, as key devices for overvoltage protection, directly affect the reliable operation of the power grid. With the continuous expansion of power system scale and increasing operational complexity, the need for real-time monitoring of surge arrester operating status is becoming increasingly urgent.

[0003] Currently, Rogowski coils are widely used to acquire the current signal of surge arresters. Subsequent processing steps, including integration, amplification, and sampling, are required to obtain key parameters reflecting the arrester's performance. However, the operating conditions of power systems are extremely complex, and the current variation range of surge arresters is vast, ranging from minute normal leakage currents to powerful lightning strikes or switching overcurrents. This places high demands on the dynamic range of the signal acquisition process.

[0004] On the one hand, traditional single-range acquisition schemes, due to their limited dynamic range, cannot simultaneously guarantee measurement accuracy at both high and low ranges when faced with large fluctuations in surge arrester current. For example, if the range is set too large, weak leakage current signals will be difficult to measure accurately due to insufficient resolution; if the range is set too small, the operational amplifier is prone to saturation when encountering large currents, and the analog-to-digital converter will experience clipping, resulting in severe distortion of the measurement signal. On the other hand, some schemes use programmable gain amplifiers to extend the range, but at the moment the analog switch switches the gain, transient interference will occur in the signal due to effects such as charge injection and clock feedthrough, causing abnormal sampling data near the switching point, affecting the continuity and real-time performance of the measurement, and introducing errors into subsequent current waveform analysis. Summary of the Invention

[0005] Therefore, it is necessary to provide a surge arrester online detection multi-rate selection device with high measurement accuracy.

[0006] An online detection and multi-rate selection device for surge arresters includes an input interface module, a signal conditioning module, a multi-rate amplification and selection module, an analog-to-digital converter module, and a microcontroller module, wherein:

[0007] The input interface module is used to receive positive / negative signals from the Rogowski coil and output differential input signals according to the positive / negative signals;

[0008] The signal conditioning module is used to integrate and filter the differential input signal and output a differentially conditioned signal.

[0009] The multi-rate amplification and selection module includes at least two amplification channels with different gains. The input terminals of each amplification channel are connected in parallel to the signal conditioning module to receive the differential conditioning signal. It also includes a multi-channel differential analog switch, whose multiple differential input terminals are respectively connected to the output terminals of each amplification channel, and whose differential output terminal is used to output the ADC input signal.

[0010] The analog-to-digital converter module is used to convert the ADC input signal into digital data.

[0011] The microcontroller module is used to determine whether the signal amplitude of the digitally converted data is within the optimal range based on the digitally converted data and a preset threshold. If it is not within the optimal range, it outputs a target channel selection control signal to the channel selection terminal of the multi-channel differential analog switch.

[0012] The multi-channel differential analog switch is also used to select and connect a corresponding amplification channel according to the target channel selection control signal.

[0013] In one embodiment, an input protection network is provided between the input interface module and the signal conditioning module. The input protection network includes a first common-mode choke and a second common-mode choke. The positive signal output by the Rogowski coil is connected to the first input node through the first common-mode choke and a first series resistor in sequence. The negative signal output by the Rogowski coil is connected to the second input node through the second common-mode choke and a second series resistor in sequence. The first input node and the second input node are each grounded through a TVS diode, and the two are connected through a parallel capacitor.

[0014] In one embodiment, the signal conditioning module includes a differential integrator and a low-pass filter, wherein:

[0015] The differential integrator is composed of a first operational amplifier and a second operational amplifier; the first input node is connected to the non-inverting input terminal of the first operational amplifier through a first input resistor, and the second input node is connected to the non-inverting input terminal of the second operational amplifier through a second input resistor; the inverting input terminal of the first operational amplifier is connected to its output terminal through a parallel network of a first feedback capacitor and a first feedback resistor; the inverting input terminal of the second operational amplifier is connected to its output terminal through a parallel network of a second feedback capacitor and a second feedback resistor.

[0016] The low-pass filter is connected to the output terminals of the first operational amplifier and the second operational amplifier, respectively, and is used to filter out high-frequency noise and output the differential conditioning signal.

[0017] In one embodiment, the device further includes a calibration digital-to-analog converter, a calibration resistor, and a calibration switch, wherein:

[0018] The calibration digital-to-analog converter generates a calibration signal through a calibration resistor, and the calibration switch, under the control of the microcontroller module, injects the calibration signal into the input node before the signal conditioning module.

[0019] In one embodiment, the multi-rate amplification and selection module includes three amplification channels with gains set to 1x, 10x, and 100x, respectively.

[0020] In one embodiment, the analog-to-digital converter module is a 24-bit Σ-Δ ADC.

[0021] In one embodiment, the device further includes a power module, wherein:

[0022] The power supply module includes an input protection circuit, a π-type filter, an isolated DC-DC converter, and a linear regulator connected in sequence. The power supply module is used to provide operating voltage for the signal conditioning module, the multi-rate amplification and selection module, the analog-to-digital converter module, and the microcontroller module.

[0023] In one embodiment, the microcontroller module is also connected to a temperature sensor and an optical fiber communication module.

[0024] In one embodiment, the multi-rate amplification and selection module further includes a bypass channel, the input of which is connected to the signal conditioning module, and the output of which is connected to a differential input of the multi-channel differential analog switch.

[0025] In one embodiment, the analog signal traces in the device are arranged in a differential pair layout, and the analog ground and digital ground are connected at a single point at the power module.

[0026] The aforementioned online surge arrester detection multi-rate selection device, by providing multiple fixed-gain channels, achieves wide-range coverage from weak leakage current to transient large current, ensuring that the signal is always sampled by the ADC at near-optimal amplitude under various operating conditions, fully utilizing the ADC resolution and improving measurement accuracy. Furthermore, its unique architecture of "front-end parallel fixed-gain amplification and back-end dynamic output selection" fundamentally avoids the transient interference problems such as charge injection and clock feedthrough that occur when changing the front-end gain network in traditional programmable gain amplifiers (PGAs). The switching speed is fast, and the switching process has minimal impact on the continuity of the measurement signal, ensuring the authenticity and reliability of the waveform data. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is an online detection multi-rate selection device for surge arresters in some embodiments;

[0029] Figure 2 This is a surge arrester online detection multi-rate dynamic selection device in some other embodiments. Detailed Implementation

[0030] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0032] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0033] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0034] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0035] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0036] This application is based on the applicant's understanding and research on the following issues:

[0037] Related online monitoring devices typically face the following technical challenges in signal acquisition: First, power system operating conditions are complex, and surge arrester currents can fluctuate wildly between normal leakage currents in the tens of microamperes and lightning strike or switching overcurrents in the several amperes. Traditional single-range acquisition schemes have limited dynamic ranges, making it difficult to balance measurement accuracy across both high and low ranges. If the range is set too large, weak leakage current signals may be overwhelmed by noise due to insufficient resolution; if the range is set too small, large currents can easily cause operational amplifier saturation or analog-to-digital converter (ADC) clipping, resulting in distorted and unrecoverable measurement signals.

[0038] Secondly, to extend the measurement range, some solutions employ programmable gain amplifiers (PGAs). However, PGAs, or networks that switch different gain resistors via analog switches, are prone to transient interference to the signal at the moment of gain switching due to effects such as charge injection and clock feedthrough. This can lead to abnormal sampling data near the switching point, requiring a certain settling time, which affects the continuity and real-time performance of the measurement and may introduce errors when analyzing current waveforms.

[0039] There is an urgent need in the field for an online surge arrester testing device that can cover a wide dynamic range and achieve rapid, uninterrupted range switching, so as to improve the accuracy, stability and reliability of online monitoring data. To this end, the applicant of this application proposes an online surge arrester testing multi-rate selection device in the following embodiments.

[0040] In one exemplary embodiment, such as Figure 1 As shown, an online detection and multi-rate selection device for surge arresters includes an input interface module 100, a signal conditioning module 200, a multi-rate amplification and selection module 300, an analog-to-digital converter module 400, and a microcontroller module 500, wherein:

[0041] The input interface module is used to receive positive / negative signals from the Rogowski coil and output differential input signals according to the positive / negative signals;

[0042] The signal conditioning module is used to integrate and filter the differential input signal and output a differential conditioned signal.

[0043] The multi-rate amplification and selection module includes at least two amplification channels with different gains. The input terminals of each amplification channel are connected in parallel to the signal conditioning module to receive differential conditioning signals. It also includes a multi-channel differential analog switch, whose multiple differential input terminals are respectively connected to the output terminals of each amplification channel, and whose differential output terminal is used to output the ADC input signal.

[0044] Analog-to-digital converter module, used to convert ADC input signals into digital data;

[0045] The microcontroller module is used to determine whether the signal amplitude of the digitally converted data is within the optimal range based on the digitally converted data and the preset threshold. If it is not within the optimal range, it outputs the target channel selection control signal to the channel selection terminal of the multi-channel differential analog switch.

[0046] The multi-channel differential analog switch is also used to select and connect the corresponding amplification channel based on the target channel selection control signal.

[0047] Integration processing refers to the core mathematical operation of restoring the signal output from the Rogowski coil to a voltage signal proportional to the primary current. Filtering processing refers to the process of removing high-frequency noise and unnecessary harmonic components from the signal.

[0048] In this context, an amplification channel can refer to an amplifier with a fixed, defined gain (such as an instrumentation amplifier). Having at least two channels with different gains means that multiple measurement ranges are provided.

[0049] The microcontroller module continuously reads the digital conversion data from the ADC. It compares the current data (signal amplitude) with preset thresholds (such as upper and lower thresholds) to determine whether the currently active amplification channel (range) is the "optimal range" for processing the current signal amplitude. "Optimal" means the signal amplitude is neither overloaded (close to full scale) nor too small (insufficient resolution). If it is determined to be non-optimal (e.g., the signal is too small or too large), it decides which gain channel (target channel) to switch to and generates a corresponding target channel selection control signal, which is then sent to the multi-channel differential analog switch.

[0050] For example, when the above device is operating, the microcontroller module continuously monitors the digital conversion data output by the analog-to-digital converter module. It internally stores range thresholds corresponding to the gain of each amplification channel. By comparing real-time data with the current channel's threshold (e.g., determining whether it is consistently below 10% or above 80% of the range), the microcontroller module executes range optimality judgment logic.

[0051] When the judgment result is "non-optimal", the microcontroller module immediately determines the target channel (for example, if the signal is too small, a higher gain channel is selected, and if the signal is too large, a lower gain channel is selected), and outputs a set of corresponding digital logic levels through its I / O port as the target channel selection control signal to the channel selection terminal (such as the address line) of the multi-channel differential analog switch.

[0052] The multi-channel differential analog switch activates its internal switch array based on the received control signal, physically disconnecting the path between the currently connected amplification channel output and the ADC input, while simultaneously establishing a low-impedance connection between the target amplification channel output and the ADC input. Since the switching action occurs after the signal has already been amplified, and each amplifier remains in a stable operating state, transient interference (such as charge injection) generated during switching is isolated before the switch, minimizing its impact on the final signal delivered to the ADC, thus achieving "no-disturbance" or "low-disturbance" switching.

[0053] The aforementioned online surge arrester detection multi-rate selection device, by providing multiple fixed-gain channels, achieves wide-range coverage from weak leakage current to transient large current, ensuring that the signal is always sampled by the ADC at near-optimal amplitude under various operating conditions, fully utilizing the ADC resolution and improving measurement accuracy. Furthermore, its unique architecture of "front-end parallel fixed-gain amplification and back-end dynamic output selection" fundamentally avoids the transient interference problems such as charge injection and clock feedthrough that occur when changing the front-end gain network in traditional programmable gain amplifiers (PGAs). The switching speed is fast, and the switching process has minimal impact on the continuity of the measurement signal, ensuring the authenticity and reliability of the waveform data.

[0054] In an exemplary embodiment, an input protection network is provided between the input interface module and the signal conditioning module. The input protection network includes a first common-mode choke and a second common-mode choke. The positive signal output by the Rogowski coil is connected to the first input node in sequence through the first common-mode choke and the first series resistor. The negative signal output by the Rogowski coil is connected to the second input node in sequence through the second common-mode choke and the second series resistor. The first input node and the second input node are each grounded through a TVS diode, and the two are connected through a parallel capacitor.

[0055] The input protection network is a collection of passive circuits used to protect against various electromagnetic interferences and overvoltage / overcurrent surges transmitted from sensor (such as Rogowski coil) cables, safeguarding the safety of downstream precision circuits. A common-mode choke is a magnetic component that presents high impedance to common-mode noise and low impedance to differential signals, used to suppress high-frequency interference (such as surges and EFTs) propagating along signal lines in common mode. Series resistors form a voltage divider with the input impedance of subsequent circuits, limiting potential transient large currents; simultaneously, they form a low-pass filter with parallel capacitors, attenuating high-frequency noise. TVS diodes quickly conduct when the input node voltage exceeds their clamping voltage, discharging overvoltage energy to ground, thus clamping the node voltage within a safe range and protecting downstream devices. Parallel capacitors are connected between the positive and negative differential signal lines to filter out high-frequency differential-mode noise on the differential signal lines.

[0056] For example, the signal line from the Rogowski coil first passes through a common-mode choke to filter out most common-mode interference. It then passes through a series resistor, which limits current and dampens the signal. Upon reaching the first / second input node, a TVS diode is ready to clamp and discharge voltages exceeding a safe threshold, while a parallel capacitor connected between the two nodes further absorbs transient pulse noise between the lines. Only after this network purification is the signal sent to the noise-sensitive signal conditioning module.

[0057] In this embodiment, the protective network effectively suppresses common-mode and differential-mode electromagnetic interference introduced from long cables in the field, significantly improving the stability and measurement accuracy of the device in complex electromagnetic environments. Components such as TVS diodes and series resistors provide reliable overvoltage and overcurrent protection, capable of withstanding a certain degree of lightning-induced surges or operational overvoltages, protecting the downstream integrated circuits from damage and extending the device's lifespan. By filtering out high-frequency noise, a cleaner input signal is provided to the downstream integration and amplification circuits, reducing measurement errors introduced by noise.

[0058] In one exemplary embodiment, the signal conditioning module includes a differential integrator and a low-pass filter, wherein:

[0059] The differential integrator consists of a first operational amplifier and a second operational amplifier. A first input node is connected to the non-inverting input of the first operational amplifier via a first input resistor, and a second input node is connected to the non-inverting input of the second operational amplifier via a second input resistor. The inverting input of the first operational amplifier is connected to its output via a parallel network of a first feedback capacitor and a first feedback resistor. The inverting input of the second operational amplifier is connected to its output via a parallel network of a second feedback capacitor and a second feedback resistor. A low-pass filter is connected to the outputs of both the first and second operational amplifiers to filter out high-frequency noise and output a differentially conditioned signal.

[0060] Among them, a differential integrator can refer to a circuit that performs integration operations on the input signal in a differential form; it can process the positive and negative terminals of the signal simultaneously and has good common-mode rejection capability.

[0061] For example, the differential signal from the input protection network (at the first and second input nodes) is fed into the corresponding non-inverting input terminals of a differential integrator composed of a first operational amplifier and a second operational amplifier, respectively, through a first input resistor and a second input resistor. This integrator integrates the input current using a feedback capacitor to achieve a differential-to-proportional conversion, while the parallel feedback resistor ensures the stability of its DC operating point. The integrated differential signal is output from the output terminals of the two operational amplifiers and then fed into a subsequent low-pass filter (e.g., a second-order Butterworth active filter composed of resistors and capacitors) to filter out noise above a specified cutoff frequency, ultimately outputting a clean differentially conditioned signal.

[0062] In this embodiment, a differential active integrator is used, which can accurately restore the differential output voltage of the Rogowski coil to a signal proportional to the primary current, while effectively suppressing common-mode interference.

[0063] In one exemplary embodiment, the apparatus further includes a calibration digital-to-analog converter, a calibration resistor, and a calibration switch, wherein:

[0064] The calibration digital-to-analog converter generates a calibration signal through a calibration resistor. Under the control of the microcontroller module, the calibration switch injects the calibration signal into the input node before the signal conditioning module.

[0065] The calibration digital-to-analog converter (DAC) generates a high-precision, known-magnitude analog voltage reference signal. The calibration resistor, a high-precision resistor, generates a precise calibration current signal through which the analog voltage passes, simulating the sensor current. The calibration switch, a controlled analog switch, connects or disconnects the calibration signal path from the main signal path.

[0066] For example, during calibration, the microcontroller module controls the calibration switch to connect the calibration signal path to the starting node of the main signal chain, i.e., the input node before the signal conditioning module. Then, it controls the calibration digital-to-analog converter to output one or more known standard voltages, which are injected into the system as a standard current through the calibration resistor. The microcontroller module reads the measurement results of this standard signal from the analog-to-digital converter module, compares them with theoretical values, calculates the actual total gain and zero-point offset of the entire analog link, and stores them as correction coefficients for real-time compensation of subsequent actual measurement data.

[0067] In this embodiment, the system gain and offset errors caused by component aging, temperature drift, etc. are automatically compensated to ensure long-term measurement accuracy.

[0068] In one exemplary embodiment, the multi-rate amplification and selection module includes three amplification channels with gains set to 1x, 10x, and 100x, respectively.

[0069] The gain settings are 1x, 10x, and 100x: this is a preferred example of the specific gain values ​​for the parallel amplification channels. A 1x channel is used to measure the largest current, a 10x channel for medium current, and a 100x channel for measuring the weakest leakage current. This design can effectively cover the typical dynamic range of power system surge arrester currents with a relatively small number of channels.

[0070] For example, during configuration, the gain of the instrumentation amplifier in each amplification channel is precisely adjusted and fixed to 1, 10, and 100 times by selecting or setting different gain resistors (RG).

[0071] In this embodiment, a good balance is achieved between hardware complexity and dynamic range coverage by configuring gains of 1, 10, and 100 times. It can efficiently cover three orders of magnitude of current changes with three ranges, meeting the needs of most field applications.

[0072] In one exemplary embodiment, the analog-to-digital converter module is a 24-bit Σ-Δ ADC.

[0073] The reference voltage input of a 24-bit Σ-Δ ADC can be connected to a reference power supply. The 24-bit designation indicates the resolution of its output digital quantity, subdividing the full-scale input into approximately 16.77 million parts, crucial for measuring minute current changes. Σ-Δ can refer to an ADC architecture employing oversampling and noise shaping techniques. By sampling at extremely high frequencies and "pushing" quantization noise to higher frequencies, followed by digital filtering, it achieves a very high signal-to-noise ratio and effective bit depth within the signal bandwidth. The 24-bit resolution allows for the resolution of extremely small current changes, forming the basis for accurate analysis of resistive current components. The Σ-Δ architecture also exhibits strong suppression of low-frequency noise (such as 1 / f noise), making it particularly suitable for low-frequency, high-precision applications such as power frequency measurements.

[0074] In one exemplary embodiment, the device further includes a power supply module, wherein:

[0075] The power supply module includes an input protection circuit, a π-type filter, an isolated DC-DC converter, and a linear regulator connected in sequence. The power supply module is used to provide operating voltage for the signal conditioning module, the multi-rate amplification and selection module, the analog-to-digital converter module, and the microcontroller module.

[0076] Among them, a π-type filter refers to a filter circuit shaped like the Greek letter "π," composed of an inductor (L) and a capacitor (C), which can effectively filter out high-frequency conducted noise on power lines. An isolated DC-DC converter is a power conversion module used to achieve electrical isolation between the input and output sides, blocking ground loop interference and improving system safety. A linear regulator is used to provide a stable voltage with low noise and high ripple rejection ratio, suitable for powering analog circuits.

[0077] For example, the external input DC power passes sequentially through an input protection circuit (protection), a π-type filter (to filter out power supply noise), an isolation DC-DC converter (to isolate and convert voltage), and a linear regulator (for secondary voltage regulation and purification), ultimately generating a variety of stable, clean, and isolated power rails (such as ±5V analog power and 3.3V digital power) required by the various modules inside the device.

[0078] In this embodiment, multi-stage filtering and linear voltage regulation provide a "quiet" operating environment for sensitive analog circuits (especially preamplifiers and ADCs), which is fundamental to ensuring measurement accuracy. The isolation design prevents ground loop interference and potential difference hazards, and the protection circuitry also enhances the equipment's survivability in harsh electrical environments.

[0079] In one exemplary embodiment, the microcontroller module is also connected to a temperature sensor and an optical fiber communication module.

[0080] Among them, the temperature sensor can be used to monitor the temperature of key components inside the device (such as those near analog devices) in real time. The fiber optic communication module can be a module that enables remote data communication via optical fiber, featuring strong resistance to electromagnetic interference and long transmission distance.

[0081] In this embodiment, the microcontroller can perform software compensation on the measurement results based on temperature data to correct temperature drift errors and further improve accuracy. Fiber optic communication has strong anti-interference capabilities, making it suitable for substations in strong electromagnetic environments, and enabling remote, real-time, and reliable transmission of monitoring data and remote management of equipment.

[0082] In one exemplary embodiment, the multi-rate amplification and selection module further includes a bypass channel whose input is connected to the signal conditioning module and whose output is connected to a differential input of a multi-channel differential analog switch.

[0083] The bypass channel can refer to a channel with a gain of 1 or unity gain, which does not amplify the signal voltage and can serve as a buffer, impedance matching, or pass-through. For example, when the measured current is large, the microcontroller can control a switch to select this channel to prevent amplifier saturation. In this embodiment, a dedicated range is provided for measuring the largest transient inrush current to prevent the preamplifier from saturating and distorting under large signals. In addition, because its gain is 1 and its transfer function is simple, it can be used as a benchmark for system calibration or diagnosis of the performance of other amplification channels.

[0084] In one exemplary embodiment, the analog signal traces in the device are arranged in a differential pair layout, and the analog ground and digital ground are connected at a single point at the power module.

[0085] In PCB design, differential pair layout refers to arranging two traces carrying a pair of differential signals close together, parallel, and of equal length to maintain impedance consistency and enhance common-mode interference immunity. Single-point connection refers to connecting the analog ground (AGND) and digital ground (DGND) networks together at only one physical point in the circuit (usually chosen at the isolation boundary of the power module) to avoid forming ground loops that introduce digital noise.

[0086] For example, during the PCB layout and routing phase, critical analog signal traces (such as signals from conditioning modules to amplifiers, analog switches, and ADCs) are strictly routed according to differential pair rules. Simultaneously, the PCB ground plane is segmented, with independent AGND and DGND areas planned, and it is ensured that they are connected only in a predetermined, unique location via ferrite beads or 0-ohm resistors.

[0087] In this embodiment, the differential layout maximizes the common-mode rejection ratio (CMRR), and single-point grounding effectively prevents digital ground noise from interfering with sensitive analog ground. This is a key physical guarantee for achieving high-precision measurement. Through the above-mentioned layout and grounding measures, internal system noise can be significantly reduced, and the signal-to-noise ratio (SNR) can be improved, thereby enhancing the detection capability for small signals and the overall measurement accuracy.

[0088] In one exemplary embodiment, the microcontroller in the microcontroller module may be a Cortex-M7 core processor with multiple SPI, I2C and UART interfaces, and its GPIO pins are also connected to status indicator LEDs and fault output circuitry.

[0089] In one exemplary embodiment, such as Figure 2As shown, this application also provides an online detection multi-rate dynamic selection device for surge arresters. The device includes: an input connector J1, whose first pin is connected to the positive output signal of the Rogowski coil, and its second pin is connected to the negative output signal of the Rogowski coil; the housing is connected to protective ground; a signal conditioning module, connected to the input interface module, used to integrate and filter the differential input signal, and output a pair of differential conditioned signals; and a multi-rate amplification and selection module, including at least two amplification channels with different gains and one bypass channel. Each amplification channel includes an instrumentation amplifier, and the input terminals of all instrumentation amplifiers... The system includes: a parallel connection to the differential conditioning signal; a multi-channel differential analog switch with multiple differential inputs connected to the outputs of each amplification channel and bypass channel, and its differential output outputting the final ADC input signal; an analog-to-digital converter module with differential inputs connected to the ADC input signal; a microcontroller module with a digital interface connected to the analog-to-digital converter module to read the converted data, and its control signal output connected to the channel selection terminal of the multi-channel differential analog switch for dynamically selecting and activating one amplification channel or bypass channel; and a power supply module to provide operating voltage for each module in the device.

[0090] In one exemplary embodiment, this application also provides a basic configuration of an online surge arrester detection multi-rate dynamic selection device, as detailed below:

[0091] Sensing and Input Protection: The Rogowski coil is connected to the COIL_P and COIL_N pins of connector J1 via a shielded conductor, and the J1 housing is connected to PE.

[0092] Signal conditioning module: COIL_P and COIL_N are connected in series with common-mode chokes L1 and L1' (10μH) to damping resistors Rs1 and Rs1' (33Ω 0.25W), forming nodes COIL_P_IN and COIL_N_IN. COIL_P_IN and COIL_N_IN are then connected to TVS1 and TVS2 (device selection meets the requirement of single-pulse clamping current ≥500A) for transient suppression of PE. COIL_P_IN and COIL_N_IN are routed differentially to the system ground plane.

[0093] The differential active integrator U1 (differential integrator) uses a low-drift dual op-amp ADA4528-2. The positive input of channel A of U1 is connected to COIL_P_IN via R_IN1 (10kΩ), and the positive input of channel B is connected to COIL_N_IN via R_IN2 (10kΩ). The feedback capacitors for channels A and B of U1 are C_F1 and C_F2 (22nF) respectively, and the feedback bleeder resistors are R_F1 and R_F2 (100kΩ) respectively. The outputs of U1 are connected to R_OUT1 and R_OUT2 (10kΩ each) to form INT_OUT_P and INT_OUT_N. The power supply pins of U1 are connected to the analog power rails V_AIO and V_NEG. Small-signal clamping diodes and series current limiting protection are provided at the integrator inputs to ensure safety under surge conditions.

[0094] The differential active filter U2 (low-pass filter) uses an OPA1612, with differential inputs connected to INT_OUT_P and INT_OUT_N, and differential outputs to LPF_OUT_P and LPF_OUT_N. The filter is a second-order differential Butterworth filter with R_LPF = 10kΩ, C_LPF = 8.2nF, and a cutoff frequency fc = 2kHz. The power supply pins of U2 are connected to V_AIO and V_NEG. The filter wiring uses differential pairs and impedance control.

[0095] Multi-rate amplification and selection module: Three parallel instrumentation amplifiers U3, U4, and U5 utilize the AD8421. The differential inputs of all three devices are connected in parallel to LPF_OUT_P and LPF_OUT_N. U3 achieves a gain of 1 through RG1, which can be open-circuited or 1MΩ; U4 achieves a gain of 10 through RG10 = 5.76kΩ; and U5 achieves a gain of 100 through RG100 = 576Ω. The outputs of the three amplifiers are named GAIN1_P / GAIN1_N, GAIN10_P / GAIN10_N, and GAIN100_P / GAIN100_N, respectively. The common-mode rejection ratio of the three amplifiers is ≥100dB at power frequency.

[0096] The differential buffer U6 uses an OPA1612, with its differential inputs connected to three gain outputs, generating GAIN1_BUF_P / N, GAIN10_BUF_P / N, and GAIN100_BUF_P / N. The differential analog switch matrix U7 uses an ADG5412, with CH0 connected to GAIN1_BUF, CH1 to GAIN10_BUF, and CH2 to GAIN100_BUF. The COM_P / COM_N outputs of U7 are fed into the ADC differential inputs ADC_IN_P / ADC_IN_N via a differential buffer or impedance matching network. The control pins SEL0, SEL1, and SEL2 of U7 are directly connected to the MCU's 3.3V GPIO (SW_CTRL0, SW_CTRL1, SW_CTRL2). The on-resistance R_on of U7 is ≤50Ω, and the switch charge injection Q_inj is ≤10pC. The MCU control switching timing ensures mutual exclusion. During the switching process, ADC sampling is disabled and waits for a steady-state time of Ts_settle=20ms before re-enabling sampling.

[0097] Analog-to-digital converter module: ADC1 uses AD7177-2, with differential inputs connected to ADC_IN_P / ADC_IN_N. The reference voltage is provided by U_REF, which uses ADR4525. VREF_OUT = 2.5V, and VREF_OUT is decoupled to AGND via 0.1μF and 10μF connections. The ADC1 sampling rate is set to Fs = 5kS / s, and the sampling window is N = Fs × Twindow, where Twindow is 10 power frequency cycles. The DRDY pin of ADC1 is connected to the external interrupt of the MCU.

[0098] Calibration Module: DAC1 (calibration digital-to-analog converter) uses AD5686 (16-bit). DAC_OUT is connected in series with the calibration injection node CAL_IN via R_CAL=10kΩ. The calibration switch SW_CAL controls the switching between CAL_IN and the integrator injection node INJ_NODE. SW_CAL is driven by the MCU's CAL_EN. The calibration injection voltage Vcal ranges from 0V to 1.0V, corresponding to the injection current Iinj=Vcal / R_CAL. The calibration steps are as follows: MCU pulls CAL_EN high, DAC outputs the specified Vcal, waits 50ms, reads the ADC value, calculates the gain / phase correction coefficient, writes it to non-volatile memory, and then pulls CAL_EN low.

[0099] Microcontroller module: The MCU uses STM32H743, SPI connects to ADC1 and DAC1, DMA is used for ADC data transfer; UART is connected to the TXD / RXD of the FIBER module via a level driver; I2C connects to the temperature sensor TMP117; the MCU output drive capability is ≥8mA.

[0100] Power Module: The power module receives an external 24V DC input. After passing through a slow-blow fuse F1, a π-type filter (containing a 10μH inductor and a 47μF capacitor), and a TVS protection circuit, it is sent to an isolated DC-DC converter, which converts VIN24 to an isolated 5V voltage. V_5V is then regulated by a linear regulator (LDO) to generate a 3.3V voltage, powering the microcontroller module, digital circuits, etc. The analog power rails (V_AIO, V_NEG) are generated by a dedicated isolated DC-DC converter. Analog ground (AGND) and digital ground (DGND) are connected at a single point on the primary side of the DC-DC converter, and protective earth (PE) is grounded separately.

[0101] In another exemplary embodiment, a stackable configuration is also provided, specifically by adding a spare buffer and a spare ADC channel to enable hardware health checks for unselected paths. All other hardware connections and device parameters remain consistent with Embodiment 1.

[0102] Backup Differential Buffer and ADC: A differential backup buffer U6B (OPA1612) is connected in parallel at the outputs of the three-channel instrumentation amplifiers U3, U4, and U5. Its differential outputs are connected to the differential channels of backup ADC2. Backup ADC2 uses AD7124-8, and its operating power supply is connected to V_3V3, with VREF connected to VREF_OUT. The sampling rate of backup ADC2 is set to 200SPS for periodically sampling the outputs of the three amplifiers. The input impedance of the backup buffer is ≥100kΩ, and its output drive capability meets the ADC input load.

[0103] The MCU is set to perform a health sampling task, which samples the three unselected buffer outputs every 60 seconds with a sampling window of 20ms. After sampling, the amplitude and DC bias are calculated.

[0104] By comparing the unselected path with the long-term average baseline value, if a single deviation exceeds 5% of the baseline value and the deviation persists for three consecutive scans, a path abnormality is determined, and an alarm message is uploaded. If a switch abnormality or a significant change in conduction impedance is detected, the MCU will record a fault code and report it to the in-vehicle display unit via fiber optic communication.

[0105] In yet another exemplary embodiment, a guarantee parameter is provided, specifically:

[0106] To minimize the impact of switching transients, the MCU performs the following steps before each gain switch: pause ADC sampling, apply idle control to analog switch U7, wait for Ts_settle=20ms, discard one window of data, and resume ADC sampling. If the continuous switching frequency exceeds 3 times / second, the MCU enters rate limiting mode and records an alarm.

[0107] Sampling Reference and Synchronization: The ADC sampling clock is synchronized with the power frequency phase reference or configured with a sampling rate that is an integer multiple of the power frequency, ensuring that the sampling window is an integer number of power frequency cycles, thereby effectively reducing spectral leakage and obtaining accurate phase information. For a 50Hz system, a Twindow of 10 cycles or 20 cycles is selected.

[0108] Signal integrity and PCB routing: Differential pair routing is used throughout the differential signal from the analog front end to the ADC and impedance control is implemented. Sensitive analog ground AGND and digital ground DGND are connected at a single point on the primary side of the isolated DC-DC converter. 0.1μF and 10μF decoupling capacitors are placed next to the op-amp. The layout of filters, amplifiers and analog switches is prioritized to be close to the IO pins to reduce the trace length.

[0109] Temperature compensation and long-term stability: The temperature sensor TMP117 is placed near U1 and U2. The MCU uses the temperature reading as input to apply a linear temperature compensation coefficient to the measurement results and updates the coefficient in daily automatic calibration.

[0110] Fault protection mechanism: The input terminal is equipped with TVS, fuse and LC filter, the analog switch adopts low injection model and is configured with overvoltage detection channel in hardware, the MCU monitors the power supply and VREF health, and reports and outputs FAULT_OUT to the vehicle monitoring when abnormal.

[0111] Communication interface: The fiber optic module is connected to the MCU via UART or Ethernet physical layer. Data packets are verified by checksum and signature to ensure data integrity and the security of firmware updates.

[0112] The aforementioned online surge arrester detection multi-range dynamic selection device overcomes the shortcomings of traditional single-range or programmable gain amplifiers (PGA) switching by employing a parallel multi-channel fixed gain amplifier combined with a differential analog switch for dynamic selection. From the protection network consisting of a common-mode choke, damping resistor, and TVS diode at the input end, to the isolated DC-DC converter and π-type filter on the power supply side, an electromagnetic compatibility (EMC) and protection design is formed. Through a calibration module (high-precision DAC and calibration switch), the system can periodically or as needed inject known standard signals to perform closed-loop correction of the gain and offset errors of the entire analog front-end (integration, filtering, and amplification). Employing a Cortex-M7 core MCU, it possesses powerful computing capabilities and rich interfaces to complete dynamic range judgment, data preprocessing, and calibration calculations.

[0113] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0114] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0115] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A surge arrester online detection multi-rate selection device, characterized in that, The device includes an input interface module, a signal conditioning module, a multi-rate amplification and selection module, an analog-to-digital converter module, and a microcontroller module, wherein: The input interface module is used to receive positive / negative signals from the Rogowski coil and output differential input signals according to the positive / negative signals; The signal conditioning module is used to integrate and filter the differential input signal and output a differentially conditioned signal. The multi-rate amplification and selection module includes at least two amplification channels with different gains. The input terminals of each amplification channel are connected in parallel to the signal conditioning module to receive the differential conditioning signal. It also includes a multi-channel differential analog switch, whose multiple differential input terminals are respectively connected to the output terminals of each amplification channel, and whose differential output terminal is used to output the ADC input signal. The analog-to-digital converter module is used to convert the ADC input signal into digital data. The microcontroller module is used to determine whether the signal amplitude of the digitally converted data is within the optimal range based on the digitally converted data and a preset threshold. If it is not within the optimal range, it outputs a target channel selection control signal to the channel selection terminal of the multi-channel differential analog switch. The multi-channel differential analog switch is also used to select and connect a corresponding amplification channel according to the target channel selection control signal.

2. The surge arrester online detection multi-rate selection device according to claim 1, characterized in that, An input protection network is provided between the input interface module and the signal conditioning module. The input protection network includes a first common-mode choke and a second common-mode choke. The positive signal output by the Rogowski coil is connected to the first input node through the first common-mode choke and the first series resistor in sequence. The negative signal output by the Rogowski coil is connected to the second input node through the second common-mode choke and the second series resistor in sequence. The first input node and the second input node are each grounded through a TVS diode, and the two are connected through a parallel capacitor.

3. The surge arrester online detection multi-rate selection device according to claim 2, characterized in that, The signal conditioning module includes a differential integrator and a low-pass filter, wherein: The differential integrator is composed of a first operational amplifier and a second operational amplifier; the first input node is connected to the non-inverting input terminal of the first operational amplifier through a first input resistor, and the second input node is connected to the non-inverting input terminal of the second operational amplifier through a second input resistor; the inverting input terminal of the first operational amplifier is connected to its output terminal through a parallel network of a first feedback capacitor and a first feedback resistor; the inverting input terminal of the second operational amplifier is connected to its output terminal through a parallel network of a second feedback capacitor and a second feedback resistor. The low-pass filter is connected to the output terminals of the first operational amplifier and the second operational amplifier, respectively, and is used to filter out high-frequency noise and output the differential conditioning signal.

4. The surge arrester online detection multi-rate selection device according to claim 3, characterized in that, The device also includes a calibration digital-to-analog converter, a calibration resistor, and a calibration switch, wherein: The calibration digital-to-analog converter generates a calibration signal through a calibration resistor, and the calibration switch, under the control of the microcontroller module, injects the calibration signal into the input node before the signal conditioning module.

5. The surge arrester online detection multi-rate selection device according to claim 1, characterized in that, The multi-rate amplification and selection module includes three amplification channels, with gains set to 1x, 10x, and 100x respectively.

6. The surge arrester online detection multi-rate selection device according to claim 1, characterized in that, The analog-to-digital converter module is a 24-bit Σ-Δ ADC.

7. The surge arrester online detection multi-rate selection device according to claim 1, characterized in that, The device also includes a power supply module, wherein: The power supply module includes an input protection circuit, a π-type filter, an isolated DC-DC converter, and a linear regulator connected in sequence. The power supply module is used to provide operating voltage for the signal conditioning module, the multi-rate amplification and selection module, the analog-to-digital converter module, and the microcontroller module.

8. The surge arrester online detection multi-rate selection device according to claim 1, characterized in that, The microcontroller module is also connected to a temperature sensor and an optical fiber communication module.

9. The surge arrester online detection multi-rate selection device according to claim 1, characterized in that, The multi-rate amplification and selection module also includes a bypass channel, whose input is connected to the signal conditioning module and whose output is connected to a differential input of the multi-channel differential analog switch.

10. The surge arrester online detection multi-rate selection device according to claim 1, characterized in that, In the device, each analog signal trace is laid out in a differential pair configuration, and the analog ground and digital ground are connected at a single point in the power module.

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