Semiconductor electron detector with junction barrier wide energy detection range and imaging method

Abstract

The application provides a junction barrier wide energy detection range semiconductor electron detector and an imaging method, and belongs to the technical field of semiconductor detectors and electronic imaging. The device is a vertical stacked structure, and sequentially comprises, from bottom to top, a first electrode, a semiconductor substrate layer, a semiconductor epitaxial layer and a second electrode. The first electrode is used for forming electrical interconnection with an external circuit. The semiconductor substrate layer is arranged on the first electrode and is used as a support layer and a back contact layer of the device. The semiconductor epitaxial layer is grown on the semiconductor substrate layer, and the semiconductor epitaxial layer is composed of at least one layer of non-intentionally doped high-purity epitaxial layer. The second electrode is deposited on the surface of the semiconductor epitaxial layer and forms a Schottky contact. The semiconductor electron detector can realize ultra-low dark current at an extremely low working bias, nanosecond-level fast response, and can realize the separation imaging of SE and BSE signals flexibly by adjusting the bias.

Description

Technical Field

[0001] This invention relates to the field of semiconductor detectors and electronic imaging technology, and in particular to a junction barrier type semiconductor electronic detector with a wide energy detection range and its imaging method. Background Technology

[0002] As VLSI technology continues to evolve according to Moore's Law to sub-10 nanometer technology nodes, the continuous shrinking of critical dimensions (CD) makes wafer defects increasingly significant in impacting product yield and manufacturing costs. Against this backdrop, electron beam inspection (EBI) technology, with its advantages of nanometer-level spatial resolution, high sensitivity, and material contrast sensitivity, has become a core method for critical dimension measurement and nanometer-level defect analysis in integrated circuit manufacturing. How to further improve the imaging efficiency and signal-to-noise ratio of electron beam inspection systems to meet the demands of advanced nodes for high-speed, high-precision online inspection has become a critical issue that urgently needs to be addressed in this field.

[0003] Currently, the mainstream electron detectors used in electron beam detection systems are mainly divided into two categories. One category is solid-state electron detectors based on silicon PIN (Si-PIN) structures, which utilize the built-in electric field of the semiconductor PN junction to collect electron-hole pairs excited by incident electrons and detect the electron signal by detecting the induced current. The other category is the Everhart-Thornley (ET) detector, which is widely used in scanning electron microscopes (SEM). Its core working principle is to selectively collect secondary electrons (SE) or backscattered electrons (BSE) by applying different bias voltages to the grid. The collected electrons are accelerated and then strike a scintillator to generate photons, which are then converted into electrical signals by a photomultiplier tube and amplified, thereby achieving imaging of the sample morphology and composition.

[0004] However, the aforementioned existing detector technologies still have significant shortcomings in meeting the stringent requirements of advanced electron beam detection systems. Firstly, regarding the signal-to-noise ratio, silicon-based detectors have relatively high dark currents at room temperature (typically above 10). -10 A to 10 -6 The noise level (on the order of Å) constitutes the main noise source of the system, limiting its ability to acquire weak signals and high-contrast images. Secondly, in terms of response speed, both Si-PIN detectors and ET detectors typically have response times on the order of microseconds (μs), which is difficult to match the requirements of future high-speed electron beam scanning imaging systems for nanosecond or even picosecond response speeds. Finally, in terms of functional integration, traditional detectors often struggle to simultaneously and efficiently distinguish and image secondary electrons (usually with energies below 50 eV) and backscattered electrons (with energies close to the incident beam energy) in high-gain mode, which limits their ability to comprehensively acquire information on sample surface morphology and deep composition. Summary of the Invention

[0005] This invention provides a junction barrier type semiconductor electronic detector with a wide energy detection range and an imaging method. It addresses the technical bottlenecks of existing electronic detectors by utilizing the superior physical properties of its wide bandgap material to achieve ultra-low dark current and nanosecond-level fast response at extremely low operating bias voltages. Furthermore, it allows for flexible separation and imaging of SE and BSE signals by adjusting the bias voltage. The technical solution is as follows: In a first aspect, embodiments of the present invention provide a junction barrier type semiconductor electronic detector with a wide energy detection range, comprising a barrier region or a depletion region, including: The first electrode is used to form an electrical interconnect with an external circuit. A semiconductor substrate layer is disposed on the first electrode and serves as a support and back contact layer for the device. A semiconductor epitaxial layer is grown on the semiconductor substrate layer, and the semiconductor epitaxial layer consists of at least one layer of unintentionally doped high-purity epitaxial layer; The second electrode is deposited on the surface of the semiconductor epitaxial layer and is used to form an electrical interconnect with an external circuit.

[0006] Optionally, the barrier region or depletion region is formed by any of the following structures: Schottky contact structure, that is, the second electrode is in direct contact with the semiconductor epitaxial layer to form a Schottky barrier; A PN junction structure, wherein the semiconductor epitaxial layer includes a first conductivity type region at the top and a second conductivity type region at the bottom, and the second electrode forms an ohmic contact or a Schottky contact with the first conductivity type region.

[0007] Optionally, the thickness of the semiconductor epitaxial layer is greater than 0.1 μm, and the doping concentration ranges from 1 × 10⁻⁶. 11 cm -3 Up to 1×10 19 cm -3 .

[0008] Optionally, it further includes a positive bias control unit, which is electrically connected to the second electrode and configured to apply at least one positive bias voltage to the second electrode.

[0009] Optionally, the positive bias control unit is configured to simultaneously apply a first positive bias voltage greater than 0V and a second positive bias voltage with a voltage range at least 10V greater than the first positive bias voltage to the second electrode.

[0010] Optionally, the second electrode is a thin film made of at least one metal selected from Ni, Ti, Al, Au, Pt, Pd, Ir, Ru, Mo, W or an alloy thereof, or a composite thin film containing at least one of the aforementioned metals or alloys thereof.

[0011] Optionally, the thickness of the second electrode ranges from 5 to 300 nm.

[0012] Optionally, it also includes a protective ring disposed on the surface of the semiconductor epitaxial layer and surrounding the outer ring of the second electrode, the protective ring being made of the same material as the second electrode.

[0013] Secondly, embodiments of the present invention provide an imaging method based on the junction barrier type wide energy detection range semiconductor electronic detector described in the first aspect above, wherein the semiconductor electronic detector further includes a positive bias control unit, and the imaging includes: Step 1: Electrically interconnect the positive bias control unit with the second electrode, and electrically interconnect the first electrode with the external imaging circuit; Step 2: Apply a positive bias voltage to the second electrode through the positive bias control unit, so that the device surface attracts negatively charged secondary electrons and backscattered electrons. The electrical signal under the positive bias voltage is transmitted through the first electrode to the external imaging circuit for scanning and imaging to obtain an electronic image.

[0014] Optionally, step 2 includes: A fixed positive bias voltage is applied to the second electrode, and the device simultaneously collects backscattered electrons and secondary electrons. The collected electrical signals are transmitted to an external imaging circuit via the first electrode for scanning and imaging to obtain a backscattered electron image. A first forward bias voltage and a second forward bias voltage are applied to the second electrode respectively. The voltage value of the first forward bias voltage is less than that of the second forward bias voltage. The device collects electrical signals under the first forward bias voltage and the second forward bias voltage respectively, and transmits them to the external imaging circuit through the first electrode. The electrical signals under the first forward bias voltage and the second forward bias voltage are differentiated and subtracted to separate the secondary electronic signal component and obtain a secondary electronic image.

[0015] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following: Ultra-low dark current at room temperature. The room temperature dark current of existing Si-PIN solid-state detectors is typically around 10... -10 A to 10 -6The noise level is on the order of A, constituting the main noise source of the system. This invention is based on 4H-SiC wide bandgap material with a bandgap of approximately 3.26 eV, which has a low intrinsic carrier concentration at room temperature and extremely low thermally excited noise. Simultaneously, the doping concentration of the semiconductor epitaxial layer is controlled at 1 × 10⁻⁶ eV using unintentional doping epitaxial growth technology. 11 cm -3 Up to 1×10 19 cm -3 This further reduces the free carrier concentration, fundamentally suppresses the noise substrate, and significantly improves the signal-to-noise ratio and detection sensitivity for weak electronic signals.

[0016] Nanosecond-level fast response. This invention utilizes the advantages of high carrier mobility and high saturation drift velocity of 4H-SiC material, combined with a vertical structure design to shorten the carrier drift path, achieving a rise time of approximately 1.5 ns. The response speed is improved compared to existing technologies, and it can accurately capture transient signals of high-speed electron beams, making it suitable for high-speed time-resolved and pulse counting applications.

[0017] SE / BSE signal single-detector separation imaging. This invention achieves effective decoupling of the two electronic signals by applying double positive bias voltages to a single detector and performing differential subtraction processing, taking advantage of the inherent difference in collection efficiency between SE and BSE under different bias voltages. In a single detection process, high-quality BSE contrast images reflecting elemental composition distribution and SE morphology images reflecting surface microstructure can be obtained separately, greatly simplifying the system architecture and improving the overall imaging capability.

[0018] Excellent environmental stability. 4H-SiC material has high thermal conductivity, high breakdown field strength and strong radiation hardness. Its performance degradation under high temperature and strong radiation environments is much lower than that of silicon materials. It is suitable for harsh industrial online testing environments, with a longer service life and higher operational reliability. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the hierarchical structure of the junction barrier type wide energy detection range semiconductor electronic detector provided in an embodiment of the present invention; Figure 2 This is a block diagram of the control structure of the positive bias control unit provided in an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the detection of dark current and photocurrent in the dark state of the device provided in an embodiment of the present invention; Figure 4 This is a schematic diagram illustrating the response speed of the device provided in this embodiment of the invention under a pulse emission source; Figure 5 These are the oscilloscope outputs collected by the detector under different bias voltages by the device provided in this embodiment of the invention; Figure 6 These are imaging results of the device provided in this embodiment of the invention on carbon pore samples of copper mesh under different modes; Figure 7 This is a flowchart of the imaging method provided in the embodiments of the present invention.

[0021] In the figure: 1-First electrode; 2-Semiconductor substrate; 3-Semiconductor epitaxial layer; 4-Second electrode; 5-Positive bias control unit; 6-Guard ring. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0023] Figure 1 This is a schematic diagram of the hierarchical structure of the junction barrier type wide energy detection range semiconductor electronic detector provided in an embodiment of the present invention; Figure 2 This is a block diagram of the control structure of the positive bias control unit provided in an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the detection of dark current and photocurrent in the dark state of the device provided in an embodiment of the present invention; Figure 4 This is a schematic diagram illustrating the response speed of the device provided in this embodiment of the invention under a pulse emission source; Figure 5 These are the oscilloscope outputs collected by the detector under different bias voltages by the device provided in this embodiment of the invention; Figure 6 These are imaging results of a copper mesh carbon aperture sample obtained by the device provided in this embodiment of the invention under different modes. Figures 1 to 6 As shown, this embodiment of the invention provides a junction barrier type semiconductor electronic detector with a wide energy detection range. The detector has a vertically stacked structure, comprising, from bottom to top: a first electrode 1, a semiconductor substrate layer 2, a semiconductor epitaxial layer 3, and a second electrode 4.

[0024] The first electrode 1 is located at the bottom of the device and is used to form a good electrical interconnect with the external circuit. The first electrode 1 forms an ohmic contact with the back side of the semiconductor substrate 2, ensuring barrier-free transport of charge carriers at the electrode-semiconductor interface, thereby ensuring that the electrical signals induced by the device during operation can be conducted to the external imaging circuit with low loss. In this embodiment of the invention, the semiconductor substrate is an n+ type 4H-SiC substrate with a high doping concentration. When it contacts the metal, the depletion region at the interface is extremely thin, and tunneling current dominates. Therefore, stable ohmic contact characteristics can be achieved under conventional metallization processes and annealing conditions, effectively reducing contact resistance and improving the overall signal transmission efficiency of the device.

[0025] Semiconductor substrate 2 is disposed above the first electrode 1, serving as the mechanical support layer and back contact layer of the device. The n+ type 4H-SiC substrate has a high carrier concentration, and its low resistivity ensures that the induced signal current generated by the semiconductor epitaxial layer 3 can be smoothly transmitted longitudinally to the first electrode 1 during device operation, thereby reducing signal attenuation caused by series resistance and ensuring the system's imaging sensitivity. Simultaneously, the 4H-SiC material itself has a wide bandgap of approximately 3.26 eV and a high breakdown field strength of approximately 3 × 10⁻⁶. 6 Excellent physical properties such as V / cm and high thermal conductivity of about 4.9 W / (cm·K) enable the device to maintain stable electrical performance even under harsh working environments such as high temperature and strong radiation, and have a significant advantage in environmental stability compared with traditional silicon-based detectors.

[0026] Semiconductor epitaxial layer 3 is grown on an n+ type 4H-SiC substrate and consists of at least one unintentionally doped (UID) high-purity epitaxial layer. It is the core functional layer of the device. In this embodiment, it is specifically a p-type 4H-SiC epitaxial layer, or it can be composed of epitaxial layers with various doping types, such as a composite layer structure consisting of two or more n-type and p-type semiconductor layers. The low background doping concentration in semiconductor epitaxial layer 3 gives it high resistivity characteristics, allowing a broad depletion region to form within it even at near-zero or extremely low bias voltages. This generates a built-in electric field to effectively collect electron-hole pairs generated by incident electron excitation. (Reference) Figure 3 Because the bandgap of 4H-SiC is much larger than that of silicon, its intrinsic carrier concentration is extremely low at room temperature, approximately 10⁻⁶. -6 cm -3 The magnitude of the thermally excited dark current is extremely small, enabling the device to achieve ultra-low dark current as low as 10 ohms even when operating at room temperature. -13 The A-level speedup significantly improves the signal-to-noise ratio of the detector, which is beneficial for the accurate acquisition and imaging of weak electronic signals.

[0027] The second electrode 4 is deposited on the surface of the semiconductor epitaxial layer 3, forming a Schottky contact with the semiconductor epitaxial layer 3 to construct a Schottky barrier. At the Schottky contact, the difference between the work function of the metal and the work function of the p-type 4H-SiC forms a barrier at the interface. This barrier has rectification characteristics under both zero-bias and forward-biased conditions, further suppressing the reverse leakage current in the dark state. When external electrons, including secondary electrons (SE) and backscattered electrons (BSE), are incident on the surface of the second electrode 4, the signal current they generate is transmitted through the semiconductor epitaxial layer 3 and the n+ type 4H-SiC substrate, and is finally output from the first electrode 1 to the external imaging circuit, realizing the detection and imaging of the electronic signal.

[0028] The aforementioned vertical stacked structure, through the vertical arrangement of the first electrode 1 and the second electrode 4, enables the signal current to be transmitted in the vertical direction, which helps to shorten the drift path of charge carriers and reduce the transit time, thereby achieving a fast response characteristic at the nanosecond level, such as a rise time of about 1.5 ns, which meets the stringent requirements of high-speed electron beam scanning imaging systems for response speed.

[0029] Optionally, in the junction barrier type wide energy detection range semiconductor electronic detector provided in the embodiments of the present invention, the barrier region or depletion region is formed by any of the following structures: The Schottky contact structure is formed by the direct contact between the second electrode 4 and the semiconductor epitaxial layer 3 to create a Schottky barrier.

[0030] Specifically, the Schottky contact structure offers the following advantages: First, it boasts extremely fast response speed. Schottky diodes are majority-carrier devices with no charge storage effect, and their extremely short relaxation time makes them excellent for high-frequency signal detection. Second, the process is simple and low-temperature, eliminating the need for high-temperature diffusion or ion implantation like PN junctions, thus avoiding damage to semiconductor materials (especially wide-bandgap semiconductors) caused by high temperatures. Finally, the low turn-on voltage allows for effective electric field distribution at relatively low bias voltages. This enhances the detector's tracking capability under high-frequency, high-speed pulse signals while reducing manufacturing complexity and increasing yield.

[0031] The PN junction structure, namely the semiconductor epitaxial layer 3, includes a first conductivity type region on top and a second conductivity type region on the bottom, and the second electrode 4 forms an ohmic contact or a Schottky contact with the first conductivity type region.

[0032] Specifically, the PN junction structure offers the following advantages: its interface is located within the semiconductor (homogeneous junction), making it less susceptible to surface states and environmental contamination compared to a metal-semiconductor interface. By adjusting the doping concentration, a wider depletion layer can be obtained, thereby increasing the radiation absorption volume. It also maintains high sensitivity and long-term stability even in weak signal environments and harsh operating conditions.

[0033] Furthermore, the thickness of the semiconductor epitaxial layer 3 is greater than 0.1 μm, and the doping concentration ranges from 1 × 10⁻⁶. 11 cm -3 Up to 1×10 19 cm -3 .

[0034] The epitaxial layer thickness is greater than 0.1 μm to ensure a sufficiently wide effective sensing region. Under forward bias or zero bias operating conditions, the width of the depletion region within the p-type epitaxial layer is inversely proportional to the doping concentration—the lower the doping concentration, the wider the depletion region can be extended at the same bias voltage. By controlling the doping concentration to an unintentional doping level, the depletion region can extend to the entire epitaxial layer at extremely low operating voltages, such as 0 to 20 V. This allows the sensing region to cover the full thickness of the epitaxial layer, significantly improving the collection efficiency of electron-hole pairs excited by incident electrons and avoiding signal loss due to insufficient sensing region.

[0035] Furthermore, it should be noted that the semiconductor epitaxial layer 3 may consist of multiple layers of unintentionally doped high-purity epitaxial layers. Some pin-type structures may have contact layers with high doping concentrations, achieving a doping concentration of 1×10⁻⁶. 19 cm -3 level.

[0036] At the same time, the extremely low doping concentration fundamentally suppresses the thermally excited intrinsic carrier concentration, keeping the dark current of the device at an extremely low level of approximately 10⁻⁶ under room temperature operating conditions. -13 The pA-level depth allows for the establishment of a low-noise substrate, enhancing the detector's ability to resolve secondary / backscattered electron signals excited by weak incident beams in the pA to fA range. This characteristic directly addresses the issue of existing silicon-based detectors (Si-PIN) having excessively high room-temperature dark currents (up to 10 ohms). -10 The insufficient signal-to-noise ratio caused by the A-level is the core advantage of this invention in low-noise detection.

[0037] Furthermore, under the premise of meeting the extremely low doping concentration, the epitaxial layer thickness of more than 0.1 μm provides sufficient process window for subsequent processes such as guard ring etching and electrode deposition, ensuring the reliability and consistency of device manufacturing.

[0038] Optionally, this embodiment also includes a positive bias control unit 5, which is electrically connected to the second electrode 4. The positive bias control unit 5 is configured to apply at least one positive bias voltage to the second electrode 4. The introduction of the positive bias control unit 5 enables the device to have active bias voltage control capability. When a positive bias voltage is applied to the second electrode 4, the electrode surface presents a positive potential relative to the sample under test, forming a positive guiding electric field between the sample and the electrode. For negatively charged secondary electrons (SE) excited from the sample surface, whose energy is typically below 50 eV, and backscattered electrons (BSE), whose energy is close to the incident beam energy, the guiding electric field established by the applied positive bias voltage attracts them to the surface of the second electrode 4, causing them to be absorbed by the electrode or penetrate into the sensing region of the semiconductor epitaxial layer 3, thereby exciting a detectable induced current signal. The induced current is longitudinally transmitted through the semiconductor epitaxial layer 3 and the n+ type 4H-SiC substrate, and output to the external imaging circuit through the first electrode 1 to complete the collection and imaging of the electronic signal.

[0039] Among them, the positive bias control unit 5 is designed to output at least one positive bias voltage, which gives the device the ability to operate in multiple bias voltage modes, laying the hardware foundation for the subsequent separation of SE and BSE signals through bias voltage differences.

[0040] Furthermore, the positive bias control unit 5 is configured to simultaneously apply a first positive bias voltage with a voltage range of 0 to 5V and a second positive bias voltage with a voltage range of 10 to 20V to the second electrode 4.

[0041] The aforementioned dual-bias design is based on the fundamental differences between SE and BSE in terms of energy characteristics and their electric field collection behavior. Specifically, under a lower first forward bias voltage (0 to 5V), the initial kinetic energy of secondary electrons (SE) is extremely low, typically below 50eV, making them highly susceptible to the influence of the forward guiding electric field. Under the electric field established by the first forward bias voltage, they can be efficiently attracted and absorbed to the electrode surface, forming a current contribution dominated by the SE signal. At this time, due to their higher energy, the trajectory of backscattered electrons (BSE) is relatively less deflected under low bias voltage, and the component collected by the electrode is limited. Therefore, the current signal collected under low bias voltage mainly reflects the combined contribution of SE and part of BSE, with the SE component dominating and rapidly increasing to saturation as the bias voltage increases.

[0042] When the bias voltage is further increased to the second forward bias voltage of 10 to 20V, the collection of SE (Sequence Entropy) tends to saturate. The further increase in the current signal mainly comes from BSE (Body Entropy): on the one hand, the trajectory deflection of BSE is more significant under high bias voltage, increasing the probability of it being captured by the electrode; on the other hand, high-energy BSE can directly penetrate the ultrathin electrode and enter the sensing region to excite the signal. Therefore, the total current collected under the second forward bias voltage includes the saturated SE component and the significantly increased BSE component.

[0043] Based on the above principles, by differentiating and subtracting the current signals under the first and second forward bias voltages, the common BSE background component can be removed, and the differential current reflecting only the SE signal change can be extracted, thereby achieving effective decoupling and separate imaging of the SE and BSE signals. This dual-bias working scheme achieves independent characterization of the two electronic signals on a single detector, overcoming the technical defects of traditional detectors in high-gain mode where SE and BSE signals are mixed and difficult to separate.

[0044] Optionally, the second electrode 4 is a Ni / Au composite metal thin film. Using a Ni / Au composite metal thin film as the second electrode 4 has the following technical advantages: First, a stable Schottky barrier can be formed between Ni and the p-type 4H-SiC surface, and Ni has a mature process foundation in the SiC device field; second, the Au layer covering the Ni layer serves as a protective layer to prevent Ni layer oxidation, thus ensuring the long-term stability of the Schottky contact interface. Furthermore, Au has extremely low resistivity, which helps reduce the thin-film resistance of the electrode, decreases the ohmic voltage drop on the electrode, and improves the uniformity of current collection. In addition, the Ni / Au composite structure has good compatibility with standard semiconductor micro / nano fabrication processes and can be achieved through mature deposition processes such as magnetron sputtering or electron beam evaporation, which is beneficial for mass production.

[0045] Optionally, the thickness of the second electrode 4 is 10 nm. Designing the second electrode 4 as a nanoscale ultrathin structure with a thickness of 10 nm is one of the key design considerations for achieving effective detection of low-energy electrons. In electron beam detection applications, the energy of secondary electrons (SEs) excited from the sample is typically below 50 eV, belonging to extremely low-energy charged particles. If the electrode is too thick, the low-energy SEs will be completely absorbed by the electrode and unable to penetrate into the underlying semiconductor epitaxial layer 3 of the sensing region to generate a signal, leading to a decrease in detection sensitivity. Controlling the electrode thickness to 10 nm ensures that a certain proportion of low-energy incident electrons can penetrate the electrode and enter the sensing region, exciting electron-hole pairs to generate an induced current; simultaneously, the ultrathin electrode maintains good transmission uniformity throughout the entire effective area, ensuring spatial consistency of the detector response.

[0046] The ultra-thin second electrode 4 also helps to reduce the heat capacity of the electrode layer, reduce the impact of local temperature rise under high-speed electron beam bombardment, and further ensure the stability and reliability of the device in high-speed scanning mode.

[0047] Optionally, this embodiment also includes a protective ring 6, which is disposed on the surface of the semiconductor epitaxial layer 3 and surrounds the outer ring of the second electrode 4. The protective ring 6 is made of the same material as the second electrode 4. The protective ring 6 and the second electrode 4 are fabricated in the same layer and made of the same Ni / Au material. They are formed simultaneously in the same photolithography and metal deposition process, which can effectively reduce process complexity and ensure the material consistency between the protective ring 6 and the second electrode 4.

[0048] The guard ring 6 serves the following important technical functions: First, it interrupts the lateral leakage path. During normal operation, the edge of the second electrode 4 typically exhibits a high local electric field due to geometric effects and edge electric field concentration. Without the guard ring 6, this edge electric field would extend outward along the surface of the semiconductor epitaxial layer 3, forming a lateral leakage current path extending from the center electrode edge to the chip edge, increasing the device's dark current. The guard ring 6 is applied with the same potential as the second electrode 4, effectively extending the equipotential surface of the second electrode 4 outward, thereby interrupting the aforementioned lateral leakage path, reducing the overall leakage current of the device, and further improving the signal-to-noise ratio. Second, it smooths the edge electric field distribution. The guard ring 6 is arranged around the outer ring of the second electrode 4, homogenizing the strong electric field concentration area at the edge of the second electrode 4, preventing premature breakdown caused by local high fields, improving the device's operational reliability and long-term stability, and extending the device's lifespan even within the device's low operating voltage range by eliminating the risk of edge breakdown.

[0049] Optionally, multiple guard rings 6 are provided and arranged sequentially and at intervals around the second electrode 4. In this embodiment of the invention, two guard rings 6 are arranged sequentially and at intervals on the outer ring of the second electrode 4, forming a floating guard ring structure with a step-by-step potential transition. Under positive bias operating conditions, the potential of each guard ring 6 decreases sequentially from the inside to the outside in the radial direction, forming a gradient electric field distribution. This makes the equipotential surface distribution at the edge of the second electrode 4 more uniform, further alleviating the edge electric field concentration effect and controlling the peak electric field intensity at the edge below the breakdown field strength of the device material 4H-SiC, effectively improving the device's withstand voltage capability and operating stability. At the same time, the establishment of the gradient electric field also further extends the equivalent path of the lateral leakage current, superimposing and reducing the leakage current components at each stage, thus effectively controlling the total leakage current of the device.

[0050] Figure 7 This is a flowchart of the imaging method provided in an embodiment of the present invention. For example... Figure 7 As shown, embodiments of the present invention also provide an imaging method based on, for example, Figures 1 to 2 The method for realizing a junction barrier type wide energy detection range semiconductor electronic detector includes the following steps: S1. Electrically interconnect the positive bias control unit 5 with the second electrode 4, and electrically interconnect the first electrode 1 with the external imaging circuit.

[0051] In step 1, the positive bias control unit 5 forms a reliable electrical interconnect with the second electrode 4 through wire bonding or electrode soldering, ensuring that the positive bias control unit 5 can accurately apply the set bias voltage to the second electrode 4. The first electrode 1 is located on the back of the device and is connected to the signal readout terminal of the external imaging circuit through conductive silver paste, wire bonding, or flip-chip soldering, forming a complete current transmission path. This ensures that the induced current generated by the detector can be transmitted to the external imaging circuit for subsequent signal amplification and image processing without loss. The establishment of the above electrical interconnection is a prerequisite for the normal operation of the device and the circuit basis for the implementation of subsequent operating modes.

[0052] S2. A positive bias voltage is applied to the second electrode 4 through the positive bias voltage control unit 5, so that the surface of the device attracts negatively charged secondary electrons and backscattered electrons. The electrical signal under the positive bias voltage is transmitted to the external imaging circuit through the first electrode 1 for scanning and imaging to obtain an electronic image.

[0053] In step 2, after the positive bias control unit 5 applies a positive bias voltage to the second electrode 4, a positive guiding electric field pointing towards the electrode is formed between the second electrode 4 and the sample under test. Since secondary electrons (SE) and backscattered electrons (BSE) are both negatively charged, they are guided and incident on the surface of the second electrode 4 under the attraction of the positive electric field. The incident low-energy SE and BSE penetrate the ultrathin Ni / Au second electrode 4 and enter the sensing region of the semiconductor epitaxial layer 3, exciting electron-hole pairs. Under the combined action of the built-in electric field of the semiconductor epitaxial layer 3 and the applied bias voltage, the electron-hole pairs quickly separate and drift in their respective directions, forming an induced current. This induced current is conducted to the first electrode 1 through the n+ type 4H-SiC substrate, and then, through the signal amplification and analog-to-digital conversion stage of the external imaging circuit, it is recorded synchronously with the scanning position of the incident electron beam, ultimately reconstructing a scanning imaging image reflecting sample information.

[0054] refer to Figure 4 Due to the high mobility and low trap density of 4H-SiC material, as well as the short carrier drift path in the vertical structure, the device can achieve a fast response characteristic with a rise time of about 1.5 ns in the nanosecond range. It can accurately capture the transient signal of the sample bombarded by the electron beam and meet the requirements of high-speed scanning electron microscope and high-throughput electron beam detection system for detector response speed.

[0055] Furthermore, step 2 includes the following sub-steps: S21. A fixed positive bias voltage is applied to the second electrode 4. The device simultaneously collects backscattered electrons and secondary electrons. The collected electrical signals are transmitted to the external imaging circuit via the first electrode 1 for scanning and imaging to obtain a backscattered electron image.

[0056] This step is backscattered electron (BSE) mode imaging: In BSE mode, the positive bias control unit 5 applies a fixed, relatively high positive bias voltage, such as a second positive bias voltage, ranging from 10 to 20 V, to the second electrode 4. Under this bias condition, the SE energy (<50 eV) excited by the incident electron beam bombarding the sample is efficiently collected under the attraction of the positive electric field; simultaneously, the BSE energy, close to the incident beam energy, typically hundreds of eV to tens of keV, is also captured by the electrode in a larger proportion under the guidance of this higher bias voltage. After penetrating the ultrathin electrode, it excites a signal in the sensing region, contributing the BSE-related component to the total current. Under this fixed bias voltage, SE collection tends to saturate, thus the contribution of BSE to the total current signal is fully reflected. This total signal is directly used for imaging, and the resulting image mainly reflects the atomic number contrast difference (Z-contrast) in different regions of the sample, i.e., the backscattered electron image, which can be used to characterize the compositional distribution information of the sample. Figure 6 As shown on the left, when imaging a copper mesh carbon pore sample in BSE mode, a significant contrast difference is observed between the copper (Cu) region and the carbon (C) region, clearly reflecting the difference in atomic number between the two elements, thus verifying the compositional characterization capability of the BSE mode.

[0057] S22. Apply a first forward bias voltage and a second forward bias voltage to the second electrode 4 respectively. The voltage value of the first forward bias voltage is less than that of the second forward bias voltage. The device collects the electrical signals under the first forward bias voltage and the second forward bias voltage respectively, and transmits them to the external imaging circuit through the first electrode 1. Perform differential subtraction processing on the electrical signals under the first forward bias voltage and the second forward bias voltage to separate the secondary electronic signal component and obtain the secondary electronic image.

[0058] This step is secondary electron (SE) mode imaging: In SE mode, the positive bias control unit 5 applies a first positive bias V1 (range 0 to 5V) and a second positive bias V2 (range 10 to 20V) to the second electrode 4. The detector collects the corresponding induced current signals I(V1) and I(V2) under V1 and V2 conditions, respectively. As before, I(V1) contains the dominant SE component collected under low bias and a small amount of BSE component; I(V2) contains the sum of the SE saturation component and the significantly increased BSE component. By performing differential subtraction on the signals under the two biases, i.e., calculating ΔI = I(V1) - I(V2) or equivalent differential processing, the common BSE background contribution in both can be eliminated, extracting the differential signal component that purely reflects the change in SE collection. This differential signal mainly originates from the difference in SE collection efficiency between the two operating points V1 and V2, and can more realistically reflect the local work function change and microscopic morphology details of the sample surface, obtaining high-quality secondary electron images. Figure 5As shown, after differentiating and subtracting the oscilloscope output signals V1 and V2 acquired under two different biases, the SE differential signal shown in the shaded area of ​​the figure is obtained, which visually verifies the effectiveness of the signal separation method. Figure 6 As shown on the right, when imaging a copper mesh carbon hole sample in SE mode, the obtained image clearly presents the surface micro-morphological undulations of the sample. The contour of the hole edge and the three-dimensional morphological information of the surface are accurately restored, which proves the excellent characterization ability of SE mode in surface morphology imaging.

[0059] By flexibly switching between the BSE and SE modes, the imaging method provided by this invention achieves the separation, independent acquisition, and integrated imaging of compositional contrast BSE images and surface morphology SE images of the same scanning area on a single detector. This greatly enriches the sample information dimensions that can be obtained in a single scan and overcomes the technical limitations of traditional detectors in high-gain mode where SE / BSE signals are mixed and difficult to separate.

[0060] In summary, the junction barrier type wide energy detection range semiconductor electronic detector provided by this invention has the following significant advantages over the prior art: Firstly, ultra-low dark current at room temperature. The room temperature dark current of existing Si-PIN solid-state detectors is typically around 10... -10 A to 10 -6 The noise level is on the order of A, constituting the main noise source of the system. This invention is based on 4H-SiC wide bandgap material with a bandgap of approximately 3.26 eV, whose room-temperature intrinsic carrier concentration is about 20 orders of magnitude lower than that of silicon, resulting in extremely low thermally excited noise. Simultaneously, the doping concentration of the semiconductor epitaxial layer 3 is controlled at 1 × 10⁻⁶ eV using unintentional doping epitaxial growth technology. 11 cm -3 Up to 1×10 19 cm -3 This further reduces the free carrier concentration, and the measured dark current can be as low as 10. -13 The A-level noise level is reduced by 3 to 7 orders of magnitude compared to silicon-based detectors, fundamentally suppressing the noise floor and significantly improving the signal-to-noise ratio and detection sensitivity for weak electronic signals.

[0061] Secondly, it offers nanosecond-level fast response. Existing Si-PIN detectors and ET detectors typically have response times on the microsecond (μs) scale, which is insufficient to meet the high-speed scanning requirements of advanced nodal electron beam detection systems. This invention leverages the high carrier mobility and high saturation drift velocity of 4H-SiC material, combined with a vertical structure design to shorten the carrier drift path, achieving a rise time of approximately 1.5 ns. This represents a response speed improvement of about 2 to 3 orders of magnitude compared to existing technologies, enabling precise capture of transient signals from high-speed electron beams. It is suitable for high-speed time-resolved and pulse-counting applications.

[0062] Thirdly, single-detector separation imaging of SE / BSE signals. Traditional detectors struggle to efficiently distinguish between SE (<50 eV) and BSE (near-incident) energies in high-gain mode, resulting in images that are nonlinear mixtures of the two electrons, losing true surface morphology details and compositional contrast information. This invention, by applying dual positive bias voltages to a single detector and performing differential subtraction, leverages the inherent difference in collection efficiency between SE and BSE under different bias voltages to effectively decouple the two electron signals. In a single detection process, high-quality BSE contrast images reflecting elemental composition distribution and SE morphology images reflecting surface microstructure can be obtained separately, greatly simplifying the system architecture and improving overall imaging capabilities.

[0063] Fourth, excellent environmental stability. 4H-SiC material has high thermal conductivity, high breakdown field strength and strong radiation hardness. Its performance degradation under high temperature and strong radiation environments is much lower than that of silicon material. It is suitable for harsh industrial online testing environments and has a longer service life and higher operational reliability.

[0064] Unless otherwise defined, the technical or scientific terms used herein should be understood in their ordinary sense by one of ordinary skill in the art to which this invention pertains. The terms “first,” “second,” and similar terms used in this specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right” are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0065] The above description is merely an optional embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A junction barrier type semiconductor electronic detector with a wide energy detection range, characterized in that, include: The first electrode (1) is used to form an electrical interconnect with an external circuit; A semiconductor substrate layer (2) is disposed on the first electrode (1) and serves as a support and back contact layer for the device; A semiconductor epitaxial layer (3) is grown on the semiconductor substrate layer (2), and the semiconductor epitaxial layer (3) is composed of at least one layer of unintentionally doped high-purity epitaxial layer; The second electrode (4) is deposited on the surface of the semiconductor epitaxial layer (3) for forming an electrical interconnect with an external circuit; A positive bias control unit (5) is electrically connected to the second electrode (4) and is configured to apply at least one positive bias voltage to the second electrode (4).

2. The junction barrier type wide energy detection range semiconductor electronic detector according to claim 1, characterized in that, It possesses a barrier region or a depletion region, wherein the barrier region or depletion region is formed by any of the following structures: Schottky contact structure, that is, the second electrode (4) is in direct contact with the semiconductor epitaxial layer (3) to form a Schottky barrier; The PN junction structure, namely the semiconductor epitaxial layer (3), includes a first conductivity type region at the top and a second conductivity type region at the bottom, and the second electrode (4) forms an ohmic contact or a Schottky contact with the first conductivity type region.

3. The junction barrier type wide energy detection range semiconductor electronic detector according to claim 1, characterized in that, The thickness of the semiconductor epitaxial layer (3) is greater than 0.1 μm, and the doping concentration ranges from 1 × 10⁻⁶. 11 cm -3 Up to 1×10 19 cm -3 .

4. The junction barrier type wide energy detection range semiconductor electronic detector according to claim 1, characterized in that, The positive bias control unit (5) is configured to simultaneously apply a first positive bias voltage greater than 0V and a second positive bias voltage with a voltage range at least 10V higher than the first positive bias voltage to the second electrode (4).

5. The junction barrier type wide energy detection range semiconductor electronic detector according to claim 1, characterized in that, The second electrode (4) is a thin film made of at least one metal or alloy of Ni, Ti, Al, Au, Pt, Pd, Ir, Ru, Mo, W, or a composite thin film containing at least one of the above metals or alloys.

6. The junction barrier type wide energy detection range semiconductor electronic detector according to claim 5, characterized in that, The thickness of the second electrode (4) ranges from 5 to 300 nm.

7. The junction barrier type wide energy detection range semiconductor electronic detector according to any one of claims 1 to 6, characterized in that, It also includes a protective ring (6), which is disposed on the surface of the semiconductor epitaxial layer (3) and arranged around the outer ring of the second electrode (4). The material of the protective ring (6) is the same as that of the second electrode (4).

8. An imaging method based on a junction barrier type wide energy detection range semiconductor electronic detector as described in any one of claims 1 to 7, characterized in that, The semiconductor electronic detector further includes a positive bias control unit (5), and the imaging method includes: Step 1: Electrically interconnect the positive bias control unit (5) with the second electrode (4) and electrically interconnect the first electrode (1) with the external imaging circuit; Step 2: Apply a positive bias voltage to the second electrode (4) through the positive bias control unit (5) so that the device surface attracts negatively charged secondary electrons and backscattered electrons. The electrical signal under the positive bias voltage is transmitted through the first electrode (1) to the external imaging circuit for scanning and imaging to obtain an electronic image.

9. The imaging method according to claim 8, characterized in that, Step 2 includes: A fixed positive bias voltage is applied to the second electrode (4), and the device simultaneously collects backscattered electrons and secondary electrons. The collected electrical signals are transmitted to the external imaging circuit through the first electrode (1) for scanning imaging to obtain a backscattered electron image. A first forward bias voltage and a second forward bias voltage are applied to the second electrode (4) respectively. The voltage value of the first forward bias voltage is less than that of the second forward bias voltage. The device collects the electrical signals under the first forward bias voltage and the second forward bias voltage respectively, and transmits them to the external imaging circuit through the first electrode (1). The electrical signals under the first forward bias voltage and the second forward bias voltage are differentiated and subtracted to separate the secondary electronic signal component and obtain the secondary electronic image.

Images