Method for detecting coexistence of ferroelectric and antiferroelectric states in polymorphic memory using atomic force microscopy

Abstract

The application provides a method for coexistence of ferroelectric and antiferroelectric states in atomic force microscope detection of a multi-state memory, and is suitable for the technical field of characterization of micro / nano scale functional materials. The method comprises: obtaining an amplitude signal and a phase signal for a functional layer with coexistence of ferroelectric and antiferroelectric states; the amplitude signal and the phase signal are collected in the process that an atomic force microscope applies a bias scanning signal to a predetermined region of the functional layer; determining a relationship curve of amplitude and voltage based on the amplitude signal and the bias scanning signal; determining a relationship curve of phase and voltage based on the phase signal and the bias scanning signal; and determining the coexistence relationship of the ferroelectric state and the antiferroelectric state in the multi-state memory to be measured based on the relationship curve of amplitude and voltage and the relationship curve of phase and voltage. The embodiment of the application can deeply analyze the characterization method of the coexistence relationship of the local ferroelectric state and the antiferroelectric state, and provides a key characterization tool for material design, performance optimization and failure analysis of the multi-state memory.

Description

Technical Field

[0001] This application relates to the field of characterization technology for micro- and nano-scale functional materials, and in particular to a method for detecting the coexistence of ferroelectric and antiferroelectric states in multi-state memories using atomic force microscopy. Background Technology

[0002] With the rapid development of information storage technology towards high density and low power consumption, novel multi-state memories exhibiting the coexistence of ferroelectric and antiferroelectric states have shown great potential. These memories utilize the competition and coexistence of multiple polarization sequences (such as ferroelectric polarization and antiferroelectric antiparallel polarization) in materials to achieve multiple stable non-volatile states within a single memory cell, thereby significantly improving storage density. Understanding and controlling the microscopic formation mechanism, spatial distribution, and switching dynamics of this coexisting phase under an external electric field is crucial for optimizing device performance and improving reliability.

[0003] Currently, the characterization of such materials mainly relies on macroscopic electrical measurements, such as polarization-voltage (PV) hysteresis loops and current-voltage (IV) curves. These methods can reflect the overall average response of the device; for example, triple hysteresis loops and multiple current peaks suggest complex interactions between ferroelectricity and antiferroelectricity.

[0004] However, macroscopic measurements have a fundamental limitation: they cannot distinguish whether the response originates from a uniform phase transition of the material as a whole or from the separate contributions of different micro-regions (such as ferroelectric domains and antiferroelectric domains).

[0005] Therefore, developing a characterization method capable of resolving the coexistence relationship between local ferroelectric and antiferroelectric states has become an urgent need in the fields of materials science and device physics. Summary of the Invention

[0006] In view of this, embodiments of this application provide a method for detecting the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory using atomic force microscopy, in order to solve the problem in the prior art of lacking a characterization method capable of resolving the coexistence relationship between local ferroelectric and antiferroelectric states.

[0007] The first aspect of this application provides a method for detecting the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory using atomic force microscopy, comprising:

[0008] The amplitude and phase signals of the functional layer of the multi-state memory under test, which has both ferroelectric and antiferroelectric states, are acquired. The amplitude and phase signals are acquired during the process of applying a bias scanning signal to a predetermined region of the functional layer using an atomic force microscope. Based on the amplitude signal and the bias scanning signal, the relationship curve between amplitude and voltage is determined; Based on the phase signal and the bias scanning signal, the relationship curve between phase and voltage is determined; Based on the amplitude-voltage and phase-voltage relationship curves, the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined.

[0009] In one possible implementation, the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined based on the amplitude-voltage and phase-voltage relationship curves, including: The number of amplitude peaks is determined based on the relationship curve between amplitude and voltage; Based on the relationship curve between phase and voltage, determine the number of phase reversals and / or the number of hysteresis loops; Based on the number of peak amplitudes, the number of phase flips, and / or the number of hysteresis loops, the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined.

[0010] In one possible implementation, the bias scan signal is obtained by superimposing a predetermined AC voltage with a varying DC voltage; Based on the number of peak amplitudes, the number of phase flips, and / or the number of hysteresis loops, determine the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test, including at least one of the following: If the changing DC voltages are all less than the first critical voltage, and the number of peak amplitudes is determined to be two, the number of phase reversals to be two, and / or the number of hysteresis loops to be one, then the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test is determined to be local ferroelectric bistable switching. If the changing DC voltages are all not less than the first critical voltage and less than the second critical voltage, and the number of peak amplitudes is determined to be four, the number of phase reversals is determined to be four, and / or the number of hysteresis loops is two, then the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test is determined to be the competition and coexistence between the ferroelectric state and the initial antiferroelectric state; the second critical voltage is greater than the first critical voltage. If the changing DC voltage is not less than the second critical voltage, and the number of peak amplitudes is determined to be six, the number of phase reversals is determined to be six, and / or the number of hysteresis loops is determined to be three, then the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined to be the coexistence of two different modulation periods and a multi-step phase transition sequence.

[0011] In one possible implementation, the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined based on the amplitude-voltage and phase-voltage relationship curves, including: Display the amplitude-voltage and phase-voltage curves to demonstrate the coexistence of ferroelectric and antiferroelectric states in the polymorphic memory under test.

[0012] In one possible implementation, the method of using atomic force microscopy to detect the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory includes at least one of the following: The functional layer includes a lead zirconate (PbZrO3) thin film with localized ferroelectric and antiferroelectric states coexisting; The bias scan signal includes a DC bias sequence that scans from a positive saturation voltage to a negative saturation voltage in a stepwise manner. The bias scanning signal is obtained by superimposing a predetermined AC voltage with a changing DC voltage. The step size of the DC voltage is less than 100 millivolts, and the step size is the absolute value of the increment of two adjacent DC voltages.

[0013] A second aspect of this application provides an apparatus for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using an atomic force microscope, comprising: The acquisition module is used to acquire the amplitude and phase signals of the functional layer of the multi-state memory under test, which has both ferroelectric and antiferroelectric states. The amplitude and phase signals are acquired during the process of applying a bias scanning signal to a predetermined region of the functional layer using an atomic force microscope. The first determining module is used to determine the relationship curve between amplitude and voltage based on the amplitude signal and the bias scanning signal; The second determining module is used to determine the relationship curve between phase and voltage based on the phase signal and the bias scanning signal; The third determination module is used to determine the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test based on the amplitude-voltage relationship curve and the phase-voltage relationship curve.

[0014] A third aspect of this application provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method of the first aspect.

[0015] A fourth aspect of this application provides a system for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using an atomic force microscope, comprising: Atomic force microscope main unit; A DC bias source, located in the main unit of the atomic force microscope, is used to apply a bias scanning signal to a predetermined region of the functional layer of the multi-state memory device under test, where ferroelectric and antiferroelectric states coexist. A lock-in amplifier, located in the main unit of an atomic force microscope, is used to acquire the amplitude and phase signals of the multi-state memory device under test during the process of applying a bias scanning signal from a DC bias source. The data processing unit is used to acquire amplitude and phase signals; determine the relationship curve between amplitude and voltage based on amplitude and bias scanning signals; determine the relationship curve between phase and voltage based on phase and bias scanning signals; and determine the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test based on the relationship curves between amplitude and voltage and phase and voltage.

[0016] In one possible implementation, a DC bias source is used to apply a DC bias sequence that scans from a positive saturation voltage to a negative saturation voltage to a predetermined region of the functional layer of the multi-state memory device under test. The DC bias sequence is obtained by superimposing a predetermined AC voltage with a varying DC voltage.

[0017] A fifth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method of the first aspect.

[0018] Compared with the prior art, the embodiments of this application have at least the following technical effects: The atomic force microscopy method for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory according to the first aspect of this application can acquire amplitude and phase signals of the functional layer of the multi-state memory under test, which exhibits the coexistence of ferroelectric and antiferroelectric states. Since the amplitude and phase signals are acquired during the application of a bias scanning signal to a predetermined region of the functional layer using atomic force microscopy, localized phase and amplitude signals are obtained. This allows for the characterization of the domain structure and polarization direction of the polar material at nanometer-level spatial resolution, providing a powerful tool for studying ferroelectric domain flipping. Then, based on the amplitude and bias scanning signals, this application determines the amplitude-voltage relationship curve; based on the phase and bias scanning signals, it determines the phase-voltage relationship curve; furthermore, based on the amplitude-voltage and phase-voltage relationship curves, the coexistence relationship of the ferroelectric and antiferroelectric states in the multi-state memory under test is determined.

[0019] Therefore, the atomic force microscopy (AFM) method for detecting the coexistence of ferroelectric and antiferroelectric states in multi-state memories presented in this application is a characterization method that can deeply analyze the coexistence relationship between local ferroelectric and antiferroelectric states. It solves the problems that macroscopic electrical measurements cannot distinguish local phase composition and that conventional piezoelectric microscopy (PFM) is insufficient for characterizing complex multi-stage phase transition sequences. This provides a key characterization tool for the material design, performance optimization, and failure analysis of multi-state memories. Furthermore, the AFM method for detecting the coexistence of ferroelectric and antiferroelectric states in multi-state memories presented in this application establishes a clear bridge from nanoscale local electrical signals to the coexistence of ferroelectric and antiferroelectric states, providing an indispensable microscopic detection method for the development of multi-state memories.

[0020] It is understood that the beneficial effects of the second to fifth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a flowchart of a method for detecting the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory using atomic force microscopy, provided in an embodiment of this application. Figure 2 This is a schematic diagram of a bias scanning signal provided in an embodiment of this application; Figure 3a This is a schematic diagram of the relationship between amplitude and voltage corresponding to a test embodiment 1 provided in this application; Figure 3b This is a schematic diagram of the relationship between phase and voltage corresponding to a test embodiment 1 provided in this application; Figure 4a This is a schematic diagram of the relationship between amplitude and voltage corresponding to a test embodiment 2 provided in this application; Figure 4b This is a schematic diagram of the relationship between phase and voltage corresponding to a test embodiment 2 provided in this application; Figure 5a This is a schematic diagram of the relationship between amplitude and voltage corresponding to test embodiment 3 provided in this application; Figure 5b This is a schematic diagram of the relationship between phase and voltage corresponding to test embodiment 3 provided in this application; Figure 6 This is a schematic diagram of a device for detecting the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory using an atomic force microscope, provided in an embodiment of this application. Figure 7 This is a schematic diagram of the structure of a terminal device provided in an embodiment of this application. Detailed Implementation

[0023] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0024] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0025] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0026] In the description of this application, unless otherwise stated, the " / " used in this specification and appended claims indicates that the related objects are in an "or" relationship. For example, A / B can mean A or B. The "and / or" in this application merely describes the relationship between the related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. Furthermore, in the description of this application, unless otherwise stated, "multiple" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, a and b, a and c, b and c, or a, b, and c. Here, a, b, and c can be single or multiple.

[0027] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as meaning "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."

[0028] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0029] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0030] Research has shown that the piezoelectric microscopy mode in atomic force microscopy can detect the local inverse piezoelectric effect in materials using conductive probes, thereby characterizing the domain structure and polarization direction of polar materials with nanoscale spatial resolution. Conventional piezoelectric microscopy imaging can observe static domain distribution, but it is difficult to quantitatively study dynamic, field-dependent phase transition processes.

[0031] Further research revealed that the switch-spectral piezoelectric response force microscopy (SS-PFM) mode, by applying a complete DC bias scan at a single test point and recording the piezoelectric response, obtained local phase and amplitude signals, providing a powerful tool for studying ferroelectric domain flipping.

[0032] The technical solution of this application and how it solves the above-mentioned technical problems are described in detail below with specific embodiments. It should be noted that the following embodiments can be referenced, borrowed, or combined with each other, and the same terms, similar features, and similar implementation steps in different embodiments will not be described again.

[0033] See Figure 1 As shown, this application provides a flowchart of a method for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using atomic force microscopy. Figure 1 As shown, the method for detecting the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory using atomic force microscopy according to an embodiment of this application includes steps S101 to S104.

[0034] S101. Acquire the amplitude and phase signals of the functional layer of the multi-state memory under test, which has both ferroelectric and antiferroelectric states. The amplitude and phase signals are acquired during the process of applying a bias scanning signal to a predetermined region of the functional layer using an atomic force microscope.

[0035] Optionally, the amplitude and phase signals can be acquired by the lock-in amplifier of the atomic force microscope, and the bias scan signal can be generated by a DC bias source and output through a conductive probe.

[0036] Among them, the amplitude signal mainly reflects the magnitude of the piezoelectric response, and the phase signal mainly reflects the polarization direction.

[0037] Alternatively, the atomic force microscope can be a switch-spectral piezoelectric response force microscope (SS). PFM (Piezoelectric Response Microscopy), a nanoscale piezoelectric and polarization response testing method, uses a conductive probe to locally couple with the sample. It can use a lock-in amplifier to detect the probe's micro-amplitude and phase signals with high sensitivity, thereby realizing real-time imaging and spectroscopic analysis of piezoelectric effects and polarization switching in a local area.

[0038] Optionally, the method for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using atomic force microscopy includes at least one of the following: The functional layer includes a lead zirconate (PbZrO3) thin film with localized ferroelectric and antiferroelectric states coexisting; The bias scan signal includes a DC bias sequence that scans from a positive saturation voltage to a negative saturation voltage in a stepwise manner. The bias scanning signal is obtained by superimposing a predetermined AC voltage with a changing DC voltage. The step size of the DC voltage is less than 100 millivolts, and the step size is the absolute value of the increment of two adjacent DC voltages.

[0039] For example, the DC voltage can be Vdc scanned from -11 V to +11 V, with a step size of 50 mV. At each Vdc point, a predetermined AC voltage of Vac = 1V and f = 300 kHz is superimposed.

[0040] Specifically, the scanning range of the DC voltage Vdc covers the functional layer and varies from positive polarization saturation to negative polarization saturation according to the step size.

[0041] S102. Based on the amplitude signal and the bias scanning signal, determine the relationship curve between amplitude and voltage.

[0042] Optionally, the amplitude-voltage relationship curve can represent the amplitude change corresponding to each voltage step in the bias scan signal.

[0043] S103. Based on the phase signal and the bias scanning signal, determine the relationship curve between phase and voltage.

[0044] Optionally, the phase-voltage relationship curve can represent the phase change corresponding to each voltage step in the bias scan signal.

[0045] S104. Based on the relationship curves between amplitude and voltage and phase and voltage, determine the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test.

[0046] Optionally, based on the amplitude-voltage relationship curve and the phase-voltage relationship curve, the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test is determined, including: The number of amplitude peaks is determined based on the relationship curve between amplitude and voltage; Based on the relationship curve between phase and voltage, determine the number of phase reversals and / or the number of hysteresis loops; Based on the number of peak amplitudes, the number of phase flips, and / or the number of hysteresis loops, the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined.

[0047] The embodiments of this application can determine the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test by extracting key parameters corresponding to the amplitude-voltage relationship curve and the phase-voltage relationship curve.

[0048] Optionally, based on the amplitude-voltage relationship curve and the phase-voltage relationship curve, the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test is determined, including: Display the amplitude-voltage and phase-voltage curves to demonstrate the coexistence of ferroelectric and antiferroelectric states in the polymorphic memory under test.

[0049] The embodiments of this application can also visualize the relationship curves between amplitude and voltage and phase and voltage, so that testers can determine the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test by observing the curve changes.

[0050] The atomic force microscopy method for detecting the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory according to the embodiments of this application can obtain the amplitude and phase signals of the functional layer of the polymorphic memory under test that has the coexistence of ferroelectric and antiferroelectric states. Since the amplitude and phase signals are acquired during the process of applying a bias scanning signal to a predetermined region of the functional layer by the atomic force microscope, local phase and amplitude signals are obtained. The domain structure and polarization direction of the polar material are characterized with nanometer-level spatial resolution, providing a powerful tool for studying ferroelectric domain flipping.

[0051] Then, based on the amplitude signal and the bias scanning signal, the embodiment of this application determines the relationship curve between amplitude and voltage, and based on the phase signal and the bias scanning signal, determines the relationship curve between phase and voltage; furthermore, based on the relationship curves between amplitude and voltage and phase and voltage, the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined.

[0052] Therefore, the atomic force microscopy method for detecting the coexistence of ferroelectric and antiferroelectric states in multi-state memories in this application is a characterization method that can deeply analyze the coexistence relationship between local ferroelectric and antiferroelectric states. It solves the problems that macroscopic electrical measurements cannot distinguish local phase composition and that conventional piezoelectric microscopy (PFM) is difficult to characterize complex multi-stage phase transition sequences. It provides a key characterization tool for the material design, performance optimization and failure analysis of multi-state memories.

[0053] Furthermore, the atomic force microscopy method for detecting the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory according to the embodiments of this application is a characterization method based on the on-off spectral piezoelectric response force microscopy mode, which can detect and analyze the coexistence and dynamic switching behavior of local ferroelectric and antiferroelectric states in a polymorphic memory at the nanoscale in situ.

[0054] Meanwhile, the atomic force microscopy method for detecting the coexistence of ferroelectric and antiferroelectric states in multi-state memories in this application establishes a clear bridge from nanoscale local electrical signals to the coexistence of ferroelectric and antiferroelectric states, providing an indispensable microscopic detection method for the development of multi-state memories.

[0055] In some embodiments, the bias scan signal is obtained by superimposing a predetermined AC voltage with a varying DC voltage; Based on the number of peak amplitudes, the number of phase flips, and / or the number of hysteresis loops, determine the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test, including at least one of the following: If the changing DC voltages are all less than the first critical voltage, and the number of peak amplitudes is determined to be two, the number of phase reversals to be two, and / or the number of hysteresis loops to be one, then the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test is determined to be local ferroelectric bistable switching. If the changing DC voltages are all not less than the first critical voltage and less than the second critical voltage, and the number of peak amplitudes is determined to be four, the number of phase reversals is determined to be four, and / or the number of hysteresis loops is two, then the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test is determined to be the competition and coexistence between the ferroelectric state and the initial antiferroelectric state; the second critical voltage is greater than the first critical voltage. If the changing DC voltage is not less than the second critical voltage, and the number of peak amplitudes is determined to be six, the number of phase reversals is determined to be six, and / or the number of hysteresis loops is determined to be three, then the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined to be the coexistence of two different modulation periods and a multi-step phase transition sequence.

[0056] Optionally, the first and second critical voltages can be determined based on the actual application, as the coexistence relationship between ferroelectric and antiferroelectric states will change accordingly as the changing DC voltage increases.

[0057] The amplitude-voltage relationship curve and the phase-voltage relationship curve in the embodiments of this application can be referred to as follows: -V curve and AV curve.

[0058] As an example, The characteristic evolution of the -V curve and AV curve specifically includes: (1) Within a small voltage scan range below the first critical voltage (Vc1), The -V curve shows a single hysteresis loop, and the AV curve shows two current peaks, corresponding to the local ferroelectric bistable switching. (2) Within the medium voltage scan range between the first critical voltage (Vc1) and the second critical voltage (Vc2), The -V curve evolves into a double hysteresis loop with two separate loops, and the AV curve shows four current peaks, corresponding to the competition and coexistence of the ferroelectric state and the initial antiferroelectric state. (3) Within the high-voltage (saturation) scan range above the second critical voltage (Vc2), The -V curve evolves into a "three-loop" structure with three separate loops, and the AV curve exhibits six current peaks, corresponding to the coexistence of two different modulation periods, ferroelectric and antiferroelectric states, and a multi-step phase transition sequence.

[0059] For example, a polymorphic memory sample is a lead zirconate (PbZrO3) thin film with localized ferroelectric and antiferroelectric states coexisting, which can be used in... The -V and AV curves exhibit three hysteresis loops that flip approximately 180° and six current peaks.

[0060] This application's embodiments can also be analyzed by examining the "three rings". The coercive voltages corresponding to each loop in the -V curve and the switching voltages corresponding to each peak in the six-peak AV curve are used to quantitatively extract the local phase transition energy barrier and the operating voltage window for multi-state storage. The embodiments of this application can also evaluate the coexistence and multi-state switching characteristics of local ferroelectric and antiferroelectric states in functional thin films prepared under different process conditions to guide material optimization and device design.

[0061] Based on the above technical solutions, this application discloses a characterization method for detecting the coexistence of local ferroelectric and antiferroelectric states in a polymorphic memory using atomic force microscopy. Based on the switch-spectral piezoelectric response force microscopy (SS-PFM) mode in atomic force microscopy (AFM), the method performs nanoscale, in-situ electrical excitation response characterization of the polymorphic memory, and detects the coexistence of local ferroelectric and antiferroelectric states and the multi-state switching behavior in the polymorphic memory.

[0062] Furthermore, in this embodiment, a series of step-scanning bias voltages, ranging from small to large, are applied to the probe of a conductive atomic force microscope. The phase and amplitude signals of the sample under the corresponding bias voltages are acquired simultaneously, and the phase composition and phase transitions within the polymorphic memory are analyzed. This visualizes the competition, coexistence, and flipping dynamics of the local ferroelectric and antiferroelectric states under different applied electric fields.

[0063] This application provides an atomic force microscope system for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory, comprising: an atomic force microscope host, a DC bias source, a lock-in amplifier, and a data processing unit.

[0064] A DC bias source is located in the main unit of the atomic force microscope. The DC bias source is used to apply a bias scanning signal to a predetermined region of the functional layer of the multi-state memory device under test, which has a coexistence of ferroelectric and antiferroelectric states. The lock-in amplifier is located in the main unit of the atomic force microscope. The lock-in amplifier is used to acquire the amplitude signal and phase signal of the multi-state memory device under test during the process of applying a bias scanning signal from a DC bias source. The data processing unit is used to acquire amplitude and phase signals; determine the relationship curve between amplitude and voltage based on amplitude and bias scanning signals; determine the relationship curve between phase and voltage based on phase and bias scanning signals; and determine the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test based on the relationship curves between amplitude and voltage and phase and voltage.

[0065] Optionally, the data processing unit can be an external terminal device. For example, the terminal device can be a desktop computer, laptop, handheld computer, or cloud server, etc.

[0066] Optionally, the DC bias source is used to apply a DC bias sequence that scans from a positive saturation voltage to a negative saturation voltage to a predetermined region of the functional layer of the multi-state memory device under test. The DC bias sequence is obtained by superimposing a predetermined AC voltage with a varying DC voltage.

[0067] In practical applications, the process of using atomic force microscopy to detect the coexistence of ferroelectric and antiferroelectric states in a multi-state memory, as described in this application embodiment, includes: (1) Sample and system preparation: Fix the multi-state memory sample to be tested on the atomic force microscope sample stage. The sample is a functional layer with ferroelectric and antiferroelectric states coexisting. Install the conductive probe and connect the bottom electrode of the sample to an external bias voltage source. (2) Switched-spectral piezoelectric response force microscopy test: In the probe-sample surface contact mode, select the micro-region to be measured, and apply a DC bias sequence from positive saturation voltage (+Vs) to negative saturation voltage (-Vs) through the conductive probe; at each DC voltage Vdc bias point, a small AC voltage Vac is applied synchronously, and the phase signal corresponding to the local point is acquired synchronously using a lock-in amplifier. ) and amplitude signal (A); (3) Characterization of multi-stage phase transition signals: Plot and analyze the relationship curves between phase signals and voltage ( -V curve) and amplitude signal versus voltage curve (AV curve); by identifying The number and shape of hysteresis loops in the -V curve and the number and position evolution of current peaks in the AV curve characterize the coexistence and switching behavior of local ferroelectric and antiferroelectric states in the functional layer under different bias voltages.

[0068] (4) Data analysis: After completing the single-point SS-PFM test, a specific bias voltage is selected to perform surface scanning and writing on the sample area, which intuitively shows the spatial distribution and coexistence of ferroelectric and antiferroelectric domains under a specific bias voltage.

[0069] See Figure 2 As shown, this application provides a schematic diagram of a bias scanning signal. Figure 2 As shown, the bias scan signal is achieved by superimposing a small AC voltage (such as...) on each applied DC voltage Vdc. Figure 2 (As shown in the wavy line voltage), the bias scan signal is a DC bias sequence that changes from positive saturation voltage to negative saturation voltage in a stepwise manner.

[0070] Furthermore, embodiments of this application provide specific steps for a method of detecting the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory based on atomic force microscopy, including: (1) Sample and system preparation: Fix the polymorphic memory sample to be tested on the AFM sample stage. Ensure that the bottom electrode of the sample is well grounded or connected to a DC bias source, and select and install a suitable conductive probe. The polymorphic memory sample is a lead zirconate (PbZrO3) thin film with localized ferroelectric and antiferroelectric states.

[0071] (2) Instrument mode configuration: In AFM contact mode, select a representative flat micro-region (usually a single grain or domain structure region). Through system control, apply a DC bias sequence to the conductive probe, increasing in steps from a positive saturation voltage (+Vs, e.g., +8V) to a negative saturation voltage (-Vs, e.g., -8V), with sufficiently fine step sizes (e.g., 50 mV). The key operation is: after applying and stabilizing each DC voltage step (Vdc), simultaneously superimpose a small AC voltage (Vac, e.g., 1V, with a frequency close to the probe contact resonant frequency), and use a lock-in amplifier to synchronously acquire and record the phase of this local test point under the current Vdc. (A) signal and amplitude (A) signal.

[0072] (3) Multi-phase transition signal analysis: All collected data points are organized and local phase transition signals are plotted. -V curves and AV curves are used to systematically observe and explain the evolution of these curves with the change of maximum scanning voltage, and to directly correlate them with the local phase transition process triggered under different bias voltages.

[0073] (4) Data processing and judgment methods: Amplitude peak identification: In each loop, the AV curve is plotted, and the amplitude peak of each loop is extracted. The obvious differences among multiple loops (such as the position shift and area change of the second loop) are used to determine the number of multi-steady-state loops, i.e. the number of hysteresis loops.

[0074] Phase flipping determination: analysis The abrupt change points in the -V curve are counted, and the number of phase flips in each cycle is recorded (ideally, a single loop will have one 180° flip, while multiple loops will have multiple flips or local oscillations).

[0075] In summary, the embodiments of this application have at least the following beneficial technical effects: 1. It realizes in-situ, real-time detection of phase-following voltage dynamic response.

[0076] This application's embodiments can record the real-time response of the same micro-region under different bias driving voltages, from the simple ferroelectric response of a single-loop / double-peak under low voltage to the complete presentation of a complex three-loop / six-peak signal under high voltage. This evolution process itself is the most direct manifestation of phase transition dynamics. This application's embodiments can observe in real time how the phase transition is gradually excited, clarify the electric field threshold of different phase transition steps, and provide experimental basis for the accurate selection of the device's multi-state operating voltage.

[0077] 2. It possesses spatial resolution and localized analysis capabilities at the nanoscale, breaking through the limitations of macroscopic measurement.

[0078] This application's embodiments reveal the spatial inhomogeneity of samples: testing at different locations may reveal some points exhibiting a perfect three-ring, six-peak configuration, while others may only show a double-ring or single-ring configuration, directly visualizing the microscopic distribution of material properties. This application's embodiments can also avoid macroscopic averaging errors, confirming whether multi-step phase transitions exist at a single point, fundamentally verifying whether the physical mechanism of polymorphic storage originates from intrinsic material properties or microscopic inhomogeneities.

[0079] 3. It has powerful capabilities for analyzing complex signals and broad technical versatility.

[0080] This application provides a complete paradigm for analyzing signal evolution patterns by decomposing complex multi-ring, multi-peak signals into hierarchical responses under different bias voltages. Furthermore, this application can be widely applied to other functional material systems exhibiting multi-phase transitions, multiferroic coupling, or complex domain switching dynamics, providing a universal and powerful tool for the nanoscale electrical characterization of such materials.

[0081] The following embodiments of this application characterize the method of coexistence of ferroelectric and antiferroelectric states in storage devices by combining different bias scanning signals.

[0082] Test Example 1 This embodiment is based on atomic force microscopy to detect the coexistence of local ferroelectric and antiferroelectric states in a polymorphic memory. The DC voltage Vdc is set to -11V to +11V, at which point Vdc is less than the first critical voltage.

[0083] 1. Sample and equipment preparation: The SrRuO3 / PbZrO3 / Au polymorphic memory prepared by pulsed laser deposition was used as the test object. Its macroscopic PV measurement showed a clear triple hysteresis loop. An atomic force microscope equipped with a PFM module and an external signal input / output module was used with a conductive probe (elastic constant ~3 N / m, resonant frequency ~75 kHz).

[0084] 2. Testing process: Mount the device on the sample stage, ensuring a good electrical connection. In contact mode, select a flat micro-area (approximately 2 x 2 μm²) on the sample surface. Switch to SS-PFM mode and set the DC voltage Vdc to scan from -11 V to +11 V in 50 mV steps. At each Vdc point, superimpose an AC excitation voltage of Vac = 1 V and f = 300 kHz, and record the data. And A.

[0085] 3. Data Results and Analysis: See Figure 3a and 3bAs shown, this application provides schematic diagrams of the relationship curves between amplitude and voltage and phase and voltage corresponding to test embodiment 1. The -V curve exhibits a single loop with an approximately 180° flip, while the AV curve shows two peaks, indicating that the sample exhibits ferroelectric phase characteristics under a bias scan signal with a relatively low voltage.

[0086] Test Example 2 This embodiment is based on the detection of the coexistence of local ferroelectric and antiferroelectric states in a polymorphic memory using atomic force microscopy. The DC voltage Vdc is set to be between -15 V and +15 V. At this time, Vdc is not less than the first critical voltage and is less than the second critical voltage.

[0087] 1. Sample and equipment preparation: The SrRuO3 / PbZrO3 / Au polymorphic memory prepared by pulsed laser deposition was used as the test object. Its macroscopic PV measurement showed a clear triple hysteresis loop. An atomic force microscope equipped with a PFM module and an external signal input / output module was used with a conductive probe (elastic constant ~3 N / m, resonant frequency ~75 kHz).

[0088] 2. Testing process: Mount the device on the sample stage, ensuring a good electrical connection. In contact mode, select a flat micro-area (approximately 2 x 2 μm²) on the sample surface. Switch to SS-PFM mode and set the DC voltage Vdc to scan from -11 V to +11 V in 50 mV steps. At each Vdc point, superimpose an AC excitation voltage of Vac = 1 V and f = 300 kHz, and record the data. And A.

[0089] 3. Data Results and Analysis: See Figure 4a and 4b As shown in the embodiments of this application, a schematic diagram of the relationship curve between amplitude and voltage and the relationship curve between phase and voltage corresponding to test embodiment 2 are provided respectively. The -V curve exhibits a double ring with an approximately 180° inversion, and the AV curve shows four peaks, indicating that the sample undergoes four phase transitions under a moderately biased scanning signal.

[0090] Test Example 3 This embodiment is based on the detection of the coexistence of local ferroelectric and antiferroelectric states in a polymorphic memory using atomic force microscopy. The DC voltage Vdc is set to -19 V to +19 V, at which point Vdc is not less than the second critical voltage.

[0091] 1. Sample and equipment preparation: The SrRuO3 / PbZrO3 / Au polymorphic memory prepared by pulsed laser deposition was used as the test object. Its macroscopic PV measurement showed a clear triple hysteresis loop. An atomic force microscope equipped with a PFM module and an external signal input / output module was used with a conductive probe (elastic constant ~3 N / m, resonant frequency ~75 kHz).

[0092] 2. Testing process: Mount the device on the sample stage, ensuring a good electrical connection. In contact mode, select a flat micro-area (approximately 2 x 2 μm²) on the sample surface. Switch to SS-PFM mode and set the DC voltage Vdc to scan from -11 V to +11 V in 50 mV steps. At each Vdc point, superimpose an AC excitation voltage of Vac = 1 V and f = 300 kHz, and record the data. And A.

[0093] 3. Data Results and Analysis: See Figure 5a and 5b As shown in the embodiments of this application, a schematic diagram of the relationship curves between amplitude and voltage and phase and voltage corresponding to test embodiment 3 is provided. The -V curve shows a three-ring flip of about 180°, and the AV curve shows six peaks. This directly proves that ferroelectric and antiferroelectric states exist simultaneously in this nanoscale region, and that six phase transitions can occur under the drive of a large bias scanning signal.

[0094] See Figure 6 As shown in the figure, this application provides a schematic diagram of the structure of a device 60 for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using an atomic force microscope. Figure 6 As shown, the atomic force microscope detection device 60 for detecting the coexistence of ferroelectric and antiferroelectric states in a polymorphic memory includes: an acquisition module 601, a first determination module 602, a second determination module 603, and a third determination module 604.

[0095] The acquisition module 601 is used to acquire the amplitude and phase signals of the functional layer of the multi-state memory under test, which has ferroelectric and antiferroelectric states coexisting; the amplitude and phase signals are acquired during the process of applying a bias scanning signal to a predetermined region of the functional layer by an atomic force microscope; The first determining module 602 is used to determine the relationship curve between amplitude and voltage based on the amplitude signal and the bias scanning signal; The second determining module 603 is used to determine the relationship curve between phase and voltage based on the phase signal and the bias scanning signal; The third determining module 604 is used to determine the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test based on the relationship curves of amplitude and voltage and phase and voltage.

[0096] Optionally, the third determining module 604 is used to determine the number of amplitude peaks based on the relationship curve between amplitude and voltage; to determine the number of phase reversals and / or the number of hysteresis loops based on the relationship curve between phase and voltage; and to determine the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test based on the number of amplitude peaks, the number of phase reversals, and / or the number of hysteresis loops.

[0097] Optionally, the bias scan signal is obtained by superimposing a predetermined AC voltage with a varying DC voltage; Optionally, the third determining module 604 is used to implement at least one of the following: If the changing DC voltages are all less than the first critical voltage, and the number of peak amplitudes is determined to be two, the number of phase reversals to be two, and / or the number of hysteresis loops to be one, then the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test is determined to be local ferroelectric bistable switching. If the changing DC voltages are all not less than the first critical voltage and less than the second critical voltage, and the number of peak amplitudes is determined to be four, the number of phase reversals is determined to be four, and / or the number of hysteresis loops is two, then the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test is determined to be the competition and coexistence between the ferroelectric state and the initial antiferroelectric state; the second critical voltage is greater than the first critical voltage. If the changing DC voltage is not less than the second critical voltage, and the number of peak amplitudes is determined to be six, the number of phase reversals is determined to be six, and / or the number of hysteresis loops is determined to be three, then the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined to be the coexistence of two different modulation periods and a multi-step phase transition sequence.

[0098] Optionally, the third determining module 604 is used to control the display screen to display the relationship curves between amplitude and voltage and phase and voltage, so as to show the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test.

[0099] In applications, the modules in the atomic force microscope detecting the coexistence of ferroelectric and antiferroelectric states in the multi-state memory 60 can be software program modules, or they can be implemented by different logic circuits integrated in the processor, or they can be implemented by multiple distributed processors.

[0100] See Figure 7 As shown, this application provides a schematic diagram of the structure of a terminal device 70. Figure 7 As shown, the terminal device 70 of this application embodiment includes: a memory 72, a processor 71, and a computer program 73 stored in the memory 72 and executable on the processor 71. When the processor 71 executes the computer program, it implements the steps of the methods of the various embodiments of this application.

[0101] Terminal device 70 can be a computing device such as a desktop computer, laptop, handheld computer, or cloud server. Terminal device 70 may include, but is not limited to, a processor 71 and a memory 72. Those skilled in the art will understand that terminal device 70 may also include more or fewer components, or combinations of certain components, or different components, such as input / output devices, network access devices, etc.

[0102] The processor 71 can be a Central Processing Unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0103] In some embodiments, memory 72 may be an internal storage unit, such as a hard disk or RAM. Memory 72 may be a removable / non-removable, volatile / non-volatile computer system storage medium; for example, memory 72 may be a non-volatile memory used for reading and writing non-volatile magnetic media. In other embodiments, memory 72 may be an external storage device, such as a plug-in hard disk, smart media card (SMC), secure digital card (SD), flash card, etc., provided on terminal device 70. Memory 72 is used to store operating systems, applications, bootloaders, data, and other programs, such as program code for computer programs. Memory 72 may also be used to temporarily store data that has been output or will be output.

[0104] It should be noted that the information interaction and execution process between the above-mentioned devices / units are based on the same concept as the method embodiments of this application. For details on their specific functions and technical effects, please refer to the method embodiments section, and they will not be repeated here.

[0105] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0106] This application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in the above-described method embodiments.

[0107] If the integrated units described above are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include at least: any entity or device capable of carrying computer program code to a device / terminal equipment, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Examples include USB flash drives, portable hard drives, magnetic disks, or optical disks.

[0108] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), random access memory (RAM), flash memory, hard disk drive (HDD), or solid-state drive (SSD), etc. The storage medium can also include combinations of the above types of memory.

[0109] This application provides a computer program product that, when run on a processor, enables the processor to execute the steps described in the various method embodiments above.

[0110] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0111] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0112] In the embodiments provided in this application, it should be understood that the disclosed apparatus / network devices and methods can be implemented in other ways. For example, the apparatus / network device embodiments described above are merely illustrative. For instance, the division of modules or units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0113] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0114] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using atomic force microscopy, characterized in that, include: The amplitude and phase signals of a functional layer with coexisting ferroelectric and antiferroelectric states in a multi-state memory under test are acquired; the amplitude and phase signals are acquired during the process of applying a bias scanning signal to a predetermined region of the functional layer by the atomic force microscope; Based on the amplitude signal and the bias scanning signal, determine the relationship curve between amplitude and voltage; Based on the phase signal and the bias scanning signal, determine the relationship curve between phase and voltage; Based on the amplitude-voltage relationship curve and the phase-voltage relationship curve, the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined.

2. The method for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using atomic force microscopy according to claim 1, characterized in that, The determination of the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test, based on the amplitude-voltage relationship curve and the phase-voltage relationship curve, includes: Based on the relationship curve between amplitude and voltage, the number of amplitude peaks is determined; Based on the phase-voltage relationship curve, determine the number of phase flips and / or the number of hysteresis loops; Based on the number of peak amplitudes, the number of phase flips, and / or the number of hysteresis loops, the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined.

3. The method for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using atomic force microscopy according to claim 2, characterized in that, The bias scanning signal is obtained by superimposing a predetermined AC voltage with a changing DC voltage; The determination of the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test based on the number of peak amplitudes, the number of phase flips, and / or the number of hysteresis loops includes at least one of the following: If the changing DC voltages are all less than the first critical voltage, and it is determined that the number of amplitude peaks is twice, the number of phase reversals is twice, and / or the number of hysteresis loops is one, then the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test is determined to be a local ferroelectric bistable switching. If the changing DC voltages are all not less than the first critical voltage and less than the second critical voltage, and it is determined that the number of amplitude peaks is four, the number of phase reversals is four, and / or the number of hysteresis loops is two, then the coexistence relationship between the ferroelectric state and the antiferroelectric state in the polymorphic memory under test is determined to be the competition and coexistence between the ferroelectric state and the initial antiferroelectric state; the second critical voltage is greater than the first critical voltage. If the changing DC voltage is not less than the second critical voltage, and the number of amplitude peaks is determined to be six times, the number of phase reversals is determined to be six times, and / or the number of hysteresis loops is three, then the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test is determined to be the coexistence of two different modulation periods and a multi-step phase transition sequence.

4. The method for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using atomic force microscopy according to claim 1, characterized in that, The determination of the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test, based on the amplitude-voltage relationship curve and the phase-voltage relationship curve, includes: The relationship curves between amplitude and voltage and between phase and voltage are displayed to demonstrate the coexistence of ferroelectric and antiferroelectric states in the polymorphic memory under test.

5. The method for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using atomic force microscopy according to any one of claims 1-4, characterized in that, Includes at least one of the following: The functional layer includes a lead zirconate (PbZrO3) thin film with localized ferroelectric and antiferroelectric states coexisting. The bias scan signal includes a DC bias sequence that scans from a positive saturation voltage to a negative saturation voltage in a stepwise manner. The bias scanning signal is obtained by superimposing a predetermined AC voltage with a changing DC voltage. The step size of the DC voltage is less than 100 millivolts, and the step size is the absolute value of the increment of two adjacent DC voltages.

6. A device for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory using an atomic force microscope, characterized in that, include: The acquisition module is used to acquire the amplitude and phase signals of the functional layer of the multi-state memory under test, which has ferroelectric and antiferroelectric states coexisting; the amplitude and phase signals are acquired during the process of applying a bias scanning signal to a predetermined region of the functional layer by the atomic force microscope; The first determining module is used to determine the relationship curve between amplitude and voltage based on the amplitude signal and the bias scanning signal; The second determining module is used to determine the relationship curve between phase and voltage based on the phase signal and the bias scanning signal; The third determining module is used to determine the coexistence relationship between ferroelectric and antiferroelectric states in the polymorphic memory under test based on the relationship curve between amplitude and voltage and the relationship curve between phase and voltage.

7. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method as described in any one of claims 1 to 5.

8. An atomic force microscope for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory, characterized in that, include: Atomic force microscope main unit; A DC bias source is located in the main unit of the atomic force microscope and is used to apply a bias scanning signal to a predetermined region of the functional layer of the multi-state memory device under test, where ferroelectric and antiferroelectric states coexist. A lock-in amplifier, located in the main unit of the atomic force microscope, is used to acquire the amplitude and phase signals of the multi-state memory device under test during the process of applying the bias scanning signal from the DC bias source. A data processing unit is used to acquire amplitude signals and phase signals; determine the relationship curve between amplitude and voltage based on the amplitude signals and the bias scanning signals; determine the relationship curve between phase and voltage based on the phase signals and the bias scanning signals; and determine the coexistence relationship between ferroelectric and antiferroelectric states in the multi-state memory under test based on the relationship curves between amplitude and voltage and the relationship curves between phase and voltage.

9. The atomic force microscope system for detecting the coexistence of ferroelectric and antiferroelectric states in a multi-state memory according to claim 8, characterized in that, The DC bias source is used to apply a DC bias sequence that changes from a positive saturation voltage to a negative saturation voltage in a stepwise manner to a predetermined region of the functional layer of the multi-state memory device under test. The DC bias sequence is obtained by superimposing a predetermined AC voltage with a changing DC voltage.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 5.

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