2.5d bridge package method and 2.5d bridge package structure

Abstract

This application provides a 2.5D bridging packaging method and a 2.5D bridging packaging structure, relating to the field of semiconductor technology. In this 2.5D bridging packaging structure, the adapter board has a first surface and a second surface disposed opposite to each other. The first surface has a first connection terminal, and the second surface has a second connection terminal. The bridging portion has a third surface and a fourth surface disposed opposite to each other. The third surface has a third connection terminal, and the fourth surface has a fourth connection terminal. A first chip bridges the adapter board and the bridging portion, and the first chip is electrically connected to both the first and third connection terminals. A functional component is connected to the fourth connection terminal. An insulator fills the gap between the adapter board and the bridging portion. A dielectric layer has a fifth connection terminal, and the second connection terminal is electrically connected to the fifth connection terminal. The dielectric layer is disposed on the surface of the insulator or on the side of the adapter board away from the insulator. This structure helps to mitigate leakage caused by parasitic inductance, which can lead to short circuits and overheating between wiring layers.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and in particular to a 2.5D bridging packaging method and a 2.5D bridging packaging structure. Background Technology

[0002] With the rapid development of the semiconductor industry, chiplet technology, as a new design approach, packages small chips with different functions together. Typically, 2.5D packaging technology is used to package the chips onto a silicon interposer as a multi-chiplet packaging solution. This mainly involves embedding a bridging chip within the interposer, followed by dielectric layer vias and wiring processes to mount other flip chips, thus achieving the interconnect structure. However, the bridging chip requires a flat chip pad structure to meet the requirements of dielectric layer etching and via technology, in order to form a conductive metal pillar structure. As products are used in the transmission paths of ultra-high frequency signals from 100GHz to 300GHz, the longer the transmission path between wiring layers, the greater the transmission loss caused by the phenomenon of current flowing towards the conductive pillars. In addition, the current forms inductive and thermoelectric effects between wiring layers, resulting in parasitic inductance and leakage. This leads to short circuits and overheating between wiring layers. Therefore, it is necessary to shorten the transmission path between active devices (such as RF chips, logic chips, or memory chips) and passive devices (such as components, capacitors, or inductors) in the package, or shorten the transmission paths between active and passive devices and the wiring layers respectively.

[0003] Furthermore, in the existing technology, silicon interposers are used as the insulating layer of the bridging structure. The dielectric constant of silicon material is low, around 11.5εr, which can easily cause inductive and parasitic effects between the bridging wiring layer and the wiring layer in the interposer. This can lead to leakage due to parasitic inductance, resulting in short circuits and overheating between wiring layers. Summary of the Invention

[0004] The purpose of this invention is to provide a 2.5D bridging packaging method and a 2.5D bridging packaging structure, which helps to reduce the inductive effect and parasitic effect between wiring layers, and effectively reduces the risk of leakage current, short circuit between wiring layers, overheating and other phenomena caused by parasitic inductance.

[0005] In a first aspect, the present invention provides a 2.5D bridged packaging structure, comprising: An adapter plate having a first surface and a second surface disposed opposite to each other, the first surface having a first connecting end and the second surface having a second connecting end; The bridging part has a third surface and a fourth surface disposed opposite to each other, the third surface is provided with a third connecting end, and the fourth surface is provided with a fourth connecting end; There is a gap between the bridging part and the adapter plate; A first chip is connected across the adapter board and the bridging part, and the first chip is electrically connected to the first connection terminal and the third connection terminal respectively. The fourth connection end is connected to a functional component; An insulator that fills the gap between the adapter plate and the bridging portion; A dielectric layer is provided, wherein the dielectric layer has a fifth connection terminal, and the second connection terminal is electrically connected to the fifth connection terminal. The dielectric layer is disposed on the surface of the insulator or on the side of the adapter plate away from the insulator.

[0006] In an optional embodiment, the bridging portion includes a first dielectric layer, a second dielectric layer, a third dielectric layer and a fourth dielectric layer stacked together. The second dielectric layer is provided with a first wiring layer, and the first dielectric layer is provided with a first metal layer electrically connected to the first wiring layer. The first metal layer serves as the third connection terminal. The third dielectric layer is provided with a second wiring layer electrically connected to the first wiring layer, and the fourth dielectric layer is provided with a second metal layer electrically connected to the second wiring layer, the second metal layer serving as the fourth connection terminal.

[0007] In an optional embodiment, the functional component includes a second chip, which is mounted on the bridging portion and electrically connected to the fourth connection terminal.

[0008] In an optional embodiment, the functional component includes a second conductive post, one end of which is electrically connected to the fourth connection terminal, and the other end of which is electrically connected to the fifth connection terminal.

[0009] In an optional embodiment, the functional component includes a metal block, the fourth connection terminal includes a grounding point, the metal block is electrically connected to the grounding point, the dielectric layer is provided with a grounding wiring layer, and the metal block is electrically connected to the grounding wiring layer.

[0010] In an optional embodiment, the third dielectric layer is provided with an antenna layer electrically connected to the first wiring layer, and the antenna layer is electrically connected to the second metal layer; The functional component includes a third conductive post, which is electrically connected to the second metal layer and extends to the surface of the packaging structure, serving as the transceiver end of the antenna layer.

[0011] In an optional embodiment, the adapter board includes a base layer and a first conductive post penetrating the base layer. A fifth dielectric layer and a sixth dielectric layer are provided on one side of the base layer. A third wiring layer is provided on the fifth dielectric layer. A third metal layer is provided on the sixth dielectric layer and connected to the third wiring layer. The third metal layer serves as the first connection end. On the other side of the substrate layer, there are a seventh dielectric layer and an eighth dielectric layer. The seventh dielectric layer has a fourth wiring layer, and the eighth dielectric layer has a fourth metal layer connected to the fourth wiring layer. The fourth metal layer serves as the second connection terminal. The third wiring layer and the fourth wiring layer are respectively electrically connected to the first conductive post.

[0012] In an optional embodiment, the adapter board is fitted with a third chip, which is electrically connected to the first connection terminal.

[0013] In an optional embodiment, the surface of the sixth dielectric layer is flush with the side surface of the bridging portion having the third connection end.

[0014] In an optional embodiment, the dielectric layer includes a first dielectric layer and a second dielectric layer. The first dielectric layer has a fifth wiring layer connected to the second connection terminal, and the second dielectric layer has a fifth connection terminal electrically connected to the fifth wiring layer. The first dielectric layer is disposed on the side of the adapter plate away from the insulator and is connected to the insulator.

[0015] In an optional embodiment, the dielectric layer includes a third dielectric layer, a fourth dielectric layer, a fifth dielectric layer, and a sixth dielectric layer. The third dielectric layer and the fourth dielectric layer are stacked sequentially on the surface of the insulator. The third dielectric layer is provided with a sixth wiring layer, and the fourth dielectric layer is provided with a sixth connection terminal electrically connected to the sixth wiring layer. The fifth dielectric layer is disposed on the side of the adapter plate away from the insulator, and the fifth dielectric layer has a seventh wiring layer; the sixth dielectric layer covers the fifth dielectric layer; It also includes a fourth conductive post, one end of which is electrically connected to the sixth wiring layer and the other end of which is electrically connected to the seventh wiring layer.

[0016] Secondly, the present invention provides a 2.5D bridged packaging method, comprising: An adapter plate is provided; the adapter plate has a first surface and a second surface disposed opposite to each other; the adapter plate has a first region and a second region; A first wiring layer and a first metal layer are formed in the first region of the first surface; A third wiring layer and a third metal layer are formed in the second region of the first surface; Remove the adapter plate corresponding to the first area and form a first groove on the second surface to expose the first wiring layer; A first conductive post electrically connected to the third wiring layer is formed in the second region of the second surface; A second wiring layer and a second metal layer are formed in the first groove; the second wiring layer and the first wiring layer are electrically connected. A fourth wiring layer and a fourth metal layer are formed in the second region of the second surface; the fourth wiring layer is electrically connected to the first conductive pillar; A functional component is formed on the second metal layer; The edges of the adapter plate are cut and a groove is formed between the first region and the second region; A first chip is mounted, the first chip is connected across the first region and the second region, and the first chip is electrically connected to the first metal layer and the third metal layer respectively; An insulator is used to cover the first chip and the sidewalls of the adapter board and fill the trench.

[0017] In an optional implementation, the step of providing the adapter board includes: Provide the aforementioned adapter board; A second groove of depth H1 is formed in a first region of the first surface, and a third groove of depth H2 is formed in a second region of the first surface, where H2 is greater than H1; The step of forming a first wiring layer and a first metal layer in the first region of the first surface includes: forming a first wiring layer and a first metal layer in the second groove; The step of forming a third wiring layer and a third metal layer in the second region of the first surface includes: forming a third wiring layer and a third metal layer in the third groove.

[0018] In an optional embodiment, in the step of forming a third wiring layer and a third metal layer in the second region of the first surface: the third wiring layer includes a first line and a second line; the first line is first formed in the third groove, and then the second line connected to the first line is formed; the surface of the first line is flush with the bottom of the second groove. In the step of forming a first wiring layer and a first metal layer in the first region of the first surface: the first wiring layer and the second line are formed simultaneously.

[0019] In an optional embodiment, in the step of forming a third groove of depth H2 in a second region of the first surface, an edge boss is formed on the outer periphery of the third groove.

[0020] In an optional embodiment, the step of forming a first conductive post electrically connected to the third wiring layer in the second region of the second surface includes: A fourth groove is formed in the second region of the second surface; A first conductive post electrically connected to the third wiring layer is formed at the bottom of the fourth groove; The step of forming a fourth wiring layer and a fourth metal layer in the second region of the second surface includes: A fourth wiring layer connected to the first conductive post is formed in the fourth groove; the fourth metal layer and the fourth wiring layer are electrically connected.

[0021] In an optional implementation, the functional component includes a second chip, and prior to the step of filling the insulator, it further includes: The second chip is mounted on the second metal layer; In the step of filling the insulator: the liquid insulator flows along the trench and covers the first chip and the second chip on both sides of the second wiring layer in one go.

[0022] In an optional implementation, after the step of filling the insulator, the method further includes: A first dielectric layer is formed on the side of the adapter plate away from the insulator; A fifth wiring layer electrically connected to the fourth metal layer is formed within the first dielectric layer; A second dielectric layer is formed on the first dielectric layer; A fifth metal layer is formed that protrudes from the second dielectric layer, and the fifth metal layer is electrically connected to the fifth wiring layer.

[0023] In an optional implementation, if the functional component includes a third conductive post; the second wiring layer is an antenna layer; after the step of filling the insulator, the method further includes: A third dielectric layer and a fourth dielectric layer are sequentially formed on the surface of the insulator; the third dielectric layer is provided with a sixth wiring layer, and the fourth dielectric layer is provided with a sixth connection terminal electrically connected to the sixth wiring layer; A fourth conductive post is formed on the outer periphery of the adapter plate; one end of the fourth conductive post is electrically connected to the sixth wiring layer, and the other end extends to the side of the adapter plate away from the insulator; A fifth dielectric layer is formed on the side of the adapter plate away from the insulator; the fifth dielectric layer has a seventh wiring layer; the seventh wiring layer is electrically connected to the fourth conductive post; A sixth dielectric layer is formed on the fifth dielectric layer; the third conductive pillar is exposed from the surface of the sixth dielectric layer.

[0024] The 2.5D bridging packaging method and 2.5D bridging packaging structure provided in this invention have the following beneficial effects: The adapter board and bridging section are independently designed. The bridging section is insulated from the adapter board by an insulator, resulting in better insulation performance. This helps reduce the inductive and parasitic effects between the wiring layers of the two, thereby mitigating leakage caused by parasitic inductance that can lead to short circuits and overheating between wiring layers. Furthermore, the independent wiring layers on the adapter board and bridging section result in shorter transmission paths, lower losses, and higher transmission efficiency. Attached Figure Description

[0025] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0026] Figure 1 This is a schematic diagram of the first structure of the 2.5D bridged packaging structure provided in an embodiment of the present invention; Figure 2 A partial structural diagram of the bridging portion of the 2.5D bridging package structure provided in an embodiment of the present invention; Figure 3 A partial structural schematic diagram of the adapter board with a 2.5D bridged packaging structure provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of a second structure of the 2.5D bridged packaging structure provided in an embodiment of the present invention; Figure 5 A schematic diagram of a third type of 2.5D bridged packaging structure provided in an embodiment of the present invention; Figure 6 A schematic diagram of the fourth structure of the 2.5D bridged packaging structure provided in the embodiments of the present invention; Figure 7 for Figure 6 A magnified view of a portion of point A in the middle; Figure 8 A schematic diagram of the fifth structure of the 2.5D bridged packaging structure provided in the embodiments of the present invention; Figure 9 A schematic diagram of an antenna layer of a 2.5D bridged packaging structure provided in an embodiment of the present invention; Figure 10 A top view connection diagram of a 2.5D bridged packaging structure provided in an embodiment of the present invention; Figure 11 One of the process diagrams for the 2.5D bridged packaging method provided in the embodiments of the present invention; Figure 12This is a schematic diagram illustrating the formation of the second and third grooves in the 2.5D bridging packaging method provided in this embodiment of the invention. Figure 13 The second schematic diagram of the manufacturing process of the 2.5D bridging packaging method provided in the embodiment of the present invention; Figure 14 The third schematic diagram of the manufacturing process of the 2.5D bridging packaging method provided in the embodiment of the present invention; Figure 15 Fourth schematic diagram of the manufacturing process of the 2.5D bridging packaging method provided in the embodiments of the present invention; Figure 16 Fifth schematic diagram of the manufacturing process of the 2.5D bridging packaging method provided in the embodiments of the present invention; Figure 17 The sixth schematic diagram of the manufacturing process of the 2.5D bridging packaging method provided in the embodiments of the present invention; Figure 18 The seventh schematic diagram of the manufacturing process of the 2.5D bridging packaging method provided in the embodiments of the present invention; Figure 19 Eighth schematic diagram of the manufacturing process of the 2.5D bridging packaging method provided in the embodiments of the present invention; Figure 20 The ninth schematic diagram of the manufacturing process of the 2.5D bridging packaging method provided in the embodiment of the present invention; Figure 21 The tenth schematic diagram of the manufacturing process of the 2.5D bridging packaging method provided in the embodiment of the present invention; Figure 22 Eleventh schematic diagram of the manufacturing process of the 2.5D bridged packaging method provided in the embodiment of the present invention; Figure 23 This is the twelfth schematic diagram of the process of the 2.5D bridging packaging method provided in the embodiment of the present invention.

[0027] Icons: 110 - Adapter board; 101 - First surface; 102 - Second surface; 111 - Base layer; 112 - First conductive post; 113 - Fifth dielectric layer; 114 - First coating layer; 115 - Second coating layer; 1141 - First pattern layer opening; 1151 - Second pattern layer opening; 116 - Edge boss; 121 - Third wiring layer; 122 - First line; 123 - Second line; 131 - Sixth dielectric layer; 132 - First opening; 133 - Seventh dielectric layer; 134 - Third pattern layer 135 - Eighth dielectric layer; 136 - Third opening; 137 - Fourth wiring layer; 1101 - Adapter; 140 - Bridging; 1401 - Third surface; 1402 - Fourth surface; 141 - First dielectric layer; 1411 - First patterned opening; 142 - First wiring layer; 143 - Second dielectric layer; 1431 - Second opening; 144 - Third dielectric layer; 1441 - Second patterned opening; 145 - Fourth dielectric layer; 146 - Second wiring layer; 1451 - Fourth opening; 151 152-First connection terminal; 153-Second connection terminal; 154-Fourth connection terminal; 155-Fifth connection terminal; 161-First chip; 162-Second chip; 163-Third chip; 164-Second conductive post; 165-Metal block; 166-Grounding point; 167-Grounding wiring layer; 168-Antenna layer; 169-Third conductive post; 170-Insulator; 171-Cut groove; 172-Trench; 180-Dielectric layer; 181-First dielectric layer; 182-Second dielectric layer ; 1821-Fifth opening; 183-Fifth wiring layer; 184-Third dielectric layer; 185-Fourth dielectric layer; 186-Fifth dielectric layer; 187-Sixth dielectric layer; 188-Sixth wiring layer; 156-Sixth connection terminal; 189-Seventh wiring layer; 191-Solder ball; 192-Fourth conductive post; 200-Circuit board; 201-First carrier; 202-Second carrier; 203-Adhesive layer; 211-First groove; 212-Second groove; 213-Third groove; 214-Fourth groove. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0029] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0030] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0031] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this invention is in use. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention. In addition, the terms "first," "second," "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0032] Furthermore, terms such as "horizontal," "vertical," and "sag" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal relative to "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0033] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0034] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0035] Please combine Figures 1 to 3This invention discloses a 2.5D bridging package structure, comprising an adapter plate 110, a bridging portion 140, a first chip 161, an insulator 170, and a dielectric layer 180. The adapter plate 110 has a first surface 101 and a second surface 102 disposed opposite to each other. The first surface 101 has a first connection terminal 151, and the second surface 102 has a second connection terminal 152. The bridging portion 140 has a third surface 1401 and a fourth surface 1402 disposed opposite to each other. The third surface 1401 has a third connection terminal 153, and the fourth surface 1402 has a fourth connection terminal 154. The first chip 161 bridges the adapter plate 110 and the bridging portion 140, and is electrically connected to both the first connection terminal 151 and the third connection terminal 153. The fourth connection terminal 154 is connected to a functional component, and the insulator 170 fills the gap between the adapter plate 110 and the bridging portion 140. The dielectric layer 180 is provided with a fifth connection terminal 155, and the second connection terminal 152 is electrically connected to the fifth connection terminal 155. The dielectric layer 180 is disposed on the surface of the insulator 170 or on the side of the adapter plate 110 away from the insulator 170.

[0036] The first connection terminal 151, the second connection terminal 152, the third connection terminal 153, and the fourth connection terminal 154 are all metal layers. One end of the first chip 161 is attached to the adapter board 110 and electrically connected to the first connection terminal 151, while the other end is attached to the bridging part 140 and electrically connected to the third connection terminal 153. Since the adapter board 110 and the bridging part 140 are independently and spaced apart, the wiring layers on the adapter board 110 and the bridging part 140 are independently configured and not directly connected. This results in a shorter transmission path for the wiring layers, lower losses, and higher transmission efficiency. Furthermore, the adapter board 110 and the bridging part 140 are isolated and insulated by an insulator 170, which provides better insulation performance. This helps reduce the inductive effect and parasitic effect between the wiring layers, thereby mitigating leakage caused by parasitic inductance that could lead to short circuits and overheating between the wiring layers.

[0037] The adapter board 110 is made of materials such as silicon-based substrate, germanium-based substrate, or glass. Optionally, the adapter board 110 can be a silicon adapter board. The insulator 170 can be a molding compound or an insulating colloid, which has good insulation performance to avoid leakage or parasitic effects. In this embodiment, the bridging part 140 is surrounded by molding compound material. Since the insulation performance of the molding compound material is much greater than that of the silicon adapter board material, it can effectively prevent the current from forming an inductive effect between the wiring layer of the bridging part 140 and the wiring layer of the adapter board 110, and avoid leakage caused by parasitic inductance, which can lead to short circuits, overheating, and other phenomena between wiring layers. In addition, there are no conductive pillars connecting the wiring layers of the bridging part 140, which can improve the electrical transmission performance of the bridging part 140 and solve the problem in the existing EMIB technology that conductive pillars need to be made on the pads of the bridging chip to connect the bridging chip to the rewiring layer. In existing EMIB technology, grooves are first made in the silicon interposer board to embed the bridging chip, and then grooves or holes are made again using an etching process to expose the pads. This can easily lead to over-etching on the surface of the pads, resulting in electrical failure. In addition, there are conductive pillars between the circuit layers, which can cause inductive effects and delays in transmission efficiency.

[0038] It is understood that in this embodiment, the molding compound enters through the gap between the bridging portion 140 and the adapter plate 110, and can fill and cover the two opposite surfaces of the bridging portion 140 in one go. The one-time molding structure is more reliable and reduces the risk of structural delamination. The process is simplified, reducing the number of molding and baking processes, and improving problems such as thermal stress shrinkage and warping deformation of the molding compound.

[0039] Please combine Figure 2 The bridging section 140 includes a first dielectric layer 141, a second dielectric layer 143, a third dielectric layer 144, and a fourth dielectric layer 145 stacked together. The second dielectric layer 143 has a first wiring layer 142. The first dielectric layer 141 has a first metal layer electrically connected to the first wiring layer 142, and the first metal layer serves as a third connection terminal 153. The third dielectric layer 144 has a second wiring layer 146 electrically connected to the first wiring layer 142. The fourth dielectric layer 145 has a second metal layer electrically connected to the second wiring layer 146, and the second metal layer serves as a fourth connection terminal 154. The first dielectric layer 141, the second dielectric layer 143, the third dielectric layer 144, and the fourth dielectric layer 145 are made of the same material, such as organic materials like polyimide or benzocyclobutene. These organic materials have higher dielectric constants, no leakage current, reduce inductive effects and parasitic effects between wiring layers, and improve heat dissipation performance.

[0040] Please combine Figure 3The adapter board 110 includes a base layer 111 and a first conductive post 112 penetrating the base layer 111. A fifth dielectric layer 113 and a sixth dielectric layer 131 are provided on one side of the base layer 111. The fifth dielectric layer 113 has a third wiring layer 121, and the sixth dielectric layer 131 has a third metal layer connected to the third wiring layer 121, serving as a first connection terminal 151. A seventh dielectric layer 133 and an eighth dielectric layer 135 are provided on the other side of the base layer 111. The seventh dielectric layer 133 has a fourth wiring layer 137, and the eighth dielectric layer 135 has a fourth metal layer connected to the fourth wiring layer 137, serving as a second connection terminal 152. The third wiring layer 121 and the fourth wiring layer 137 are electrically connected to the first conductive post 112. Optionally, the base layer 111 can be a silicon layer. The fifth dielectric layer 113, the sixth dielectric layer 131, the seventh dielectric layer 133, and the eighth dielectric layer 135 are made of the same material as the first dielectric layer 141, and are also made of organic material. Organic materials have a higher dielectric constant than silicon materials, which helps to reduce inductive and parasitic effects between wiring layers and reduce the risk of leakage.

[0041] As is easily understood, in this embodiment, the wiring layers on the bridging section 140 and the adapter board 110 are independently configured. The line width, line spacing, etc., of the wiring layers in the two areas can be flexibly designed; they can be the same or different, offering greater flexibility. The wiring precision can also be set differently. For example, the bridging section 140 can be used for more refined, high-precision wiring for local high-end products, especially for high-frequency or ultra-high-frequency signal products, where the number of wiring layers in the bridging section 140 can be increased. Meanwhile, the adapter board 110 can have relatively lower precision wiring layers for other types of products. Due to the different wiring precision, the wiring process difficulty and cost also differ. This partitioned wiring design helps reduce overall cost and process difficulty, and improves process efficiency. In this embodiment, the number of wiring layers in the bridging section 140 is greater than the number of wiring layers in the adapter board 110.

[0042] I understand, please consider this. Figure 4 In some embodiments, the number of wiring layers in the bridging section 140 is greater than the number of wiring layers on the adapter board. The first wiring layer 142 is multi-layered, and at least a portion of the first wiring layer 142 is higher than the surface of the third wiring layer 121 near the surface of the first chip 161, and the surface of the second dielectric layer 143 is higher than the surface of the sixth dielectric layer 131 near the surface of the first chip 161.

[0043] More wiring layers can be provided on the side of the bridging part 140 near the first chip 161, that is, the bridging part 140 protrudes from the surface of the adapter board 110 on the side where the first chip 161 is mounted. In this case, when mounting the first chip 161, the height of the bumps on the first chip 161 can be designed to ensure that the first chip 161 is mounted smoothly and reliably.

[0044] Alternatively, the second wiring layer 146 may be multi-layered, with at least a portion of the second wiring layer 146 lower than the surface of the third wiring layer 121 away from the first chip 161, and the surface of the fourth dielectric layer 145 lower than the surface of the fifth dielectric layer 113 away from the first chip 161. More wiring layers can be provided on the side of the bridging portion 140 away from the first chip 161, meaning at least a portion of the second wiring layer 146 is lower than the third wiring layer 121 of the adapter board 110. This is beneficial for increasing package density and enriching the wiring layer design. Alternatively, more wiring layers can be distributed simultaneously on both sides of the bridging portion 140.

[0045] It is worth noting that in the packaged product structure, the bridging section 140 divides the adapter board 110 into multiple adapter sections 1101, such as... Figure 1 The diagram shows one bridging section 140 and two transition sections 1101. The multiple transition sections 1101 help reduce the material and volume of the transition board 110, thereby reducing the impact of warpage stress on the bridging section 140 and improving its reliability. Optionally, the transition board 110 can be made of a silicon-based substrate, a germanium-based substrate, or glass, etc., and its material must be consistent with the chip material to ensure a consistent coefficient of thermal expansion and solve the problem of thermal stress warpage.

[0046] In some implementations, such as Figure 1 As shown, the functional component includes a second chip 162, which is mounted on the bridging section 140 and electrically connected to the fourth connection terminal 154. Optionally, the second chip 162 is flip-chip connected to the bridging section 140. The bridging section 140 shortens the interconnection path between the first chip 161 and the second chip 162, resulting in higher transmission efficiency.

[0047] In some implementations, such as Figure 5 As shown, the functional component includes a second conductive post 164. One end of the second conductive post 164 is electrically connected to the fourth connecting terminal 154, and the other end is electrically connected to the fifth connecting terminal 155. Using the second conductive post 164 for direct connection results in a shorter transmission path, higher transmission efficiency, and improved heat dissipation. The second conductive post 164 can be formed by wire bonding. The second conductive post 164 also helps to improve the bonding force between the molding compound and the dielectric layer 180.

[0048] In some embodiments, a second chip 162 may be disposed on the side of the bridging portion 140 away from the first chip 161, and a second conductive post 164 may be disposed around the second chip 162 to improve the heat dissipation performance of the chip. Optionally, the second conductive post 164 may be grounded to achieve electromagnetic shielding of the second chip 162.

[0049] In some implementations, such as Figure 6 , Figure 7As shown, the functional component includes a metal block 165, and the fourth connection terminal 154 includes a grounding point 166. The metal block 165 is electrically connected to the grounding point 166. The dielectric layer 180 is provided with a grounding wiring layer 167, and the metal block 165 is electrically connected to the grounding wiring layer 167. It can be understood that the bottom grounding point 166 of the bridging portion 140 is connected to the metal block 165. The bottom of the metal block 165 utilizes a redistribution layer to redistribute the grounding points 166. The end of the metal block 165 furthest from the bridging portion 140 is electrically connected to the grounding wiring layer 167, thereby achieving the grounding function. In this embodiment, the metal block 165 can increase the resistance on the grounding wiring layer 167. Therefore, under the condition of constant current, according to the voltage formula U=I*R, the metal block 165 is beneficial to increasing the supply voltage on the grounding point 166.

[0050] In some embodiments, the metal block 165 can be exposed from the surface of the dielectric layer. By directly mounting the metal block 165 onto the pads of the PCB circuit board 200, the cross-sectional area for current flow is increased, thereby improving conductivity and heat dissipation. Of course, the metal block 165 can also be a capacitor, inductor, or other device; no specific limitation is made here.

[0051] In some implementations, such as Figure 8 , 9 As shown, the third dielectric layer 144 has an antenna layer 168 electrically connected to the first wiring layer 142, and the antenna layer 168 is electrically connected to the second metal layer. Functional components include third conductive posts 169, which are electrically connected to the second metal layer and extend to the surface of the package structure, serving as the transceiver ends of the antenna layer 168. It can be understood that there are multiple third conductive posts 169, some serving as the receiving end of the antenna, and the rest as the transmitting end. This structure allows the antenna layer 168 to be brought out, thereby realizing the antenna's radio frequency function. Furthermore, the third conductive posts 169 are used for heat dissipation. It can be understood that the extension of the third conductive posts 169 to the surface of the package structure prevents the antenna layer 168 from being buried in the molding compound or dielectric layer and thus obstructing the antenna's transmission performance. The shape and layout of the antenna layer can be flexibly designed according to actual needs, and are not specifically limited here.

[0052] In some implementations, the adapter board 110 is equipped with a third chip 163, which is electrically connected to the first connection terminal 151. The inclusion of the third chip 163 further improves chip integration and enriches product functionality.

[0053] Optionally, the second chip 162 on the bridging section 140 may be, but is not limited to, at least one of a central processing unit (CPU), graphics processing unit (GPU), application-specific integrated circuit (ASIC), programmable logic device (PLD), or any other processor. The first chip 161 bridging the bridging section 140 and the adapter board 110 may be, but is not limited to, a memory chip, such as an erasable programmable read-only memory chip, a non-volatile memory chip, a high-bandwidth memory chip, or at least one of any memory device. The third chip 163 on the adapter board 110 may be, but is not limited to, at least one of a radio frequency chip, a power management chip, or any integrated circuit chip. The design of the bridging section 140 eliminates the need for conductive vias, which is beneficial for improving the transmission efficiency between the first chip 161 and the second chip 162.

[0054] Optionally, the surface of the sixth dielectric layer 131 is flush with the surface of the bridging portion 140 having the third connection end 153. In this way, when the first chip 161 is connected across the adapter board 110 and the bridging portion 140, the mounting is more stable, the structure is reliable, and warping is reduced.

[0055] Optionally, dielectric layer 180 includes a first dielectric layer 181 and a second dielectric layer 182. The first dielectric layer 181 has a fifth wiring layer 183 connected to the second connection terminal 152, and the second dielectric layer 182 has a fifth connection terminal 155 electrically connected to the fifth wiring layer 183. The first dielectric layer 181 is located on the side of the adapter plate 110 away from the insulator 170 and is connected to the insulator 170. It can be understood that the fifth wiring layer 183 and the fourth metal layer are electrically connected, and the fifth connection terminal 155 includes the fifth metal layer, which connects to the solder ball 191.

[0056] Optionally, in some implementations, such as Figure 7 As shown, dielectric layer 180 includes a third dielectric layer 184, a fourth dielectric layer 185, a fifth dielectric layer 186, and a sixth dielectric layer 187. The third dielectric layer 184 and the fourth dielectric layer 185 are sequentially stacked on the surface of insulator 170. The third dielectric layer 184 has a sixth wiring layer 188, and the fourth dielectric layer 185 has a sixth connection terminal 156 electrically connected to the sixth wiring layer 188. The sixth connection terminal 156 includes a sixth metal layer that protrudes from the fourth dielectric layer 185. The sixth metal layer is connected to solder balls 191.

[0057] The fifth dielectric layer 186 is located on the side of the adapter plate 110 away from the insulator 170. A seventh wiring layer 189 electrically connected to the fourth metal layer is provided within the fifth dielectric layer 186. The sixth dielectric layer 187 covers the fifth dielectric layer 186. Fourth conductive posts 192 are distributed on the outer periphery of the adapter plate 110. One end of the fourth conductive post 192 is electrically connected to the sixth wiring layer 188, and the other end is electrically connected to the seventh wiring layer 189.

[0058] When the functional component includes a third conductive post 169, the third conductive post 169 extends to be exposed from the surface of the sixth dielectric layer 187 to serve as a transceiver terminal of the antenna layer 168.

[0059] Please combine Figure 10 Optionally, the 2.5D bridged package structure also includes a circuit board 200, with solder balls 191 on the adapter board 110 soldered onto the circuit board 200 to achieve electrical connection with the circuit board 200. The circuit board 200 includes, but is not limited to, a substrate, lead frame, ceramic substrate, PCB board, epoxy fiberglass cloth substrate, silicon dioxide board, silicon nitride board, etc.

[0060] The 2.5D bridged packaging method provided in this embodiment of the invention generally includes the following steps: Please combine Figure 11 , Figure 12 S1. An adapter board 110 is provided. The adapter board 110 has a first surface 101 and a second surface 102 disposed opposite to each other; the adapter board 110 has a first region and a second region. The first region and the second region are disposed adjacent to each other. In this embodiment, the first region is located in the middle of a plurality of second regions, that is, the plurality of second regions are disposed along the outer periphery of the first region. The material of the adapter board 110 is glass, a silicon substrate, or a germanium substrate. If wafer-level packaging is used, the size of the adapter board 110 can be selected as 6 inches, 8 inches, or 12 inches, etc. If panel-level packaging is used, the size of the adapter board 110 can be selected as 310cm×310cm, 600cm×600cm, 710cm×710cm, etc., and is not limited to the sizes listed above; it can be flexibly designed according to actual needs.

[0061] Optionally, a second groove 212 of depth H1 is formed in a first region of the first surface 101, and a third groove 213 of depth H2 is formed in a second region of the first surface 101, where H2 is greater than H1. The second groove 212 and the third groove 213 can be formed using plasma etching technology, such as dry plasma etching or chemical etching. Dry plasma etching utilizes a plasma gas mixture of oxygen (O2) and SF6; chemical etching uses one or more chemical agents such as phosphoric acid, acetic acid, hydrogen chloride, or sulfuric acid. The depth H2 is the thickness of the wiring layer. This allows the wiring layer to be buried in the substrate, avoiding delamination between the dielectric layer and the silicon surface caused by silicon warping. In this embodiment, the second groove 212 and the third groove 213 reduce the contact area between the dielectric layer and the surface of the adapter plate 110, thus reducing the risk of delamination.

[0062] It is understood that after the second groove 212 and the third groove 213 are formed, edge bosses 116 are formed at the edge of the adapter plate 110 and at the cutting kerf position. The edge bosses 116 can protect the sidewalls of the third wiring layer 121 and prevent structural delamination. At the same time, they play a good supporting role in the manufacturing process and mitigate warping deformation. It is understood that in the wet process, the edge bosses 116 can prevent moisture or chemicals from entering and corroding the sidewalls of the dielectric layer and wiring layer, thus preventing structural delamination.

[0063] A first wiring layer 142 and a first metal layer are formed in a first region of the first surface 101. A third wiring layer 121 and a third metal layer are formed in a second region of the first surface 101.

[0064] S11. Optionally, a third wiring layer 121 is first formed in the second region, that is, in the third groove 213. Specifically, a fifth dielectric layer 113 is formed at the bottom of the third groove 213 using a spin coating process. The material of the fifth dielectric layer 113 can be polyimide or benzocyclobutene, etc. A first pattern layer opening 1141 is formed on the fifth dielectric layer 113 using an exposure and development process. Then, metal is electroplated into the first pattern layer opening 1141 using an electroplating process to form the third wiring layer 121. Optionally, the third wiring layers 121 in multiple third grooves 213 can be formed simultaneously in the same process. Optionally, the surface of the fifth dielectric layer 113 is flush with the bottom of the second groove 212.

[0065] Figures 13 to 23 The diagram shown is a partial schematic of the adapter board 110, which is used to illustrate the schematics of each process.

[0066] Please combine Figure 13 It should be noted that the number of third wiring layers 121 can be one or more, and no specific limitation is made here. In this embodiment, the third wiring layer 121 is described as having two layers. For example, the fifth dielectric layer 113 includes a first coating layer 114 and a second coating layer 115, and the third wiring layer 121 includes a first line 122 and a second line 123. First, a first coating layer 114 is formed at the bottom of the third groove 213. The first pattern layer opening 1141 is formed by exposure and development on the first coating layer 114. Metal is electroplated in the first pattern layer opening 1141 to form the first line 122. A second coating layer 115 is formed on the first coating layer 114. The second pattern layer opening 1151 is formed by exposure and development on the second coating layer 115. Metal is electroplated in the second pattern layer opening 1151 to form the second line 123. The second line 123 and the first line 122 are electrically connected. The surface of the first coating layer 114 is flush with the bottom of the second groove 212.

[0067] S12. A first wiring layer 142 and a first metal layer are formed in the second groove 212. It should be noted that, to improve process efficiency, after forming the first line 122, since the surface of the first coating layer 114 is flush with the bottom of the second groove 212, when forming the second coating layer 115 on the first coating layer 114, a first dielectric layer 141 can be formed simultaneously in the first region, i.e., at the bottom of the second groove 212. The first dielectric layer 141 and the second coating layer 115 have the same material and thickness. Of course, in other embodiments, the first dielectric layer 141 and the second coating layer 115 can also be formed step-by-step, and the materials and thicknesses of the first dielectric layer 141 and the second coating layer 115 can be different. This provides greater design flexibility for the wiring layer and can meet various customized needs; no specific limitations are made here. Subsequently, a first patterned opening 1411 is formed on the first dielectric layer 141 using the same exposure and development process, and metal is electroplated into the first patterned opening 1411 to form the first wiring layer 142. The first wiring layer 142 and the second line 123 can be formed in the same process or in steps.

[0068] Please combine Figure 14 A sixth dielectric layer 131 is formed on the fifth dielectric layer 113 using a spin coating process, meaning the sixth dielectric layer 131 covers the second coating layer 115. A first opening 132 is formed on the sixth dielectric layer 131 using an exposure and development process. Then, metal is electroplated into the first opening 132 to form a third metal layer. The third metal layer fills the first opening 132 and protrudes from the surface of the sixth dielectric layer 131. This third metal layer serves as the first connecting end 151.

[0069] Optionally, when forming the sixth dielectric layer 131, a second dielectric layer 143 is simultaneously formed on the first dielectric layer 141. A second opening 1431 is formed on the second dielectric layer 143 using exposure and development processes, and metal is electroplated into the second opening 1431 to form a first metal layer. The first metal layer and the first wiring layer 142 are electrically connected. The first metal layer serves as the third connection terminal 153. It is understood that the first and third metal layers can be formed simultaneously to improve process efficiency. Of course, the first and third metal layers can be formed step-by-step; this is not specifically limited here.

[0070] S2. Remove the adapter plate 110 corresponding to the first region and form a first groove 211 on the second surface 102 to expose the first wiring layer 142.

[0071] Please combine Figure 15Optionally, the adapter plate 110 is flipped so that the first surface 101 faces downwards and the second surface 102 faces upwards. A first carrier 201 is attached to one side of the first surface 101. A liquid adhesive layer 203 is applied to the surface of the first carrier 201 using a spin coater. The layer is then baked and set using a hot plate. The first carrier 201 can be made of materials such as glass, silicon dioxide, or metal. The liquid adhesive layer 203 is made of a thermoplastic material, and its material can be separated by UV light irradiation. The material of the liquid adhesive layer 203 includes at least one of epoxy resin, polyimide, benzocyclobutene, and other polymer composite materials.

[0072] Please combine Figure 16 A first groove 211 is formed in the first region of the second surface 102, and a fourth groove 214 is formed in the second region of the second surface 102. The first groove 211 extends to the first dielectric layer 141, exposing the first dielectric layer 141 from one side of the second surface 102. In this embodiment, the material of the adapter plate 110 corresponding to the first dielectric layer 141 (the adapter plate 110 in the first region) is completely removed. The depth of the fourth groove 214 is less than the depth of the first groove 211. After the fourth groove 214 is formed, the second region still retains a certain thickness of the adapter plate 110, which serves as the base layer 111 for subsequent structures. The formation process of the first groove 211 and the fourth groove 214 can be referred to the formation methods of the second groove 212 and the third groove 213 described above, and will not be repeated here. In this embodiment, the positions of the first groove 211 and the second groove 212 correspond, and the positions of the third groove 213 and the fourth groove 214 correspond.

[0073] After the fourth groove 214 is formed, edge bosses 116 are formed at the edge of the adapter plate 110 and at the cutting kerf location. The edge bosses 116 can protect the sidewalls of the fourth wiring layer 137 and prevent structural delamination. At the same time, they play a good supporting role in the manufacturing process and mitigate warping deformation. It can be understood that in the wet process, the edge bosses 116 can prevent moisture or chemicals from entering and corroding the sidewalls of the dielectric layer and wiring layer, thus preventing structural delamination.

[0074] A first conductive post 112 is formed in the second region, penetrating the adapter plate 110. The first conductive post 112 can be formed using a TSV (Through Silicon Via) process. For example, a through-silicon via (TSV) can be formed in the second region of the adapter plate 110 using laser drilling or etching, exposing the third wiring layer 121. The first conductive post 112 is then formed in the TSV using electroplating liquid metal. The first conductive post 112 is electrically connected to the third metal layer.

[0075] Please combine Figure 17S21. A seventh dielectric layer 133 is formed in the second region of the second surface 102 using a spin coating process. The material of the seventh dielectric layer 133 can be polyimide or benzocyclobutene, etc. A photomask is then placed on the seventh dielectric layer 133 again, and a third pattern layer opening 134 is formed on the seventh dielectric layer 133 using an exposure and development process. A metal layer is electroplated on the third pattern layer opening 134 using an electroplating process to form a fourth wiring layer 137.

[0076] Please combine Figure 18 S22. An eighth dielectric layer 135 is formed on the seventh dielectric layer 133 using a spin coating process. A third opening 136 is formed on the eighth dielectric layer 135, exposing the fourth wiring layer 137. The third opening 136 can be formed using a dry etching process. Organic contaminants or residues in the third opening 136 and on the surface of the eighth dielectric layer 135 are removed using a cleaning process. A fourth metal layer is formed in the third opening 136 using an electroplating process. The fourth metal layer is electrically connected to the fourth wiring layer 137. The fourth metal layer fills the third opening 136 and protrudes from the eighth dielectric layer 135. The fourth metal layer includes bumps and a solder layer on the surface of the bumps. The material of the solder layer includes, but is not limited to, one or more layers of titanium, titanium-tungsten, and nickel. The solder layer helps to improve soldering performance.

[0077] S31. A third dielectric layer 144 is formed on the first dielectric layer 141 on one side of the second surface 102 using a spin coating process. The material of the third dielectric layer 144 can be polyimide or benzocyclobutene, etc. A photomask is then placed on the third dielectric layer 144, and a second patterned opening 1441 is formed on the third dielectric layer 144 using an exposure and development process. A metal layer is electroplated on the second patterned opening 1441 using an electroplating process to form a second wiring layer 146. The second wiring layer 146 is electrically connected to the first wiring layer 142.

[0078] S32. A fourth dielectric layer 145 is formed on the third dielectric layer 144 using a spin coating process, and a fourth opening 1451 is formed on the fourth dielectric layer 145, exposing the second wiring layer 146. The fourth opening 1451 can be formed using a dry etching process. A cleaning process is used to remove organic contaminants or residues from the fourth opening 1451 and the surface of the fourth dielectric layer 145. A second metal layer is formed in the fourth opening 1451 using an electroplating process. The second metal layer is electrically connected to the second wiring layer 146. The second metal layer fills the fourth opening 1451 and protrudes from the fourth dielectric layer 145. The second metal layer includes bumps and a solder layer provided on the surface of the bumps. The material of the solder layer includes, but is not limited to, one or more layers of titanium, titanium-tungsten, and nickel, and the solder layer helps to improve soldering performance. This completes the fabrication of the bridging portion 140.

[0079] It should be noted that S21 and S31 can be completed simultaneously, as can S22 and S32, which is beneficial for improving process efficiency. Of course, in some implementations, S21 and S31 can be completed step by step, as can S22 and S32; this is not specifically limited here.

[0080] S4. A functional component is formed on the second metal layer. In this embodiment, the functional component is described using the second chip 162 as an example.

[0081] Please combine Figure 19 A second chip 162 is mounted. Optionally, the second chip 162 is a flip chip. The second chip 162 is mounted on one side of the second metal layer and is electrically connected to the second metal layer. Optionally, the surface of the second chip 162 away from the fourth dielectric layer 145 is flush with the surface of the eighth dielectric layer 135.

[0082] It should be noted that in this embodiment, the second chip 162 serves as a bridge chip and is a flip chip, allowing for the formation of a flip chip structure through a bump process. In contrast, the traditional Intel EMIB technology uses a pad structure (without a bump process), requiring the chip to be embedded within the 110th layer of the adapter board before further wiring to form a bridge chip structure. Therefore, the flip chip bump structure cannot be used for wiring.

[0083] Of course, if the functional component is the second conductive post 164, the metal block 165, or other structures, the process can be flexibly adjusted.

[0084] Please combine Figure 20 S51. A second carrier 202 is provided. Optionally, a liquid adhesive layer 203 is applied to the surface of the second carrier 202 using a spin coater. The layer is then baked and set into a film using a hot plate. The second carrier 202 can be made of materials such as glass, silicon dioxide, or metal. The liquid adhesive layer 203 is made of a thermoplastic material, the material of which can be separated by irradiation with UV light. The material of the liquid adhesive layer 203 includes at least one of epoxy resin, polyimide, benzocyclobutene, and other polymer composite materials. The product is flipped over, and one side of the eighth dielectric layer 135 is attached to the second carrier 202 and fixed to the second carrier 202 by baking.

[0085] S52. Remove the first carrier 201 to expose the third metal layer and the first metal layer. Cut from one side of the first surface 101. Use a cutting process to cut the sidewall of the adapter plate 110 to form a cutting groove 171, and cut the portion between the adapter plate 110 and the bridging portion 140 to separate the adapter plate 110 and the bridging portion 140. Form a groove 172 between the adapter plate 110 and the bridging portion 140.

[0086] S53. Mount the first chip 161. The first chip 161 is a flip chip. The first chip 161 is connected across the adapter board 110 and the bridging section 140. One end of the first chip 161 is electrically connected to the third metal layer of the adapter board 110, and the other end is electrically connected to the first metal layer on the bridging section 140. The bridging section 140 serves as a circuit interconnection.

[0087] Optionally, a third chip 163 is mounted on the adapter board 110. The third chip 163 can be flip-chip or upright chip, and its quantity and type are not limited. The third chip 163 is electrically connected to the third metal layer on the adapter board 110. The third chip 163 helps to improve chip integration.

[0088] Please combine Figure 21 The insulator 170 is filled. Optionally, the insulator 170 is a molding compound, which is formed by injection molding or liquid printing to protect the first chip 161, the third chip 163, and the chip soldering structure. The molding compound protects the sidewalls of the adapter plate 110 and fills the gap (groove 172) between the adapter plate 110 and the bridging portion 140. Multiple fillings can be completed in a single molding process, resulting in a reliable structure and high process efficiency. In this embodiment, the molding compound enters from the gap between the bridging portion 140 and the adapter plate 110, allowing for one-time filling and covering of the chips on both opposite surfaces of the bridging portion 140. This single-stage molding structure is more reliable and reduces the risk of structural delamination. It simplifies the process, reduces the number of molding and baking processes, and improves issues such as thermal stress shrinkage and warping deformation of the molding compound.

[0089] In some embodiments, the encapsulation body can be replaced by an insulator 170 such as underfill adhesive, which protects the first chip 161, the second chip 162, the third chip 163, and the chip soldering structure.

[0090] UV light is applied to the back of the second carrier 202 to separate it from the packaging structure, exposing the eighth dielectric layer 135 and the fourth metal layer. The packaging structure is then flipped over again. The molded body faces downwards, providing support and cushioning.

[0091] Please combine Figure 22 , Figure 23 S6. A first dielectric layer 181 is formed on one side of the eighth dielectric layer 135. A fifth wiring layer 183, electrically connected to the fourth metal layer, is formed within the first dielectric layer 181. A second dielectric layer 182 is formed on the first dielectric layer 181. A fifth opening 1821 is formed on the second dielectric layer 182, exposing the fifth wiring layer 183. Metal is electroplated within the fifth opening 1821 to form a fifth metal layer, i.e., the fifth connection terminal 155. Solder balls 191 are formed on the fifth metal layer. Finally, the product is cut and separated into individual products, completing the process.

[0092] The materials for the first dielectric layer 181 and the second dielectric layer 182 are polyimide or benzocyclobutene, etc., and are selected from materials with low dielectric constant and high thermal conductivity. The fabrication process of the fifth metal layer is similar to that of the fourth metal layer, and is not specifically limited here.

[0093] It should be noted that the fifth wiring layer 183 uses a redistribution wiring layer to electrically connect the internal circuits and redistribute the output pads. The first dielectric layer 181 and the second dielectric layer 182 cover the back of the second chip 162, thereby achieving better thermal conductivity.

[0094] In some embodiments, the functional component includes a third conductive post 169; the second wiring layer 146 is an antenna layer 168. After the step of filling the insulator 170, the method further includes: A third dielectric layer 184 and a fourth dielectric layer 185 are sequentially formed on the surface of the molding compound; wherein, the third dielectric layer 184 is provided with a sixth wiring layer 188, and the fourth dielectric layer 185 is provided with a sixth connection terminal 156 electrically connected to the sixth wiring layer 188.

[0095] The product is flipped over, and a fourth conductive post 192 is formed on the outer periphery of the adapter plate 110 from the second surface 102 side. One end of the fourth conductive post 192 is electrically connected to the sixth wiring layer 188, and the other end extends to the side of the adapter plate 110 away from the insulator 170. A fifth dielectric layer 186 is formed on the side of the adapter plate 110 away from the insulator 170. A seventh wiring layer 189 is provided on the fifth dielectric layer 186. The seventh wiring layer 189 is electrically connected to the fourth conductive post 192. A sixth dielectric layer 187 is formed on the fifth dielectric layer 186. A third conductive post 169 is exposed from the surface of the sixth dielectric layer 187.

[0096] Finally, solder ball 191 is formed at the sixth connection end 156. It is then cut and separated into individual products.

[0097] It should be noted that the fourth conductive post 192 can be formed from either side of the insulator 170, and no specific limitation is made here. The dielectric layer and dielectric layer 180 mentioned in this paper are both insulating materials, and the materials can be the same, such as both using organic materials such as polyimide or benzocyclobutene.

[0098] The 2.5D bridging packaging method and 2.5D bridging packaging structure provided in this invention have the following beneficial effects: The adapter board 110 and the bridging section 140 are independently configured. The bridging section 140 is insulated from the adapter board 110 by an insulator 170, resulting in better insulation performance. This helps reduce the inductive and parasitic effects between the wiring layers of the two, thereby mitigating leakage caused by parasitic inductance that could lead to short circuits and overheating between wiring layers. Furthermore, the independent configuration of the wiring layers on the adapter board 110 and the bridging section 140 results in shorter transmission paths, lower losses, and higher transmission efficiency.

[0099] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; any modifications, equivalent substitutions, improvements, etc., should be included within the protection scope of the present invention.

Claims

1. A 2.5D bridged packaging method, characterized in that, include: Adapter board provided; The adapter plate has a first surface and a second surface that are disposed opposite to each other; The adapter plate has a first region and a second region; A first wiring layer and a first metal layer are formed in the first region of the first surface; A third wiring layer and a third metal layer are formed in the second region of the first surface; Remove the adapter plate corresponding to the first area and form a first groove on the second surface to expose the first wiring layer; A first conductive post electrically connected to the third wiring layer is formed in the second region of the second surface; A second wiring layer and a second metal layer are formed in the first groove; the second wiring layer and the first wiring layer are electrically connected. A fourth wiring layer and a fourth metal layer are formed in the second region of the second surface; the fourth wiring layer is electrically connected to the first conductive pillar; A functional component is formed on the second metal layer; The edges of the adapter plate are cut and a groove is formed between the first region and the second region; A first chip is mounted, the first chip is connected across the first region and the second region, and the first chip is electrically connected to the first metal layer and the third metal layer respectively; An insulator is used to cover the first chip and the sidewalls of the adapter board and fill the trench.

2. The 2.5D bridged packaging method according to claim 1, characterized in that, The steps for providing the adapter board include: Provide the aforementioned adapter board; A second groove of depth H1 is formed in a first region of the first surface, and a third groove of depth H2 is formed in a second region of the first surface, where H2 is greater than H1; The step of forming a first wiring layer and a first metal layer in the first region of the first surface includes: forming a first wiring layer and a first metal layer in the second groove; The step of forming a third wiring layer and a third metal layer in the second region of the first surface includes: forming a third wiring layer and a third metal layer in the third groove.

3. The 2.5D bridged packaging method according to claim 2, characterized in that, In the step of forming a third wiring layer and a third metal layer in the second region of the first surface: the third wiring layer includes a first line and a second line; the first line is first formed in the third groove, and then the second line connected to the first line is formed; the surface of the first line is flush with the bottom of the second groove. In the step of forming a first wiring layer and a first metal layer in the first region of the first surface: the first wiring layer and the second line are formed simultaneously.

4. The 2.5D bridged packaging method according to claim 2, characterized in that, In the step of forming a third groove of depth H2 in the second region of the first surface, an edge boss is formed on the outer periphery of the third groove.

5. The 2.5D bridged packaging method according to claim 1, characterized in that, The step of forming a first conductive post electrically connected to the third wiring layer in the second region of the second surface includes: A fourth groove is formed in the second region of the second surface; A first conductive post electrically connected to the third wiring layer is formed at the bottom of the fourth groove; The step of forming a fourth wiring layer and a fourth metal layer in the second region of the second surface includes: A fourth wiring layer connected to the first conductive post is formed in the fourth groove; the fourth metal layer and the fourth wiring layer are electrically connected.

6. The 2.5D bridged packaging method according to claim 1, characterized in that, The functional component includes a second chip, and prior to the step of filling the insulator, it further includes: The second chip is mounted on the second metal layer; In the step of filling the insulator: the liquid insulator flows along the trench and covers the first chip and the second chip on both sides of the second wiring layer in one go.

7. The 2.5D bridged packaging method according to claim 1, characterized in that, In the step of removing the adapter plate corresponding to the first region and forming a first groove on the second surface to expose the first wiring layer: All adapter plates in the first region are removed from the second surface to form the first groove.

8. The 2.5D bridged packaging method according to claim 1, characterized in that, After the step of filling the insulator, the following steps are also included: A first dielectric layer is formed on the side of the adapter plate away from the insulator; A fifth wiring layer electrically connected to the fourth metal layer is formed within the first dielectric layer; A second dielectric layer is formed on the first dielectric layer; A fifth metal layer is formed that protrudes from the second dielectric layer, and the fifth metal layer is electrically connected to the fifth wiring layer.

9. The 2.5D bridged packaging method according to claim 1, characterized in that, If the functional component includes a third conductive post; the second wiring layer is an antenna layer; After the step of filling the insulator, the following steps are also included: A third dielectric layer and a fourth dielectric layer are sequentially formed on the surface of the insulator; the third dielectric layer is provided with a sixth wiring layer, and the fourth dielectric layer is provided with a sixth connection terminal electrically connected to the sixth wiring layer; A fourth conductive post is formed on the outer periphery of the adapter plate; one end of the fourth conductive post is electrically connected to the sixth wiring layer, and the other end extends to the side of the adapter plate away from the insulator; A fifth dielectric layer is formed on the side of the adapter plate away from the insulator; the fifth dielectric layer has a seventh wiring layer; the seventh wiring layer is electrically connected to the fourth conductive post; A sixth dielectric layer is formed on the fifth dielectric layer; the third conductive pillar is exposed from the surface of the sixth dielectric layer.

10. A 2.5D bridged packaging structure, characterized in that, The 2.5D bridged packaging structure is manufactured using the 2.5D bridged packaging method as described in any one of claims 1 to 9, and the 2.5D bridged packaging structure includes: An adapter plate having a first surface and a second surface disposed opposite to each other, the first surface having a first connecting end and the second surface having a second connecting end; The bridging part has a third surface and a fourth surface disposed opposite to each other, the third surface is provided with a third connecting end, and the fourth surface is provided with a fourth connecting end; There is a gap between the bridging part and the adapter plate; A first chip is connected across the adapter board and the bridging part, and the first chip is electrically connected to the first connection terminal and the third connection terminal respectively. The fourth connection end is connected to a functional component; An insulator that fills the gap between the adapter plate and the bridging portion; A dielectric layer is provided, wherein the dielectric layer has a fifth connection terminal, and the second connection terminal is electrically connected to the fifth connection terminal. The dielectric layer is disposed on the surface of the insulator or on the side of the adapter plate away from the insulator.

11. The 2.5D bridged packaging structure according to claim 10, characterized in that, The bridging section includes a first dielectric layer, a second dielectric layer, a third dielectric layer and a fourth dielectric layer stacked together. The second dielectric layer is provided with a first wiring layer, and the first dielectric layer is provided with a first metal layer electrically connected to the first wiring layer. The first metal layer serves as the third connection terminal. The third dielectric layer is provided with a second wiring layer electrically connected to the first wiring layer, and the fourth dielectric layer is provided with a second metal layer electrically connected to the second wiring layer, the second metal layer serving as the fourth connection terminal.

12. The 2.5D bridged packaging structure according to claim 10, characterized in that, The functional component includes a second chip, which is mounted on the bridging part and electrically connected to the fourth connection terminal.

13. The 2.5D bridged packaging structure according to claim 12, characterized in that, The functional component further includes a second conductive post, one end of which is electrically connected to the fourth connection terminal and the other end of which is electrically connected to the fifth connection terminal; the second conductive post is disposed on the periphery of the second chip; the second conductive post is grounded.

14. The 2.5D bridged packaging structure according to claim 10, characterized in that, The functional component includes a second conductive post, one end of which is electrically connected to the fourth connection terminal, and the other end of which is electrically connected to the fifth connection terminal.

15. The 2.5D bridged packaging structure according to claim 10, characterized in that, The functional component includes a metal block, the fourth connection terminal includes a grounding point, the metal block is electrically connected to the grounding point, the dielectric layer is provided with a grounding wiring layer, and the metal block is electrically connected to the grounding wiring layer.

16. The 2.5D bridged packaging structure according to claim 11, characterized in that, The third dielectric layer is provided with an antenna layer electrically connected to the first wiring layer, and the antenna layer is electrically connected to the second metal layer; The functional component includes a third conductive post, which is electrically connected to the second metal layer and extends to the surface of the packaging structure, serving as the transceiver end of the antenna layer.

17. The 2.5D bridged packaging structure according to claim 11, characterized in that, The adapter board includes a base layer and a first conductive post penetrating the base layer. A fifth dielectric layer and a sixth dielectric layer are provided on one side of the base layer. A third wiring layer is provided on the fifth dielectric layer. A third metal layer is provided on the sixth dielectric layer and connected to the third wiring layer. The third metal layer serves as the first connection end. On the other side of the substrate layer, there are a seventh dielectric layer and an eighth dielectric layer. The seventh dielectric layer has a fourth wiring layer, and the eighth dielectric layer has a fourth metal layer connected to the fourth wiring layer. The fourth metal layer serves as the second connection terminal. The third wiring layer and the fourth wiring layer are respectively electrically connected to the first conductive post.

18. The 2.5D bridged packaging structure according to claim 17, characterized in that, The adapter board is equipped with a third chip, which is electrically connected to the first connection terminal.

19. The 2.5D bridged packaging structure according to claim 17, characterized in that, The surface of the sixth dielectric layer is flush with the surface of the bridging portion on the side having the third connection end.

20. The 2.5D bridged packaging structure according to claim 10, characterized in that, The number of wiring layers in the bridging section is greater than the number of wiring layers in the adapter board.

21. The 2.5D bridged packaging structure according to claim 17, characterized in that, The first wiring layer is multi-layered, and at least a portion of the first wiring layer is higher than the surface of the third wiring layer near the first chip, and the surface of the second dielectric layer is higher than the surface of the sixth dielectric layer near the first chip.

22. The 2.5D bridged packaging structure according to claim 17, characterized in that, The second wiring layer is multi-layered, with at least a portion of the second wiring layer being lower than the surface of the third wiring layer away from the first chip, and the surface of the fourth dielectric layer being lower than the surface of the fifth dielectric layer away from the first chip.

23. The 2.5D bridged packaging structure according to any one of claims 10-22, characterized in that, The dielectric layer includes a first dielectric layer and a second dielectric layer. The first dielectric layer has a fifth wiring layer connected to the second connection terminal. The second dielectric layer has a fifth connection terminal electrically connected to the fifth wiring layer. The first dielectric layer is located on the side of the adapter plate away from the insulator and is connected to the insulator.

24. The 2.5D bridged packaging structure according to any one of claims 10-22, characterized in that, The dielectric layer includes a third dielectric layer, a fourth dielectric layer, a fifth dielectric layer, and a sixth dielectric layer. The third dielectric layer and the fourth dielectric layer are stacked sequentially on the surface of the insulator. The third dielectric layer has a sixth wiring layer, and the fourth dielectric layer has a sixth connection terminal that is electrically connected to the sixth wiring layer. The fifth dielectric layer is disposed on the side of the adapter plate away from the insulator, and the fifth dielectric layer has a seventh wiring layer; the sixth dielectric layer covers the fifth dielectric layer; It also includes a fourth conductive post, one end of which is electrically connected to the sixth wiring layer and the other end of which is electrically connected to the seventh wiring layer.

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