Layout correction method, storage medium and terminal
By generating sacrificial and cutting patterns in the layout design, the problem of defects caused by the complexity of the layout design is solved, the uniformity of pattern size after development and the process window are improved, and the influence of parasitic capacitance is reduced.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SEMICON MFG INT (SHANGHAI) CORP
- Filing Date
- 2024-12-20
- Publication Date
- 2026-06-23
AI Technical Summary
In semiconductor technology, as the number of devices increases and the layout design becomes more complex, defects become more prominent, process windows become insufficient, and the manufacturing process is affected.
A preset number of sacrificial patterns and cutting patterns are generated on both sides of the target pattern area along the second direction. The sacrificial patterns are parallel to the first type of pattern, and the cutting patterns are used to remove the sacrificial patterns after development to ensure the uniformity of pattern density.
Without increasing the number of first-type patterns, the dimensional uniformity of the developed patterns was improved, the process window was optimized, and the impact of parasitic capacitance was reduced.
Smart Images
Figure CN122260716A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and more particularly to a layout correction method, a storage medium, and a terminal. Background Technology
[0002] With the development of semiconductor technology, the number of devices per unit area has become a key competitive advantage. Therefore, the dimensions and distances in both the X and Y directions have been significantly compressed in the layout design. At the same time, in order to improve chip performance, the layout design is optimized by removing non-functional patterns, such as patterns corresponding to parasitic capacitances. This makes the originally simple and regular pattern (1D pattern) more complex (2D pattern), prone to defects (weak points), and places very high demands on the manufacturing process.
[0003] Defects play a decisive role in process evaluation; therefore, improving the process window to mitigate defects is of paramount importance. Summary of the Invention
[0004] The technical problem solved by this invention is to provide a layout correction method, storage medium, and terminal to improve the process window and improve defects.
[0005] To solve the above-mentioned technical problems, the present invention provides a layout correction method, comprising: providing an initial layout, the initial layout including a plurality of first-type graphics and a plurality of second-type graphics, the first-type graphics being parallel to a first direction, the second-type graphics penetrating the first-type graphics along a second direction perpendicular to the first direction, the initial layout including a plurality of graphic regions and non-graphic regions located between the graphic regions, the first-type graphics being located within the graphic regions; and assigning a plurality of first-type graphics to at least one first layout, the first layout including a plurality of graphic regions and non-graphic regions located between the graphic regions, the graphic regions of the first layout being adjacent to the initial layout. The graphic regions of the first layout correspond to the non-graphic regions of the initial layout, and the first layout includes a plurality of first graphics located in the graphic region. A target graphic region is obtained from the initial layout or the first layout, and the target graphic region includes a preset number of first-type graphics or a preset number of first graphics. A preset number of sacrificial graphics and cutting graphics are generated on both sides of the target graphic region along a second direction. The sacrificial graphics are parallel to the first-type graphics, and the cutting graphics are parallel to the first-type graphics. The sacrificial graphics are located within the region of the cutting graphics. The cutting graphics and a plurality of second-type graphics are assigned to at least one second layout.
[0006] Optionally, the target graphic area includes a first target graphic area obtained from the first layout, the first target graphic area including a preset number of first graphics; the sacrifice graphic includes a first sacrifice graphic located in the first layout, the first sacrifice graphic being parallel to the first graphic, and the first sacrifice graphic being located on non-graphic areas on both sides of the first target graphic area; the cutting graphic includes a first cutting graphic located in the first layout, the first cutting graphic being parallel to the first graphic, and the first cutting graphic being located on non-graphic areas on both sides of the first target graphic area.
[0007] Optionally, the preset number of the first graphic is an integer greater than or equal to 3; the number of the first sacrificial graphic is 2, and the two first sacrificial graphics are respectively located on the non-graphic regions on both sides of the first target graphic region; the number of the first cutting graphic is 2, and the two first cutting graphics are respectively located on the non-graphic regions on both sides of the first target graphic region.
[0008] Optionally, it also includes: synchronizing the first layout to the corresponding position of the initial layout; and determining whether the spacing range between the first sacrifice graphic and the adjacent second type of graphic is less than a preset value.
[0009] Optionally, if the distance between the first sacrifice graphic and the adjacent second type graphic is greater than or equal to a preset value, the first cutting graphic and several second type graphics are assigned to at least one second layout, including: assigning several second type graphics to at least one second layout; cutting the first cutting graphic on the first layout into several segments along a first direction; and sequentially assigning the several segments to the second layout.
[0010] Optionally, if the distance between the first sacrifice graphic and the adjacent second type graphic is less than a preset value, the first cutting graphic and several second type graphics are assigned to at least one second layout, including: cutting the first cutting graphic on the initial layout into several segments along a first direction; and assigning the several segments and several second type graphics to at least one second layout according to a first allocation rule.
[0011] Optionally, it also includes: merging several first cutting graphics on the same non-graphic area into a single cutting graphic.
[0012] Optionally, in a plurality of segments, two adjacent segments may partially overlap in the first direction.
[0013] Optionally, the length of the overlapping portion of the region ranges from 5 nanometers to 10 nanometers.
[0014] Optionally, a plurality of the first type of graphics on the graphic area have a first line spacing, the first type of graphics have a first width in a second direction, and there is a first spacing between two adjacent first type of graphics, the first line spacing being the sum of the first width and the first spacing; the first graphics on the graphic area of the first layout have a second line spacing, the second line spacing being twice the first line spacing.
[0015] Optionally, the spacing between the first graphic located at the edge of the first target graphic area and the first graphic in the adjacent graphic area is greater than or equal to three times the second line spacing minus the first width.
[0016] Optionally, the dimensions of the first sacrificial graphic in the first and second directions are the same as the dimensions of the first graphic in the first and second directions; the spacing between the first graphic located at the edge of the first target graphic area and the adjacent first sacrificial graphic is greater than or equal to the second line spacing minus the first width, and less than or equal to 1.5 times the second line spacing minus the first width.
[0017] Optionally, the target graphic area includes a second target graphic area obtained from the initial layout, the second target graphic area including a preset number of first type graphics; the sacrifice graphics include a plurality of second sacrifice graphics located on the initial layout, the second sacrifice graphics being parallel to the first type graphics, and the second sacrifice graphics being located on non-graphic areas on both sides of the second target graphic area; the cutting graphics include second cutting graphics located on the initial layout, the second cutting graphics being parallel to the first type graphics, and the second cutting graphics being located on non-graphic areas on both sides of the second target graphic area.
[0018] Optionally, when assigning a plurality of the first type of graphics to at least one first layout, the method further includes: assigning a plurality of the second sacrifice graphics to at least one first layout.
[0019] Optionally, the preset number of the first type of graphics is an integer greater than or equal to 5; the preset number of the second sacrificial graphics is an integer multiple of 2, and the second sacrificial graphics are respectively located on the non-graphic regions on both sides of the second target graphic region; the preset number of the second cutting graphics is an integer multiple of 2; the second cutting graphics are respectively located on the non-graphic regions on both sides of the second target graphic region.
[0020] Optionally, it also includes: determining whether the spacing range between the second sacrifice graphic and the adjacent second type graphic is less than a preset value.
[0021] Optionally, if the distance between the second sacrifice graphic and the adjacent second type graphic is greater than or equal to a preset value, the second cutting graphic and several second type graphics are assigned to at least one second layout, including: assigning several second type graphics to at least one second layout; dividing the second cutting graphic on the initial layout into several segments along a first direction; and sequentially assigning the several segments to the second layout.
[0022] Optionally, if the distance between the second sacrifice graphic and the adjacent second type graphic is less than a preset value, the second cutting graphic and several second type graphics are assigned to at least one second layout, including: dividing the second cutting graphic on the initial layout into several segments along a first direction; and assigning the several segments and several second type graphics to at least one second layout according to a first allocation rule.
[0023] Optionally, it also includes: merging several second cutting graphics on the same non-graphic area into a single cutting graphic.
[0024] Optionally, in a plurality of segments, two adjacent segments may partially overlap in the first direction.
[0025] Optionally, the length of the overlapping portion of the region ranges from 5 nanometers to 10 nanometers.
[0026] Optionally, a plurality of the first type of graphics on the graphic area have a first line spacing, the first type of graphics have a first width in the second direction, and there is a first spacing between two adjacent first type of graphics. The first line spacing is the sum of the first width and the first spacing. The spacing between the first type of graphics located at the edge of the second target graphic area and the first type of graphics in the adjacent graphic area is greater than or equal to three times the first line spacing minus the first width.
[0027] Optionally, the dimensions of the second sacrificial graphic in the first and second directions are the same as those of the first type of graphic in the first and second directions; the spacing between the first type of graphic located at the edge of the second target graphic area and the adjacent second sacrificial graphic is: greater than or equal to the first line spacing minus the first width, and less than or equal to 1.5 times the first line spacing minus the first width.
[0028] Optionally, the spacing range between adjacent second sacrificial patterns is the same as the spacing range between the first type of pattern located at the edge of the second target pattern area and the adjacent second sacrificial pattern.
[0029] Optionally, the rules for assigning several of the first type of graphics to at least one first layout include: adjacent first type graphics in the same graphic area are assigned to different first layouts.
[0030] Optionally, a preset number of sacrifice patterns and a preset number of cutting patterns are symmetrically distributed on the non-pattern areas on both sides of the target pattern area.
[0031] Optionally, it also includes: using pattern matching technology to obtain a target graphic region from the initial layout or the first layout; using pattern matching technology to generate a preset number of sacrificial graphics and cutting graphics on both sides of the target graphic region along the second direction.
[0032] Optionally, the target graphic region is obtained from the initial layout or the first layout using pattern matching technology, including: providing a pattern matching tool; providing a graphic database, the graphic database including size information of several first-class graphics, the size information including length, width, spacing, and the number of first-class graphics in a graphic region; and using the pattern matching tool to obtain the target graphic region from the graphic database.
[0033] Optionally, the graphic database further includes: a plurality of pattern graphic regions and a preset number of sacrificial graphics and a preset number of cutting graphics that match the pattern graphic regions, the preset number of sacrificial graphics and the preset number of cutting graphics being located on both sides of the pattern graphic regions along the second direction.
[0034] Optionally, a preset number of sacrificial and cutting patterns are generated on both sides of the target graphic region along the second direction using pattern matching technology, including: after obtaining the target graphic region, obtaining a pattern graphic region identical to the target graphic region from a graphic database; replacing the target graphic region with the pattern graphic region and the sacrificial and cutting patterns matching the pattern graphic region, and generating a preset number of sacrificial and cutting patterns on both sides of the target graphic region along the second direction.
[0035] Accordingly, the present invention also provides a storage medium storing computer instructions, which execute the steps of the above method when the computer instructions are run.
[0036] Accordingly, the present invention also provides a storage terminal, including a memory and a processor, wherein the memory stores computer instructions that can be executed on the processor, and the processor executes the steps of the above method when executing the computer instructions.
[0037] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:
[0038] The layout correction method of the present invention generates a preset number of sacrificial graphics and cutting graphics on both sides of the target graphic area along a second direction. The sacrificial graphics are parallel to the first type of graphics, and the cutting graphics are used to remove the sacrificial graphics after development. The sacrificial graphics do not form the final developed graphic. Thus, without increasing the number of first type of graphics, the graphic density around the first type of graphics is increased, resulting in better uniformity of the size of the developed graphic subsequently formed by the first type of graphics. Attached Figure Description
[0039] Figures 1 to 3 This is a schematic diagram of the layout correction process in one embodiment;
[0040] Figure 4 This is a scanning electron microscope schematic diagram of a photoresist pattern formed using a modified layout in one embodiment;
[0041] Figure 5 This is a schematic flowchart of a layout correction method in one embodiment of the present invention;
[0042] Figures 6 to 11 This is a schematic diagram of the layout correction process in one embodiment of the present invention;
[0043] Figure 12 This is a flowchart illustrating a layout correction method in another embodiment of the present invention;
[0044] Figures 13 to 20 This is a schematic diagram of the layout correction process in another embodiment of the present invention. Detailed Implementation
[0045] As described in the background section, defects play a decisive role in the evaluation process. This will be explained in conjunction with specific embodiments.
[0046] Figures 1 to 3 This is a schematic diagram of the layout correction process in one embodiment; Figure 4 This is a scanning electron microscope (SEM) schematic diagram of a photoresist pattern formed using a modified layout in one embodiment.
[0047] Please refer to Figure 1 An initial layout 100 is provided, which includes a plurality of first-type graphics and a plurality of second-type graphics 103. The first-type graphics are parallel to a first direction Y, and the second-type graphics 103 penetrate the first-type graphics along a second direction X. The second direction X is perpendicular to the first direction Y. The second-type graphics are used to form a post-development graphic, and the first-type graphics can be cut off.
[0048] The first type of graphic includes a first graphic 101 (blue graphic) and a second graphic 102 (red graphic), which are arranged alternately and are assigned to different layouts.
[0049] Please refer to Figure 2 , Figure 2 A schematic diagram of assigning the first graphic 101 to the first layout 104. The first graphic 101 includes B1, B2, and B3. The target graphic 110 is the design development graphic of the first graphic 101.
[0050] The target pattern 110 is a target pattern for which the first pattern 101 has undergone optical proximity effect correction.
[0051] Please refer to Figure 3 , Figure 3 The first pattern 104 is corrected to a modified pattern 105 after optical proximity effect correction, and the first pattern 101 becomes a modified pattern 120 after optical proximity effect correction.
[0052] Please refer to Figure 4 , Figure 4 for Figure 3 The electron microscope scan image of the developed pattern 106 obtained after development of the modified pattern 105, wherein the developed pattern 106 includes the developed pattern 130 obtained via the modified pattern 120.
[0053] During the map revision process Figure 2 After the first graphic 101 is assigned to the first pattern 104, there may be a situation where there are three consecutive first graphics 101. In this case, the environment of the middle first graphic B2 is different from that of the two outer first graphics B1 and B3. Specifically, the graphic density around the middle first graphic B2 is higher, while the graphic density around the outer first graphics B1 and B3 is lower because there is no graphic on the other side. This results in different etch biases when compensating for optical proximity effect correction between the middle first graphic B2 and the outer first graphics B1 and B3. Figure 2 If the absolute value of the difference between the width of the target graphic 110 corresponding to the first graphic B2 in the middle and the width of the target graphic 110 corresponding to the first graphics B1 and B3 on both sides is at least greater than 2 nanometers, it is easy to form a shape like... Figure 4 The width of the developed pattern 130 in the middle is smaller than the width of the developed patterns 130 on both sides, forming an undesirable pattern structure that is small in the middle and large on both sides.
[0054] As technology nodes decrease, in advanced deep ultraviolet (DUV) lithography, the pattern pitch becomes increasingly smaller, almost reaching its limit. This undesirable pattern structure, with a small center and large sides, makes post-processing of the pattern corrected by the optical proximity correction model extremely demanding. The corrected pattern size on both sides is much larger than that in the center, and the width of the corrected pattern in the center even reaches the minimum value specified by the mask rule check (MRC). This is very unfriendly to subsequent exposure and can easily lead to exposure failure.
[0055] There are generally two solutions:
[0056] (1) The problem is solved by jointly optimizing the process flow of multiple departments, including Optical Proximity Correction (OPC), Lithography, Etch, and In-Process Engineering. For example, the OPC department adjusts the model and correction parameters to include more patterns of this type. The etching department adjusts the process flow to avoid the etching deviation on the sides being much greater than the etching deviation in the middle, so as to avoid the formation of a structure where the size of the middle pattern and the adjacent patterns differs too much after development. Although this can increase the process window for three primary pattern structures to some extent, it is not a fundamental solution. Forcibly adjusting each process step to make the overall process friendly to the three primary patterns will inevitably sacrifice other types of patterns, which is time-consuming, labor-intensive, and increases R&D costs.
[0057] (2) By using design rules to restrict the occurrence of three first pattern, for strict processes, advanced nodes have already restricted the existence of short first patterns with a single photomask of 2 / 3 / 4 / 5 bar. Similarly, the existence of the same length first pattern with a single photomask of 2 / 3 / 4 / 5 bar can also be restricted, thus completely eliminating the three first patterns. However, this will increase non-functional patterns, increase parasitic capacitance, and affect the electrical performance of the chip.
[0058] To address the aforementioned issues, the present invention provides a layout correction method, storage medium, and terminal. This method generates a predetermined number of sacrificial and cutting patterns on both sides of the target graphic area along a second direction. The sacrificial patterns are parallel to the first type of graphic, and the cutting patterns are used to remove the sacrificial patterns after development. The sacrificial patterns do not form the final developed graphic. This increases the graphic density around the first type of graphic without increasing the number of first-type graphics, resulting in better uniformity in the size of the subsequently developed graphic formed from the first type of graphic.
[0059] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0060] Figure 5 This is a schematic flowchart of a layout correction method in one embodiment of the present invention.
[0061] Please refer to Figure 5 The layout correction method includes:
[0062] Step S1: Provide an initial layout, which includes a plurality of first-type graphics and a plurality of second-type graphics. The first-type graphics are parallel to a first direction, and the second-type graphics penetrate the first-type graphics along a second direction. The second direction is perpendicular to the first direction. The initial layout includes a plurality of graphic regions and non-graphic regions located between the graphic regions. The first-type graphics are located in the graphic regions.
[0063] Step S2: Assign a plurality of the first type of graphics to at least one first layout, wherein the first layout includes a plurality of graphic regions and non-graphic regions located between the graphic regions, the graphic regions of the first layout correspond to the graphic regions of the initial layout, and the non-graphic regions of the first layout correspond to the non-graphic regions of the initial layout, and the first layout includes a plurality of first graphics located in the graphic regions;
[0064] Step S3: Obtain a first target graphic region from the first layout, wherein the first target graphic region includes a preset number of first graphics;
[0065] Step S4: Generate a preset number of first sacrificial graphics and first cutting graphics on both sides of the first target graphic area along the second direction. The first sacrificial graphics are parallel to the first graphic, the first cutting graphics are parallel to the first graphic, and the first sacrificial graphics are located within the area of the first cutting graphics.
[0066] Step S5: Assign the first cut graphic and several second type graphics to at least one second layout.
[0067] The layout correction method generates a preset number of first sacrificial graphics and first cutting graphics on both sides of the first target graphic area along a second direction. The first sacrificial graphics are parallel to the first type of graphics. The first cutting graphics are used to remove the first sacrificial graphics after development. The first sacrificial graphics will not form the final developed graphic. Thus, without increasing the number of first type of graphics, the graphic density around the first type of graphics is increased, resulting in better uniformity of the size of the developed graphic subsequently formed by the first type of graphics.
[0068] Next, combined Figures 6 to 11 Each step is analyzed and explained. Figures 6 to 11 This is a schematic diagram of the layout correction process in an embodiment of the present invention.
[0069] Please combine Figure 6 Continue to refer to Figure 5 Step S1: Provide an initial layout 200, which includes a plurality of first-type graphics 201 and a plurality of second-type graphics 202. The first-type graphics 201 are parallel to a first direction Y, and the second-type graphics 202 penetrate the first-type graphics 201 along a second direction X. The second direction X is perpendicular to the first direction Y. The initial layout 200 includes a plurality of graphic regions I and non-graphic regions II located between the graphic regions I. The first-type graphics 201 are located in the graphic regions I.
[0070] The first type of pattern 201 is used to form a metal layer or other patterns with repeating structures. Several first type of patterns 201 have the same size in the second direction X, and the spacing between adjacent first type of patterns 201 in the same pattern area I is the same.
[0071] The second type of pattern 202 is used to subsequently form the developed pattern of the cut first type of pattern 201, and the second type of pattern 202 will not be exposed to form the developed pattern.
[0072] The first type of graphics 201 on the graphic area I has a first line pitch 1, the first type of graphics 201 has a first width d1 in the second direction X, and there is a first spacing s1 between two adjacent first type of graphics 201. The first line pitch 1 is the sum of the first width d1 and the first spacing s1.
[0073] Please combine Figure 7 and Figure 8 Continue to refer to Figure 5 , Figure 7 and Figure 8 A schematic diagram of the first layout 210 after the first type of graphic 201 is allocated. Step S2 is executed: a plurality of the first type of graphic 201 are allocated to at least one first layout 210. The first layout 210 includes a plurality of graphic regions I and non-graphic regions II located between the graphic regions I. The graphic regions I of the first layout 210 correspond to the graphic regions I of the initial layout 200. The non-graphic regions II of the first layout 210 correspond to the non-graphic regions II of the initial layout 200. The first layout 210 includes a plurality of first graphics 203 located in the graphic regions I.
[0074] The rule for assigning several first-type graphics 201 to at least one first layout 210 includes: adjacent first-type graphics 201 on the same graphic region I are assigned to different first layouts.
[0075] In this embodiment, Figure 7 and Figure 8 This illustrates how several of the first type of graphics 201 are distributed into two first layouts 210.
[0076] The first graphic 203 on graphic area I of the first version 210 has a second line pitch 2, which is twice the first line pitch 1.
[0077] The first graphic 203 has a first width d1 in the second direction X, and there is a second spacing s2 between two adjacent first graphics 203. The second line spacing pitch2 is the sum of the first width d1 and the second spacing s2, that is, the second line spacing pitch2 = d1 + s2.
[0078] Please combine Figure 9 Continue to refer to Figure 5 Step S3: Obtain a first target graphic region I1 from the first layout 210. The first target graphic region I1 includes a preset number of first graphics 203.
[0079] The preset number of the first graphic 203 on the first target graphic area I1 is an integer greater than or equal to 3.
[0080] In this embodiment, the preset number of the first graphics 203 on the first target graphics area I1 is 3.
[0081] In this embodiment, the layout correction method further includes: using pattern matching technology to obtain a first target graphic region I1 from the first layout 210. The pattern matching technology can quickly complete the graphic search according to the requirements and obtain the first target graphic region I1.
[0082] The pattern matching technology works as follows: First, define the graphic features to be searched, register the feature graphics, and add them to the graphic database (pattern library). In addition to the feature graphics' own attribute information such as length, width, spacing, and line spacing, this graphic database can also associate the feature graphics with related information such as color, OPC graphics, and auxiliary graphics. Calling the pattern matching tool can effectively search for and replace feature graphics in the actual layout from the graphic database.
[0083] The method of obtaining a first target graphic region I1 from the first layout 210 using pattern matching technology includes: providing a pattern matching engine; providing a graphic database, the graphic database including size information of a first type of graphic 201, the size information including length, width, spacing, and the number of first type of graphics in a graphic region; and using the pattern matching engine to obtain the first target graphic region I1 from the graphic database.
[0084] Please combine Figure 9 Continue to refer to Figure 5 Step S4: Generate a preset number of first sacrificial graphics 206 and a preset number of first cutting graphics 207 on both sides of the first target graphic area I1 along the second direction X. The first sacrificial graphics 206 are parallel to the first graphic 203, the first cutting graphics 207 are parallel to the first graphic 203, and the first sacrificial graphics 206 are located within the area of the first cutting graphics 207.
[0085] In this embodiment, the first sacrificial pattern 206 is located on the non-patterned regions II on both sides of the first target pattern region I1; the first cutting pattern 207 is located on the non-patterned regions II on both sides of the first target pattern region I1.
[0086] In this embodiment, there are two first sacrificial graphics 206, and the two first sacrificial graphics 206 are respectively located on the non-graphic regions II on both sides of the first target graphic region I1; there are two first cutting graphics 207, and the two first cutting graphics 207 are respectively located on the non-graphic regions II on both sides of the first target graphic region I1.
[0087] A preset number of first sacrificial patterns 206 and a preset number of first cutting patterns 207 are symmetrically distributed on the non-pattern regions II on both sides of the first target pattern region I1.
[0088] In this embodiment, the distance D1 between the first graphic 203 located at the edge of the first target graphic area I1 and the first graphic 203 in the adjacent graphic area I is greater than or equal to 3 times the second line spacing pitch2 minus the first width d1, that is, D1≥3*pitch2-d1.
[0089] In this embodiment, the dimensions of the first sacrificial pattern 206 in the first direction Y and the second direction X are the same as the dimensions of the first pattern 203 in the first direction Y and the second direction X.
[0090] In this embodiment, the range of the spacing D2 between the first graphic 203 located at the edge of the first target graphic area I1 and the adjacent first sacrifice graphic 206 is: greater than or equal to the second line spacing pitch2 minus the first width d1, and less than or equal to 1.5 times the second line spacing pitch2 minus the first width d1, that is, pitch2-d1≤D2≤1.5*pitch2-d1.
[0091] Preferably, D2 = pitch2 - d1.
[0092] The first cutting pattern 207 is used so that the first sacrificial pattern 206 can be completely cut off by the first cutting pattern 207 during subsequent exposure to form the post-developed pattern, so that the first sacrificial pattern 206 is not exposed to form the post-developed pattern. This avoids the situation where the semiconductor structure formed after the first sacrificial pattern 206 forms the post-developed pattern will increase parasitic capacitance.
[0093] In this embodiment, the first sacrificial pattern 206 is located within the region of the first cutting pattern 207, that is, the size of the first sacrificial pattern 206 in the first direction Y is less than or equal to the size of the first cutting pattern 207 in the first direction Y, and the size of the first sacrificial pattern 206 in the second direction X is less than the size of the first cutting pattern 207 in the second direction X.
[0094] In this embodiment, the size range of the first cutting pattern 207 in the second direction X is greater than or equal to 0.5*pitch2 and less than or equal to pitch2.
[0095] Please continue to refer to this. Figure 5 Step S5: Assign the first cut pattern 207 and a plurality of second type patterns 202 to at least one second layout.
[0096] In this embodiment, before assigning the first cutting pattern 207 and a plurality of second type patterns 202 to at least one second layout, the method further includes: synchronizing the first layout 210 to the corresponding position of the initial layout 200; and determining whether the spacing range between the first sacrifice pattern 206 and the adjacent second type pattern 202 is less than a preset value.
[0097] In this embodiment, the preset value is less than or equal to pitch2. Preferably, the preset value is 0.5 * pitch2.
[0098] In one embodiment, if the spacing between the first sacrifice graphic 206 and the adjacent second type graphic 202 is greater than or equal to a preset value, the first cutting graphic 207 and a plurality of second type graphics 202 are assigned to at least one second layout, including: assigning a plurality of second type graphics 202 to at least one second layout; cutting the first cutting graphic 207 on the first layout 210 into a plurality of segments along the first direction Y; and sequentially assigning the plurality of segments to the second layout.
[0099] In this embodiment, the method of allocating the first cutting pattern 207 and the several second type patterns 202 is as follows: the second type patterns 202 are allocated separately according to the second allocation rule, and the several segments after the first cutting pattern 207 is cut are allocated separately according to the second allocation rule.
[0100] The second allocation rule is a rule for allocating the second cutting pattern 207 with a plurality of second type patterns 202. The second allocation rule satisfies the mask constraint rule (MRC), which includes: minimum line width and minimum line spacing, minimum corner spacing, and minimum area of auxiliary patterns.
[0101] Please refer to Figure 10 In this embodiment, the first cutting pattern 207 and a plurality of second type patterns 202 (refer to...) Figure 6 The first cutting pattern 207 on the first pattern 210 is divided into several segments along the first direction Y. The segments include a first segment L1, a second segment L2, a third segment L3, and a fourth segment L4 arranged in sequence. The first segment L1, the second segment L2, the third segment L3, and the fourth segment L4 are repeatedly cut along the first direction Y.
[0102] Figure 10 The diagram only illustrates the division of one of the first cutting patterns 207.
[0103] In this embodiment, among the plurality of segmented segments, adjacent segmented segments partially overlap in the first direction Y. This ensures that the first sacrificial pattern 206 can be completely removed during subsequent exposure of the segmented segments, preventing it from being exposed and forming a developed pattern.
[0104] The length of the overlapping regions ranges from 5 nanometers to 10 nanometers.
[0105] Several segments are sequentially assigned to the second layout, that is, the first segment L1, the second segment L2, the third segment L3, and the fourth segment L4 are assigned to four second layouts respectively. The assignment order of the first segment L1, the second segment L2, the third segment L3, and the fourth segment L4 is repeated until the first cut pattern 207 is assigned.
[0106] In another embodiment, if the distance between the first sacrifice graphic 206 and the adjacent second type graphic 202 is less than a preset value, the first cutting graphic 207 and a plurality of second type graphics 202 are assigned to at least one second layout, including: cutting the first cutting graphic 207 on the initial layout 200 into a plurality of cutting segments along the first direction Y; and assigning the plurality of cutting segments and a plurality of second type graphics 202 to at least one second layout according to a first allocation rule.
[0107] The first allocation rule is a rule for allocating the first cut pattern 207 and a plurality of second type patterns 202. The first allocation rule satisfies the mask constraint rule (MRC), which includes: minimum line width and minimum line spacing, minimum corner spacing, and minimum area of auxiliary patterns.
[0108] In this embodiment, the first cutting pattern 207 is allocated to several second-type patterns 202, and the second-type patterns 202 and several segments after being cut by the first cutting pattern 207 are allocated together according to the first allocation rule.
[0109] After synchronizing the first layout 210 to the corresponding position of the initial layout 200, the number of first cutting graphics 207 located on the same non-graphic area II will be greater than or equal to 2.
[0110] When the number of the first cutting pattern 207 on the same non-graphic region II is 1, refer to Figure 10 The first cutting graphic 207 on the initial layout 200 is divided into several segments along the first direction Y; then the several segments and several second type graphics 202 are allocated to at least one second layout according to the first allocation rule.
[0111] When the number of first cutting graphics 207 on the same non-graphic region II is greater than or equal to 2, please refer to Figure 11 Several first cutting patterns 207 on the same non-graphic region II are merged into one cutting pattern; then refer to Figure 10 The merged cutting pattern is divided into several segments along the first direction Y; then the several segments and several second type patterns 202 are allocated to at least one second version of the pattern according to the first allocation rule.
[0112] In a number of segments, two adjacent segments partially overlap in the first direction Y.
[0113] The length of the overlapping regions ranges from 5 nanometers to 10 nanometers.
[0114] Accordingly, embodiments of the present invention also provide a storage medium storing computer instructions, which, when executed, perform actions such as... Figure 5 The steps of the method are described.
[0115] Accordingly, embodiments of the present invention also provide a storage terminal, including a memory and a processor, wherein the memory stores computer instructions that can run on the processor, and the processor executes the computer instructions to perform actions such as... Figure 5 The steps of the method are described.
[0116] Figure 12This is a schematic flowchart of a layout correction method in another embodiment of the present invention.
[0117] Please refer to Figure 12 The layout correction method includes:
[0118] Step S10: Provide an initial layout, the initial layout including a plurality of first-type graphics and a plurality of second-type graphics, the first-type graphics being parallel to a first direction, the second-type graphics penetrating the first-type graphics along a second direction, the second direction being perpendicular to the first direction, the initial layout including a plurality of graphic regions and non-graphic regions located between the graphic regions, the first-type graphics being located in the graphic regions;
[0119] Step S20: Obtain a second target graphic region from the initial layout, wherein the second target graphic region includes a preset number of first type graphics;
[0120] Step S30: Generate a preset number of second sacrificial graphics and second cutting graphics on both sides of the second target graphic area along the second direction. The second sacrificial graphics are parallel to the first type of graphics, and the second cutting graphics are parallel to the first type of graphics. The second sacrificial graphics are located within the area of the second cutting graphics.
[0121] Step S40: Assign a plurality of the first type of graphics to at least one first layout, wherein the first layout includes a plurality of graphic regions and non-graphic regions located between the graphic regions, the graphic regions of the first layout correspond to the graphic regions of the initial layout, and the non-graphic regions of the first layout correspond to the non-graphic regions of the initial layout, and the first layout includes a plurality of first graphics located in the graphic regions;
[0122] Step S50: Assign the second cutting graphic and a plurality of the second type of graphics to at least one second layout.
[0123] The pattern correction method generates a preset number of second sacrificial patterns and second cutting patterns on both sides of the second target pattern area along the second direction. The second sacrificial patterns are parallel to the first type of pattern. The second cutting patterns are used to remove the second sacrificial patterns after development. The second sacrificial patterns will not form the final developed pattern. Thus, without increasing the number of first type of patterns, the pattern density around the first type of pattern is increased, resulting in better uniformity of the size of the developed pattern formed subsequently by the first type of pattern.
[0124] Next, combined Figures 13 to 20 Each step is analyzed and explained. Figures 13 to 20 This is a schematic diagram of the layout correction process in an embodiment of the present invention.
[0125] Please combine Figure 6Continue to refer to Figure 12 Step S10: Provide an initial layout 200, which includes a plurality of first-type graphics 201 and a plurality of second-type graphics 202. The first-type graphics 201 are parallel to a first direction Y, and the second-type graphics 202 penetrate the first-type graphics 201 along a second direction X. The second direction X is perpendicular to the first direction Y. The initial layout 200 includes a plurality of graphic regions I and non-graphic regions II located between the graphic regions I. The first-type graphics 201 are located in the graphic regions I.
[0126] The first type of pattern 201 is used to form a metal layer or other patterns with repeating structures. Several first type of patterns 201 have the same size in the second direction X, and the spacing between adjacent first type of patterns 201 in the same pattern area I is the same.
[0127] After the second type of pattern 202 is used to form the developed pattern of the cut first type of pattern 201, the second type of pattern 202 will not be exposed to form the developed pattern.
[0128] The first type of graphics 201 on the graphic area I has a first line pitch 1, the first type of graphics 201 has a first width d1 in the second direction X, and there is a first spacing s1 between two adjacent first type of graphics 201. The first line pitch 1 is the sum of the first width d1 and the first spacing s1, that is, the first line pitch 1 = d1 + s1.
[0129] Please combine Figure 13 Continue to refer to Figure 12 Step S20: Obtain a second target graphic region I2 from the initial layout 200. The second target graphic region I2 includes a preset number of first type graphics 201.
[0130] The preset number of the first type of graphics 201 on the second target graphic area I2 is an integer greater than or equal to 5.
[0131] In this embodiment, the preset number of the first type of graphics 201 on the second target graphics area I2 is 5.
[0132] In this embodiment, the layout correction method further includes: using pattern matching technology to obtain a second target graphic region I2 from the initial layout 200. The pattern matching technology can quickly complete the graphic search according to requirements and obtain the second target graphic region I2.
[0133] The pattern matching technology works as follows: First, define the graphic features to be searched, register the feature graphics, and add them to the graphic database (pattern library). In addition to the feature graphics' own attribute information such as length, width, spacing, and line spacing, this graphic database can also associate the feature graphics with related information such as color, OPC graphics, and auxiliary graphics. Calling the pattern matching tool can effectively search for and replace feature graphics in the actual layout from the graphic database.
[0134] The second target graphic region I2 is obtained from the initial layout 200 using pattern matching technology, including: providing a pattern matching engine; providing a graphic database, the graphic database including the size information of the first type of graphic 201, the size information including length, width, spacing, and the number of the first type of graphic on a graphic region; and using the pattern matching engine to obtain the second target graphic region I2 from the graphic database.
[0135] Please combine Figures 14 to 16 Continue to refer to Figure 12 Step S30: Generate a preset number of second sacrificial graphics 306 and second cutting graphics 307 on both sides of the second target graphic area I2 along the second direction X. The second sacrificial graphics 306 are parallel to the first type of graphics 201, and the second cutting graphics 307 are parallel to the first type of graphics 201. The second sacrificial graphics 306 are located within the area of the second cutting graphics 307.
[0136] A preset number of second sacrificial patterns 306 and a preset number of second cutting patterns 307 are symmetrically distributed on the non-pattern areas II on both sides of the second target pattern area I2.
[0137] The preset number of the second sacrificial pattern 306 is an integer multiple of 2, and the second sacrificial pattern 306 is located on the non-pattern regions II on both sides of the second target pattern region I2; the preset number of the second cutting pattern 307 is an integer multiple of 2; the second cutting pattern 307 is located on the non-pattern regions II on both sides of the second target pattern region I2.
[0138] Please refer to Figure 14 In this embodiment, the preset number of the first type of graphics 201 on the second target graphic area I2 is 5, the number of the second sacrificial graphics 306 is 2, and the two second sacrificial graphics 306 are respectively located on the non-graphic area II on both sides of the second target graphic area I2; the number of the second cutting graphics 307 is 2, and the two second cutting graphics 307 are respectively located on the non-graphic area II on both sides of the second target graphic area I2.
[0139] In this embodiment, the spacing D3 between the first type of graphic 201 located at the edge of the second target graphic area I2 and the first type of graphic 201 in the adjacent graphic area I is greater than or equal to 3 times the first line spacing pitch1 minus the first width d1, that is, D3≥3*pitch1-d1.
[0140] In this embodiment, the dimensions of the second sacrificial pattern 306 in the first direction Y and the second direction X are the same as the dimensions of the first type of pattern 201 in the first direction Y and the second direction X.
[0141] In this embodiment, the range of the spacing D4 between the first type of graphic 201 located at the edge of the second target graphic area I2 and the adjacent second sacrifice graphic 306 is: greater than or equal to the first line spacing pitch1 minus the first width d1, and less than or equal to 1.5 times the first line spacing pitch1 minus the first width d1, that is, pitch1-d1≤D4≤1.5*pitch1-d1.
[0142] Preferably, D4 = pitch1 - d1.
[0143] The second cutting pattern 307 is used so that the second sacrificial pattern 306 can be completely cut off by the second cutting pattern 307 during subsequent exposure to form the post-developed pattern, so that the second sacrificial pattern 306 can be prevented from being exposed to form the post-developed pattern. This avoids the situation where the semiconductor structure formed after the second sacrificial pattern forms the post-developed pattern will increase parasitic capacitance.
[0144] In this embodiment, the second sacrificial pattern 306 is located within the area of the second cutting pattern 307, that is, the size of the second sacrificial pattern 306 in the first direction Y is less than or equal to the size of the second cutting pattern 307 in the first direction Y, and the size of the second sacrificial pattern 306 in the second direction X is greater than the size of the second cutting pattern 307 in the second direction X.
[0145] In this embodiment, the size range of the second cutting pattern 307 in the second direction X is greater than or equal to 0.5*pitch1 and less than or equal to pitch1.
[0146] Please refer to Figure 15 In this embodiment, the preset number of the first type of graphics 201 on the second target graphic area I2 is 6, the number of the second sacrificial graphics 306 is 4, and the 4 second sacrificial graphics 306 are respectively located on the non-graphic area II on both sides of the second target graphic area I2; the number of the second cutting graphics is 4, and the 4 second cutting graphics are respectively located on the non-graphic area II on both sides of the second target graphic area I2.
[0147] In this embodiment, the spacing s3 between adjacent second sacrificial patterns 306 is the same as the spacing D4 between the first type of pattern 201 located at the edge of the first target pattern area and the adjacent second sacrificial pattern 306.
[0148] The range of the spacing D4 between the first type of graphic 201 located at the edge of the second target graphic area I2 and the adjacent second sacrifice graphic 306 is: greater than or equal to the first line spacing pitch1 minus the first width d1, and less than or equal to 1.5 times the first line spacing pitch1 minus the first width d1, that is, pitch1-d1≤D4≤1.5*pitch1-d1.
[0149] Please refer to Figure 16 In this embodiment, the preset number of the first type of graphics 201 on the second target graphic area I2 is 7, the number of the second sacrificial graphics 306 is 2, and the two second sacrificial graphics 306 are respectively located on the non-graphic area II on both sides of the second target graphic area I2; the number of the second cutting graphics is 2, and the two second cutting graphics are respectively located on the non-graphic area II on both sides of the second target graphic area I2.
[0150] The range of the spacing D4 between the first type of graphic 201 located at the edge of the second target graphic area I2 and the adjacent second sacrifice graphic 306 is: greater than or equal to the first line spacing pitch1 minus the first width d1, and less than or equal to 1.5 times the first line spacing pitch1 minus the first width d1, that is, pitch1-d1≤D4≤1.5*pitch1-d1.
[0151] Please combine Figure 17 and Figure 18 Continue to refer to Figure 12 Step S40: Assign a plurality of first-type graphics 201 to at least one first layout 310. The first layout 310 includes a plurality of graphic regions I and non-graphic regions II located between the graphic regions I. The graphic regions I of the first layout 310 correspond to the graphic regions I of the initial layout 200. The non-graphic regions II of the first layout 310 correspond to the non-graphic regions II of the initial layout 200. The first layout 310 includes a plurality of first graphics 303 located in the graphic regions I.
[0152] When assigning a plurality of the first type of graphics 201 to at least one first layout 310, the method further includes: assigning a plurality of the second sacrifice graphics 306 to at least one first layout 310.
[0153] The rules for allocating a number of first-type graphics 201 and second-sacrificial graphics 306 to at least one first layout 310 include: adjacent first-type graphics 201 on the same graphic region I are allocated to different first layouts 310; adjacent second-sacrificial graphics 306 on the same non-graphic region II are allocated to different first layouts 310.
[0154] In this embodiment, Figure 17 and Figure 18 This illustrates how several of the first type of graphics 201 are assigned to two first layouts 310.
[0155] The first graphic 303 on graphic area I of the first layout 310 has a second line pitch 2, which is twice the first line pitch 1.
[0156] The first graphic 303 has a first width d1 in the second direction X, and there is a second spacing s2 between two adjacent first graphics 303. The second line spacing pitch2 is the sum of the first width d1 and the second spacing s2, that is, the second line spacing pitch2 = d1 + s2.
[0157] Please combine Figure 19 Continue to refer to Figure 12 Step S50: Assign the second cutting pattern 307 and a plurality of second type patterns 202 to at least one second pattern.
[0158] In this embodiment, before assigning the second cutting pattern 307 and a plurality of second type patterns 202 to at least one second layout, the method further includes: determining whether the spacing range between the second sacrificial pattern 306 and the adjacent second type pattern 202 is less than a preset value.
[0159] In this embodiment, the preset value is less than or equal to pitch2. Preferably, the preset value is 0.5 * pitch2.
[0160] In one embodiment, if the distance between the second sacrifice graphic 306 and the adjacent second type graphic 202 is greater than or equal to a preset value, the second cutting graphic 307 and a plurality of second type graphics 202 are assigned to at least one second layout, including: assigning a plurality of second type graphics 202 to at least one second layout; cutting the second cutting graphic 307 on the initial layout 200 into a plurality of segments along the first direction X; and sequentially assigning the plurality of segments to the second layout.
[0161] In this embodiment, the second cutting pattern 307 is allocated to several second-type patterns 202, the second-type patterns 202 are allocated separately according to the second allocation rule, and several segments after the second cutting pattern 307 is cut are allocated separately according to the second allocation rule. The second allocation rule is the rule for allocating the second cutting pattern 307 to several second-type patterns 202. The second allocation rule satisfies the Mask Restriction Rule (MRC), which includes: minimum line width and minimum line spacing, minimum corner spacing, and minimum area of auxiliary patterns.
[0162] Please refer to Figure 19 In this embodiment, the second cutting pattern 307 and several second-type patterns 202 are assigned to four second layouts. The second cutting pattern 307 on the initial layout 200 is sequentially divided into several segments along the first direction Y. The several segments include a first segment L1, a second segment L2, a third segment L3, and a fourth segment L4 arranged in sequence. The first segment L1, the second segment L2, the third segment L3, and the fourth segment L4 are repeatedly divided along the first direction Y.
[0163] Figure 19 The diagram only illustrates the division of one of the second cutting patterns 307.
[0164] In this embodiment, among the plurality of segmented segments, two adjacent segmented segments partially overlap in the first direction Y. This ensures that the second sacrificial pattern 306 can be completely removed during subsequent exposure of the segmented segments, preventing it from being exposed and forming a developed pattern.
[0165] The length of the overlapping regions ranges from 5 nanometers to 10 nanometers.
[0166] Several segments are sequentially assigned to the second layout, that is, the first segment L1, the second segment L2, the third segment L3, and the fourth segment L4 are assigned to four second layouts respectively. The assignment order of the first segment L1, the second segment L2, the third segment L3, and the fourth segment L4 is repeated until the second cut pattern 307 is assigned.
[0167] In another embodiment, if the distance between the second sacrifice graphic 306 and the adjacent second type graphic 202 is less than a preset value, the second cutting graphic 307 and a plurality of second type graphics 202 are assigned to at least one second layout, including: cutting the second cutting graphic 307 on the initial layout 200 into a plurality of cutting segments along the first direction Y; and assigning the plurality of cutting segments and a plurality of second type graphics 202 to at least one second layout according to a first allocation rule.
[0168] In this embodiment, the second cutting pattern 307 is allocated to several second type patterns 202, and the second type patterns 202 and several segments after being cut by the second cutting pattern 307 are uniformly allocated according to the first allocation rule.
[0169] When the number of second cutting patterns 307 on the same non-graphic region II is 1, refer to Figure 19 The second cutting graphic 307 on the initial layout 200 is divided into several segments along the first direction Y; then the several segments and several second type graphics 202 are allocated to at least one second layout according to the first allocation rule.
[0170] When the number of second cutting graphics 307 on the same non-graphic area II is greater than or equal to 2, please refer to Figure 20 Several second cutting patterns 307 on the same non-graphic region II are merged into one cutting pattern; then refer to Figure 19 The merged cutting pattern is divided into several segments along the first direction Y; then the several segments and several second type patterns 202 are allocated to at least one second version of the pattern according to the first allocation rule.
[0171] In a number of segments, two adjacent segments partially overlap in the first direction Y.
[0172] The length of the overlapping regions ranges from 5 nanometers to 10 nanometers.
[0173] Accordingly, embodiments of the present invention also provide a storage medium storing computer instructions, which, when executed, perform actions such as... Figure 12 The steps of the method are described.
[0174] Accordingly, embodiments of the present invention also provide a storage terminal, including a memory and a processor, wherein the memory stores computer instructions that can run on the processor, and the processor executes the computer instructions to perform actions such as... Figure 12 The steps of the method are described.
[0175] In another embodiment, such as Figure 5 or Figure 6 The layout correction method uses pattern matching technology to operate, that is, it uses pattern matching technology to automatically generate a preset number of sacrificial graphics and cutting graphics on both sides of the target graphic area along the second direction.
[0176] The graphic database further includes: several pattern graphic regions and a preset number of sacrificial graphics and a preset number of cutting graphics that match the pattern graphic regions, the preset number of sacrificial graphics and the preset number of cutting graphics being located on both sides of the pattern graphic regions along the second direction.
[0177] The method employs pattern matching technology to generate a preset number of sacrificial and cutting patterns on both sides of the target graphic region along a second direction, including: after obtaining the target graphic region, obtaining a pattern graphic region identical to the target graphic region from a graphic database; replacing the target graphic region with the pattern graphic region and the sacrificial and cutting patterns matching the pattern graphic region, thereby generating a preset number of sacrificial and cutting patterns on both sides of the target graphic region along the second direction.
[0178] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. A layout correction method, characterized in that, include: An initial layout is provided, comprising a plurality of first-type graphics and a plurality of second-type graphics. The first-type graphics are parallel to a first direction, and the second-type graphics penetrate the first-type graphics along a second direction perpendicular to the first direction. The initial layout includes a plurality of graphic regions and non-graphic regions located between the graphic regions, with the first-type graphics located within the graphic regions. A plurality of first-type graphics are assigned to at least one first layout, where each first layout includes a plurality of graphic regions and non-graphic regions located between the graphic regions. The graphic regions of the first layout correspond to the graphic regions of the initial layout, and the non-graphic regions of the first layout correspond to the non-graphic regions of the initial layout. Each first layout includes a plurality of first graphics located within the graphic regions. The target graphic region is obtained from the initial layout or the first layout, and the target graphic region includes a preset number of first type graphics or a preset number of first graphics. A predetermined number of sacrificial graphics and cutting graphics are generated on both sides of the target graphic area along the second direction. The sacrificial graphics are parallel to the first type of graphics, and the cutting graphics are parallel to the first type of graphics. The sacrificial graphics are located within the area of the cutting graphics. The cut graphic and several of the second type of graphics are assigned to at least one second layout.
2. The layout correction method as described in claim 1, characterized in that, The target graphic area includes a first target graphic area obtained from the first layout, and the first target graphic area includes a preset number of first graphics; the sacrifice graphic includes a first sacrifice graphic located in the first layout, the first sacrifice graphic is parallel to the first graphic, and the first sacrifice graphic is located on non-graphic areas on both sides of the first target graphic area; the cutting graphic includes a first cutting graphic located in the first layout, the first cutting graphic is parallel to the first graphic, and the first cutting graphic is located on non-graphic areas on both sides of the first target graphic area.
3. The layout correction method as described in claim 2, characterized in that, The preset number of the first graphic is an integer greater than or equal to 3; the number of the first sacrificial graphic is 2, and the two first sacrificial graphics are respectively located on the non-graphic areas on both sides of the first target graphic area; the number of the first cutting graphic is 2, and the two first cutting graphics are respectively located on the non-graphic areas on both sides of the first target graphic area.
4. The layout correction method as described in claim 2, characterized in that, Also includes: Synchronize the first map to the corresponding position on the initial map; Determine whether the spacing between the first sacrificed graphic and the adjacent second type graphic is less than a preset value.
5. The layout correction method as described in claim 4, characterized in that, If the distance between the first sacrifice graphic and the adjacent second type graphic is greater than or equal to a preset value, the first cutting graphic and several second type graphics are assigned to at least one second layout, including: assigning several second type graphics to at least one second layout; cutting the first cutting graphic on the first layout into several segments along a first direction; and sequentially assigning the several segments to the second layout.
6. The layout correction method as described in claim 4, characterized in that, If the distance between the first sacrifice graphic and the adjacent second type graphic is less than a preset value, the first cut graphic and several second type graphics are assigned to at least one second layout, including: cutting the first cut graphic on the initial layout into several segments along a first direction; and assigning the several segments and several second type graphics to at least one second layout according to a first allocation rule.
7. The layout correction method as described in claim 6, characterized in that, Also includes: Several first-cut graphics on the same non-graphic area are merged into one cutting graphic.
8. The layout correction method as described in claim 5 or 6, characterized in that, In a number of segments, two adjacent segments partially overlap in the first direction.
9. The layout correction method as described in claim 8, characterized in that, The length of the overlapping regions ranges from 5 nanometers to 10 nanometers.
10. The layout correction method as described in claim 2, characterized in that, The first type of graphics on the graphic area have a first line spacing, the first type of graphics have a first width in the second direction, and there is a first spacing between two adjacent first type of graphics. The first line spacing is the sum of the first width and the first spacing. The first graphics on the graphic area of the first layout have a second line spacing, and the second line spacing is twice the first line spacing.
11. The layout correction method as described in claim 10, characterized in that, The spacing between the first graphic located at the edge of the first target graphic area and the first graphic in the adjacent graphic area is greater than or equal to three times the second line spacing minus the first width.
12. The layout correction method as described in claim 10, characterized in that, The dimensions of the first sacrificial graphic in the first and second directions are the same as those of the first graphic in the first and second directions; the spacing between the first graphic located at the edge of the first target graphic area and the adjacent first sacrificial graphic is greater than or equal to the second line spacing minus the first width, and less than or equal to 1.5 times the second line spacing minus the first width.
13. The layout correction method as described in claim 1, characterized in that, The target graphic region includes a second target graphic region obtained from the initial layout, the second target graphic region including a preset number of first type graphics; the sacrifice graphics include a plurality of second sacrifice graphics located on the initial layout, the second sacrifice graphics being parallel to the first type graphics, and the second sacrifice graphics being located on non-graphic regions on both sides of the second target graphic region; the cutting graphics include second cutting graphics located on the initial layout, the second cutting graphics being parallel to the first type graphics, and the second cutting graphics being located on non-graphic regions on both sides of the second target graphic region.
14. The layout correction method as described in claim 13, characterized in that, When assigning a plurality of the first type of graphics to at least one first layout, the method further includes: assigning a plurality of the second sacrifice graphics to at least one first layout.
15. The layout correction method as described in claim 13, characterized in that, The preset number of the first type of graphics is an integer greater than or equal to 5; the preset number of the second sacrificial graphics is an integer multiple of 2, and the second sacrificial graphics are located on the non-graphic regions on both sides of the second target graphic region; the preset number of the second cutting graphics is an integer multiple of 2; the second cutting graphics are located on the non-graphic regions on both sides of the second target graphic region.
16. The layout correction method as described in claim 13, characterized in that, Also includes: Determine whether the spacing between the second sacrifice graphic and the adjacent second type graphic is less than a preset value.
17. The layout correction method as described in claim 16, characterized in that, If the distance between the second sacrifice graphic and the adjacent second type graphic is greater than or equal to a preset value, the second cutting graphic and several second type graphics are assigned to at least one second layout, including: assigning several second type graphics to at least one second layout; cutting the second cutting graphic on the initial layout into several segments along a first direction; and sequentially assigning the several segments to the second layout.
18. The layout correction method as described in claim 16, characterized in that, If the distance between the second sacrifice graphic and the adjacent second type graphic is less than a preset value, the second cutting graphic and several second type graphics are assigned to at least one second layout, including: cutting the second cutting graphic on the initial layout into several cutting segments along a first direction; and assigning the several cutting segments and several second type graphics to at least one second layout according to a first allocation rule.
19. The layout correction method as described in claim 18, characterized in that, Also includes: Several second-cut graphics on the same non-graphic area are merged into one cutting graphic.
20. The layout correction method as described in claim 17 or 18, characterized in that, In a number of segments, two adjacent segments partially overlap in the first direction.
21. The layout correction method as described in claim 20, characterized in that, The length of the overlapping regions ranges from 5 nanometers to 10 nanometers.
22. The layout correction method as described in claim 13, characterized in that, The first type of graphics on the graphic area have a first line spacing, the first type of graphics have a first width in the second direction, and there is a first spacing between two adjacent first type of graphics. The first line spacing is the sum of the first width and the first spacing. The spacing between the first type of graphic located at the edge of the second target graphic area and the first type of graphic in the adjacent graphic area is greater than or equal to three times the first line spacing minus the first width.
23. The layout correction method as described in claim 22, characterized in that, The dimensions of the second sacrificial graphic in the first and second directions are the same as those of the first type of graphic in the first and second directions; the spacing between the first type of graphic located at the edge of the second target graphic area and the adjacent second sacrificial graphic is greater than or equal to the first line spacing minus the first width, and less than or equal to 1.5 times the first line spacing minus the first width.
24. The layout correction method as described in claim 23, characterized in that, The spacing range between adjacent second sacrificial patterns is the same as the spacing range between the first type of pattern located at the edge of the second target pattern area and the adjacent second sacrificial pattern.
25. The layout correction method as described in claim 1, characterized in that, The rules for assigning several first-type graphics to at least one first layout include: adjacent first-type graphics in the same graphic area are assigned to different first layouts.
26. The layout correction method as described in claim 1, characterized in that, A preset number of sacrifice graphics and a preset number of cutting graphics are symmetrically distributed on the non-graphic areas on both sides of the target graphic area.
27. The layout correction method as described in claim 1, characterized in that, Also includes: The target graphic region is obtained from the initial layout or the first layout using pattern matching technology; A preset number of sacrifice and cutting patterns are generated on both sides of the target graphic area along the second direction using pattern matching technology.
28. The layout correction method as described in claim 27, characterized in that, The method of obtaining a target graphic region from an initial layout or a first layout using pattern matching technology includes: providing a pattern matching tool; providing a graphic database, the graphic database including size information of several first-class graphics, the size information including length, width, spacing, and the number of first-class graphics in a graphic region; and using the pattern matching tool to obtain the target graphic region from the graphic database.
29. The layout correction method as described in claim 28, characterized in that, The graphic database further includes: several pattern graphic regions and a preset number of sacrificial graphics and a preset number of cutting graphics that match the pattern graphic regions, the preset number of sacrificial graphics and the preset number of cutting graphics being located on both sides of the pattern graphic regions along the second direction.
30. The layout correction method as described in claim 29, characterized in that, The method employs pattern matching technology to generate a preset number of sacrificial and cutting patterns on both sides of the target graphic region along a second direction, including: after obtaining the target graphic region, obtaining a pattern graphic region identical to the target graphic region from a graphic database; replacing the target graphic region with the pattern graphic region and the sacrificial and cutting patterns matching the pattern graphic region, thereby generating a preset number of sacrificial and cutting patterns on both sides of the target graphic region along the second direction.
31. A storage medium storing computer instructions thereon, characterized in that, When the computer instructions are executed, they perform the steps of the method according to any one of claims 1 to 30.
32. A storage terminal, comprising a memory and a processor, wherein the memory stores computer instructions capable of running on the processor, characterized in that, When the processor executes the computer instructions, it performs the steps of the method according to any one of claims 1 to 30.