A broadband solid-state power amplifier and pulse modulation method

Abstract

The application discloses a kind of broadband solid-state power amplifier and pulse modulation method, belong to amplifier technical field, including amplifier unit, detection control unit, power module and power detection module, it solves the technical problem of improving the protection of GaN power device in high-power power amplifier, accurate control amplitude and improve the maintainability of modularity, the local grid negative voltage management of the present application is realized, power-on power-down timing control, drain pulse modulation and temperature monitoring, effectively avoid GaN chip damage due to power timing error or local overheating, significantly improve the reliability of the whole machine, support open-loop gain control and closed-loop automatic level control ALC two modes, effectively reduce the impact of pulse current on power bus, improve the flatness of output pulse top, ensure the consistency of each unit radio frequency phase and power supply timing, improve the synthesis efficiency, can be quickly positioned and replaced, greatly reduce the average repair time, improve the availability and usability of equipment.

Description

Technical Field

[0001] This invention belongs to the field of amplifier technology, and particularly relates to a broadband solid-state power amplifier and a pulse modulation method. Background Technology

[0002] In the microwave and millimeter-wave frequency bands, especially the Ka-band covering 26.5 GHz to 40 GHz, high-power solid-state power amplifiers are core equipment in radar, electronic countermeasures, communication, and testing systems. As systems increasingly demand higher operating range, interference immunity, and signal quality, more stringent challenges are posed to power amplifiers in terms of output power, efficiency, reliability, and controllability.

[0003] Currently, high-power amplification solutions in this frequency band mainly face the following problems: First, although traditional traveling wave tube amplifiers can achieve high power output, they have inherent defects such as large size, limited lifespan, complex power supply, and long warm-up time, making it difficult to meet the requirements of modern systems for miniaturization, high reliability, and fast response.

[0004] Second, existing solid-state power amplifiers often employ multi-chip combining architectures to achieve 200W output in the Ka-band. However, existing solutions lack integration in combining network design, power management, and protection control. Specifically, each amplification unit lacks independent bias timing management and pulse modulation capabilities, making GaN power chips susceptible to damage due to timing errors during power-on and power-off processes; temperature monitoring and protection response are lagging, and local overheating cannot be detected and addressed in a timely manner; and the coupling design between the power combining network and the power distribution network is insufficient, resulting in large power bus surges and output waveform distortion in pulsed operating mode.

[0005] Third, in terms of amplitude control, existing solutions typically only support single open-loop gain adjustment or simple closed-loop power stabilization, lacking a flexible dual-mode switching mechanism. Open-loop adjustment fails to effectively compensate for gain errors caused by frequency response, resulting in poor gain flatness across the entire frequency band; closed-loop amplitude stabilization lacks frequency adaptive capability, leading to inconsistent amplitude stabilization accuracy at different frequency points, affecting the accuracy of testing and applications.

[0006] Fourth, in terms of modularity and maintainability, existing high-power amplifiers often adopt a highly integrated overall structure. Once a certain amplification unit or control circuit fails, the whole machine is difficult to repair and the replacement cost is high, which is not conducive to rapid field support and continuous system operation. Summary of the Invention

[0007] The purpose of this invention is to provide a broadband solid-state power amplifier and a pulse modulation method, which solves the technical problems of improving the protection of GaN power devices in high-power amplifiers, accurately controlling amplitude, and improving modular maintainability.

[0008] To achieve the above objectives, the present invention adopts the following technical solution: A broadband solid-state power amplifier includes an amplifier unit, a detection and control unit, a power supply module, and a power supply detection module; The amplifier unit includes a pre-stage driver module, a secondary driver module, a final stage synthesis module, and a coupling detector module cascaded in sequence, used to amplify the power of radio frequency signals; The detection and control unit includes an ADC sampling circuit, a main measurement and control chip, a communication module, and a front panel interaction module; the ADC sampling circuit, the communication module, and the front panel interaction module are all connected to the main measurement and control chip to realize signal acquisition, communication, and human-machine interaction; The power module is used to supply power to the amplifier unit and the detection control unit; The power detection module is connected to the power module and the ADC sampling circuit respectively, and is used to detect the voltage signal and current signal output by the power module and send them to the ADC sampling circuit. The ADC sampling circuit is also connected to the front-end driving module and the coupling detection module respectively, and is used to collect the input detection voltage output by the front-end driving module and the forward detection voltage and reverse detection voltage output by the coupling detection module. The main measurement and control chip is connected to the pre-stage drive module and the power module respectively, and is used to control the attenuation of the pre-stage drive module according to the acquired detection voltage, and to perform power management according to the detection signal of the power detection module.

[0009] Preferably, the final stage synthesis module includes multiple four-channel GaN power amplification and synthesis modules, and each pair of four-channel GaN power amplification and synthesis modules is equipped with a power amplifier sub-module; The power amplifier submodule is used to control the bias voltage, operating timing, and operating temperature of the GaN power amplifiers in the two connected four-channel GaN power amplifier combining modules.

[0010] Preferably, the pre-drive module is equipped with an input detector for detecting the power of the input radio frequency signal and outputting the input detection voltage; The coupling detection module is equipped with a forward detector and a reverse detector, which are used to detect the forward detection voltage and the reverse detection voltage generated in the coupling detection module, respectively. The main measurement and control chip is used to adjust the attenuation of the front-end drive module according to the forward detection voltage to perform closed-loop stable control of the output power, and to perform input overload protection and output mismatch protection according to the input detection voltage and the reverse detection voltage, respectively.

[0011] Preferably, the pre-amplifier module includes a first attenuator, a first amplifier, a power divider, a detector, a second amplifier, a second attenuator, a third amplifier, and a fourth amplifier that are connected in sequence. One output of the power divider is connected to the detector, and the detector outputs the input detection voltage; The control terminals of the first attenuator and the second attenuator are respectively connected to the main measurement and control chip.

[0012] Preferably, the secondary drive module includes two waveguide power dividers, two four-channel GaN power amplifier and combining modules, a power amplifier submodule, and two waveguide combiners; the two waveguide power dividers are used to split the input signal into two paths, which are respectively sent to the two four-channel GaN power amplifier and combining modules, and their outputs are combined into one path by the two waveguide combiners; The final stage synthesis module includes a sixteen-channel waveguide power divider, sixteen four-channel GaN power amplifier and synthesis modules, eight power amplifier sub-modules, and a sixteen-channel waveguide synthesizer. The sixteen-channel waveguide power divider is used to divide the input signal into sixteen channels, which are respectively sent to the sixteen four-channel GaN power amplifier and synthesis modules, and their outputs are combined into one channel by the sixteen-channel waveguide synthesizer. The coupling detection module includes a coupler, a forward detector, and a reverse detector; the input terminal of the coupler is connected to the output terminal of the final stage synthesis module, and its output terminal is used to output an amplified signal; the forward detector and the reverse detector are both connected to the coupler, and output the forward detection voltage and the reverse detection voltage respectively.

[0013] Preferably, the power amplifier submodule includes a modulation circuit, a timing circuit, and an over-temperature protection circuit. The modulation circuit is connected to the main measurement and control chip and is used to receive the pulse envelope signal and control the drain power supply of the GaN power amplifier in the connected four-channel GaN power amplifier synthesis module according to the pulse envelope signal. The timing circuit is connected to the power supply module and is used to generate the gate negative bias voltage required by the GaN power amplifier and control the power-on and power-off timing. The over-temperature protection circuit includes a temperature sensor, which monitors the operating temperature and outputs a temperature signal to the main measurement and control chip.

[0014] Preferably, the modulation circuit includes a voltage monitoring unit for monitoring the drain supply voltage status, a logic control unit for outputting a drive signal when the drain supply voltage is normal and the pulse envelope signal is received, and a power switching unit for controlling the on / off state of the drain supply according to the drive signal. The timing circuit includes a negative voltage feed circuit for supplying negative gate voltage to each GaN power amplifier and a negative voltage protection circuit for detecting whether the negative gate voltage is normal and outputting a protection signal to the main measurement and control chip.

[0015] Preferably, the power supply module includes an AC / DC conversion circuit for converting AC mains power into multiple DC voltage outputs; the multiple DC voltages include at least a first voltage for supplying the drain of the GaN power amplifier, a second voltage for supplying the gate negative bias of the GaN power amplifier, and a third voltage for supplying the detector and control circuit.

[0016] A pulse modulation method for a broadband solid-state power amplifier includes the following steps: When the broadband solid-state power amplifier is powered on, the user selects the operating mode command through the front panel interaction module. The front panel interaction module sends the operating mode command to the main measurement and control chip. The operating modes include open-loop gain control mode and closed-loop automatic level control (ALC) mode. When the working mode is open-loop gain control mode, the main measurement and control chip obtains the frequency information of the current input signal, and compensates and corrects the attenuation control code set by the user according to the preset frequency-gain correction data table. The corrected control code is sent to the front-end drive module to control its attenuation, thereby performing gain control in the entire frequency band. When the working mode is closed-loop ALC control mode, the main measurement and control chip executes the closed-loop adjustment process, which specifically includes: according to the target output power set by the user and the frequency information of the current input signal, searching for the corresponding target detector voltage value from the pre-calibrated and stored detector voltage-power correspondence database; The forward detection voltage output by the forward detector in the coupled detection module is acquired in real time, and the forward detection voltage is compared with the target detection voltage value: if the forward detection voltage is lower than the target detection voltage value, the attenuation of the front-stage drive module is reduced; if the forward detection voltage is higher than the target detection voltage value, the attenuation of the front-stage drive module is increased. Repeat the above comparison and attenuation adjustment steps until the error between the forward detection voltage and the target detection voltage does not exceed the preset threshold, so that the output power of the broadband solid-state power amplifier remains stable.

[0017] Preferably, the main measurement and control chip sends the corrected control code or the adjusted attenuation control code to the second attenuator in the front-end drive module through a data interface.

[0018] This invention discloses a broadband solid-state power amplifier and pulse modulation method, which solves the technical problems of improving the protection, precise amplitude control, and modular maintainability of GaN power devices in high-power amplifiers. Each four-channel GaN power amplifier combining module is equipped with an independent power amplifier sub-module, enabling localized gate negative voltage management, power-on / power-off timing control, drain pulse modulation, and temperature monitoring. This architecture reduces the protection response time to the microsecond level, effectively preventing damage to GaN chips due to power supply timing errors or localized overheating, significantly improving overall reliability. Through the main test and control chip, in conjunction with the pre-stage electrically adjustable attenuator and forward detector, it supports both open-loop gain control and closed-loop automatic level control (ALC) modes. In open-loop mode, frequency information is used to compensate and correct the attenuation control code, achieving precise gain control across the entire frequency band. In closed-loop mode, the output power is stabilized at a preset level by real-time comparison of the forward detector voltage with the target value, with an error not exceeding 10mV. The two modes can be flexibly switched, taking into account the flexibility of testing scenarios. To ensure stability during long-term operation, the sixteen four-channel power amplifier combining units in the final stage are grouped in pairs and powered by interleaved pulse drains driven by the modulation circuit. This effectively reduces the impact of pulse current on the power bus and improves the flatness of the output pulse top. Simultaneously, the waveguide binary combining network is matched with the power supply grouping, ensuring consistency in RF phase and power supply timing among the units and improving combining efficiency. The entire device is functionally divided into four independent modules: pre-stage driver, secondary driver, final stage combining, and coupling detector. The sixteen four-channel combining units in the final stage and their corresponding eight power amplifier sub-modules all use uniformly sized replaceable units. In the event of a unit failure, it can be quickly located and replaced, significantly reducing the mean time to repair and improving the reliability and availability of the equipment. Attached Figure Description

[0019] Figure 1 This is a block diagram illustrating the overall principle of the present invention; Figure 2 This is a schematic block diagram of the front-end driver module in this embodiment; Figure 3 This is a schematic diagram of the overall architecture of the secondary driver module in this embodiment; Figure 4 This is a schematic block diagram of the secondary driver module in this embodiment; Figure 5 This is a schematic diagram of the overall architecture of the final-stage synthesis module in this embodiment; Figure 6 This is a block diagram of the power amplifier submodule in this embodiment; Figure 7 This is a schematic diagram of the interface of the ADC sampling circuit in this embodiment; Figure 8 This is a schematic diagram of signal processing in this embodiment; Figure 9This is a circuit diagram of the voltage monitoring unit in this embodiment; Figure 10 This is a circuit diagram of the logic control unit in this embodiment; Figure 11 This is a circuit diagram of the power switching unit in this embodiment; Figure 12 This is a circuit diagram of the negative voltage protection circuit in this embodiment; Figure 13 This is a circuit diagram of the over-temperature protection circuit in this embodiment. Detailed Implementation Example

[0020] Depend on Figures 1-13 The broadband solid-state power amplifier and pulse modulation method shown include an amplifier unit, a detection and control unit, a power supply module, and a power supply detection module. The amplifier unit operates in a frequency band from 26.5 GHz to 40 GHz and is used to amplify the power of radio frequency signals input in this frequency band, with an output power of not less than 200W.

[0021] The amplifier unit includes a pre-stage driver module, a secondary driver module, a final stage synthesis module, and a coupling detector module cascaded in sequence, used to amplify the power of radio frequency signals; The detection and control unit includes an ADC sampling circuit, a main measurement and control chip, a communication module, and a front panel interaction module; the ADC sampling circuit, the communication module, and the front panel interaction module are all connected to the main measurement and control chip to realize signal acquisition, communication, and human-machine interaction; The power module is used to supply power to the amplifier unit and the detection control unit; The power detection module is connected to the power module and the ADC sampling circuit respectively, and is used to detect the voltage signal and current signal output by the power module and send them to the ADC sampling circuit. The ADC sampling circuit is also connected to the front-end driving module and the coupling detection module respectively, and is used to collect the input detection voltage output by the front-end driving module and the forward detection voltage and reverse detection voltage output by the coupling detection module. The main measurement and control chip is connected to the front-end drive module and the power module respectively, and is used to control the attenuation of the front-end drive module according to the acquired detection voltage, and to perform power management according to the detection signal of the power detection module. The final stage synthesis module includes multiple four-channel GaN power amplification and synthesis modules, and each pair of four-channel GaN power amplification and synthesis modules is equipped with a power amplifier sub-module. The power amplifier submodule is used to control the bias voltage, operating timing, and operating temperature of the GaN power amplifiers in the two connected four-channel GaN power amplifier combining modules.

[0022] The final stage synthesis module includes multiple four-channel GaN power amplification synthesis modules. Each pair of four-channel GaN power amplification synthesis modules is equipped with a power amplifier submodule. The power amplifier submodule is used to control the bias voltage, operating timing and operating temperature of the GaN power amplifier chip in the two four-channel GaN power amplification synthesis modules respectively.

[0023] The front-end drive module is equipped with an input detector for detecting the power of the input radio frequency signal and outputting the input detection voltage; The coupling detection module is equipped with a forward detector and a reverse detector, which are used to detect the forward detection voltage and the reverse detection voltage generated in the coupling detection module, respectively. The main measurement and control chip is used to adjust the attenuation of the front-end drive module according to the forward detection voltage to perform closed-loop stable control of the output power, and to perform input overload protection and output mismatch protection according to the input detection voltage and the reverse detection voltage, respectively.

[0024] The pre-stage driver module is equipped with an input detector for detecting the power of the input RF signal and outputting an input detection voltage. The coupling detection module is equipped with a forward detector and a reverse detector for detecting the forward detection voltage and the reverse detection voltage generated in the coupling detection module, respectively. The input detection voltage, forward detection voltage, and reverse detection voltage are all connected to the ADC sampling circuit, and after analog-to-digital conversion, they are sent to the main measurement and control chip. The main measurement and control chip adjusts the attenuation of the pre-stage driver module according to the forward detection voltage to perform closed-loop stable control of the output power, and at the same time performs input overload protection and output mismatch protection according to the input detection voltage and the reverse detection voltage, respectively.

[0025] The pre-amplifier module includes a first attenuator, a first amplifier, a power divider, a detector, a second amplifier, a second attenuator, a third amplifier, and a fourth amplifier that are connected in sequence. One output of the power divider is connected to the detector, and the detector outputs the input detection voltage; The control terminals of the first attenuator and the second attenuator are respectively connected to the main measurement and control chip.

[0026] In this embodiment, the pre-stage driver module includes a first attenuator, an amplifier IC1, a power divider, a detector DT1, an amplifier IC2, a second attenuator, an amplifier IC3, and an amplifier IC4 connected in sequence. The first attenuator is connected to an external signal Ain to be processed, and the amplifier IC4 outputs a pre-stage signal Sout1, which is input to the secondary driver module. One output of the power divider is connected to detector DT1, and detector DT1 outputs the input detection voltage; the control terminals of the first attenuator and the second attenuator are respectively connected to the main measurement and control chip; The secondary drive module includes two waveguide power dividers, two four-channel GaN power amplifier and combining modules, a power amplifier submodule, and two waveguide power dividers. The two waveguide power dividers are used to split the input signal into two paths, which are respectively sent to the two four-channel GaN power amplifier and combining modules, and their outputs are combined into one path by the two waveguide power dividers. The final stage synthesis module includes a sixteen-channel waveguide power divider, sixteen four-channel GaN power amplifier and synthesis modules, eight power amplifier sub-modules, and a sixteen-channel waveguide synthesizer. The sixteen-channel waveguide power divider is used to divide the input signal into sixteen channels, which are respectively sent to the sixteen four-channel GaN power amplifier and synthesis modules, and their outputs are combined into one channel by the sixteen-channel waveguide synthesizer. The coupling detection module includes a coupler, a forward detector, and a reverse detector; the input terminal of the coupler is connected to the output terminal of the final stage synthesis module, and its output terminal is used to output an amplified signal; the forward detector and the reverse detector are both connected to the coupler, and output the forward detection voltage and the reverse detection voltage respectively.

[0027] In this embodiment, the secondary drive module includes a two-way waveguide power divider, two four-way GaN power amplification and combining modules, a power amplifier submodule, and a two-way waveguide combiner. The two-way waveguide power divider splits the input pre-stage signal Sout1 into two paths, which are then fed into the two four-way GaN power amplification and combining modules respectively. The outputs of these two four-way GaN power amplification and combining modules are combined into a single secondary signal Sout2 by the two-way waveguide combiner and output to the final stage combining module. The power amplifier submodule is connected to two of the four-channel GaN power amplifier and combining modules respectively; The final stage combining module includes a 16-channel waveguide power divider, 16 four-channel GaN power amplifier combining modules, eight power amplifier sub-modules, and a 16-channel waveguide combiner. The 16-channel waveguide power divider divides the input secondary signal Sout2 into 16 channels, which are then fed into the 16 four-channel GaN power amplifier combining modules respectively. In these sixteen four-channel GaN power amplification and combining modules, the output of each four-channel GaN power amplification and combining module is connected to the sixteen-channel waveguide combiner, and every two four-channel GaN power amplification and combining modules are connected to one of the power amplifier sub-modules. The sixteen-channel waveguide synthesizer outputs the final stage signal Sout3; The coupled detection module includes a coupler, a forward detector, and a reverse detector. The input of the coupler is connected to the final stage signal Sout3, and the output is the final processed amplified signal Sout4. Both the forward detector and the reverse detector are connected to the coupler. The forward detector and the reverse detector output the forward detection voltage and the reverse detection voltage, respectively.

[0028] The first attenuator is model 28WPFA10-40; the amplifier IC1 is model CMD281C3; the power divider is model PDW05758; the detector DT1 is model ADL6010; the amplifier IC2 is model HMC994; the second attenuator is model HMC939A; the amplifier IC3 is model HMC994; the amplifier IC4 is model MAAM-011275; the coupler is model 28WDXC2.4-40; the forward detector is model ADL6010; and the reverse detector is model ADL6010. The ADC sampling circuit consists of an ADC chip and its peripheral circuits. The ADC chip is model ADS52J90. The main measurement and control chip is model AM3358. The communication module includes an RS422 communication chip and a LAN communication chip, both of which are connected to the main measurement and control chip. The RS422 communication chip is model MAX3490. The LAN communication chip is model LAN8720A. The power module includes an AC / DC conversion circuit for converting external AC mains power into multiple DC voltage outputs. The power module outputs four DC voltages: a first output of +28V (28VIN), used to supply the drain of each GaN power amplifier; a second output of -5V, used to supply the gate negative bias of each GaN power amplifier; a third output of +5V, used to supply each detector and control circuit; and a fourth output of +12V, used to supply the external cooling fan. The output control terminal of the power module is connected to the main measurement and control chip, which controls the on / off state of the 28VIN power supply via an enable signal.

[0029] The AC / DC power supply can be an LCC1200-28U-4P, 1200W AC / DC power supply with output +28V / 42.8A, input 90-264VAC, efficiency 93.5%, and substrate operating temperature -40~+85℃.

[0030] The +12V output power module is a 12VDC / DC module; the 5V power chip can be the TPS5430; the -5V power chip can be generated from +5V by the LM2662.

[0031] In this embodiment, the +12V output of the power supply module is provided by an independent 12V DC / DC module; the +5V output is generated from +28V by a buck converter (such as TPS5430); and the -5V output is generated from +5V by a charge pump (such as LM2662).

[0032] The four-channel GaN power amplifier and combining module includes a four-channel waveguide power divider, four GaN power amplifiers, and a four-channel waveguide combiner. The four GaN power amplifiers are connected in parallel. The input terminals of the four GaN power amplifiers are all connected to the four-channel waveguide power divider, and the output terminals of the four GaN power amplifiers are all connected to the four-channel waveguide combiner. The GaN power amplifier uses a GaN monolithic microwave integrated circuit chip with an operating frequency band covering 26.5 GHz to 40 GHz. The model of the GaN power amplifier is CMD310C3.

[0033] The power amplifier submodule includes a modulation circuit, a timing circuit, and an over-temperature protection circuit. The modulation circuit is connected to the main measurement and control chip and is used to receive the pulse envelope signal and control the drain power supply of the GaN power amplifier in the connected four-channel GaN power amplifier synthesis module according to the pulse envelope signal. The timing circuit is connected to the power supply module and is used to generate the gate negative bias voltage required by the GaN power amplifier and control the power-on and power-off timing. The over-temperature protection circuit includes a temperature sensor, which monitors the operating temperature and outputs a temperature signal to the main measurement and control chip.

[0034] The modulation circuit includes a voltage monitoring unit for monitoring the drain supply voltage status, a logic control unit for outputting a drive signal when the drain supply voltage is normal and the pulse envelope signal is received, and a power switching unit for controlling the on / off state of the drain supply according to the drive signal. The timing circuit includes a negative voltage feed circuit for supplying negative gate voltage to each GaN power amplifier and a negative voltage protection circuit for detecting whether the negative gate voltage is normal and outputting a protection signal to the main measurement and control chip.

[0035] The power module includes an AC / DC conversion circuit for converting AC mains power into multiple DC voltage outputs; the multiple DC voltages include at least a first voltage for supplying the drain of the GaN power amplifier, a second voltage for supplying the negative bias voltage of the gate of the GaN power amplifier, and a third voltage for supplying the detector and control circuit.

[0036] In this embodiment, the first attenuator is connected to the external input signal Ain, and the first attenuator is also connected to the input terminal of amplifier IC1. The output terminal of amplifier IC1 is connected to the input terminal of the power divider, and the two output terminals of the power divider are respectively connected to the input terminals of detector DT1 and amplifier IC2. The output terminal of amplifier IC2 is connected to the second attenuator, the second attenuator is connected to the input terminal of amplifier IC3, the output terminal of amplifier IC3 is connected to the input terminal of amplifier IC4, and the output terminal of amplifier IC4 outputs the signal Sout1. Detector DT1 is connected to one AD input interface of the ADC sampling circuit; The first attenuator and the second attenuator are connected to the main measurement and control chip through different SPI interfaces; The secondary drive module includes a two-channel waveguide power divider PD00, a four-channel GaN power amplification and combining module U101, a power amplifier submodule M00, a four-channel GaN power amplification and combining module U102, and a two-channel waveguide combiner PC00. After the signal Sout1 is input to the two-channel waveguide power divider PD00, it is split into two channels: one channel is input to the four-channel GaN power amplification and combining module U101, and the other channel is input to the four-channel GaN power amplification and combining module U102. Both the four-channel GaN power amplification and combining module U101 and the four-channel GaN power amplification and combining module U102 are connected to the two-channel waveguide combiner PC00. The two-channel waveguide synthesizer PC00 outputs signal Sout2; Both the four-channel GaN power amplifier and combining module U101 and the four-channel GaN power amplifier and combining module U102 are connected to the power amplifier submodule M00. The power amplifier submodule M00 is connected to the main measurement and control chip; The final-stage combining module includes a sixteen-channel waveguide power divider, a sixteen-channel waveguide combiner, and four GaN power amplification and combining modules U201, U202, U203, U204, U205, U206, U207, U208, and U209. GaN power amplifier combining module U210, four-channel GaN power amplifier combining module U211, four-channel GaN power amplifier combining module U212, four-channel GaN power amplifier combining module U213, four-channel GaN power amplifier combining module U214, four-channel GaN power amplifier combining module U215, four-channel GaN power amplifier combining module U216, power amplifier submodule M01, power amplifier submodule M02, power amplifier submodule M03, power amplifier submodule M04, power amplifier submodule M05, power amplifier submodule M06, power amplifier submodule M07 and power amplifier submodule M08; After the signal Sout2 is input to the 16-channel waveguide power divider, it is split into 16 signals, which are then input to the four-channel GaN power amplification and synthesis modules U201, U202, U203, U204, U205, U206, U207, U208, U209, U210, U211, U212, U213, U214, U215, and U216, respectively. Four-channel GaN power amplification and combining modules U201, U202, U203, U204, U205, U206, U207, U208, U209, U210, U211, U212, U213, U214, U215, and U216 are all connected to a sixteen-channel waveguide combiner, which outputs signal Sout3. Both the four-channel GaN power amplifier and combining module U201 and the four-channel GaN power amplifier and combining module U202 are connected to the power amplifier submodule M01. Both the four-channel GaN power amplifier and combining module U203 and the four-channel GaN power amplifier and combining module U204 are connected to the power amplifier submodule M02. Both the four-channel GaN power amplifier and combining module U205 and the four-channel GaN power amplifier and combining module U206 are connected to the power amplifier submodule M03. Both the four-channel GaN power amplifier and combining module U207 and the four-channel GaN power amplifier and combining module U208 are connected to the power amplifier submodule M04. Both the four-channel GaN power amplifier and combining module U209 and the four-channel GaN power amplifier and combining module U210 are connected to the power amplifier submodule M05. Both the four-channel GaN power amplifier and combining module U211 and the four-channel GaN power amplifier and combining module U212 are connected to the power amplifier submodule M06. Both the four-channel GaN power amplifier and combining module U213 and the four-channel GaN power amplifier and combining module U214 are connected to the power amplifier submodule M07. Both the four-channel GaN power amplifier and combining module U215 and the four-channel GaN power amplifier and combining module U216 are connected to the power amplifier submodule M08. Power amplifier submodules M01, M02, M03, M04, M05, M06, M07, and M08 are all connected to the main measurement and control chip. The coupling detection module includes a coupler, detector DT2 and detector DT3. Signal Sout3 is input to the coupler, and the coupler outputs signal Sout4. The coupler is also connected to detectors DT2 and DT3 respectively. Detectors DT2 and DT3 are also connected to the ADC sampling circuit, which are used to detect the forward and reverse power of the Sout4 signal output by the coupler, respectively, and convert them into forward and reverse detection voltages, which are then transmitted to the ADC sampling circuit for analog-to-digital conversion.

[0037] The coupler is a WR28 waveguide dual directional coupler, with an operating frequency band covering 26.5 GHz to 40 GHz and a coupling degree of 40 dB ± 1 dB.

[0038] In this embodiment, the externally input RF signal Ain first enters the pre-amplifier module. The first attenuator in the pre-amplifier module matches and adjusts the amplitude of the input signal before sending it to amplifier IC1 for initial amplification. The amplified signal is then split into two paths by a power divider. One path is sent to detector DT1 to detect the input power, while the other path is further amplified by amplifier IC2, has its gain adjusted by a second attenuator, and is then cascaded by amplifiers IC3 and IC4 to output a pre-amplifier signal Sout1 with a predetermined power level. The attenuation of both the first and second attenuators is controlled by the main measurement and control chip via an SPI interface to achieve precise adjustment of the overall gain. The input detection voltage output by detector DT1 is sent to the ADC sampling circuit for input overload protection detection.

[0039] After the pre-stage signal Sout1 enters the secondary drive module, it is first split into two paths by a two-way waveguide power divider, and then fed into two four-way GaN power amplifier combining modules. Inside each four-way GaN power amplifier combining module, the input signal is split into four paths by a four-way waveguide power divider, which drive four parallel GaN power amplifiers for power amplification. The amplified four signals are then combined into one output by a four-way waveguide combiner. The output signals of the two four-way GaN power amplifier combining modules are then combined into one secondary signal Sout2 by a two-way waveguide combiner. The power amplifier submodule M00 corresponding to this secondary drive module is responsible for controlling the bias voltage and power-on timing of the GaN power amplifiers in the two four-way GaN power amplifier combining modules, and controlling the on / off of their drain power supply according to the pulse envelope signal of the main measurement and control chip to realize the pulse working mode.

[0040] After the secondary signal Sout2 enters the final stage combining module, it is first split into sixteen signals by a sixteen-channel waveguide power divider, and then fed into sixteen four-channel GaN power amplification and combining modules. Each four-channel GaN power amplification and combining module operates in the same way as the four-channel GaN power amplification and combining module in the secondary drive module, performing four-channel distribution, four-channel GaN power amplification, and four-channel combining on its input signal. The output signals of all sixteen four-channel GaN power amplification and combining modules are connected to the sixteen-channel waveguide combiner, ultimately combining into a single high-power final stage signal Sout3. Eight power amplifier submodules M01 to M08 are configured with one four-channel GaN power amplification and combining module for every two modules, controlling the bias voltage, operating timing, and drain pulse power supply of the GaN power amplifier in the corresponding module, and monitoring the operating temperature of each module in real time.

[0041] After the final stage signal Sout3 enters the coupled detector module, it outputs the final amplified signal Sout4 through the main path of the coupler. The coupler simultaneously sends the forward coupled signal and the reverse coupled signal to the forward detector and the reverse detector, respectively. The two detectors output the forward detection voltage and the reverse detection voltage to the ADC sampling circuit, respectively, for forward power monitoring, reflected power monitoring, and closed-loop output power control.

[0042] The power amplifier submodule includes a modulation circuit, a timing circuit, and an over-temperature protection circuit; The modulation circuit is connected to the main measurement and control chip and is used to receive the pulse envelope signal output by the main measurement and control chip, and control the drain power supply of the GaN power amplifier in the connected four-channel GaN power amplifier synthesis module according to the pulse envelope signal. The timing circuit is connected to the power supply module to generate the gate negative bias voltage required by the GaN power amplifier and to control the power-on and power-off timing. The over-temperature protection circuit includes a temperature sensor and its peripheral circuitry, used to monitor the operating temperature of the four-channel GaN power amplifier and combining module, and output a temperature signal to the main measurement and control chip.

[0043] The modulation circuit includes a voltage monitoring unit, a logic control unit, and a power switching unit; the input terminal of the voltage monitoring unit is connected to the power module, and its output terminal is connected to the logic control unit; the logic control unit is connected to the main measurement and control chip, and its output terminal is connected to the power switching unit. The voltage monitoring unit is used to monitor the drain supply voltage status output by the power module; The logic control unit is used to output a drive signal when the drain supply voltage is normal and the pulse envelope signal is received; The power switching unit is used to control the on / off state of the drain power supply according to the drive signal.

[0044] The voltage monitoring unit consists of a voltage comparison circuit and a level conversion circuit; the voltage comparison circuit consists of a comparator and its peripheral circuitry; the level conversion circuit consists of a level converter. The logic control unit consists of a flip-flop and its peripheral circuitry; The triggers are connected to the level conversion circuit and the main measurement and control chip, respectively. The power switching unit consists of four inverters and four MOSFETs; each of the four inverters is connected to a trigger; each of the four MOSFETs is connected to one of the four inverters; and each of the four MOSFETs is also connected to the power module.

[0045] The comparator is model LM2903; the level converter is model DTC114EKA; the flip-flop is model 74LVC1G79; the inverter is model TC4427; and the MOSFET is model IRFZ44N.

[0046] In this embodiment, taking the power amplifier submodule M00 as an example, it specifically includes a modulation circuit, an over-temperature protection circuit, and a timing circuit; The modulation circuit includes a comparator U2, a level converter U12, resistors R1, R3, R5, and R6, capacitors C1 and C2, resistors R7 and R9, a trigger U5, a voltage regulator U6, resistors R4 and R8, capacitors C15, C3, and C4, an inverter U1A, a resistor R2, a MOSFET U3, a diode D1, an inverter U4A, a resistor R10, a MOSFET U7, an inverter U8A, a resistor R12, a MOSFET U9, a diode D2, an inverter U10A, a resistor R14, and a MOSFET U11. The positive input terminal of comparator U2 is connected to the 28VIN power supply output by the power module through resistor R1, the negative input terminal is connected to ground, and the output terminal is connected to the base of transistor U12 through resistor R7. The positive input terminal of comparator U2 is also connected to the -5V power supply output by the power module through resistor R3. Pins 6 and 2 of comparator U2 are connected to the 28VIN power supply and the -5V power supply respectively, and pin 5 is connected to the -5V power supply through resistor R6. The node where resistor R6 is connected to the -5V power supply is also connected to ground through resistor R5. Capacitor C2 is the grounding capacitor for pin 5 of comparator U2, and capacitor C1 is the grounding capacitor for pin 6 of comparator U2. The collector of level converter U12 is connected to ground via resistor R9, and the emitter is connected to the 28VIN power supply. The level converter U12 is model DTC114EKA; the comparator U2 is model LM2903; In this embodiment, comparator U2 constitutes a voltage comparator / monitoring circuit. Its positive input is connected to the 28VIN voltage divider network, its negative input is grounded, and its output drives U12. It is mainly used to monitor whether the 28VIN voltage is normal. When 28VIN is higher than a threshold (in this embodiment, it only needs to exceed the ground voltage), it outputs a high level, allowing the main control chip to perform logic control on the 28VIN power supply, such as controlling U5, thereby controlling the output of inverter U1A and the switching on / off of MOSFET U3, thus realizing the switching on / off of the 28VIN power supply to the VD12-1 power supply.

[0047] The collector of the level converter U12 is also connected to pin C of the trigger U5. Pin A of the trigger U5 is connected to one IO port of the main measurement and control chip and is controlled by the TTL-NO-OFF signal issued by the IO port. Pin B of the trigger U5 is connected to another IO port of the main measurement and control chip and is controlled by the TTL-IN signal issued by the IO port. The trigger U5 is a D-type trigger 74LVC1G79; In this embodiment, the TTL-NO-OFF signal is the pulse enable signal issued by the main measurement and control chip; the TTL-IN signal is the pulse envelope signal issued by the main measurement and control chip, used to define the pulse width; the signal issued by the collector of the level converter U12 is used as the reset / enable signal of the flip-flop U5, which is reset or disabled when the level is low. When pin C is high, the flip-flop transmits the pulse envelope input from pin B to the output of pin Y; when pin C is low, pin Y is forced to low. This realizes the logic and function of "28VIN normal" and "pulse envelope", ensuring that pulse output is only allowed when 28VIN is normal.

[0048] The B pin of trigger U5 is also connected to ground via resistor R8, and the Y pin outputs a TTL-TO-GATEDRIVER signal; Pin A of trigger U5 is also connected to the 5V1 power supply output by regulator U6 through resistor R4, and pin 2 is connected to ground; the input terminal of regulator U6 is connected to the 28VIN power supply. Capacitors C15 and C3 are both filter capacitors at the output of voltage regulator U6; capacitor C4 is a filter capacitor at the input of voltage regulator U6. The input terminal of inverter U1A is connected to the TTL-TO-GATEDRIVER signal, and the output terminal is connected to the gate of MOSFET U3 through resistor R2. Inverter U1A is powered by 28VIN power supply. The source terminal of MOSFET U3 is connected to the 28VIN power supply, and the drain terminal outputs the VD12-1 power supply. The cathode of diode D1 is connected to the VD12-1 power supply, and the anode is connected to ground. The input terminal of inverter U4A is connected to the TTL-TO-GATEDRIVER signal, and the output terminal is connected to the gate of MOSFET U7 through resistor R10. Inverter U4A is powered by 28VIN power supply; the source terminal of MOSFET U7 is connected to the 28VIN power supply, and the drain terminal outputs VD12-2 power supply. The input terminal of inverter U8A is connected to the TTL-TO-GATEDRIVER signal, and the output terminal is connected to the gate of MOSFET U9 through resistor R12. Inverter U8A is powered by 28VIN power supply. The source terminal of MOSFET U9 is connected to the 28VIN power supply, and the drain terminal outputs the VD23-1 power supply. The cathode of diode D2 is connected to the VD23-2 power supply, and the anode is connected to ground. The input terminal of inverter U10A is connected to the TTL-TO-GATEDRIVER signal, and the output terminal is connected to the gate of MOSFET U11 through resistor R14. Inverter U10A is powered by 28VIN power supply; the source terminal of MOSFET U11 is connected to the 28VIN power supply, and the drain terminal outputs VD23-2 power supply. Both the VD12-1 and VD12-2 power supplies are powered by a single four-channel GaN power amplifier and combiner module; both the VD23-1 and VD23-2 power supplies are powered by another four-channel GaN power amplifier and combiner module. In this embodiment, power supply VD12-1 and power supply VD12-2 are two parallel branches of the same power supply network, driven by two MOS transistors U3 and U7 respectively. They will eventually merge into VD12 to supply power to the drains of the four MMICs of a four-channel GaN power amplifier and synthesizer module.

[0049] Diode D1 is a Zener diode used to clamp voltage spikes and protect MOSFETs and GaN chips from inductive voltage surges during turn-off.

[0050] Similarly, the VD23-1 and VD23-2 power supplies provide 28V power to another four-channel GaN power amplifier and synthesizer module, and are controlled by the TTL-NO-OFF signal, which is the pulse enable signal issued by the main measurement and control chip; the TTL-IN signal is the pulse envelope signal issued by the main measurement and control chip.

[0051] The over-temperature protection circuit consists of a temperature sensor IC1 and its peripheral circuits. The temperature sensor IC1 is powered by a 5V power supply, and its output terminal is connected to an IO port of the main measurement and control chip. The temperature sensor IC1 is model MAX6509HAUK; The timing circuit includes a negative voltage feed circuit and a negative voltage protection circuit. The negative voltage feed circuit is used to directly feed the -5V power output from the power module into this power amplifier sub-module to supply the gates of each GaN power amplifier in the connected four-channel GaN power amplifier combining module.

[0052] In this embodiment, the negative voltage feed circuit includes a current-limiting resistor. The -5V power supply is connected to the gate bias terminal of the four-channel GaN power amplifier and synthesizer module through this current-limiting resistor. At the same time, a filter capacitor is connected in parallel between the bias terminal and the ground line to filter out high-frequency noise on the gate bias voltage.

[0053] The negative voltage protection circuit is used to detect whether the -5V gate negative bias voltage is normal and output a protection signal to the main measurement and control chip.

[0054] In this embodiment, the negative voltage protection circuit includes transistors Q1 and Q2, resistors R16, R17, R19, and R20, and capacitors C21 and C22. The base of transistor Q1 is connected to ground, the emitter is connected to the -5V power supply output by the power module through resistor R18, and the collector is connected to the +5V power supply output by the power module through resistor R17. The base of transistor Q1 is also connected to one end of capacitor C21 through resistor R16, and the other end of capacitor C21 is connected to ground. The node where resistor R18 is connected to the -5V power supply is also connected to ground through capacitor C22. The node where resistor R16 and capacitor C21 are connected is also connected to the emitter of transistor Q1. The collector of transistor Q1 is also connected to the base of transistor Q2 through resistor R19. The emitter of transistor Q2 is connected to ground, and the collector can be connected to the +5V power supply through resistor R20. The collector of transistor Q2 outputs a -VBH signal, which is input to an I / O port of the main measurement and control chip.

[0055] The working principle of the power amplifier submodule M00 in this embodiment is as follows: The modulation circuit is used to receive the pulse envelope signal sent by the main measurement and control chip and control the drain power supply of the corresponding four GaN power amplifier synthesis modules. The modulation circuit mainly consists of a voltage monitoring unit, a logic control unit, and a power switching unit. The voltage monitoring unit consists of an operational amplifier U2 (e.g., LM358) and its external resistors and capacitors. The positive input terminal of U2 is connected to +28VIN and -5V through voltage divider resistors R1 and R3, and the negative input terminal is grounded, forming a window comparator used to monitor whether the +28V power supply is normal. When the +28V voltage is within the normal range, U2 outputs a high level, driving transistor U12 to conduct. U12 is a digital transistor with a built-in bias resistor (e.g., DTC114EKA), and its collector outputs a low level to the reset terminal C of the flip-flop U5.

[0056] The logic control unit is based on a D-type flip-flop U5 (e.g., 74LVC1G79). Terminal A (data input) of U5 is connected to the pulse envelope signal TTL_ON_OFF output from the main control chip, terminal B (clock input) is connected to the clock signal TTL_IN output from the main control chip, and terminal C (reset) is connected to the collector of U12. When +28V is normal, terminal C is high, and U5 transmits the pulse envelope signal from terminal A to terminal Y, outputting a TTL-TO-GATEDRIVER signal. When +28V is abnormal, terminal C is pulled low, terminal Y is forced low, cutting off the pulse output and achieving hardware-level protection.

[0057] The power switching unit consists of four inverters (U1A, U4A, U8A, U10A, actually MOSFET drivers such as TC4427) and four power MOSFETs (U3, U7, U9, U11). The TTL-TO-GATEDRIVER signal is simultaneously fed into the inputs of all four drivers. The outputs of U1A and U4A drive MOSFETs U3 and U7 respectively; these two transistors, connected in parallel, output the first drain power supply VD12, powering the first four-channel GaN power amplifier and combiner module. The outputs of U8A and U10A drive MOSFETs U9 and U11 respectively; these two transistors, connected in parallel, output the second drain power supply VD23, powering the second four-channel GaN power amplifier and combiner module. Each MOSFET's drain output is connected in parallel with clamping diodes (such as D1 and D2) to absorb voltage spikes during turn-off, protecting the MOSFETs and the GaN chip.

[0058] The timing circuit includes a switching circuit and a negative voltage protection circuit. The switching circuit consists of four power MOSFETs (Q1-Q4), connected in parallel in pairs to form two sets of switches, each controlled by an I / O port of the main control chip, used to control the on / off state of the +28V main power supply. The negative voltage protection circuit detects whether the -5V gate bias is normal, and consists of transistors Q1 and Q2 and resistive-capacitive components. When -5V is normal, Q1 is on, Q2 is off, and a high-level VBH signal is output to the main control chip; when -5V is lost or too low, Q1 is off, Q2 is on, VBH is pulled low, and the main control chip executes the protection action accordingly. VCC in the circuit is the +5V power supply, provided by the power module.

[0059] The over-temperature protection circuit consists of a temperature sensor IC1 (e.g., MAX6509HAUK), which is mounted on the surface of the power amplifier submodule cavity. When the temperature exceeds a preset threshold, IC1 outputs a low-level alarm signal to the main control chip, which can then shut down the power supply to the power amplifier or limit the output power. Example

[0060] like Figure 8As shown, the pulse modulation method for a broadband solid-state power amplifier described in Example 2 is a method implemented based on the broadband solid-state power amplifier described in Example 1, and includes the following steps: When the broadband solid-state power amplifier is powered on, the user selects the operating mode command through the front panel interaction module. The front panel interaction module sends the operating mode command to the main measurement and control chip. The operating modes include open-loop gain control mode and closed-loop automatic level control (ALC) mode. In this embodiment, the user can also set the working mode command through the host computer.

[0061] When the working mode is open-loop gain control mode, the main measurement and control chip obtains the frequency information of the current input signal, and compensates and corrects the attenuation control code set by the user according to the preset frequency-gain correction data table. The corrected control code is sent to the front-end drive module to control its attenuation, thereby performing gain control in the entire frequency band. When the working mode is closed-loop ALC control mode, the main measurement and control chip executes the closed-loop adjustment process, which specifically includes: according to the target output power set by the user and the frequency information of the current input signal, searching for the corresponding target detector voltage value from the pre-calibrated and stored detector voltage-power correspondence database; The forward detection voltage output by the forward detector in the coupled detection module is acquired in real time, and the forward detection voltage is compared with the target detection voltage value: if the forward detection voltage is lower than the target detection voltage value, the attenuation of the front-stage drive module is reduced; if the forward detection voltage is higher than the target detection voltage value, the attenuation of the front-stage drive module is increased. In this embodiment, the forward detection voltage and the forward detection voltage are acquired by detector DT2 and detector DT3, respectively.

[0062] The reverse detection voltage is used to monitor the VSWR or reflected power at the power amplifier output port to prevent the final stage power transistor from burning out due to excessive reflected power caused by load mismatch (such as antenna disconnection, poor connection, antenna damage, etc.).

[0063] The target detection voltage value is obtained by the detector DT1.

[0064] Repeat the above comparison and attenuation adjustment steps until the error between the forward detection voltage and the target detection voltage does not exceed the preset threshold, so that the output power of the broadband solid-state power amplifier remains stable.

[0065] In the closed-loop ALC control mode, the preset threshold is 10mV; the main measurement and control chip sends the corrected control code or the adjusted attenuation control code to the second attenuator in the front-end drive module through the SPI interface.

[0066] In this embodiment, the first attenuator is generally selected as a fixed attenuator, and the control code or attenuation control code is mainly sent to the second attenuator. Only one of the first attenuator or the second attenuator can be a fixed attenuator.

[0067] In this embodiment, the power amplifier can be amplitude controlled during actual use. Specifically, it is achieved by the main measurement and control chip in conjunction with the electrically adjustable attenuator (second attenuator) and forward detector in the front-end drive module, supporting two working modes: open-loop gain control mode and closed-loop automatic level control (ALC) mode.

[0068] Open-loop gain control mode: When the user selects open-loop gain control mode, the main control chip only controls the gain of the amplification link. Since the actual gain of the amplification link and the attenuation of the electrically adjustable attenuator fluctuate with the operating frequency, directly setting the attenuation value according to the nominal value will result in a deviation between the overall gain and the user-set value. Therefore, after acquiring the frequency information of the current input signal, the main control chip compensates for and corrects the user-set attenuation control code according to a preset frequency-gain correction data table. The corrected control code is then sent to the electrically adjustable attenuator via the SPI interface. This method effectively compensates for the gain error caused by the frequency response. Combined with a high-resolution digitally controlled attenuator, precise control of the overall gain can be achieved across the entire frequency band. In open-loop gain control mode, the stability of the overall output power is affected by the input signal power, frequency, and amplifier saturation, making it suitable for test scenarios requiring flexible changes in output power.

[0069] Closed-loop ALC control mode: When the user needs the amplifier to maintain an absolutely stable output power for a long time, the closed-loop ALC control mode can be selected. In this mode, the user sets the target output power value, and the main control chip treats the control code of the electrically adjustable attenuator as the attenuation adjustment amount of the output level. The main control chip first looks up the corresponding target detector voltage value from the pre-calibrated and stored detector voltage-power correspondence database based on the acquired current input signal frequency information and the user-set target output power. Then, the main control chip enters the closed-loop adjustment process: it acquires the forward detector voltage output in real time and compares it with the target detector voltage value. If the measured detector voltage is lower than the target value, the attenuation is reduced to increase the link gain; if the measured detector voltage is higher than the target value, the attenuation is increased to reduce the link gain. By continuously iterating and adjusting the attenuation control code, the error between the forward detector voltage and the target detector voltage does not exceed a preset threshold (10mV in this embodiment). The closed-loop ALC control mode can automatically compensate for output power drift caused by changes in ambient temperature, fluctuations in input signal power, or component aging, ensuring that the output power remains highly stable during long-term continuous operation. It should be noted that in closed-loop ALC mode, the input signal power must be sufficient to drive the final stage amplifier to saturation; otherwise, the ALC adjustment range will be limited.

[0070] This invention discloses a broadband solid-state power amplifier and pulse modulation method, which solves the technical problems of improving the protection, precise amplitude control, and modular maintainability of GaN power devices in high-power amplifiers. Each four-channel GaN power amplifier combining module is equipped with an independent power amplifier sub-module, enabling localized gate negative voltage management, power-on / power-off timing control, drain pulse modulation, and temperature monitoring. This architecture reduces the protection response time to the microsecond level, effectively preventing damage to GaN chips due to power supply timing errors or localized overheating, significantly improving overall reliability. Through the main test and control chip, in conjunction with the pre-stage electrically adjustable attenuator and forward detector, it supports both open-loop gain control and closed-loop automatic level control (ALC) modes. In open-loop mode, frequency information is used to compensate and correct the attenuation control code, achieving precise gain control across the entire frequency band. In closed-loop mode, the output power is stabilized at a preset level by real-time comparison of the forward detector voltage with the target value, with an error not exceeding 10mV. The two modes can be flexibly switched, taking into account the flexibility of testing scenarios. To ensure stability during long-term operation, the sixteen four-channel power amplifier combining units in the final stage are grouped in pairs and powered by interleaved pulse drains driven by the modulation circuit. This effectively reduces the impact of pulse current on the power bus and improves the flatness of the output pulse top. Simultaneously, the waveguide binary combining network is matched with the power supply grouping, ensuring consistency in RF phase and power supply timing among the units and improving combining efficiency. The entire device is functionally divided into four independent modules: pre-stage driver, secondary driver, final stage combining, and coupling detector. The sixteen four-channel combining units in the final stage and their corresponding eight power amplifier sub-modules all use uniformly sized replaceable units. In the event of a unit failure, it can be quickly located and replaced, significantly reducing the mean time to repair and improving the reliability and availability of the equipment.

Claims

1. A broadband solid-state power amplifier, characterized in that: Includes an amplifier unit, a detection and control unit, a power supply module, and a power supply detection module; The amplifier unit includes a pre-stage driver module, a secondary driver module, a final stage synthesis module, and a coupling detector module cascaded in sequence, used to amplify the power of radio frequency signals; The detection and control unit includes an ADC sampling circuit, a main measurement and control chip, a communication module, and a front panel interaction module; the ADC sampling circuit, the communication module, and the front panel interaction module are all connected to the main measurement and control chip to realize signal acquisition, communication, and human-machine interaction; The power module is used to supply power to the amplifier unit and the detection control unit; The power detection module is connected to the power module and the ADC sampling circuit respectively, and is used to detect the voltage signal and current signal output by the power module and send them to the ADC sampling circuit. The ADC sampling circuit is also connected to the front-end driving module and the coupling detection module respectively, and is used to collect the input detection voltage output by the front-end driving module and the forward detection voltage and reverse detection voltage output by the coupling detection module. The main measurement and control chip is connected to the pre-stage drive module and the power module respectively, and is used to control the attenuation of the pre-stage drive module according to the acquired detection voltage, and to perform power management according to the detection signal of the power detection module.

2. The broadband solid-state power amplifier as described in claim 1, characterized in that: The final stage synthesis module includes multiple four-channel GaN power amplification and synthesis modules, and each pair of four-channel GaN power amplification and synthesis modules is equipped with a power amplifier sub-module. The power amplifier submodule is used to control the bias voltage, operating timing, and operating temperature of the GaN power amplifiers in the two connected four-channel GaN power amplifier combining modules.

3. A broadband solid-state power amplifier as described in claim 1, characterized in that: The front-end drive module is equipped with an input detector for detecting the power of the input radio frequency signal and outputting the input detection voltage; The coupling detection module is equipped with a forward detector and a reverse detector, which are used to detect the forward detection voltage and the reverse detection voltage generated in the coupling detection module, respectively. The main measurement and control chip is used to adjust the attenuation of the front-end drive module according to the forward detection voltage to perform closed-loop stable control of the output power, and to perform input overload protection and output mismatch protection according to the input detection voltage and the reverse detection voltage, respectively.

4. A broadband solid-state power amplifier as described in claim 1, characterized in that: The pre-amplifier module includes a first attenuator, a first amplifier, a power divider, a detector, a second amplifier, a second attenuator, a third amplifier, and a fourth amplifier that are connected in sequence. One output of the power divider is connected to the detector, and the detector outputs the input detection voltage; The control terminals of the first attenuator and the second attenuator are respectively connected to the main measurement and control chip.

5. A broadband solid-state power amplifier as described in claim 4, characterized in that: The secondary drive module includes two waveguide power dividers, two four-channel GaN power amplifier and combining modules, a power amplifier submodule, and two waveguide power dividers. The two waveguide power dividers are used to split the input signal into two paths, which are respectively sent to the two four-channel GaN power amplifier and combining modules, and their outputs are combined into one path by the two waveguide power dividers. The final stage synthesis module includes a sixteen-channel waveguide power divider, sixteen four-channel GaN power amplifier and synthesis modules, eight power amplifier sub-modules, and a sixteen-channel waveguide synthesizer. The sixteen-channel waveguide power divider is used to divide the input signal into sixteen channels, which are respectively sent to the sixteen four-channel GaN power amplifier and synthesis modules, and their outputs are combined into one channel by the sixteen-channel waveguide synthesizer. The coupling detection module includes a coupler, a forward detector, and a reverse detector; the input terminal of the coupler is connected to the output terminal of the final stage synthesis module, and its output terminal is used to output an amplified signal; the forward detector and the reverse detector are both connected to the coupler, and output the forward detection voltage and the reverse detection voltage respectively.

6. A broadband solid-state power amplifier as described in claim 2, characterized in that: The power amplifier submodule includes a modulation circuit, a timing circuit, and an over-temperature protection circuit. The modulation circuit is connected to the main measurement and control chip and is used to receive the pulse envelope signal and control the drain power supply of the GaN power amplifier in the connected four-channel GaN power amplifier synthesis module according to the pulse envelope signal. The timing circuit is connected to the power supply module and is used to generate the gate negative bias voltage required by the GaN power amplifier and control the power-on and power-off timing. The over-temperature protection circuit includes a temperature sensor, which monitors the operating temperature and outputs a temperature signal to the main measurement and control chip.

7. A broadband solid-state power amplifier as described in claim 6, characterized in that: The modulation circuit includes a voltage monitoring unit for monitoring the drain supply voltage status, a logic control unit for outputting a drive signal when the drain supply voltage is normal and the pulse envelope signal is received, and a power switching unit for controlling the on / off state of the drain supply according to the drive signal. The timing circuit includes a negative voltage feed circuit for supplying negative gate voltage to each GaN power amplifier and a negative voltage protection circuit for detecting whether the negative gate voltage is normal and outputting a protection signal to the main measurement and control chip.

8. A broadband solid-state power amplifier as described in claim 1, characterized in that: The power module includes an AC / DC conversion circuit for converting AC mains power into multiple DC voltage outputs; the multiple DC voltages include at least a first voltage for supplying the drain of the GaN power amplifier, a second voltage for supplying the negative bias voltage of the gate of the GaN power amplifier, and a third voltage for supplying the detector and control circuit.

9. A pulse modulation method for a broadband solid-state power amplifier, applied to the broadband solid-state power amplifier according to any one of claims 1-8, characterized in that: Includes the following steps: When the broadband solid-state power amplifier is powered on, the user selects the operating mode command through the front panel interaction module. The front panel interaction module sends the operating mode command to the main measurement and control chip. The operating modes include open-loop gain control mode and closed-loop automatic level control (ALC) mode. When the working mode is open-loop gain control mode, the main measurement and control chip obtains the frequency information of the current input signal, and compensates and corrects the attenuation control code set by the user according to the preset frequency-gain correction data table. The corrected control code is sent to the front-end drive module to control its attenuation, thereby performing gain control in the entire frequency band. When the working mode is closed-loop ALC control mode, the main measurement and control chip executes the closed-loop adjustment process, which specifically includes: according to the target output power set by the user and the frequency information of the current input signal, searching for the corresponding target detector voltage value from the pre-calibrated and stored detector voltage-power correspondence database; The forward detection voltage output by the forward detector in the coupled detection module is acquired in real time, and the forward detection voltage is compared with the target detection voltage value: if the forward detection voltage is lower than the target detection voltage value, the attenuation of the front-stage drive module is reduced; if the forward detection voltage is higher than the target detection voltage value, the attenuation of the front-stage drive module is increased. Repeat the above comparison and attenuation adjustment steps until the error between the forward detection voltage and the target detection voltage does not exceed the preset threshold, so that the output power of the broadband solid-state power amplifier remains stable.

10. The pulse modulation method for a broadband solid-state power amplifier as described in claim 9, characterized in that: The main measurement and control chip sends the corrected control code or the adjusted attenuation control code to the second attenuator in the front-end drive module through the data interface.

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