Method of manufacturing a silicon-on-insulator substrate

Abstract

The present disclosure provides a method of manufacturing an SOI substrate. A stop layer, a semiconductor layer, an insulating buried layer, and a first bonding insulating layer are formed in sequence on a sacrificial wafer. A second bonding insulating layer is formed on a reference wafer. The first bonding insulating layer and the second bonding insulating layer comprise silicon carbon nitride (SiCN) material. Si-OH bonds are formed in the first bonding insulating layer and the second bonding insulating layer by an O2 plasma treatment. The sacrificial wafer is bonded to the reference wafer such that the first bonding insulating layer contacts the second bonding insulating layer.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0189854, filed on December 18, 2024, which is incorporated herein by reference in its entirety. Technical Field

[0003] Embodiments of this disclosure relate to a method for manufacturing a silicon-on-insulator (SOI) substrate, and more specifically to a method for manufacturing an SOI substrate for improving the bonding strength of wafer bonding interfaces. Background Technology

[0004] Direct wafer bonding is a technique that bonds two perfectly flat wafers together without using any adhesives such as pastes or glues. This bonding technique can be used to fabricate silicon-on-insulator (SOI) substrates.

[0005] However, direct wafer bonding technology, which does not use adhesives to bond two wafers (or substrates) together, can cause various defects.

[0006] For example, defects include voids at the bonding interfaces between two wafers, edge voids in the thin layer of the final structure (i.e., the SOI substrate), and bonding errors due to low bonding strength at the bonding interfaces. These defects can adversely affect the performance of semiconductor devices fabricated using SOI substrates.

[0007] Therefore, there is a need for a technology to suppress wafer edge voids, suppress voids between wafer bonding interfaces, and enhance bonding strength at bonding interfaces during SOI substrate manufacturing. Summary of the Invention

[0008] Embodiments of this disclosure provide a method for manufacturing an SOI substrate that reduces voids formed at the bonding interfaces of a wafer.

[0009] Embodiments of this disclosure provide a method for manufacturing an SOI substrate that can improve the bonding strength at the wafer bonding interface.

[0010] According to one embodiment of this disclosure, a method for manufacturing an SOI substrate is provided. A stop layer, a semiconductor layer, an insulating buried layer, and a first bonding insulating layer comprising silicon carbonitride (SiCN) material are sequentially formed on a sacrificial wafer. A second bonding insulating layer comprising SiCN material is formed on a reference wafer. Si-OH bonds are formed in the first and second bonding insulating layers by O2 plasma treatment and by wiping the first and second bonding insulating layers. The sacrificial wafer can be bonded to the reference wafer to form a bonding structure such that the first and second bonding insulating layers face each other. The bonding structure can then be annealed.

[0011] According to one embodiment of this disclosure, a method for manufacturing an SOI substrate is provided. A stop layer, a semiconductor layer, a buried insulating layer, and a first bonding insulating layer are sequentially formed on a sacrificial wafer to generate a first structure. A second bonding insulating layer is formed on a reference wafer to generate a second structure. Si-OH bonds are formed in the first and second bonding insulating layers. The first and second structures can be bonded to form a bonded structure, such that the first bonding insulating layer is bonded to the second bonding insulating layer.

[0012] According to embodiments of this disclosure, SiCN is used as the wafer bonding insulating layer, which can effectively adsorb H2 gas escaping from the sacrificial wafer during the high-temperature annealing process after bonding, thereby suppressing the formation of voids at the interface of the bonding insulating layer.

[0013] Furthermore, O2 plasma treatment of SiCN can break Si-C bonds and allow for the formation of Si-OH bonds, thereby inducing van der Waals hydrogen bonds (Si-OH---OH-Si) between bonded insulating layers. Annealing transforms these van der Waals hydrogen bonds (Si-OH---OH-Si) into Si-O-Si covalent bonds. By shortening the bond length and reducing the interfacial gap between bonded insulating layers, the bond strength can be enhanced.

[0014] Furthermore, by bonding the sacrificial wafer and the reference wafer at room temperature after injecting helium for a certain period of time, the generation of wafer edge voids due to the Joule-Thomson effect can be prevented. Attached Figure Description

[0015] The above and other aspects, features and advantages of the embodiments of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, wherein:

[0016] Figure 1 This is a flowchart illustrating a method for manufacturing an SOI substrate according to embodiments of the present disclosure; and

[0017] Figures 2 to 10 This is a cross-sectional view illustrating a method for manufacturing an SOI substrate according to an embodiment of the present disclosure. Detailed Implementation

[0018] Various embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. The drawings are schematic diagrams of various embodiments and intermediate structures. Therefore, the configuration and shape of the drawings may vary due to manufacturing techniques and / or tolerances, etc. Consequently, the described embodiments should not be construed as limited to the specific configurations and shapes shown herein, but may include deviations in configuration and shape that do not depart from the spirit and scope of the present disclosure as defined in the appended claims.

[0019] This document describes embodiments of the present disclosure with reference to cross-sectional and / or plan views. However, the embodiments of the present disclosure should not be construed as limiting the concept of the present disclosure. Although several embodiments of the present disclosure will be shown and described, those skilled in the art will understand that changes can be made to these embodiments without departing from the principles and spirit of the present disclosure.

[0020] Figure 1 This is a flowchart illustrating a method for manufacturing an SOI substrate according to embodiments of the present disclosure. Figures 2 to 10 This is a cross-sectional view illustrating a method for manufacturing an SOI substrate according to an embodiment of the present disclosure.

[0021] refer to Figure 1 and Figure 2 The sacrificial wafer 110 can be subjected to a first processing (S10). For example, the first processing may include a first cleaning process. The sacrificial wafer 110 may include at least one material selected from silicon (Si), germanium (Ge), silicon carbide (SiC), group IV-IV, group III-V or group II-VI semiconductor compounds and piezoelectric materials (e.g., LiNbO3, LiTaO3, etc.).

[0022] In some embodiments, the first process may include cleaning the sacrificial wafer 110 with an SC1 solution (NH4OH:H2O2:H2O). During the cleaning of the sacrificial wafer 110, an oxide layer 110a containing impurities (or residues) on the surface of the sacrificial wafer 110 is removed. The surface of the sacrificial wafer 110 may include an upper surface, a lower surface, and sidewalls. For example, the oxide layer 110a containing impurities may be formed on the surface of the sacrificial wafer 110 by the H2O2 component of the SC1 solution. In some embodiments, the NH4OH component in the SC1 solution, which has the properties of etching oxide materials, may be used to remove the oxide layer 110a containing impurities. Therefore, impurities present on the surface of the sacrificial wafer 110 can be removed first.

[0023] Impurities remaining on the surface of the sacrificial wafer 110 can be removed by the oxide layer 110a produced by the first process. (Reference) Figure 1 and Figure 3 Although the SC1 solution contains NH4OH, the chemical oxide layer 110b generated by H2O2 in the SC1 solution as a byproduct during the first treatment process may remain.

[0024] The sacrificial wafer 110 can be subjected to an H2 baking process at a high temperature (S20). Therefore, the chemical oxide layer 110b on the surface of the sacrificial wafer 110 can be removed by the H2 baking process. For example, impurities in the beveled regions of the sacrificial wafer 110 can be effectively removed by the H2 baking process. Therefore, by removing impurities in the beveled regions of the sacrificial wafer 110, dislocation defects caused by lattice mismatch can be reduced.

[0025] refer to Figure 1 and Figure 4 A stop layer 111 and a semiconductor layer 112 can be sequentially formed on the sacrificial wafer 110 using an epitaxial growth process (S30). In some embodiments, the stop layer 111 and the semiconductor layer 112 can be formed by an in-situ process.

[0026] For example, when the sacrificial wafer 110 is removed from the bonding structure (as will be done later), the stop layer 111 can prevent the semiconductor layer 112 from being removed. The stop layer 111 may be formed using a material having an etch selectivity different from that of the sacrificial wafer 110 and the semiconductor layer 112. Alternatively, the stop layer 111 may be formed using a material with properties less different from those of the semiconductor layer 112. In some embodiments, the stop layer 111 may comprise a single-crystal silicon germanium (SiGe) layer, and the semiconductor layer 112 may comprise a single-crystal silicon (Si) layer.

[0027] refer to Figure 1 and Figure 5 An insulating buried layer 113 may be formed on the semiconductor layer 112 (S40). For example, the insulating buried layer 113 may include, but is not limited to, a silicon oxide (SiO2) layer.

[0028] refer to Figure 1 , Figure 6A and Figure 6B A first bonding insulating layer 114 may be formed on the sacrificial wafer 110. Further, a reference wafer 120 is prepared. A second bonding insulating layer 124 may be formed on the reference wafer 120 (S50). In some embodiments, the first bonding insulating layer 114 may be formed to contact the buried insulating layer 113 on the sacrificial wafer 110. The second bonding insulating layer 124 may be formed on the surface of the reference wafer 120. The reference wafer 120 may include at least one material selected from Si, Ge, SiC, group IV-IV, group III-V, or group II-VI semiconductor compounds and piezoelectric materials (e.g., LiNbO3, LiTaO3, etc.).

[0029] For example, the formation of the first bonding insulating layer 114 on the buried insulating layer 113 and the formation of the second bonding insulating layer 124 on the reference wafer 120 can be performed alternately in the same chamber, or simultaneously in the same chamber, or simultaneously in different chambers.

[0030] In some embodiments, the first bonding insulating layer 114 and the second bonding insulating layer 124 may comprise silicon carbonitride (SiCN) layers. For example, the first bonding insulating layer 114 and the second bonding insulating layer 124 may be formed, respectively, by plasma-enhanced chemical vapor deposition (PECVD) processes. When the first bonding insulating layer 114 and the second bonding insulating layer 124 are formed in the PECVD chamber, tetramethylsilane (TMS) gas, nitrogen (N2), and helium (He) gas are supplied to the PECVD chamber as a plasma treatment to stabilize the first bonding insulating layer 114.

[0031] For example, but not limited to, the carbon (C) concentration ratio of the first bonded insulating layer 114 and the second bonded insulating layer 124 can be greater than about 36%. Due to the increased carbon (C) concentration ratio of the first bonded insulating layer 114 and the second bonded insulating layer 124, the number of Si dangling bonds generated in each of the first bonded insulating layer 114 and the second bonded insulating layer 124 may also increase during subsequent oxygen (O2) plasma treatment. Therefore, the H2 gas generated and remaining in the H2 baking process, as well as the emitted H2 gas, can be more effectively adsorbed, thereby suppressing voids.

[0032] refer to Figure 1 , Figure 7A and Figure 7B The first bonded insulating layer 114 and the second bonded insulating layer 124 can be subjected to O2 plasma treatment (S60). For example, O2 gas can be injected into a process chamber, such as a plasma chamber. Then, the process chamber is stabilized for a period of time, for example, about 30 seconds. Thereafter, an HF power of 50W to 400W can be applied to the process chamber for a period of time, for example, 10 seconds, and then the first bonded insulating layer 114 and the second bonded insulating layer 124 can be subjected to O2 plasma treatment respectively.

[0033] O2 plasma treatment desorbs the Si-C bonds (C) from carbon from the first bonded insulating layer 114 and the second bonded insulating layer 124 containing SiCN material. As a result, the first bonded insulating layer 114D and the second bonded insulating layer 124D have a higher silicon dangling bond content than the SiCN material before O2 plasma treatment.

[0034] refer to Figure 1 , Figure 8A and Figure 8BThe sacrificial wafer 110 and reference wafer 120 can be scrubbed to remove particles (S70). For example, particles generated by a previous process may be generated on the surfaces of the sacrificial wafer 110 and reference wafer 120 after O2 plasma treatment. The scrubbing process (S70) of the sacrificial wafer 110 and reference wafer 120 may include a rinsing process and a drying process. For example, the rinsing process can be performed using deionized water (DIW). The drying process can be performed using an N2 dryer for a period of time (e.g., about 30 seconds). For example, the scrubbing process can be performed in a scrubber.

[0035] Because the OH bonds in the H2O provided by DIW are adsorbed... Figure 7A and Figure 7B On the Si dangling bonds of the first bonded insulating layer 114D and the second bonded insulating layer 124D, a first bonded insulating layer 114H and a second bonded insulating layer 124H with Si-OH bonds can be formed, as shown in the figure. Figure 8A and Figure 8B As shown.

[0036] refer to Figure 1 and Figure 9 The sacrificial wafer 110, stop layer 111, semiconductor layer 112, buried insulating layer 113, and first bonding insulating layer 114H are flippable. The flipped structure can be bonded to the structure of reference wafer 120 and second bonding insulating layer 124H (S80).

[0037] For example, the sacrificial wafer 110 can be clamped face down on the upper chuck (not shown) of a bonding apparatus (not shown), and the reference wafer 120 can be clamped on the lower chuck (not shown) of the bonding apparatus. In this embodiment, the sacrificial wafer 110 and the reference wafer 120 can be clamped on the upper and lower chucks by vacuum adsorption.

[0038] In some embodiments, while the sacrificial wafer 110 and the reference wafer 120 are clamped on the upper and lower chucks respectively, helium gas can be injected into the process chamber for a predetermined time (e.g., about 35 seconds or longer). After the predetermined time period, the vacuum in the upper chuck holding the sacrificial wafer 110 can be released, and the sacrificial wafer 110 is released from the upper chuck and falls onto the reference wafer 120 for bonding.

[0039] Thus, by injecting helium with a negative Joule-Thomson coefficient for a period of time before bonding the sacrificial wafer 110 and the reference wafer 120, edge voids caused by the Joule-Thomson effect can be suppressed.

[0040] Furthermore, since the sacrificial wafer 110 and the reference wafer 120 can be bonded to each other, the first bonding insulating layer 114H and the second bonding insulating layer 124H having Si-OH bonds are in contact with each other. As described above, the first bonding insulating layer 114H and the second bonding insulating layer 124H can be bonded by van der Waals hydrogen bonds (Si-OH---OH-Si) between the Si-OH bonds of the first bonding insulating layer 114H and the Si-OH bonds of the second bonding insulating layer 124H on the reference wafer 120. As a result, a bonding structure can be formed, which includes the second bonding insulating layer 124H and the first bonding insulating layer 114H bonded by van der Waals hydrogen bonds (Si-OH---OH-Si), an insulating buried layer 113, a semiconductor layer 112, a stop layer 111, and the sacrificial wafer 110 arranged sequentially on the reference wafer 120.

[0041] refer to Figure 1 and Figure 10 The bonded structure can be processed by an annealing process (S90). As an example and not in any way a limitation, the annealing process can be performed at approximately 430°C. In some embodiments, due to the high-temperature annealing process, H2O can escape from the van der Waals hydrogen bonds (Si-OH-OH-Si) between the first bonded insulating layer 114H and the second bonded insulating layer 124H, forming Si-O-Si covalent bonds, thereby shortening the bond length. Therefore, the interfacial gap between the first bonded insulating layer 114B and the second bonded insulating layer 124B can be reduced, thereby enhancing the bond strength, such as... Figure 10 As shown.

[0042] like Figure 1 As described in S20, a high-temperature H2 heat treatment can be performed to remove the chemical oxide layer 110b on the surface of the sacrificial wafer 110. In this operation, H2 gas can be stored in the sacrificial wafer 110 while the chemical oxide layer 110b is being removed. There may be a concern that during high-temperature annealing, the H2 gas stored in the sacrificial wafer 110 might be released to bonding interfaces with relatively weak bonding strength (e.g., a portion of the bonding surface between the first and second bonding insulating layers), leading to void formation. However, in some embodiments, the released H2 can be effectively adsorbed onto the N bonds of the SiCN material used as bonding insulating layers 114B and 124B, thereby preventing void formation at the bonding interface between the bonding insulating layers 114B and 124B.

[0043] As described above, in some embodiments, bonding insulating layers can be formed from SiCN on the sacrificial wafer 110 and the reference wafer 120, respectively. The SiCN can be treated with O2 plasma to form Si dangling bonds. During the scrubbing process, OH can be adsorbed onto the Si dangling bonds to form a bonding insulating layer with Si-OH bonds. The bonding insulating layer with Si-OH bonds can be bonded by van der Waals hydrogen bonds (Si-OH-OH-Si). During annealing, as H2O escapes from the van der Waals hydrogen bonds (Si-OH-OH-Si), Si-O-Si covalent bonds can be formed. Thus, the interfacial gap between the bonding insulating layers can decrease with the shortening of the bond length, thereby enhancing the bonding between the bonding insulating layers. In some embodiments, but not limited to these, after the annealing process, the bonding strength between the bonding insulating layers can be 1.8 J / m. 2 Or larger.

[0044] In some embodiments, after the annealing process of the bonding structure is completed, the sacrificial wafer 110 and the stop layer 111 can be removed sequentially to complete the fabrication of the SOI substrate.

[0045] For example, the sacrificial wafer 110 disposed on the bonding structure can have a portion of its edges removed by wafer trimming before the bonding process of the sacrificial wafer 110 and the reference wafer 120. Then, the sacrificial wafer 110 can be removed by a grinding process after the bonding and annealing processes, so that the sacrificial wafer 110 has a set thickness (or height). Thereafter, the remaining sacrificial wafer and the stop layer 111 can be removed sequentially.

[0046] Residual sacrificial wafers can be removed using both wet and dry cleaning processes. For example, residual sacrificial wafers can be removed by sequentially performing a pretreatment cleaning process with dilute hydrofluoric acid (DHF) followed by a wet alkaline cleaning process (diluted NH4OH, TMAH:(CH3)4N(OH), KOH, etc.), and then a drying process in an IPA dryer. Furthermore, stop layer 111 can be removed using both wet and dry cleaning processes. For example, stop layer 111 can be removed using a wet alkaline cleaning process (diluted NH4OH, TMAH:(CH3)4N(OH), KOH, etc.) and a dry cleaning process using fluorinated compounds.

[0047] As described above, the SOI substrate can be fabricated by sequentially removing the residual sacrificial wafer and the stop layer 111. The SOI substrate includes a reference wafer 120 and a second bonding insulating layer 124, a first bonding insulating layer 114, an insulating buried layer 113, and a semiconductor layer 112 sequentially stacked on the reference wafer 120.

[0048] The embodiments disclosed above are for illustrative purposes only and are not intended to limit the scope of this disclosure. Various alternatives and equivalents are possible. The embodiments of this disclosure are not limited to those described herein. The embodiments are also not limited to any particular type of semiconductor device. In view of the content of this disclosure, other additions, reductions, or modifications can be made, and such additions, reductions, or modifications are intended to fall within the scope of the appended claims. Furthermore, embodiments can be combined to form additional embodiments.

Claims

1. A method for manufacturing an SOI substrate, SOI referring to silicon-on-insulator, the method comprising: A stop layer, a semiconductor layer, an insulating buried layer, and a first bonding insulating layer containing silicon carbonitride (SiCN) material are sequentially formed on the sacrificial wafer. A second bonding insulating layer containing SiCN material is formed on a reference wafer; By subjecting the first bonded insulating layer and the second bonded insulating layer to O2 plasma treatment and scrubbing respectively, Si-OH bonds are formed in the first bonded insulating layer and the second bonded insulating layer; The sacrificial wafer is bonded to the reference wafer to form a bonding structure, such that the first bonding insulating layer and the second bonding insulating layer face each other; as well as The bonded structure is then annealed.

2. The method according to claim 1, further comprising: The sacrificial wafer is cleaned before the stop layer is formed on it.

3. The method according to claim 2, The cleaning of the sacrificial wafer includes: The sacrificial wafer is cleaned using an SC1 solution containing NH4OH:H2O2:H2O, wherein an oxide layer containing impurities is formed on the surface of the sacrificial wafer and is removed during the cleaning process; and The chemical oxide layer formed on the sacrificial wafer is removed by subjecting the sacrificial wafer to H2 baking at high temperature.

4. The method according to claim 1, in, At least one of the stop layer and the semiconductor layer is formed on the sacrificial wafer by an epitaxial growth process.

5. The method of claim 1, in, The stop layer comprises single-crystal silicon germanium (SiGe), and The semiconductor layer includes single-crystal silicon (Si).

6. The method according to claim 1, in, The formation of Si-OH bonds in the first bonded insulating layer and the second bonded insulating layer includes: The Si-C bonds in the first and second bonded insulating layers are transformed into Si dangling bonds by O2 plasma treatment; and The OH bonds are adsorbed onto the Si dangling bonds using H2O provided by the scrubbing process.

7. The method according to claim 1, in, Forming the bonding structure includes: The sacrificial wafer is flipped and clamped into the upper chuck of the bonding device; The reference wafer is clamped into the lower chuck of the bonding device; Injecting helium into the bonding device; and Release the upper chuck from the sacrificial wafer, allowing the sacrificial wafer to be bonded to the reference wafer.

8. The method according to claim 1, in, The O2 plasma treatment includes: Inject O2 gas into the process chamber; Stabilize the process chamber; and Apply HF power to O2 gas.

9. The method according to claim 1, in, At least one of the first and second bonded insulating layers includes a SiCN layer, said SiCN layer being formed by a plasma-enhanced chemical vapor deposition (PECVD) process. The first and second bonded insulating layers are each formed by plasma treatment, which is performed after stabilization by injecting tetramethylsilane (TMS) gas, nitrogen, and helium.

10. The method according to claim 1, in, The carbon C concentration ratio of the SiCN material is not less than 36%.

11. The method of claim 1, further comprising: After annealing the bonding structure, the sacrificial wafer and the stop layer are removed sequentially from the bonding structure.

12. The method according to claim 11, in, The sacrificial wafer and the stop layer are removed using wet cleaning and dry cleaning processes, respectively.

13. A method for manufacturing an SOI substrate, SOI referring to silicon-on-insulator, the method comprising: A stop layer, a semiconductor layer, an insulating buried layer, and a first bonding insulating layer are sequentially formed on the sacrificial wafer to generate a first structure; A second bonding insulating layer is formed on a reference wafer to generate a second structure; Si-OH bonds are formed in the first bonded insulating layer and the second bonded insulating layer; as well as The first structure and the second structure are bonded to form a bonding structure, such that the first bonding insulating layer is bonded to the second bonding insulating layer.

14. The method of claim 13, further comprising: The bonded structure is then annealed.

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