Semiconductor device and method of forming

Abstract

The application provides a semiconductor device and a forming method, which comprises the following steps: providing a semiconductor substrate, the semiconductor substrate is provided with a first interlayer dielectric layer; forming a plurality of metal lines on the first interlayer dielectric layer, the metal lines are laid on the first interlayer dielectric layer, and gaps are formed between adjacent metal lines, the metal lines comprise a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer which are stacked in sequence; forming a dielectric antireflection layer on the top titanium metal layer, the dielectric antireflection layer covers part of the top titanium metal layer and exposes edges of the top titanium metal layer; forming a silicon nitride protective layer on the dielectric antireflection layer and the edges of the top titanium metal layer, the silicon nitride protective layer covers at least the top surface and the sidewall of the top titanium metal layer, and the silicon nitride protective layer on the adjacent metal lines has gaps; and depositing an oxide on the silicon nitride protective layer to form a second interlayer dielectric layer, the interlayer dielectric layer fills the gaps. The application reduces the probability of metal particles leading to interconnection between the metal lines.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for forming it. Background Technology

[0002] In the back-end interconnect process of 8-inch chips, it is necessary to connect the metal lines of multiple metal layers with the metal lines of the upper metal layer or the metal lines of the lower metal layer.

[0003] Taking one of the metal layers as an example, such as Figure 1 and Figure 2 A first interlayer dielectric layer 110 is formed on the semiconductor substrate. Metal lines 120 are formed on the first interlayer dielectric layer 110. Here, the metal lines 120 of an 8-inch chip include a bottom titanium metal layer 121, an aluminum metal layer 122, and a top titanium metal layer 123 sequentially stacked on the first interlayer dielectric layer 110. Gaps exist between the metal lines 120, and a second interlayer dielectric layer 140 is formed within these gaps to isolate them from other metal layers. Vias are subsequently formed in the second interlayer dielectric layer 140 to connect with other metal layers. During the formation of the second interlayer dielectric layer 140, silicon dioxide is filled into the gaps using high-density plasma (HDP) deposition. Before forming the second interlayer dielectric layer 140, a dielectric anti-reflective coating (DARC) is formed on the top titanium metal layer 123.

[0004] However, the high-density plasma (HDP) deposition of silicon dioxide to form the second interlayer dielectric layer 140 involves simultaneous material deposition and sputtering etching. The dielectric anti-reflective layer 130 does not completely cover the top titanium metal layer 123. Therefore, the exposed top titanium metal layer 123 is likely to be sputtered, generating a large number of metal particles. These metal particles fall into the gaps between the metal lines 120, causing short circuits in the interconnections between the metal lines 120. Summary of the Invention

[0005] The purpose of this invention is to provide a semiconductor device and a method for forming it, which can reduce the probability of metal particles being generated by sputtering of the top titanium metal layer, thereby reducing the probability of interconnection between metal lines.

[0006] To achieve the above objectives, the present invention provides a method for forming a semiconductor device, comprising:

[0007] A semiconductor substrate is provided, on which a first interlayer dielectric layer is formed;

[0008] Multiple metal wires are formed on the first interlayer dielectric layer, with gaps between adjacent metal wires. The metal wires include a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer stacked sequentially on the first interlayer dielectric layer.

[0009] A dielectric anti-reflective layer is formed on the top titanium metal layer, the dielectric anti-reflective layer covering a portion of the top titanium metal layer and exposing the edge of the top titanium metal layer;

[0010] A silicon nitride protective layer is formed on the dielectric antireflective layer and on the edge of the top titanium metal layer. The silicon nitride protective layer at least covers the top surface and sidewalls of the top titanium metal layer, and there is a gap between the silicon nitride protective layers on adjacent metal lines.

[0011] An oxide is deposited on the silicon nitride protective layer to form a second interlayer dielectric layer, which fills the gaps.

[0012] Optionally, in the method for forming the semiconductor device, the width of the gap between adjacent metal lines is less than or equal to 0.28 μm.

[0013] Optionally, in the method for forming the semiconductor device, the thickness of the silicon nitride protective layer is 150 angstroms to 250 angstroms.

[0014] Optionally, in the method for forming the semiconductor device, a silicon nitride protective layer is formed using a chemical vapor deposition method.

[0015] Optionally, in the method for forming the semiconductor device, an oxide is deposited using a high-density plasma deposition method to form a second interlayer dielectric layer within the gap.

[0016] Optionally, in the method for forming the semiconductor device, the silicon nitride protective layer further covers the sidewalls of the aluminum metal layer, the sidewalls of the underlying titanium metal layer, and the top surface of the first interlayer dielectric layer exposed in the gap.

[0017] Optionally, in the method for forming the semiconductor device, the materials of both the first interlayer dielectric layer and the second interlayer dielectric layer include silicon dioxide.

[0018] Optionally, in the method for forming the semiconductor device, forming a plurality of metal lines laid on and interconnected on the first interlayer dielectric layer includes:

[0019] A metal layer is formed on the first interlayer dielectric layer, the metal layer comprising a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer stacked sequentially on the first interlayer dielectric layer;

[0020] The top titanium metal layer, aluminum metal layer and bottom titanium metal layer are etched sequentially to form multiple metal lines, and the gaps between the metal lines expose a portion of the first interlayer dielectric layer.

[0021] The present invention also provides a semiconductor device, comprising:

[0022] A semiconductor substrate, wherein a first interlayer dielectric layer is formed on the semiconductor substrate;

[0023] Multiple metal wires are laid on the first interlayer dielectric layer, with gaps between adjacent metal wires. The metal wires include a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer that are stacked sequentially on the first interlayer dielectric layer.

[0024] A dielectric anti-reflective layer covers a portion of the top titanium metal layer, with the dielectric anti-reflective layer exposed at the edge of the top titanium metal layer;

[0025] A silicon nitride protective layer is located on the dielectric antireflective layer and on the edge of the top titanium metal layer. The silicon nitride protective layer at least covers the top surface and sidewalls of the top titanium metal layer, and there is a gap between the silicon nitride protective layers adjacent to the metal lines.

[0026] A second interlayer dielectric layer is located on the silicon nitride protective layer, and the interlayer dielectric layer is located in the gap.

[0027] Optionally, in the semiconductor device, the thickness of the silicon nitride protective layer is 150 angstroms to 250 angstroms.

[0028] The semiconductor device and its formation method provided by this invention include: providing a semiconductor substrate, on which a first interlayer dielectric layer is formed; forming a plurality of metal lines disposed on the first interlayer dielectric layer, with gaps between adjacent metal lines, the metal lines including a bottom titanium metal layer, an aluminum metal layer, and a top titanium metal layer sequentially stacked on the first interlayer dielectric layer; forming a dielectric antireflective layer on the top titanium metal layer, the dielectric antireflective layer covering a portion of the top titanium metal layer and exposing the edge of the top titanium metal layer; forming a silicon nitride protective layer on the dielectric antireflective layer and on the edge of the top titanium metal layer, the silicon nitride protective layer at least covering the top surface and sidewalls of the top titanium metal layer, with gaps between adjacent silicon nitride protective layers on the metal lines; and depositing an oxide on the silicon nitride protective layer to form a second interlayer dielectric layer, the interlayer dielectric layer filling the gaps. In this invention, before depositing the oxide to form the second interlayer dielectric layer, a silicon nitride protective layer is first formed to at least cover the exposed top surface and sidewalls of the top titanium metal layer. By protecting the top titanium metal layer from bombardment and sputtering of metal particles during the deposition of oxides to form the second interlayer dielectric layer, the likelihood of metal particles causing interconnections between metal lines is reduced. Attached Figure Description

[0029] Figure 1 and Figure 2 This is a schematic diagram of the structure during the formation process of existing semiconductor devices;

[0030] Figure 3 This is a flowchart of a method for forming a semiconductor device according to an embodiment of the present invention;

[0031] Figures 4 to 6 This is a schematic diagram of the structure during the formation process of the semiconductor device according to an embodiment of the present invention;

[0032] In the diagram: 110 - First interlayer dielectric layer, 120 - Metal line, 121 - Bottom titanium metal layer, 122 - Aluminum metal layer, 123 - Second titanium metal layer, 130 - Dielectric anti-reflection layer, 140 - Second interlayer dielectric layer, 210 - First interlayer dielectric layer, 220 - Metal line, 221 - Bottom titanium metal layer, 222 - Aluminum metal layer, 223 - Second titanium metal layer, 230 - Dielectric anti-reflection layer, 240 - Silicon nitride protective layer, 250 - Second interlayer dielectric layer. Detailed Implementation

[0033] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0034] In the following text, the terms “first,” “second,” etc., are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used herein, may be replaced where appropriate. Similarly, if the methods described herein comprise a series of steps, and the order of these steps presented herein is not necessarily the only possible order in which they can be performed, and some described steps may be omitted and / or other steps not described herein may be added to the method.

[0035] Furthermore, it should be understood that when a layer (or film), region, pattern, or structure is referred to as being "on" a substrate, layer (or film), region, and / or pattern, it can be located directly on another layer or substrate, and / or intercalation layers may also be present. Additionally, it should be understood that when a layer is referred to as being "under" another layer, it can be located directly under that layer, and / or one or more intercalation layers may also be present. Furthermore, references to "on" and "under" the layers may be made based on the accompanying drawings.

[0036] Please refer to Figure 3 The present invention provides a method for forming a semiconductor device, comprising:

[0037] S11: Provides a semiconductor substrate, on which a first interlayer dielectric layer is formed;

[0038] S12: Multiple metal wires are formed on the first interlayer dielectric layer, with gaps between adjacent metal wires. The metal wires include a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer that are stacked sequentially on the first interlayer dielectric layer.

[0039] S13: A dielectric anti-reflective layer is formed on the top titanium metal layer, which covers part of the top titanium metal layer and exposes the edge of the top titanium metal layer.

[0040] S14: A silicon nitride protective layer is formed on the dielectric anti-reflection layer and on the edge of the top titanium metal layer. The silicon nitride protective layer at least covers the top surface and sidewalls of the top titanium metal layer, and there is a gap between the silicon nitride protective layers on adjacent metal lines.

[0041] S15: Deposit oxide on the silicon nitride protective layer to form a second interlayer dielectric layer, which fills the gaps.

[0042] Please refer to Figure 4 A semiconductor substrate is provided, which may be a metal layer or functional device structure used for interconnection with other functional layers or metal layers. A first interlayer dielectric layer 210 is formed on the semiconductor substrate. The material of the first interlayer dielectric layer 210 includes silicon dioxide.

[0043] A metal layer is formed on the first interlayer dielectric layer 210. The metal layer includes a bottom titanium metal layer, an aluminum metal layer, and a top titanium metal layer sequentially stacked on the first interlayer dielectric layer. This can be achieved by sequentially depositing titanium metal material, aluminum metal material, and titanium metal material on the first interlayer dielectric layer. Next, the top titanium metal layer, aluminum metal layer, and bottom titanium metal layer are sequentially etched to form a plurality of metal lines laid on the first interlayer dielectric layer 210. Adjacent metal lines have gaps between them, and the gaps between the metal lines 220 expose a portion of the first interlayer dielectric layer 210. The width of the gap between adjacent metal lines is less than or equal to 0.28 μm. The metal line 220 includes a bottom titanium metal layer 221, an aluminum metal layer 222, and a top titanium metal layer 223 sequentially stacked on the first interlayer dielectric layer.

[0044] A dielectric anti-reflective layer 230 is formed on the top titanium metal layer 223, which covers part of the top titanium metal layer 223 and exposes the edge of the top titanium metal layer 223.

[0045] Next, please refer to Figure 5A silicon nitride protective layer 240 is formed on the dielectric antireflective layer 230 and at the edge of the top titanium metal layer 223. The silicon nitride protective layer 240 at least covers the top surface and sidewalls of the top titanium metal layer 223, and there is a gap between the silicon nitride protective layers 240 on adjacent metal lines 220. The thickness of the silicon nitride protective layer is 150 angstroms to 250 angstroms, specifically 200 angstroms. The silicon nitride protective layer 240 can be formed using a chemical vapor deposition (CVD) method. In one embodiment, the silicon nitride protective layer 240 may only cover the top surface and sidewalls of the top titanium metal layer 223, without covering the aluminum metal layer 222 and the bottom titanium metal layer 221. In another embodiment, the silicon nitride protective layer 240 covers not only the top surface and sidewalls of the top titanium metal layer 223, but also the sidewalls of the aluminum metal layer 222, the sidewalls of the bottom titanium metal layer 221, and the top surface of the first interlayer dielectric layer 210 exposed by the gap.

[0046] Next, please refer to Figure 6 An oxide, such as silicon dioxide, is deposited on the silicon nitride protective layer 240 to form a second interlayer dielectric layer 250, which fills the gaps. Specifically, silicon dioxide can be deposited using a high-density plasma (HDP) deposition method to form the second interlayer dielectric layer 250. In this case, since the silicon nitride protective layer 240 protects the top titanium metal layer 223, metal particles will not be sputtered off.

[0047] The present invention also provides a semiconductor device, comprising: a semiconductor substrate on which a first interlayer dielectric layer is formed; a plurality of metal lines disposed on the first interlayer dielectric layer, with gaps between adjacent metal lines, the metal lines comprising a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer stacked sequentially on the first interlayer dielectric layer; a dielectric antireflective layer covering a portion of the top titanium metal layer, the dielectric antireflective layer exposing the edge of the top titanium metal layer; a silicon nitride protective layer located on the dielectric antireflective layer and on the edge of the top titanium metal layer, the silicon nitride protective layer at least covering the top surface and sidewalls of the top titanium metal layer, with gaps between adjacent silicon nitride protective layers on the metal lines; and a second interlayer dielectric layer located on the silicon nitride protective layer, the interlayer dielectric layer being located in the gaps.

[0048] In summary, the semiconductor device and formation method provided in the embodiments of the present invention include: providing a semiconductor substrate, on which a first interlayer dielectric layer is formed; forming a plurality of metal lines disposed on the first interlayer dielectric layer, with gaps between adjacent metal lines, the metal lines including a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer sequentially stacked on the first interlayer dielectric layer; forming a dielectric antireflective layer on the top titanium metal layer, the dielectric antireflective layer covering a portion of the top titanium metal layer and exposing the edge of the top titanium metal layer; forming a silicon nitride protective layer on the dielectric antireflective layer and on the edge of the top titanium metal layer, the silicon nitride protective layer at least covering the top surface and sidewalls of the top titanium metal layer, with gaps between adjacent silicon nitride protective layers on the metal lines; and depositing an oxide on the silicon nitride protective layer to form a second interlayer dielectric layer, the interlayer dielectric layer filling the gaps. In this invention, before depositing the oxide to form the second interlayer dielectric layer, a silicon nitride protective layer is first formed to at least cover the exposed top surface and sidewalls of the top titanium metal layer. By protecting the top titanium metal layer from bombardment and sputtering of metal particles during the deposition of oxides to form the second interlayer dielectric layer, the likelihood of metal particles causing interconnections between metal lines is reduced.

[0049] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.

Claims

1. A method for forming a semiconductor device, characterized in that, include: A semiconductor substrate is provided, on which a first interlayer dielectric layer is formed; Multiple metal wires are formed on the first interlayer dielectric layer, with gaps between adjacent metal wires. The metal wires include a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer stacked sequentially on the first interlayer dielectric layer. A dielectric anti-reflective layer is formed on the top titanium metal layer, the dielectric anti-reflective layer covering a portion of the top titanium metal layer and exposing the edge of the top titanium metal layer; A silicon nitride protective layer is formed on the dielectric antireflective layer and on the edge of the top titanium metal layer. The silicon nitride protective layer at least covers the top surface and sidewalls of the top titanium metal layer, and there is a gap between the silicon nitride protective layers on adjacent metal lines. An oxide is deposited on the silicon nitride protective layer to form a second interlayer dielectric layer, which fills the gaps.

2. The method for forming a semiconductor device as described in claim 1, characterized in that, The width of the gap between adjacent metal wires is less than or equal to 0.28 μm.

3. The method for forming a semiconductor device as described in claim 1, characterized in that, The thickness of the silicon nitride protective layer is 150 angstroms to 250 angstroms.

4. The method for forming a semiconductor device as described in claim 1, characterized in that, A silicon nitride protective layer is formed using chemical vapor deposition.

5. The method for forming a semiconductor device as described in claim 1, characterized in that, Oxides are deposited using a high-density plasma deposition method to form a second interlayer dielectric layer within the gaps.

6. The method for forming a semiconductor device as described in claim 1, characterized in that, The silicon nitride protective layer also covers the sidewalls of the aluminum metal layer, the sidewalls of the bottom titanium metal layer, and the top surface of the first interlayer dielectric layer exposed in the gap.

7. The method for forming a semiconductor device as described in claim 1, characterized in that, The materials of both the first interlayer dielectric layer and the second interlayer dielectric layer include silicon dioxide.

8. The method for forming a semiconductor device as described in claim 1, characterized in that, Forming a plurality of interconnected metal wires on the first interlayer dielectric layer includes: A metal layer is formed on the first interlayer dielectric layer, the metal layer comprising a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer stacked sequentially on the first interlayer dielectric layer; The top titanium metal layer, aluminum metal layer and bottom titanium metal layer are etched sequentially to form multiple metal lines, and the gaps between the metal lines expose a portion of the first interlayer dielectric layer.

9. A semiconductor device formed using the semiconductor device formation method according to any one of claims 1 to 8, characterized in that, include: A semiconductor substrate, wherein a first interlayer dielectric layer is formed on the semiconductor substrate; Multiple metal wires are laid on the first interlayer dielectric layer, with gaps between adjacent metal wires. The metal wires include a bottom titanium metal layer, an aluminum metal layer and a top titanium metal layer that are stacked sequentially on the first interlayer dielectric layer. A dielectric anti-reflective layer covers a portion of the top titanium metal layer, with the dielectric anti-reflective layer exposed at the edge of the top titanium metal layer; A silicon nitride protective layer is located on the dielectric antireflective layer and on the edge of the top titanium metal layer. The silicon nitride protective layer at least covers the top surface and sidewalls of the top titanium metal layer, and there is a gap between the silicon nitride protective layers adjacent to the metal lines. A second interlayer dielectric layer is located on the silicon nitride protective layer, and the interlayer dielectric layer is located in the gap.

10. The semiconductor device as claimed in claim 9, characterized in that, The thickness of the silicon nitride protective layer is 150 angstroms to 250 angstroms.

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